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ADD: added support for commands. READ_SIGNATURE 0x3C, READ_COUNTER 0x39 for NTAGs...
[proxmark3-svn] / armsrc / iso14443a.c
1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "cmd.h"
18 #include "iso14443crc.h"
19 #include "iso14443a.h"
20 #include "crapto1.h"
21 #include "mifareutil.h"
22 #include "BigBuf.h"
23 static uint32_t iso14a_timeout;
24 int rsamples = 0;
25 uint8_t trigger = 0;
26 // the block number for the ISO14443-4 PCB
27 static uint8_t iso14_pcb_blocknum = 0;
28
29 //
30 // ISO14443 timing:
31 //
32 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
33 #define REQUEST_GUARD_TIME (7000/16 + 1)
34 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
35 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
36 // bool LastCommandWasRequest = FALSE;
37
38 //
39 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
40 //
41 // When the PM acts as reader and is receiving tag data, it takes
42 // 3 ticks delay in the AD converter
43 // 16 ticks until the modulation detector completes and sets curbit
44 // 8 ticks until bit_to_arm is assigned from curbit
45 // 8*16 ticks for the transfer from FPGA to ARM
46 // 4*16 ticks until we measure the time
47 // - 8*16 ticks because we measure the time of the previous transfer
48 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
49
50 // When the PM acts as a reader and is sending, it takes
51 // 4*16 ticks until we can write data to the sending hold register
52 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
53 // 8 ticks until the first transfer starts
54 // 8 ticks later the FPGA samples the data
55 // 1 tick to assign mod_sig_coil
56 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
57
58 // When the PM acts as tag and is receiving it takes
59 // 2 ticks delay in the RF part (for the first falling edge),
60 // 3 ticks for the A/D conversion,
61 // 8 ticks on average until the start of the SSC transfer,
62 // 8 ticks until the SSC samples the first data
63 // 7*16 ticks to complete the transfer from FPGA to ARM
64 // 8 ticks until the next ssp_clk rising edge
65 // 4*16 ticks until we measure the time
66 // - 8*16 ticks because we measure the time of the previous transfer
67 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
68
69 // The FPGA will report its internal sending delay in
70 uint16_t FpgaSendQueueDelay;
71 // the 5 first bits are the number of bits buffered in mod_sig_buf
72 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
73 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
74
75 // When the PM acts as tag and is sending, it takes
76 // 4*16 ticks until we can write data to the sending hold register
77 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
78 // 8 ticks until the first transfer starts
79 // 8 ticks later the FPGA samples the data
80 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
81 // + 1 tick to assign mod_sig_coil
82 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
83
84 // When the PM acts as sniffer and is receiving tag data, it takes
85 // 3 ticks A/D conversion
86 // 14 ticks to complete the modulation detection
87 // 8 ticks (on average) until the result is stored in to_arm
88 // + the delays in transferring data - which is the same for
89 // sniffing reader and tag data and therefore not relevant
90 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
91
92 // When the PM acts as sniffer and is receiving reader data, it takes
93 // 2 ticks delay in analogue RF receiver (for the falling edge of the
94 // start bit, which marks the start of the communication)
95 // 3 ticks A/D conversion
96 // 8 ticks on average until the data is stored in to_arm.
97 // + the delays in transferring data - which is the same for
98 // sniffing reader and tag data and therefore not relevant
99 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
100
101 //variables used for timing purposes:
102 //these are in ssp_clk cycles:
103 static uint32_t NextTransferTime;
104 static uint32_t LastTimeProxToAirStart;
105 static uint32_t LastProxToAirDuration;
106
107
108
109 // CARD TO READER - manchester
110 // Sequence D: 11110000 modulation with subcarrier during first half
111 // Sequence E: 00001111 modulation with subcarrier during second half
112 // Sequence F: 00000000 no modulation with subcarrier
113 // READER TO CARD - miller
114 // Sequence X: 00001100 drop after half a period
115 // Sequence Y: 00000000 no drop
116 // Sequence Z: 11000000 drop at start
117 #define SEC_D 0xf0
118 #define SEC_E 0x0f
119 #define SEC_F 0x00
120 #define SEC_X 0x0c
121 #define SEC_Y 0x00
122 #define SEC_Z 0xc0
123
124 const uint8_t OddByteParity[256] = {
125 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
126 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
127 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
128 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
129 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
130 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
131 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
132 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
133 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
138 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
139 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
140 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
141 };
142
143
144 void iso14a_set_trigger(bool enable) {
145 trigger = enable;
146 }
147
148
149 void iso14a_set_timeout(uint32_t timeout) {
150 iso14a_timeout = timeout;
151 if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106);
152 }
153
154
155 void iso14a_set_ATS_timeout(uint8_t *ats) {
156
157 uint8_t tb1;
158 uint8_t fwi;
159 uint32_t fwt;
160
161 if (ats[0] > 1) { // there is a format byte T0
162 if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
163 if ((ats[1] & 0x10) == 0x10) { // there is an interface byte TA(1) preceding TB(1)
164 tb1 = ats[3];
165 } else {
166 tb1 = ats[2];
167 }
168 fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI)
169 fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc
170
171 iso14a_set_timeout(fwt/(8*16));
172 }
173 }
174 }
175
176
177 //-----------------------------------------------------------------------------
178 // Generate the parity value for a byte sequence
179 //
180 //-----------------------------------------------------------------------------
181 byte_t oddparity (const byte_t bt)
182 {
183 return OddByteParity[bt];
184 }
185
186 void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par)
187 {
188 uint16_t paritybit_cnt = 0;
189 uint16_t paritybyte_cnt = 0;
190 uint8_t parityBits = 0;
191
192 for (uint16_t i = 0; i < iLen; i++) {
193 // Generate the parity bits
194 parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt));
195 if (paritybit_cnt == 7) {
196 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
197 parityBits = 0; // and advance to next Parity Byte
198 paritybyte_cnt++;
199 paritybit_cnt = 0;
200 } else {
201 paritybit_cnt++;
202 }
203 }
204
205 // save remaining parity bits
206 par[paritybyte_cnt] = parityBits;
207
208 }
209
210 void AppendCrc14443a(uint8_t* data, int len)
211 {
212 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
213 }
214
215 void AppendCrc14443b(uint8_t* data, int len)
216 {
217 ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1);
218 }
219
220
221 //=============================================================================
222 // ISO 14443 Type A - Miller decoder
223 //=============================================================================
224 // Basics:
225 // This decoder is used when the PM3 acts as a tag.
226 // The reader will generate "pauses" by temporarily switching of the field.
227 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
228 // The FPGA does a comparison with a threshold and would deliver e.g.:
229 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
230 // The Miller decoder needs to identify the following sequences:
231 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
232 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
233 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
234 // Note 1: the bitstream may start at any time. We therefore need to sync.
235 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
236 //-----------------------------------------------------------------------------
237 static tUart Uart;
238
239 // Lookup-Table to decide if 4 raw bits are a modulation.
240 // We accept the following:
241 // 0001 - a 3 tick wide pause
242 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
243 // 0111 - a 2 tick wide pause shifted left
244 // 1001 - a 2 tick wide pause shifted right
245 const bool Mod_Miller_LUT[] = {
246 FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE,
247 FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE
248 };
249 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
250 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
251
252 void UartReset()
253 {
254 Uart.state = STATE_UNSYNCD;
255 Uart.bitCount = 0;
256 Uart.len = 0; // number of decoded data bytes
257 Uart.parityLen = 0; // number of decoded parity bytes
258 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
259 Uart.parityBits = 0; // holds 8 parity bits
260 Uart.startTime = 0;
261 Uart.endTime = 0;
262
263 Uart.byteCntMax = 0;
264 Uart.posCnt = 0;
265 Uart.syncBit = 9999;
266 }
267
268 void UartInit(uint8_t *data, uint8_t *parity)
269 {
270 Uart.output = data;
271 Uart.parity = parity;
272 Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits
273 UartReset();
274 }
275
276 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
277 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
278 {
279
280 Uart.fourBits = (Uart.fourBits << 8) | bit;
281
282 if (Uart.state == STATE_UNSYNCD) { // not yet synced
283
284 Uart.syncBit = 9999; // not set
285
286 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
287 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
288 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
289
290 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
291 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
292 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
293 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
294 //
295 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
296 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
297
298 if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7;
299 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6;
300 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5;
301 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4;
302 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3;
303 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2;
304 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1;
305 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0;
306
307 if (Uart.syncBit != 9999) { // found a sync bit
308 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
309 Uart.startTime -= Uart.syncBit;
310 Uart.endTime = Uart.startTime;
311 Uart.state = STATE_START_OF_COMMUNICATION;
312 }
313
314 } else {
315
316 if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) {
317 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error
318 UartReset();
319 } else { // Modulation in first half = Sequence Z = logic "0"
320 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
321 UartReset();
322 } else {
323 Uart.bitCount++;
324 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
325 Uart.state = STATE_MILLER_Z;
326 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
327 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
328 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
329 Uart.parityBits <<= 1; // make room for the parity bit
330 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
331 Uart.bitCount = 0;
332 Uart.shiftReg = 0;
333 if((Uart.len&0x0007) == 0) { // every 8 data bytes
334 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
335 Uart.parityBits = 0;
336 }
337 }
338 }
339 }
340 } else {
341 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
342 Uart.bitCount++;
343 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
344 Uart.state = STATE_MILLER_X;
345 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
346 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
347 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
348 Uart.parityBits <<= 1; // make room for the new parity bit
349 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
350 Uart.bitCount = 0;
351 Uart.shiftReg = 0;
352 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
353 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
354 Uart.parityBits = 0;
355 }
356 }
357 } else { // no modulation in both halves - Sequence Y
358 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
359 Uart.state = STATE_UNSYNCD;
360 Uart.bitCount--; // last "0" was part of EOC sequence
361 Uart.shiftReg <<= 1; // drop it
362 if(Uart.bitCount > 0) { // if we decoded some bits
363 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
364 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
365 Uart.parityBits <<= 1; // add a (void) parity bit
366 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits
367 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
368 return TRUE;
369 } else if (Uart.len & 0x0007) { // there are some parity bits to store
370 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits
371 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
372 }
373 if (Uart.len) {
374 return TRUE; // we are finished with decoding the raw data sequence
375 } else {
376 UartReset(); // Nothing received - start over
377 }
378 }
379 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
380 UartReset();
381 } else { // a logic "0"
382 Uart.bitCount++;
383 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
384 Uart.state = STATE_MILLER_Y;
385 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
386 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
387 Uart.parityBits <<= 1; // make room for the parity bit
388 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
389 Uart.bitCount = 0;
390 Uart.shiftReg = 0;
391 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
392 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
393 Uart.parityBits = 0;
394 }
395 }
396 }
397 }
398 }
399
400 }
401
402 return FALSE; // not finished yet, need more data
403 }
404
405
406
407 //=============================================================================
408 // ISO 14443 Type A - Manchester decoder
409 //=============================================================================
410 // Basics:
411 // This decoder is used when the PM3 acts as a reader.
412 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
413 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
414 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
415 // The Manchester decoder needs to identify the following sequences:
416 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
417 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
418 // 8 ticks unmodulated: Sequence F = end of communication
419 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
420 // Note 1: the bitstream may start at any time. We therefore need to sync.
421 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
422 static tDemod Demod;
423
424 // Lookup-Table to decide if 4 raw bits are a modulation.
425 // We accept three or four "1" in any position
426 const bool Mod_Manchester_LUT[] = {
427 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
428 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
429 };
430
431 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
432 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
433
434
435 void DemodReset()
436 {
437 Demod.state = DEMOD_UNSYNCD;
438 Demod.len = 0; // number of decoded data bytes
439 Demod.parityLen = 0;
440 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
441 Demod.parityBits = 0; //
442 Demod.collisionPos = 0; // Position of collision bit
443 Demod.twoBits = 0xffff; // buffer for 2 Bits
444 Demod.highCnt = 0;
445 Demod.startTime = 0;
446 Demod.endTime = 0;
447
448 //
449 Demod.bitCount = 0;
450 Demod.syncBit = 0xFFFF;
451 Demod.samples = 0;
452 }
453
454 void DemodInit(uint8_t *data, uint8_t *parity)
455 {
456 Demod.output = data;
457 Demod.parity = parity;
458 DemodReset();
459 }
460
461 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
462 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
463 {
464
465 Demod.twoBits = (Demod.twoBits << 8) | bit;
466
467 if (Demod.state == DEMOD_UNSYNCD) {
468
469 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
470 if (Demod.twoBits == 0x0000) {
471 Demod.highCnt++;
472 } else {
473 Demod.highCnt = 0;
474 }
475 } else {
476 Demod.syncBit = 0xFFFF; // not set
477 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
478 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
479 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
480 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
481 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
482 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
483 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
484 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
485 if (Demod.syncBit != 0xFFFF) {
486 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
487 Demod.startTime -= Demod.syncBit;
488 Demod.bitCount = offset; // number of decoded data bits
489 Demod.state = DEMOD_MANCHESTER_DATA;
490 }
491 }
492
493 } else {
494
495 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
496 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
497 if (!Demod.collisionPos) {
498 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
499 }
500 } // modulation in first half only - Sequence D = 1
501 Demod.bitCount++;
502 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
503 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
504 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
505 Demod.parityBits <<= 1; // make room for the parity bit
506 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
507 Demod.bitCount = 0;
508 Demod.shiftReg = 0;
509 if((Demod.len&0x0007) == 0) { // every 8 data bytes
510 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
511 Demod.parityBits = 0;
512 }
513 }
514 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
515 } else { // no modulation in first half
516 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
517 Demod.bitCount++;
518 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
519 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
520 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
521 Demod.parityBits <<= 1; // make room for the new parity bit
522 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
523 Demod.bitCount = 0;
524 Demod.shiftReg = 0;
525 if ((Demod.len&0x0007) == 0) { // every 8 data bytes
526 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
527 Demod.parityBits = 0;
528 }
529 }
530 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
531 } else { // no modulation in both halves - End of communication
532 if(Demod.bitCount > 0) { // there are some remaining data bits
533 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
534 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
535 Demod.parityBits <<= 1; // add a (void) parity bit
536 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
537 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
538 return TRUE;
539 } else if (Demod.len & 0x0007) { // there are some parity bits to store
540 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
541 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
542 }
543 if (Demod.len) {
544 return TRUE; // we are finished with decoding the raw data sequence
545 } else { // nothing received. Start over
546 DemodReset();
547 }
548 }
549 }
550 }
551 return FALSE; // not finished yet, need more data
552 }
553
554 //=============================================================================
555 // Finally, a `sniffer' for ISO 14443 Type A
556 // Both sides of communication!
557 //=============================================================================
558
559 //-----------------------------------------------------------------------------
560 // Record the sequence of commands sent by the reader to the tag, with
561 // triggering so that we start recording at the point that the tag is moved
562 // near the reader.
563 //-----------------------------------------------------------------------------
564 void RAMFUNC SniffIso14443a(uint8_t param) {
565 // param:
566 // bit 0 - trigger from first card answer
567 // bit 1 - trigger from first reader 7-bit request
568
569 LEDsoff();
570
571 // We won't start recording the frames that we acquire until we trigger;
572 // a good trigger condition to get started is probably when we see a
573 // response from the tag.
574 // triggered == FALSE -- to wait first for card
575 bool triggered = !(param & 0x03);
576
577 // Allocate memory from BigBuf for some buffers
578 // free all previous allocations first
579 BigBuf_free();
580
581 // The command (reader -> tag) that we're receiving.
582 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
583 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
584
585 // The response (tag -> reader) that we're receiving.
586 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
587 uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE);
588
589 // The DMA buffer, used to stream samples from the FPGA
590 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
591
592 // init trace buffer
593 clear_trace();
594 set_tracing(TRUE);
595
596 uint8_t *data = dmaBuf;
597 uint8_t previous_data = 0;
598 int maxDataLen = 0;
599 int dataLen = 0;
600 bool TagIsActive = FALSE;
601 bool ReaderIsActive = FALSE;
602
603 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
604
605 // Set up the demodulator for tag -> reader responses.
606 DemodInit(receivedResponse, receivedResponsePar);
607
608 // Set up the demodulator for the reader -> tag commands
609 UartInit(receivedCmd, receivedCmdPar);
610
611 // Setup and start DMA.
612 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
613
614 // And now we loop, receiving samples.
615 for(uint32_t rsamples = 0; TRUE; ) {
616
617 if(BUTTON_PRESS()) {
618 DbpString("cancelled by button");
619 break;
620 }
621
622 LED_A_ON();
623 WDT_HIT();
624
625 int register readBufDataP = data - dmaBuf;
626 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
627 if (readBufDataP <= dmaBufDataP){
628 dataLen = dmaBufDataP - readBufDataP;
629 } else {
630 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
631 }
632 // test for length of buffer
633 if(dataLen > maxDataLen) {
634 maxDataLen = dataLen;
635 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
636 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
637 break;
638 }
639 }
640 if(dataLen < 1) continue;
641
642 // primary buffer was stopped( <-- we lost data!
643 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
644 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
645 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
646 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
647 }
648 // secondary buffer sets as primary, secondary buffer was stopped
649 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
650 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
651 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
652 }
653
654 LED_A_OFF();
655
656 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
657
658 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
659 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
660 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
661 LED_C_ON();
662
663 // check - if there is a short 7bit request from reader
664 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
665
666 if(triggered) {
667 if (!LogTrace(receivedCmd,
668 Uart.len,
669 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
670 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
671 Uart.parity,
672 TRUE)) break;
673 }
674 /* And ready to receive another command. */
675 UartReset();
676 //UartInit(receivedCmd, receivedCmdPar);
677 /* And also reset the demod code, which might have been */
678 /* false-triggered by the commands from the reader. */
679 DemodReset();
680 LED_B_OFF();
681 }
682 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
683 }
684
685 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
686 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
687 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
688 LED_B_ON();
689
690 if (!LogTrace(receivedResponse,
691 Demod.len,
692 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
693 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
694 Demod.parity,
695 FALSE)) break;
696
697 if ((!triggered) && (param & 0x01)) triggered = TRUE;
698
699 // And ready to receive another response.
700 DemodReset();
701 // And reset the Miller decoder including itS (now outdated) input buffer
702 UartInit(receivedCmd, receivedCmdPar);
703
704 LED_C_OFF();
705 }
706 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
707 }
708 }
709
710 previous_data = *data;
711 rsamples++;
712 data++;
713 if(data == dmaBuf + DMA_BUFFER_SIZE) {
714 data = dmaBuf;
715 }
716 } // main cycle
717
718 DbpString("COMMAND FINISHED");
719
720 FpgaDisableSscDma();
721 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
722 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]);
723 LEDsoff();
724 }
725
726 //-----------------------------------------------------------------------------
727 // Prepare tag messages
728 //-----------------------------------------------------------------------------
729 static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
730 {
731 ToSendReset();
732
733 // Correction bit, might be removed when not needed
734 ToSendStuffBit(0);
735 ToSendStuffBit(0);
736 ToSendStuffBit(0);
737 ToSendStuffBit(0);
738 ToSendStuffBit(1); // 1
739 ToSendStuffBit(0);
740 ToSendStuffBit(0);
741 ToSendStuffBit(0);
742
743 // Send startbit
744 ToSend[++ToSendMax] = SEC_D;
745 LastProxToAirDuration = 8 * ToSendMax - 4;
746
747 for(uint16_t i = 0; i < len; i++) {
748 uint8_t b = cmd[i];
749
750 // Data bits
751 for(uint16_t j = 0; j < 8; j++) {
752 if(b & 1) {
753 ToSend[++ToSendMax] = SEC_D;
754 } else {
755 ToSend[++ToSendMax] = SEC_E;
756 }
757 b >>= 1;
758 }
759
760 // Get the parity bit
761 if (parity[i>>3] & (0x80>>(i&0x0007))) {
762 ToSend[++ToSendMax] = SEC_D;
763 LastProxToAirDuration = 8 * ToSendMax - 4;
764 } else {
765 ToSend[++ToSendMax] = SEC_E;
766 LastProxToAirDuration = 8 * ToSendMax;
767 }
768 }
769
770 // Send stopbit
771 ToSend[++ToSendMax] = SEC_F;
772
773 // Convert from last byte pos to length
774 ToSendMax++;
775 }
776
777 static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
778 {
779 uint8_t par[MAX_PARITY_SIZE];
780
781 GetParity(cmd, len, par);
782 CodeIso14443aAsTagPar(cmd, len, par);
783 }
784
785
786 static void Code4bitAnswerAsTag(uint8_t cmd)
787 {
788 int i;
789
790 ToSendReset();
791
792 // Correction bit, might be removed when not needed
793 ToSendStuffBit(0);
794 ToSendStuffBit(0);
795 ToSendStuffBit(0);
796 ToSendStuffBit(0);
797 ToSendStuffBit(1); // 1
798 ToSendStuffBit(0);
799 ToSendStuffBit(0);
800 ToSendStuffBit(0);
801
802 // Send startbit
803 ToSend[++ToSendMax] = SEC_D;
804
805 uint8_t b = cmd;
806 for(i = 0; i < 4; i++) {
807 if(b & 1) {
808 ToSend[++ToSendMax] = SEC_D;
809 LastProxToAirDuration = 8 * ToSendMax - 4;
810 } else {
811 ToSend[++ToSendMax] = SEC_E;
812 LastProxToAirDuration = 8 * ToSendMax;
813 }
814 b >>= 1;
815 }
816
817 // Send stopbit
818 ToSend[++ToSendMax] = SEC_F;
819
820 // Convert from last byte pos to length
821 ToSendMax++;
822 }
823
824 //-----------------------------------------------------------------------------
825 // Wait for commands from reader
826 // Stop when button is pressed
827 // Or return TRUE when command is captured
828 //-----------------------------------------------------------------------------
829 static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
830 {
831 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
832 // only, since we are receiving, not transmitting).
833 // Signal field is off with the appropriate LED
834 LED_D_OFF();
835 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
836
837 // Now run a `software UART' on the stream of incoming samples.
838 UartInit(received, parity);
839
840 // clear RXRDY:
841 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
842
843 for(;;) {
844 WDT_HIT();
845
846 if(BUTTON_PRESS()) return FALSE;
847
848 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
849 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
850 if(MillerDecoding(b, 0)) {
851 *len = Uart.len;
852 return TRUE;
853 }
854 }
855 }
856 }
857
858 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
859 int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
860 int EmSend4bit(uint8_t resp);
861 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
862 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
863 int EmSendCmd(uint8_t *resp, uint16_t respLen);
864 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
865 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
866 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
867
868 static uint8_t* free_buffer_pointer;
869
870 typedef struct {
871 uint8_t* response;
872 size_t response_n;
873 uint8_t* modulation;
874 size_t modulation_n;
875 uint32_t ProxToAirDuration;
876 } tag_response_info_t;
877
878 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
879 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
880 // This will need the following byte array for a modulation sequence
881 // 144 data bits (18 * 8)
882 // 18 parity bits
883 // 2 Start and stop
884 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
885 // 1 just for the case
886 // ----------- +
887 // 166 bytes, since every bit that needs to be send costs us a byte
888 //
889
890
891 // Prepare the tag modulation bits from the message
892 CodeIso14443aAsTag(response_info->response,response_info->response_n);
893
894 // Make sure we do not exceed the free buffer space
895 if (ToSendMax > max_buffer_size) {
896 Dbprintf("Out of memory, when modulating bits for tag answer:");
897 Dbhexdump(response_info->response_n,response_info->response,false);
898 return false;
899 }
900
901 // Copy the byte array, used for this modulation to the buffer position
902 memcpy(response_info->modulation,ToSend,ToSendMax);
903
904 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
905 response_info->modulation_n = ToSendMax;
906 response_info->ProxToAirDuration = LastProxToAirDuration;
907
908 return true;
909 }
910
911
912 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
913 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
914 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
915 // -> need 273 bytes buffer
916 // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits
917 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 370 //273
918
919 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
920 // Retrieve and store the current buffer index
921 response_info->modulation = free_buffer_pointer;
922
923 // Determine the maximum size we can use from our buffer
924 size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE;
925
926 // Forward the prepare tag modulation function to the inner function
927 if (prepare_tag_modulation(response_info, max_buffer_size)) {
928 // Update the free buffer offset
929 free_buffer_pointer += ToSendMax;
930 return true;
931 } else {
932 return false;
933 }
934 }
935
936 //-----------------------------------------------------------------------------
937 // Main loop of simulated tag: receive commands from reader, decide what
938 // response to send, and send it.
939 //-----------------------------------------------------------------------------
940 void SimulateIso14443aTag(int tagType, int flags, int uid_2nd, byte_t* data)
941 {
942
943 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
944 // This can be used in a reader-only attack.
945 // (it can also be retrieved via 'hf 14a list', but hey...
946 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
947 uint8_t ar_nr_collected = 0;
948
949 uint8_t sak;
950
951 uint8_t blockzeros[512];
952 memset(blockzeros, 0x00, sizeof(blockzeros));
953
954 // PACK response to PWD AUTH for EV1/NTAG
955 uint8_t response8[4];
956
957 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
958 uint8_t response1[2];
959
960 switch (tagType) {
961 case 1: { // MIFARE Classic
962 // Says: I am Mifare 1k - original line
963 response1[0] = 0x04;
964 response1[1] = 0x00;
965 sak = 0x08;
966 } break;
967 case 2: { // MIFARE Ultralight
968 // Says: I am a stupid memory tag, no crypto
969 response1[0] = 0x44;
970 response1[1] = 0x00;
971 sak = 0x00;
972 } break;
973 case 3: { // MIFARE DESFire
974 // Says: I am a DESFire tag, ph33r me
975 response1[0] = 0x04;
976 response1[1] = 0x03;
977 sak = 0x20;
978 } break;
979 case 4: { // ISO/IEC 14443-4
980 // Says: I am a javacard (JCOP)
981 response1[0] = 0x04;
982 response1[1] = 0x00;
983 sak = 0x28;
984 } break;
985 case 5: { // MIFARE TNP3XXX
986 // Says: I am a toy
987 response1[0] = 0x01;
988 response1[1] = 0x0f;
989 sak = 0x01;
990 } break;
991 case 6: { // MIFARE Mini
992 // Says: I am a Mifare Mini, 320b
993 response1[0] = 0x44;
994 response1[1] = 0x00;
995 sak = 0x09;
996 } break;
997 case 7: { // NTAG?
998 // Says: I am a NTAG,
999 response1[0] = 0x44;
1000 response1[1] = 0x00;
1001 sak = 0x00;
1002 // PACK
1003 response8[0] = 0x80;
1004 response8[1] = 0x80;
1005 ComputeCrc14443(CRC_14443_A, response8, 2, &response8[2], &response8[3]);
1006 } break;
1007 default: {
1008 Dbprintf("Error: unkown tagtype (%d)",tagType);
1009 return;
1010 } break;
1011 }
1012
1013 // The second response contains the (mandatory) first 24 bits of the UID
1014 uint8_t response2[5] = {0x00};
1015
1016 // Check if the uid uses the (optional) part
1017 uint8_t response2a[5] = {0x00};
1018
1019 if (flags & FLAG_7B_UID_IN_DATA) {
1020 response2[0] = 0x88;
1021 response2[1] = data[0];
1022 response2[2] = data[1];
1023 response2[3] = data[2];
1024
1025 response2a[0] = data[3];
1026 response2a[1] = data[4];
1027 response2a[2] = data[5];
1028 response2a[3] = data[6]; //??
1029 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1030
1031 // Configure the ATQA and SAK accordingly
1032 response1[0] |= 0x40;
1033 sak |= 0x04;
1034 } else {
1035 memcpy(response2, data, 4);
1036 //num_to_bytes(uid_1st,4,response2);
1037 // Configure the ATQA and SAK accordingly
1038 response1[0] &= 0xBF;
1039 sak &= 0xFB;
1040 }
1041
1042 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1043 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1044
1045 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1046 uint8_t response3[3] = {0x00};
1047 response3[0] = sak;
1048 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1049
1050 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1051 uint8_t response3a[3] = {0x00};
1052 response3a[0] = sak & 0xFB;
1053 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1054
1055 uint8_t response5[] = { 0x01, 0x01, 0x01, 0x01 }; // Very random tag nonce
1056 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1057 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1058 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1059 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1060 // TC(1) = 0x02: CID supported, NAD not supported
1061 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
1062
1063 // Prepare GET_VERSION (different for EV-1 / NTAG)
1064 //uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
1065 uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
1066
1067 #define TAG_RESPONSE_COUNT 9
1068 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
1069 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
1070 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
1071 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1072 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
1073 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
1074 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1075 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1076 { .response = response7_NTAG, .response_n = sizeof(response7_NTAG) }, // EV1/NTAG GET_VERSION response
1077 { .response = response8, .response_n = sizeof(response8) }, // EV1/NTAG PACK response
1078 };
1079
1080 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1081 // Such a response is less time critical, so we can prepare them on the fly
1082 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1083 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1084 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1085 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1086 tag_response_info_t dynamic_response_info = {
1087 .response = dynamic_response_buffer,
1088 .response_n = 0,
1089 .modulation = dynamic_modulation_buffer,
1090 .modulation_n = 0
1091 };
1092
1093 BigBuf_free_keep_EM();
1094
1095 // allocate buffers:
1096 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1097 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
1098 free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE);
1099
1100 // clear trace
1101 clear_trace();
1102 set_tracing(TRUE);
1103
1104 // Prepare the responses of the anticollision phase
1105 // there will be not enough time to do this at the moment the reader sends it REQA
1106 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
1107 prepare_allocated_tag_modulation(&responses[i]);
1108 }
1109
1110 int len = 0;
1111
1112 // To control where we are in the protocol
1113 int order = 0;
1114 int lastorder;
1115
1116 // Just to allow some checks
1117 int happened = 0;
1118 int happened2 = 0;
1119 int cmdsRecvd = 0;
1120
1121 // We need to listen to the high-frequency, peak-detected path.
1122 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1123
1124 cmdsRecvd = 0;
1125 tag_response_info_t* p_response;
1126
1127 LED_A_ON();
1128 for(;;) {
1129 // Clean receive command buffer
1130
1131 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1132 DbpString("Button press");
1133 break;
1134 }
1135
1136 p_response = NULL;
1137
1138 // Okay, look at the command now.
1139 lastorder = order;
1140 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1141 p_response = &responses[0]; order = 1;
1142 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1143 p_response = &responses[0]; order = 6;
1144 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1145 p_response = &responses[1]; order = 2;
1146 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1147 p_response = &responses[2]; order = 20;
1148 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1149 p_response = &responses[3]; order = 3;
1150 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1151 p_response = &responses[4]; order = 30;
1152 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1153 uint8_t block = receivedCmd[1];
1154 if ( tagType == 7 ) {
1155
1156 if ( block < 4 ) {
1157 //NTAG 215
1158 uint8_t start = 4 * block;
1159
1160 uint8_t blockdata[50] = {
1161 data[0],data[1],data[2], 0x88 ^ data[0] ^ data[1] ^ data[2],
1162 data[3],data[4],data[5],data[6],
1163 data[3] ^ data[4] ^ data[5] ^ data[6],0x48,0x0f,0xe0,
1164 0xe1,0x10,0x12,0x00,
1165 0x03,0x00,0xfe,0x00,
1166 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
1167 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
1168 0x00,0x00,0x00,0x00,
1169 0x00,0x00};
1170 ComputeCrc14443(CRC_14443_A, blockdata+start, 16, blockdata+start+17, blockdata+start+18);
1171 EmSendCmdEx( blockdata+start, 18, false);
1172 } else {
1173 ComputeCrc14443(CRC_14443_A, blockzeros,16, blockzeros+17,blockzeros+18);
1174 EmSendCmdEx(blockzeros,18,false);
1175 }
1176 p_response = NULL;
1177
1178 } else {
1179 EmSendCmdEx(data+(4*block),16,false);
1180 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1181 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1182 p_response = NULL;
1183 }
1184 } else if(receivedCmd[0] == 0x3A) { // Received a FAST READ -- just returns all zeros.
1185 uint8_t len = (receivedCmd[2]- receivedCmd[1] ) * 4;
1186 ComputeCrc14443(CRC_14443_A, blockzeros,len, blockzeros+len+1, blockzeros+len+2);
1187 EmSendCmdEx(blockzeros,len+2,false);
1188 p_response = NULL;
1189 } else if(receivedCmd[0] == 0x3C && tagType == 7) { // Received a READ SIGNATURE --
1190 // ECC data, taken from a NTAG215 amiibo token. might work. LEN: 32, + 2 crc
1191 uint8_t data[] = {0x56,0x06,0xa6,0x4f,0x43,0x32,0x53,0x6f,
1192 0x43,0xda,0x45,0xd6,0x61,0x38,0xaa,0x1e,
1193 0xcf,0xd3,0x61,0x36,0xca,0x5f,0xbb,0x05,
1194 0xce,0x21,0x24,0x5b,0xa6,0x7a,0x79,0x07,
1195 0x00,0x00};
1196 ComputeCrc14443(CRC_14443_A, data, sizeof(data), data+33, data+34);
1197 EmSendCmdEx(data,sizeof(data),false);
1198 p_response = NULL;
1199 } else if(receivedCmd[0] == 0x39 && tagType == 7) { // Received a READ COUNTER --
1200 uint8_t data[] = {0x00,0x00,0x00,0x00,0x00};
1201 ComputeCrc14443(CRC_14443_A, data, sizeof(data), data+4, data+5);
1202 EmSendCmdEx(data,sizeof(data),false);
1203 p_response = NULL;
1204 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1205
1206 if (tracing) {
1207 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1208 }
1209 p_response = NULL;
1210 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1211
1212 if ( tagType == 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
1213 p_response = &responses[7];
1214 } else {
1215 p_response = &responses[5]; order = 7;
1216 }
1217 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1218 if (tagType == 1 || tagType == 2) { // RATS not supported
1219 EmSend4bit(CARD_NACK_NA);
1220 p_response = NULL;
1221 } else {
1222 p_response = &responses[6]; order = 70;
1223 }
1224 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1225 if (tracing) {
1226 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1227 }
1228 uint32_t nonce = bytes_to_num(response5,4);
1229 uint32_t nr = bytes_to_num(receivedCmd,4);
1230 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1231 //Dbprintf("Auth attempt {nonce}{nr}{ar}: %08x %08x %08x", nonce, nr, ar);
1232
1233 if(flags & FLAG_NR_AR_ATTACK )
1234 {
1235 if(ar_nr_collected < 2){
1236 // Avoid duplicates... probably not necessary, nr should vary.
1237 //if(ar_nr_responses[3] != nr){
1238 ar_nr_responses[ar_nr_collected*5] = 0;
1239 ar_nr_responses[ar_nr_collected*5+1] = 0;
1240 ar_nr_responses[ar_nr_collected*5+2] = nonce;
1241 ar_nr_responses[ar_nr_collected*5+3] = nr;
1242 ar_nr_responses[ar_nr_collected*5+4] = ar;
1243 ar_nr_collected++;
1244 //}
1245 }
1246
1247 if(ar_nr_collected > 1 ) {
1248
1249 if (MF_DBGLEVEL >= 2) {
1250 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
1251 Dbprintf("../tools/mfkey/mfkey32 %07x%08x %08x %08x %08x %08x %08x",
1252 ar_nr_responses[0], // UID1
1253 ar_nr_responses[1], // UID2
1254 ar_nr_responses[2], // NT
1255 ar_nr_responses[3], // AR1
1256 ar_nr_responses[4], // NR1
1257 ar_nr_responses[8], // AR2
1258 ar_nr_responses[9] // NR2
1259 );
1260 }
1261 uint8_t len = ar_nr_collected*5*4;
1262 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,len,0,&ar_nr_responses,len);
1263 ar_nr_collected = 0;
1264 memset(ar_nr_responses, 0x00, len);
1265 }
1266 }
1267 } else if (receivedCmd[0] == 0x1a ) // ULC authentication
1268 {
1269
1270 }
1271 else if (receivedCmd[0] == 0x1b) // NTAG / EV-1 authentication
1272 {
1273 if ( tagType == 7 ) {
1274 p_response = &responses[8]; // PACK response
1275 }
1276 }
1277 else {
1278 // Check for ISO 14443A-4 compliant commands, look at left nibble
1279 switch (receivedCmd[0]) {
1280
1281 case 0x0B:
1282 case 0x0A: { // IBlock (command)
1283 dynamic_response_info.response[0] = receivedCmd[0];
1284 dynamic_response_info.response[1] = 0x00;
1285 dynamic_response_info.response[2] = 0x90;
1286 dynamic_response_info.response[3] = 0x00;
1287 dynamic_response_info.response_n = 4;
1288 } break;
1289
1290 case 0x1A:
1291 case 0x1B: { // Chaining command
1292 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1293 dynamic_response_info.response_n = 2;
1294 } break;
1295
1296 case 0xaa:
1297 case 0xbb: {
1298 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1299 dynamic_response_info.response_n = 2;
1300 } break;
1301
1302 case 0xBA: { //
1303 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1304 dynamic_response_info.response_n = 2;
1305 } break;
1306
1307 case 0xCA:
1308 case 0xC2: { // Readers sends deselect command
1309 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1310 dynamic_response_info.response_n = 2;
1311 } break;
1312
1313 default: {
1314 // Never seen this command before
1315 if (tracing) {
1316 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1317 }
1318 Dbprintf("Received unknown command (len=%d):",len);
1319 Dbhexdump(len,receivedCmd,false);
1320 // Do not respond
1321 dynamic_response_info.response_n = 0;
1322 } break;
1323 }
1324
1325 if (dynamic_response_info.response_n > 0) {
1326 // Copy the CID from the reader query
1327 dynamic_response_info.response[1] = receivedCmd[1];
1328
1329 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1330 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1331 dynamic_response_info.response_n += 2;
1332
1333 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1334 Dbprintf("Error preparing tag response");
1335 if (tracing) {
1336 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1337 }
1338 break;
1339 }
1340 p_response = &dynamic_response_info;
1341 }
1342 }
1343
1344 // Count number of wakeups received after a halt
1345 if(order == 6 && lastorder == 5) { happened++; }
1346
1347 // Count number of other messages after a halt
1348 if(order != 6 && lastorder == 5) { happened2++; }
1349
1350 if(cmdsRecvd > 999) {
1351 DbpString("1000 commands later...");
1352 break;
1353 }
1354 cmdsRecvd++;
1355
1356 if (p_response != NULL) {
1357 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1358 // do the tracing for the previous reader request and this tag answer:
1359 uint8_t par[MAX_PARITY_SIZE];
1360 GetParity(p_response->response, p_response->response_n, par);
1361
1362 EmLogTrace(Uart.output,
1363 Uart.len,
1364 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1365 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1366 Uart.parity,
1367 p_response->response,
1368 p_response->response_n,
1369 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1370 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1371 par);
1372 }
1373
1374 if (!tracing) {
1375 Dbprintf("Trace Full. Simulation stopped.");
1376 break;
1377 }
1378 }
1379
1380 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1381
1382 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1383 LED_A_OFF();
1384 BigBuf_free_keep_EM();
1385 }
1386
1387
1388 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1389 // of bits specified in the delay parameter.
1390 void PrepareDelayedTransfer(uint16_t delay)
1391 {
1392 uint8_t bitmask = 0;
1393 uint8_t bits_to_shift = 0;
1394 uint8_t bits_shifted = 0;
1395
1396 delay &= 0x07;
1397 if (delay) {
1398 for (uint16_t i = 0; i < delay; i++) {
1399 bitmask |= (0x01 << i);
1400 }
1401 ToSend[ToSendMax++] = 0x00;
1402 for (uint16_t i = 0; i < ToSendMax; i++) {
1403 bits_to_shift = ToSend[i] & bitmask;
1404 ToSend[i] = ToSend[i] >> delay;
1405 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1406 bits_shifted = bits_to_shift;
1407 }
1408 }
1409 }
1410
1411
1412 //-------------------------------------------------------------------------------------
1413 // Transmit the command (to the tag) that was placed in ToSend[].
1414 // Parameter timing:
1415 // if NULL: transfer at next possible time, taking into account
1416 // request guard time and frame delay time
1417 // if == 0: transfer immediately and return time of transfer
1418 // if != 0: delay transfer until time specified
1419 //-------------------------------------------------------------------------------------
1420 static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
1421 {
1422
1423 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1424
1425 uint32_t ThisTransferTime = 0;
1426
1427 if (timing) {
1428 if(*timing == 0) { // Measure time
1429 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1430 } else {
1431 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1432 }
1433 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1434 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1435 LastTimeProxToAirStart = *timing;
1436 } else {
1437 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1438 while(GetCountSspClk() < ThisTransferTime);
1439 LastTimeProxToAirStart = ThisTransferTime;
1440 }
1441
1442 // clear TXRDY
1443 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1444
1445 uint16_t c = 0;
1446 for(;;) {
1447 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1448 AT91C_BASE_SSC->SSC_THR = cmd[c];
1449 c++;
1450 if(c >= len) {
1451 break;
1452 }
1453 }
1454 }
1455
1456 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1457 }
1458
1459
1460 //-----------------------------------------------------------------------------
1461 // Prepare reader command (in bits, support short frames) to send to FPGA
1462 //-----------------------------------------------------------------------------
1463 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity)
1464 {
1465 int i, j;
1466 int last;
1467 uint8_t b;
1468
1469 ToSendReset();
1470
1471 // Start of Communication (Seq. Z)
1472 ToSend[++ToSendMax] = SEC_Z;
1473 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1474 last = 0;
1475
1476 size_t bytecount = nbytes(bits);
1477 // Generate send structure for the data bits
1478 for (i = 0; i < bytecount; i++) {
1479 // Get the current byte to send
1480 b = cmd[i];
1481 size_t bitsleft = MIN((bits-(i*8)),8);
1482
1483 for (j = 0; j < bitsleft; j++) {
1484 if (b & 1) {
1485 // Sequence X
1486 ToSend[++ToSendMax] = SEC_X;
1487 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1488 last = 1;
1489 } else {
1490 if (last == 0) {
1491 // Sequence Z
1492 ToSend[++ToSendMax] = SEC_Z;
1493 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1494 } else {
1495 // Sequence Y
1496 ToSend[++ToSendMax] = SEC_Y;
1497 last = 0;
1498 }
1499 }
1500 b >>= 1;
1501 }
1502
1503 // Only transmit parity bit if we transmitted a complete byte
1504 if (j == 8 && parity != NULL) {
1505 // Get the parity bit
1506 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1507 // Sequence X
1508 ToSend[++ToSendMax] = SEC_X;
1509 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1510 last = 1;
1511 } else {
1512 if (last == 0) {
1513 // Sequence Z
1514 ToSend[++ToSendMax] = SEC_Z;
1515 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1516 } else {
1517 // Sequence Y
1518 ToSend[++ToSendMax] = SEC_Y;
1519 last = 0;
1520 }
1521 }
1522 }
1523 }
1524
1525 // End of Communication: Logic 0 followed by Sequence Y
1526 if (last == 0) {
1527 // Sequence Z
1528 ToSend[++ToSendMax] = SEC_Z;
1529 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1530 } else {
1531 // Sequence Y
1532 ToSend[++ToSendMax] = SEC_Y;
1533 last = 0;
1534 }
1535 ToSend[++ToSendMax] = SEC_Y;
1536
1537 // Convert to length of command:
1538 ToSendMax++;
1539 }
1540
1541 //-----------------------------------------------------------------------------
1542 // Prepare reader command to send to FPGA
1543 //-----------------------------------------------------------------------------
1544 void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity)
1545 {
1546 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1547 }
1548
1549
1550 //-----------------------------------------------------------------------------
1551 // Wait for commands from reader
1552 // Stop when button is pressed (return 1) or field was gone (return 2)
1553 // Or return 0 when command is captured
1554 //-----------------------------------------------------------------------------
1555 static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
1556 {
1557 *len = 0;
1558
1559 uint32_t timer = 0, vtime = 0;
1560 int analogCnt = 0;
1561 int analogAVG = 0;
1562
1563 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1564 // only, since we are receiving, not transmitting).
1565 // Signal field is off with the appropriate LED
1566 LED_D_OFF();
1567 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1568
1569 // Set ADC to read field strength
1570 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1571 AT91C_BASE_ADC->ADC_MR =
1572 ADC_MODE_PRESCALE(63) |
1573 ADC_MODE_STARTUP_TIME(1) |
1574 ADC_MODE_SAMPLE_HOLD_TIME(15);
1575 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1576 // start ADC
1577 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1578
1579 // Now run a 'software UART' on the stream of incoming samples.
1580 UartInit(received, parity);
1581
1582 // Clear RXRDY:
1583 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1584
1585 for(;;) {
1586 WDT_HIT();
1587
1588 if (BUTTON_PRESS()) return 1;
1589
1590 // test if the field exists
1591 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1592 analogCnt++;
1593 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1594 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1595 if (analogCnt >= 32) {
1596 if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1597 vtime = GetTickCount();
1598 if (!timer) timer = vtime;
1599 // 50ms no field --> card to idle state
1600 if (vtime - timer > 50) return 2;
1601 } else
1602 if (timer) timer = 0;
1603 analogCnt = 0;
1604 analogAVG = 0;
1605 }
1606 }
1607
1608 // receive and test the miller decoding
1609 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1610 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1611 if(MillerDecoding(b, 0)) {
1612 *len = Uart.len;
1613 return 0;
1614 }
1615 }
1616
1617 }
1618 }
1619
1620
1621 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
1622 {
1623 uint8_t b;
1624 uint16_t i = 0;
1625 uint32_t ThisTransferTime;
1626
1627 // Modulate Manchester
1628 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1629
1630 // include correction bit if necessary
1631 if (Uart.parityBits & 0x01) {
1632 correctionNeeded = TRUE;
1633 }
1634 if(correctionNeeded) {
1635 // 1236, so correction bit needed
1636 i = 0;
1637 } else {
1638 i = 1;
1639 }
1640
1641 // clear receiving shift register and holding register
1642 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1643 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1644 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1645 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1646
1647 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1648 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1649 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1650 if (AT91C_BASE_SSC->SSC_RHR) break;
1651 }
1652
1653 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1654
1655 // Clear TXRDY:
1656 AT91C_BASE_SSC->SSC_THR = SEC_F;
1657
1658 // send cycle
1659 for(; i < respLen; ) {
1660 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1661 AT91C_BASE_SSC->SSC_THR = resp[i++];
1662 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1663 }
1664
1665 if(BUTTON_PRESS()) {
1666 break;
1667 }
1668 }
1669
1670 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1671 uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3;
1672 for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
1673 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1674 AT91C_BASE_SSC->SSC_THR = SEC_F;
1675 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1676 i++;
1677 }
1678 }
1679
1680 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1681
1682 return 0;
1683 }
1684
1685 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1686 Code4bitAnswerAsTag(resp);
1687 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1688 // do the tracing for the previous reader request and this tag answer:
1689 uint8_t par[1];
1690 GetParity(&resp, 1, par);
1691 EmLogTrace(Uart.output,
1692 Uart.len,
1693 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1694 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1695 Uart.parity,
1696 &resp,
1697 1,
1698 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1699 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1700 par);
1701 return res;
1702 }
1703
1704 int EmSend4bit(uint8_t resp){
1705 return EmSend4bitEx(resp, false);
1706 }
1707
1708 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1709 CodeIso14443aAsTagPar(resp, respLen, par);
1710 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1711 // do the tracing for the previous reader request and this tag answer:
1712 EmLogTrace(Uart.output,
1713 Uart.len,
1714 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1715 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1716 Uart.parity,
1717 resp,
1718 respLen,
1719 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1720 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1721 par);
1722 return res;
1723 }
1724
1725 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1726 uint8_t par[MAX_PARITY_SIZE];
1727 GetParity(resp, respLen, par);
1728 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1729 }
1730
1731 int EmSendCmd(uint8_t *resp, uint16_t respLen){
1732 uint8_t par[MAX_PARITY_SIZE];
1733 GetParity(resp, respLen, par);
1734 return EmSendCmdExPar(resp, respLen, false, par);
1735 }
1736
1737 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1738 return EmSendCmdExPar(resp, respLen, false, par);
1739 }
1740
1741 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1742 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1743 {
1744 if (tracing) {
1745 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1746 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1747 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1748 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1749 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1750 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1751 reader_EndTime = tag_StartTime - exact_fdt;
1752 reader_StartTime = reader_EndTime - reader_modlen;
1753 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) {
1754 return FALSE;
1755 } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1756 } else {
1757 return TRUE;
1758 }
1759 }
1760
1761 //-----------------------------------------------------------------------------
1762 // Wait a certain time for tag response
1763 // If a response is captured return TRUE
1764 // If it takes too long return FALSE
1765 //-----------------------------------------------------------------------------
1766 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
1767 {
1768 uint32_t c = 0x00;
1769
1770 // Set FPGA mode to "reader listen mode", no modulation (listen
1771 // only, since we are receiving, not transmitting).
1772 // Signal field is on with the appropriate LED
1773 LED_D_ON();
1774 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1775
1776 // Now get the answer from the card
1777 DemodInit(receivedResponse, receivedResponsePar);
1778
1779 // clear RXRDY:
1780 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1781
1782 for(;;) {
1783 WDT_HIT();
1784
1785 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1786 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1787 if(ManchesterDecoding(b, offset, 0)) {
1788 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1789 return TRUE;
1790 } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) {
1791 return FALSE;
1792 }
1793 }
1794 }
1795 }
1796
1797
1798 void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
1799 {
1800 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1801
1802 // Send command to tag
1803 TransmitFor14443a(ToSend, ToSendMax, timing);
1804 if(trigger)
1805 LED_A_ON();
1806
1807 // Log reader command in trace buffer
1808 if (tracing) {
1809 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1810 }
1811 }
1812
1813
1814 void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
1815 {
1816 ReaderTransmitBitsPar(frame, len*8, par, timing);
1817 }
1818
1819
1820 void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
1821 {
1822 // Generate parity and redirect
1823 uint8_t par[MAX_PARITY_SIZE];
1824 GetParity(frame, len/8, par);
1825 ReaderTransmitBitsPar(frame, len, par, timing);
1826 }
1827
1828
1829 void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
1830 {
1831 // Generate parity and redirect
1832 uint8_t par[MAX_PARITY_SIZE];
1833 GetParity(frame, len, par);
1834 ReaderTransmitBitsPar(frame, len*8, par, timing);
1835 }
1836
1837 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
1838 {
1839 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) return FALSE;
1840 if (tracing) {
1841 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1842 }
1843 return Demod.len;
1844 }
1845
1846 int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
1847 {
1848 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE;
1849 if (tracing) {
1850 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1851 }
1852 return Demod.len;
1853 }
1854
1855 /* performs iso14443a anticollision procedure
1856 * fills the uid pointer unless NULL
1857 * fills resp_data unless NULL */
1858 int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr) {
1859 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1860 uint8_t sel_all[] = { 0x93,0x20 };
1861 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1862 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1863 uint8_t resp[MAX_FRAME_SIZE]; // theoretically. A usual RATS will be much smaller
1864 uint8_t resp_par[MAX_PARITY_SIZE];
1865 byte_t uid_resp[4];
1866 size_t uid_resp_len;
1867
1868 uint8_t sak = 0x04; // cascade uid
1869 int cascade_level = 0;
1870 int len;
1871
1872 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1873 ReaderTransmitBitsPar(wupa,7,0, NULL);
1874
1875 // Receive the ATQA
1876 if(!ReaderReceive(resp, resp_par)) return 0;
1877
1878 if(p_hi14a_card) {
1879 memcpy(p_hi14a_card->atqa, resp, 2);
1880 p_hi14a_card->uidlen = 0;
1881 memset(p_hi14a_card->uid,0,10);
1882 }
1883
1884 // clear uid
1885 if (uid_ptr) {
1886 memset(uid_ptr,0,10);
1887 }
1888
1889 // check for proprietary anticollision:
1890 if ((resp[0] & 0x1F) == 0) {
1891 return 3;
1892 }
1893
1894 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1895 // which case we need to make a cascade 2 request and select - this is a long UID
1896 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1897 for(; sak & 0x04; cascade_level++) {
1898 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1899 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1900
1901 // SELECT_ALL
1902 ReaderTransmit(sel_all, sizeof(sel_all), NULL);
1903 if (!ReaderReceive(resp, resp_par)) return 0;
1904
1905 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1906 memset(uid_resp, 0, 4);
1907 uint16_t uid_resp_bits = 0;
1908 uint16_t collision_answer_offset = 0;
1909 // anti-collision-loop:
1910 while (Demod.collisionPos) {
1911 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1912 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1913 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1914 uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8);
1915 }
1916 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1917 uid_resp_bits++;
1918 // construct anticollosion command:
1919 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1920 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1921 sel_uid[2+i] = uid_resp[i];
1922 }
1923 collision_answer_offset = uid_resp_bits%8;
1924 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1925 if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0;
1926 }
1927 // finally, add the last bits and BCC of the UID
1928 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1929 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1930 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1931 }
1932
1933 } else { // no collision, use the response to SELECT_ALL as current uid
1934 memcpy(uid_resp, resp, 4);
1935 }
1936 uid_resp_len = 4;
1937
1938 // calculate crypto UID. Always use last 4 Bytes.
1939 if(cuid_ptr) {
1940 *cuid_ptr = bytes_to_num(uid_resp, 4);
1941 }
1942
1943 // Construct SELECT UID command
1944 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1945 memcpy(sel_uid+2, uid_resp, 4); // the UID
1946 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1947 AppendCrc14443a(sel_uid, 7); // calculate and add CRC
1948 ReaderTransmit(sel_uid, sizeof(sel_uid), NULL);
1949
1950 // Receive the SAK
1951 if (!ReaderReceive(resp, resp_par)) return 0;
1952 sak = resp[0];
1953
1954 // Test if more parts of the uid are coming
1955 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1956 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1957 // http://www.nxp.com/documents/application_note/AN10927.pdf
1958 uid_resp[0] = uid_resp[1];
1959 uid_resp[1] = uid_resp[2];
1960 uid_resp[2] = uid_resp[3];
1961
1962 uid_resp_len = 3;
1963 }
1964
1965 if(uid_ptr) {
1966 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1967 }
1968
1969 if(p_hi14a_card) {
1970 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1971 p_hi14a_card->uidlen += uid_resp_len;
1972 }
1973 }
1974
1975 if(p_hi14a_card) {
1976 p_hi14a_card->sak = sak;
1977 p_hi14a_card->ats_len = 0;
1978 }
1979
1980 // non iso14443a compliant tag
1981 if( (sak & 0x20) == 0) return 2;
1982
1983 // Request for answer to select
1984 AppendCrc14443a(rats, 2);
1985 ReaderTransmit(rats, sizeof(rats), NULL);
1986
1987 if (!(len = ReaderReceive(resp, resp_par))) return 0;
1988
1989
1990 if(p_hi14a_card) {
1991 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1992 p_hi14a_card->ats_len = len;
1993 }
1994
1995 // reset the PCB block number
1996 iso14_pcb_blocknum = 0;
1997
1998 // set default timeout based on ATS
1999 iso14a_set_ATS_timeout(resp);
2000
2001 return 1;
2002 }
2003
2004 void iso14443a_setup(uint8_t fpga_minor_mode) {
2005 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
2006 // Set up the synchronous serial port
2007 FpgaSetupSsc();
2008 // connect Demodulated Signal to ADC:
2009 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
2010
2011 // Signal field is on with the appropriate LED
2012 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
2013 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
2014 LED_D_ON();
2015 } else {
2016 LED_D_OFF();
2017 }
2018 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
2019
2020 // Start the timer
2021 StartCountSspClk();
2022
2023 DemodReset();
2024 UartReset();
2025 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
2026 iso14a_set_timeout(10*106); // 10ms default
2027 }
2028
2029 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
2030 uint8_t parity[MAX_PARITY_SIZE];
2031 uint8_t real_cmd[cmd_len+4];
2032 real_cmd[0] = 0x0a; //I-Block
2033 // put block number into the PCB
2034 real_cmd[0] |= iso14_pcb_blocknum;
2035 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
2036 memcpy(real_cmd+2, cmd, cmd_len);
2037 AppendCrc14443a(real_cmd,cmd_len+2);
2038
2039 ReaderTransmit(real_cmd, cmd_len+4, NULL);
2040 size_t len = ReaderReceive(data, parity);
2041 uint8_t *data_bytes = (uint8_t *) data;
2042 if (!len)
2043 return 0; //DATA LINK ERROR
2044 // if we received an I- or R(ACK)-Block with a block number equal to the
2045 // current block number, toggle the current block number
2046 else if (len >= 4 // PCB+CID+CRC = 4 bytes
2047 && ((data_bytes[0] & 0xC0) == 0 // I-Block
2048 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
2049 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
2050 {
2051 iso14_pcb_blocknum ^= 1;
2052 }
2053
2054 return len;
2055 }
2056
2057 //-----------------------------------------------------------------------------
2058 // Read an ISO 14443a tag. Send out commands and store answers.
2059 //
2060 //-----------------------------------------------------------------------------
2061 void ReaderIso14443a(UsbCommand *c)
2062 {
2063 iso14a_command_t param = c->arg[0];
2064 uint8_t *cmd = c->d.asBytes;
2065 size_t len = c->arg[1] & 0xffff;
2066 size_t lenbits = c->arg[1] >> 16;
2067 uint32_t timeout = c->arg[2];
2068 uint32_t arg0 = 0;
2069 byte_t buf[USB_CMD_DATA_SIZE];
2070 uint8_t par[MAX_PARITY_SIZE];
2071
2072 if(param & ISO14A_CONNECT) {
2073 clear_trace();
2074 }
2075
2076 set_tracing(TRUE);
2077
2078 if(param & ISO14A_REQUEST_TRIGGER) {
2079 iso14a_set_trigger(TRUE);
2080 }
2081
2082 if(param & ISO14A_CONNECT) {
2083 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
2084 if(!(param & ISO14A_NO_SELECT)) {
2085 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
2086 arg0 = iso14443a_select_card(NULL,card,NULL);
2087 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
2088 }
2089 }
2090
2091 if(param & ISO14A_SET_TIMEOUT) {
2092 iso14a_set_timeout(timeout);
2093 }
2094
2095 if(param & ISO14A_APDU) {
2096 arg0 = iso14_apdu(cmd, len, buf);
2097 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2098 }
2099
2100 if(param & ISO14A_RAW) {
2101 if(param & ISO14A_APPEND_CRC) {
2102 if(param & ISO14A_TOPAZMODE) {
2103 AppendCrc14443b(cmd,len);
2104 } else {
2105 AppendCrc14443a(cmd,len);
2106 }
2107 len += 2;
2108 if (lenbits) lenbits += 16;
2109 }
2110 if(lenbits>0) { // want to send a specific number of bits (e.g. short commands)
2111 if(param & ISO14A_TOPAZMODE) {
2112 int bits_to_send = lenbits;
2113 uint16_t i = 0;
2114 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity
2115 bits_to_send -= 7;
2116 while (bits_to_send > 0) {
2117 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity
2118 bits_to_send -= 8;
2119 }
2120 } else {
2121 GetParity(cmd, lenbits/8, par);
2122 ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity
2123 }
2124 } else { // want to send complete bytes only
2125 if(param & ISO14A_TOPAZMODE) {
2126 uint16_t i = 0;
2127 ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy
2128 while (i < len) {
2129 ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy
2130 }
2131 } else {
2132 ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity
2133 }
2134 }
2135 arg0 = ReaderReceive(buf, par);
2136 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2137 }
2138
2139 if(param & ISO14A_REQUEST_TRIGGER) {
2140 iso14a_set_trigger(FALSE);
2141 }
2142
2143 if(param & ISO14A_NO_DISCONNECT) {
2144 return;
2145 }
2146
2147 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2148 LEDsoff();
2149 }
2150
2151
2152 // Determine the distance between two nonces.
2153 // Assume that the difference is small, but we don't know which is first.
2154 // Therefore try in alternating directions.
2155 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
2156
2157 if (nt1 == nt2) return 0;
2158
2159 uint16_t i;
2160 uint32_t nttmp1 = nt1;
2161 uint32_t nttmp2 = nt2;
2162
2163 for (i = 1; i < 32768; i++) {
2164 nttmp1 = prng_successor(nttmp1, 1);
2165 if (nttmp1 == nt2) return i;
2166 nttmp2 = prng_successor(nttmp2, 1);
2167 if (nttmp2 == nt1) return -i;
2168 }
2169
2170 return(-99999); // either nt1 or nt2 are invalid nonces
2171 }
2172
2173
2174 //-----------------------------------------------------------------------------
2175 // Recover several bits of the cypher stream. This implements (first stages of)
2176 // the algorithm described in "The Dark Side of Security by Obscurity and
2177 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2178 // (article by Nicolas T. Courtois, 2009)
2179 //-----------------------------------------------------------------------------
2180 void ReaderMifare(bool first_try) {
2181 // free eventually allocated BigBuf memory. We want all for tracing.
2182 BigBuf_free();
2183
2184 clear_trace();
2185 set_tracing(TRUE);
2186
2187 // Mifare AUTH
2188 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2189 uint8_t mf_nr_ar[8] = { 0x00 }; //{ 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01 };
2190 static uint8_t mf_nr_ar3 = 0;
2191
2192 uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE] = { 0x00 };
2193 uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE] = { 0x00 };
2194
2195 byte_t nt_diff = 0;
2196 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2197 static byte_t par_low = 0;
2198 bool led_on = TRUE;
2199 uint8_t uid[10] = {0x00};
2200 //uint32_t cuid = 0x00;
2201
2202 uint32_t nt = 0;
2203 uint32_t previous_nt = 0;
2204 static uint32_t nt_attacked = 0;
2205 byte_t par_list[8] = {0x00};
2206 byte_t ks_list[8] = {0x00};
2207
2208 static uint32_t sync_time = 0;
2209 static uint32_t sync_cycles = 0;
2210 int catch_up_cycles = 0;
2211 int last_catch_up = 0;
2212 uint16_t consecutive_resyncs = 0;
2213 int isOK = 0;
2214
2215 int numWrongDistance = 0;
2216
2217 if (first_try) {
2218 mf_nr_ar3 = 0;
2219 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2220 sync_time = GetCountSspClk() & 0xfffffff8;
2221 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2222 nt_attacked = 0;
2223 nt = 0;
2224 par[0] = 0;
2225 }
2226 else {
2227 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2228 mf_nr_ar3++;
2229 mf_nr_ar[3] = mf_nr_ar3;
2230 par[0] = par_low;
2231 }
2232
2233 LED_A_ON();
2234 LED_B_OFF();
2235 LED_C_OFF();
2236 LED_C_ON();
2237
2238 for(uint16_t i = 0; TRUE; i++) {
2239
2240 WDT_HIT();
2241
2242 // Test if the action was cancelled
2243 if(BUTTON_PRESS()) break;
2244
2245 if (numWrongDistance > 1000) {
2246 isOK = 0;
2247 break;
2248 }
2249
2250 //if(!iso14443a_select_card(uid, NULL, &cuid)) {
2251 if(!iso14443a_select_card(uid, NULL, NULL)) {
2252 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
2253 continue;
2254 }
2255
2256 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
2257 catch_up_cycles = 0;
2258
2259 // if we missed the sync time already, advance to the next nonce repeat
2260 while(GetCountSspClk() > sync_time) {
2261 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
2262 }
2263
2264 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2265 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2266
2267 // Receive the (4 Byte) "random" nonce
2268 if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2269 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2270 continue;
2271 }
2272
2273 previous_nt = nt;
2274 nt = bytes_to_num(receivedAnswer, 4);
2275
2276 // Transmit reader nonce with fake par
2277 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2278
2279 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2280 int nt_distance = dist_nt(previous_nt, nt);
2281 if (nt_distance == 0) {
2282 nt_attacked = nt;
2283 }
2284 else {
2285
2286 // invalid nonce received, try again
2287 if (nt_distance == -99999) {
2288 numWrongDistance++;
2289 if (MF_DBGLEVEL >= 3) Dbprintf("The two nonces has invalid distance, tag could have good PRNG\n");
2290 continue;
2291 }
2292
2293 sync_cycles = (sync_cycles - nt_distance);
2294 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
2295 continue;
2296 }
2297 }
2298
2299 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2300 catch_up_cycles = -dist_nt(nt_attacked, nt);
2301 if (catch_up_cycles >= 99999) { // invalid nonce received. Don't resync on that one.
2302 catch_up_cycles = 0;
2303 continue;
2304 }
2305 if (catch_up_cycles == last_catch_up) {
2306 consecutive_resyncs++;
2307 }
2308 else {
2309 last_catch_up = catch_up_cycles;
2310 consecutive_resyncs = 0;
2311 }
2312 if (consecutive_resyncs < 3) {
2313 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2314 }
2315 else {
2316 sync_cycles = sync_cycles + catch_up_cycles;
2317 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2318 }
2319 continue;
2320 }
2321
2322 consecutive_resyncs = 0;
2323
2324 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2325 if (ReaderReceive(receivedAnswer, receivedAnswerPar))
2326 {
2327 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2328
2329 if (nt_diff == 0)
2330 {
2331 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2332 }
2333
2334 led_on = !led_on;
2335 if(led_on) LED_B_ON(); else LED_B_OFF();
2336
2337 par_list[nt_diff] = SwapBits(par[0], 8);
2338 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2339
2340 // Test if the information is complete
2341 if (nt_diff == 0x07) {
2342 isOK = 1;
2343 break;
2344 }
2345
2346 nt_diff = (nt_diff + 1) & 0x07;
2347 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2348 par[0] = par_low;
2349 } else {
2350 if (nt_diff == 0 && first_try)
2351 {
2352 par[0]++;
2353 } else {
2354 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2355 }
2356 }
2357 }
2358
2359 mf_nr_ar[3] &= 0x1F;
2360
2361 byte_t buf[28] = {0x00};
2362
2363 memcpy(buf + 0, uid, 4);
2364 num_to_bytes(nt, 4, buf + 4);
2365 memcpy(buf + 8, par_list, 8);
2366 memcpy(buf + 16, ks_list, 8);
2367 memcpy(buf + 24, mf_nr_ar, 4);
2368
2369 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2370
2371 set_tracing(FALSE);
2372 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2373 LEDsoff();
2374 }
2375
2376
2377 /*
2378 *MIFARE 1K simulate.
2379 *
2380 *@param flags :
2381 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2382 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2383 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2384 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2385 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2386 */
2387 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2388 {
2389 int cardSTATE = MFEMUL_NOFIELD;
2390 int _7BUID = 0;
2391 int vHf = 0; // in mV
2392 int res;
2393 uint32_t selTimer = 0;
2394 uint32_t authTimer = 0;
2395 uint16_t len = 0;
2396 uint8_t cardWRBL = 0;
2397 uint8_t cardAUTHSC = 0;
2398 uint8_t cardAUTHKEY = 0xff; // no authentication
2399 // uint32_t cardRr = 0;
2400 uint32_t cuid = 0;
2401 //uint32_t rn_enc = 0;
2402 uint32_t ans = 0;
2403 uint32_t cardINTREG = 0;
2404 uint8_t cardINTBLOCK = 0;
2405 struct Crypto1State mpcs = {0, 0};
2406 struct Crypto1State *pcs;
2407 pcs = &mpcs;
2408 uint32_t numReads = 0;//Counts numer of times reader read a block
2409 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE];
2410 uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE];
2411 uint8_t response[MAX_MIFARE_FRAME_SIZE];
2412 uint8_t response_par[MAX_MIFARE_PARITY_SIZE];
2413
2414 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2415 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2416 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2417 //uint8_t rSAK[] = {0x08, 0xb6, 0xdd}; // Mifare Classic
2418 uint8_t rSAK[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
2419 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2420
2421 uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01};
2422 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2423
2424 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2425 // This can be used in a reader-only attack.
2426 // (it can also be retrieved via 'hf 14a list', but hey...
2427 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
2428 uint8_t ar_nr_collected = 0;
2429
2430 // free eventually allocated BigBuf memory but keep Emulator Memory
2431 BigBuf_free_keep_EM();
2432
2433 // clear trace
2434 clear_trace();
2435 set_tracing(TRUE);
2436
2437 // Authenticate response - nonce
2438 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2439
2440 //-- Determine the UID
2441 // Can be set from emulator memory, incoming data
2442 // and can be 7 or 4 bytes long
2443 if (flags & FLAG_4B_UID_IN_DATA)
2444 {
2445 // 4B uid comes from data-portion of packet
2446 memcpy(rUIDBCC1,datain,4);
2447 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2448
2449 } else if (flags & FLAG_7B_UID_IN_DATA) {
2450 // 7B uid comes from data-portion of packet
2451 memcpy(&rUIDBCC1[1],datain,3);
2452 memcpy(rUIDBCC2, datain+3, 4);
2453 _7BUID = true;
2454 } else {
2455 // get UID from emul memory
2456 emlGetMemBt(receivedCmd, 7, 1);
2457 _7BUID = !(receivedCmd[0] == 0x00);
2458 if (!_7BUID) { // ---------- 4BUID
2459 emlGetMemBt(rUIDBCC1, 0, 4);
2460 } else { // ---------- 7BUID
2461 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2462 emlGetMemBt(rUIDBCC2, 3, 4);
2463 }
2464 }
2465
2466 // save uid.
2467 ar_nr_responses[0*5] = bytes_to_num(rUIDBCC1+1, 3);
2468 if ( _7BUID )
2469 ar_nr_responses[0*5+1] = bytes_to_num(rUIDBCC2, 4);
2470
2471 /*
2472 * Regardless of what method was used to set the UID, set fifth byte and modify
2473 * the ATQA for 4 or 7-byte UID
2474 */
2475 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2476 if (_7BUID) {
2477 rATQA[0] = 0x44;
2478 rUIDBCC1[0] = 0x88;
2479 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2480 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2481 }
2482
2483 // We need to listen to the high-frequency, peak-detected path.
2484 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2485
2486
2487 if (MF_DBGLEVEL >= 1) {
2488 if (!_7BUID) {
2489 Dbprintf("4B UID: %02x%02x%02x%02x",
2490 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
2491 } else {
2492 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2493 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2494 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
2495 }
2496 }
2497
2498 bool finished = FALSE;
2499 while (!BUTTON_PRESS() && !finished) {
2500 WDT_HIT();
2501
2502 // find reader field
2503 if (cardSTATE == MFEMUL_NOFIELD) {
2504 vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
2505 if (vHf > MF_MINFIELDV) {
2506 cardSTATE_TO_IDLE();
2507 LED_A_ON();
2508 }
2509 }
2510 if(cardSTATE == MFEMUL_NOFIELD) continue;
2511
2512 //Now, get data
2513 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2514 if (res == 2) { //Field is off!
2515 cardSTATE = MFEMUL_NOFIELD;
2516 LEDsoff();
2517 continue;
2518 } else if (res == 1) {
2519 break; //return value 1 means button press
2520 }
2521
2522 // REQ or WUP request in ANY state and WUP in HALTED state
2523 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2524 selTimer = GetTickCount();
2525 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2526 cardSTATE = MFEMUL_SELECT1;
2527
2528 // init crypto block
2529 LED_B_OFF();
2530 LED_C_OFF();
2531 crypto1_destroy(pcs);
2532 cardAUTHKEY = 0xff;
2533 continue;
2534 }
2535
2536 switch (cardSTATE) {
2537 case MFEMUL_NOFIELD:
2538 case MFEMUL_HALTED:
2539 case MFEMUL_IDLE:{
2540 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2541 break;
2542 }
2543 case MFEMUL_SELECT1:{
2544 // select all
2545 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2546 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2547 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2548 break;
2549 }
2550
2551 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2552 {
2553 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2554 }
2555 // select card
2556 if (len == 9 &&
2557 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2558 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
2559 cuid = bytes_to_num(rUIDBCC1, 4);
2560 if (!_7BUID) {
2561 cardSTATE = MFEMUL_WORK;
2562 LED_B_ON();
2563 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2564 break;
2565 } else {
2566 cardSTATE = MFEMUL_SELECT2;
2567 }
2568 }
2569 break;
2570 }
2571 case MFEMUL_AUTH1:{
2572 if( len != 8)
2573 {
2574 cardSTATE_TO_IDLE();
2575 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2576 break;
2577 }
2578
2579 uint32_t ar = bytes_to_num(receivedCmd, 4);
2580 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
2581
2582 //Collect AR/NR
2583 //if(ar_nr_collected < 2 && cardAUTHSC == 2){
2584 if(ar_nr_collected < 2){
2585 if(ar_nr_responses[2] != ar)
2586 {// Avoid duplicates... probably not necessary, ar should vary.
2587 //ar_nr_responses[ar_nr_collected*5] = 0;
2588 //ar_nr_responses[ar_nr_collected*5+1] = 0;
2589 ar_nr_responses[ar_nr_collected*5+2] = nonce;
2590 ar_nr_responses[ar_nr_collected*5+3] = nr;
2591 ar_nr_responses[ar_nr_collected*5+4] = ar;
2592 ar_nr_collected++;
2593 }
2594 // Interactive mode flag, means we need to send ACK
2595 if(flags & FLAG_INTERACTIVE && ar_nr_collected == 2)
2596 {
2597 finished = true;
2598 }
2599 }
2600
2601 // --- crypto
2602 //crypto1_word(pcs, ar , 1);
2603 //cardRr = nr ^ crypto1_word(pcs, 0, 0);
2604
2605 //test if auth OK
2606 //if (cardRr != prng_successor(nonce, 64)){
2607
2608 //if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2609 // cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2610 // cardRr, prng_successor(nonce, 64));
2611 // Shouldn't we respond anything here?
2612 // Right now, we don't nack or anything, which causes the
2613 // reader to do a WUPA after a while. /Martin
2614 // -- which is the correct response. /piwi
2615 //cardSTATE_TO_IDLE();
2616 //LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2617 //break;
2618 //}
2619
2620 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2621
2622 num_to_bytes(ans, 4, rAUTH_AT);
2623 // --- crypto
2624 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2625 LED_C_ON();
2626 cardSTATE = MFEMUL_WORK;
2627 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2628 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2629 GetTickCount() - authTimer);
2630 break;
2631 }
2632 case MFEMUL_SELECT2:{
2633 if (!len) {
2634 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2635 break;
2636 }
2637 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2638 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2639 break;
2640 }
2641
2642 // select 2 card
2643 if (len == 9 &&
2644 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2645 EmSendCmd(rSAK, sizeof(rSAK));
2646 cuid = bytes_to_num(rUIDBCC2, 4);
2647 cardSTATE = MFEMUL_WORK;
2648 LED_B_ON();
2649 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2650 break;
2651 }
2652
2653 // i guess there is a command). go into the work state.
2654 if (len != 4) {
2655 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2656 break;
2657 }
2658 cardSTATE = MFEMUL_WORK;
2659 //goto lbWORK;
2660 //intentional fall-through to the next case-stmt
2661 }
2662
2663 case MFEMUL_WORK:{
2664 if (len == 0) {
2665 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2666 break;
2667 }
2668
2669 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2670
2671 if(encrypted_data) {
2672 // decrypt seqence
2673 mf_crypto1_decrypt(pcs, receivedCmd, len);
2674 }
2675
2676 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2677 authTimer = GetTickCount();
2678 cardAUTHSC = receivedCmd[1] / 4; // received block num
2679 cardAUTHKEY = receivedCmd[0] - 0x60;
2680 crypto1_destroy(pcs);//Added by martin
2681 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2682
2683 if (!encrypted_data) { // first authentication
2684 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2685
2686 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2687 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2688 } else { // nested authentication
2689 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2690 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2691 num_to_bytes(ans, 4, rAUTH_AT);
2692 }
2693
2694 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2695 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2696 cardSTATE = MFEMUL_AUTH1;
2697 break;
2698 }
2699
2700 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2701 // BUT... ACK --> NACK
2702 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2703 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2704 break;
2705 }
2706
2707 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2708 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2709 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2710 break;
2711 }
2712
2713 if(len != 4) {
2714 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2715 break;
2716 }
2717
2718 if(receivedCmd[0] == 0x30 // read block
2719 || receivedCmd[0] == 0xA0 // write block
2720 || receivedCmd[0] == 0xC0 // inc
2721 || receivedCmd[0] == 0xC1 // dec
2722 || receivedCmd[0] == 0xC2 // restore
2723 || receivedCmd[0] == 0xB0) { // transfer
2724 if (receivedCmd[1] >= 16 * 4) {
2725 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2726 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2727 break;
2728 }
2729
2730 if (receivedCmd[1] / 4 != cardAUTHSC) {
2731 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2732 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2733 break;
2734 }
2735 }
2736 // read block
2737 if (receivedCmd[0] == 0x30) {
2738 if (MF_DBGLEVEL >= 4) {
2739 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2740 }
2741 emlGetMem(response, receivedCmd[1], 1);
2742 AppendCrc14443a(response, 16);
2743 mf_crypto1_encrypt(pcs, response, 18, response_par);
2744 EmSendCmdPar(response, 18, response_par);
2745 numReads++;
2746 if(exitAfterNReads > 0 && numReads >= exitAfterNReads) {
2747 Dbprintf("%d reads done, exiting", numReads);
2748 finished = true;
2749 }
2750 break;
2751 }
2752 // write block
2753 if (receivedCmd[0] == 0xA0) {
2754 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2755 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2756 cardSTATE = MFEMUL_WRITEBL2;
2757 cardWRBL = receivedCmd[1];
2758 break;
2759 }
2760 // increment, decrement, restore
2761 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2762 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2763 if (emlCheckValBl(receivedCmd[1])) {
2764 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2765 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2766 break;
2767 }
2768 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2769 if (receivedCmd[0] == 0xC1)
2770 cardSTATE = MFEMUL_INTREG_INC;
2771 if (receivedCmd[0] == 0xC0)
2772 cardSTATE = MFEMUL_INTREG_DEC;
2773 if (receivedCmd[0] == 0xC2)
2774 cardSTATE = MFEMUL_INTREG_REST;
2775 cardWRBL = receivedCmd[1];
2776 break;
2777 }
2778 // transfer
2779 if (receivedCmd[0] == 0xB0) {
2780 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2781 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2782 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2783 else
2784 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2785 break;
2786 }
2787 // halt
2788 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2789 LED_B_OFF();
2790 LED_C_OFF();
2791 cardSTATE = MFEMUL_HALTED;
2792 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2793 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2794 break;
2795 }
2796 // RATS
2797 if (receivedCmd[0] == 0xe0) {//RATS
2798 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2799 break;
2800 }
2801 // command not allowed
2802 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2803 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2804 break;
2805 }
2806 case MFEMUL_WRITEBL2:{
2807 if (len == 18){
2808 mf_crypto1_decrypt(pcs, receivedCmd, len);
2809 emlSetMem(receivedCmd, cardWRBL, 1);
2810 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2811 cardSTATE = MFEMUL_WORK;
2812 } else {
2813 cardSTATE_TO_IDLE();
2814 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2815 }
2816 break;
2817 }
2818
2819 case MFEMUL_INTREG_INC:{
2820 mf_crypto1_decrypt(pcs, receivedCmd, len);
2821 memcpy(&ans, receivedCmd, 4);
2822 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2823 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2824 cardSTATE_TO_IDLE();
2825 break;
2826 }
2827 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2828 cardINTREG = cardINTREG + ans;
2829 cardSTATE = MFEMUL_WORK;
2830 break;
2831 }
2832 case MFEMUL_INTREG_DEC:{
2833 mf_crypto1_decrypt(pcs, receivedCmd, len);
2834 memcpy(&ans, receivedCmd, 4);
2835 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2836 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2837 cardSTATE_TO_IDLE();
2838 break;
2839 }
2840 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2841 cardINTREG = cardINTREG - ans;
2842 cardSTATE = MFEMUL_WORK;
2843 break;
2844 }
2845 case MFEMUL_INTREG_REST:{
2846 mf_crypto1_decrypt(pcs, receivedCmd, len);
2847 memcpy(&ans, receivedCmd, 4);
2848 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2849 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2850 cardSTATE_TO_IDLE();
2851 break;
2852 }
2853 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2854 cardSTATE = MFEMUL_WORK;
2855 break;
2856 }
2857 }
2858 }
2859
2860 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2861 LEDsoff();
2862
2863 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2864 {
2865 //May just aswell send the collected ar_nr in the response aswell
2866 uint8_t len = ar_nr_collected*5*4;
2867 cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len);
2868 }
2869
2870 if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1 )
2871 {
2872 if(ar_nr_collected > 1 ) {
2873 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2874 Dbprintf("../tools/mfkey/mfkey32 %06x%08x %08x %08x %08x %08x %08x",
2875 ar_nr_responses[0], // UID1
2876 ar_nr_responses[1], // UID2
2877 ar_nr_responses[2], // NT
2878 ar_nr_responses[3], // AR1
2879 ar_nr_responses[4], // NR1
2880 ar_nr_responses[8], // AR2
2881 ar_nr_responses[9] // NR2
2882 );
2883 } else {
2884 Dbprintf("Failed to obtain two AR/NR pairs!");
2885 if(ar_nr_collected > 0 ) {
2886 Dbprintf("Only got these: UID=%07x%08x, nonce=%08x, AR1=%08x, NR1=%08x",
2887 ar_nr_responses[0], // UID1
2888 ar_nr_responses[1], // UID2
2889 ar_nr_responses[2], // NT
2890 ar_nr_responses[3], // AR1
2891 ar_nr_responses[4] // NR1
2892 );
2893 }
2894 }
2895 }
2896 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen());
2897 }
2898
2899
2900 //-----------------------------------------------------------------------------
2901 // MIFARE sniffer.
2902 //
2903 //-----------------------------------------------------------------------------
2904 void RAMFUNC SniffMifare(uint8_t param) {
2905 // param:
2906 // bit 0 - trigger from first card answer
2907 // bit 1 - trigger from first reader 7-bit request
2908
2909 // free eventually allocated BigBuf memory
2910 BigBuf_free();
2911
2912 // C(red) A(yellow) B(green)
2913 LEDsoff();
2914 // init trace buffer
2915 clear_trace();
2916 set_tracing(TRUE);
2917
2918 // The command (reader -> tag) that we're receiving.
2919 // The length of a received command will in most cases be no more than 18 bytes.
2920 // So 32 should be enough!
2921 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE];
2922 uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE];
2923 // The response (tag -> reader) that we're receiving.
2924 uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE];
2925 uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE];
2926
2927 // allocate the DMA buffer, used to stream samples from the FPGA
2928 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
2929 uint8_t *data = dmaBuf;
2930 uint8_t previous_data = 0;
2931 int maxDataLen = 0;
2932 int dataLen = 0;
2933 bool ReaderIsActive = FALSE;
2934 bool TagIsActive = FALSE;
2935
2936 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
2937
2938 // Set up the demodulator for tag -> reader responses.
2939 DemodInit(receivedResponse, receivedResponsePar);
2940
2941 // Set up the demodulator for the reader -> tag commands
2942 UartInit(receivedCmd, receivedCmdPar);
2943
2944 // Setup for the DMA.
2945 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2946
2947 LED_D_OFF();
2948
2949 // init sniffer
2950 MfSniffInit();
2951
2952 // And now we loop, receiving samples.
2953 for(uint32_t sniffCounter = 0; TRUE; ) {
2954
2955 if(BUTTON_PRESS()) {
2956 DbpString("cancelled by button");
2957 break;
2958 }
2959
2960 LED_A_ON();
2961 WDT_HIT();
2962
2963 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2964 // check if a transaction is completed (timeout after 2000ms).
2965 // if yes, stop the DMA transfer and send what we have so far to the client
2966 if (MfSniffSend(2000)) {
2967 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2968 sniffCounter = 0;
2969 data = dmaBuf;
2970 maxDataLen = 0;
2971 ReaderIsActive = FALSE;
2972 TagIsActive = FALSE;
2973 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2974 }
2975 }
2976
2977 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2978 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2979 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2980 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2981 } else {
2982 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
2983 }
2984 // test for length of buffer
2985 if(dataLen > maxDataLen) { // we are more behind than ever...
2986 maxDataLen = dataLen;
2987 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
2988 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
2989 break;
2990 }
2991 }
2992 if(dataLen < 1) continue;
2993
2994 // primary buffer was stopped ( <-- we lost data!
2995 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2996 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2997 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
2998 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
2999 }
3000 // secondary buffer sets as primary, secondary buffer was stopped
3001 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
3002 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
3003 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
3004 }
3005
3006 LED_A_OFF();
3007
3008 if (sniffCounter & 0x01) {
3009
3010 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
3011 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
3012 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
3013 LED_C_INV();
3014 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
3015
3016 /* And ready to receive another command. */
3017 //UartInit(receivedCmd, receivedCmdPar);
3018 UartReset();
3019
3020 /* And also reset the demod code */
3021 DemodReset();
3022 }
3023 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
3024 }
3025
3026 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
3027 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
3028 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
3029 LED_C_INV();
3030
3031 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
3032
3033 // And ready to receive another response.
3034 DemodReset();
3035
3036 // And reset the Miller decoder including its (now outdated) input buffer
3037 UartInit(receivedCmd, receivedCmdPar);
3038 }
3039 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
3040 }
3041 }
3042
3043 previous_data = *data;
3044 sniffCounter++;
3045 data++;
3046 if(data == dmaBuf + DMA_BUFFER_SIZE) {
3047 data = dmaBuf;
3048 }
3049
3050 } // main cycle
3051
3052 DbpString("COMMAND FINISHED");
3053
3054 FpgaDisableSscDma();
3055 MfSniffEnd();
3056
3057 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
3058 LEDsoff();
3059 }
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