]> git.zerfleddert.de Git - proxmark3-svn/blob - armsrc/iso14443a.c
Coverity Scan 133850, need to ask @jason about this one.
[proxmark3-svn] / armsrc / iso14443a.c
1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "cmd.h"
18 #include "iso14443crc.h"
19 #include "iso14443a.h"
20 #include "iso14443b.h"
21 #include "crapto1.h"
22 #include "mifareutil.h"
23 #include "BigBuf.h"
24 #include "parity.h"
25
26 static uint32_t iso14a_timeout;
27 int rsamples = 0;
28 uint8_t trigger = 0;
29 // the block number for the ISO14443-4 PCB
30 static uint8_t iso14_pcb_blocknum = 0;
31
32 static uint8_t* free_buffer_pointer;
33
34 //
35 // ISO14443 timing:
36 //
37 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
38 #define REQUEST_GUARD_TIME (7000/16 + 1)
39 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
40 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
41 // bool LastCommandWasRequest = FALSE;
42
43 //
44 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
45 //
46 // When the PM acts as reader and is receiving tag data, it takes
47 // 3 ticks delay in the AD converter
48 // 16 ticks until the modulation detector completes and sets curbit
49 // 8 ticks until bit_to_arm is assigned from curbit
50 // 8*16 ticks for the transfer from FPGA to ARM
51 // 4*16 ticks until we measure the time
52 // - 8*16 ticks because we measure the time of the previous transfer
53 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
54
55 // When the PM acts as a reader and is sending, it takes
56 // 4*16 ticks until we can write data to the sending hold register
57 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
58 // 8 ticks until the first transfer starts
59 // 8 ticks later the FPGA samples the data
60 // 1 tick to assign mod_sig_coil
61 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
62
63 // When the PM acts as tag and is receiving it takes
64 // 2 ticks delay in the RF part (for the first falling edge),
65 // 3 ticks for the A/D conversion,
66 // 8 ticks on average until the start of the SSC transfer,
67 // 8 ticks until the SSC samples the first data
68 // 7*16 ticks to complete the transfer from FPGA to ARM
69 // 8 ticks until the next ssp_clk rising edge
70 // 4*16 ticks until we measure the time
71 // - 8*16 ticks because we measure the time of the previous transfer
72 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
73
74 // The FPGA will report its internal sending delay in
75 uint16_t FpgaSendQueueDelay;
76 // the 5 first bits are the number of bits buffered in mod_sig_buf
77 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
78 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
79
80 // When the PM acts as tag and is sending, it takes
81 // 4*16 ticks until we can write data to the sending hold register
82 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
83 // 8 ticks until the first transfer starts
84 // 8 ticks later the FPGA samples the data
85 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
86 // + 1 tick to assign mod_sig_coil
87 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
88
89 // When the PM acts as sniffer and is receiving tag data, it takes
90 // 3 ticks A/D conversion
91 // 14 ticks to complete the modulation detection
92 // 8 ticks (on average) until the result is stored in to_arm
93 // + the delays in transferring data - which is the same for
94 // sniffing reader and tag data and therefore not relevant
95 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
96
97 // When the PM acts as sniffer and is receiving reader data, it takes
98 // 2 ticks delay in analogue RF receiver (for the falling edge of the
99 // start bit, which marks the start of the communication)
100 // 3 ticks A/D conversion
101 // 8 ticks on average until the data is stored in to_arm.
102 // + the delays in transferring data - which is the same for
103 // sniffing reader and tag data and therefore not relevant
104 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
105
106 //variables used for timing purposes:
107 //these are in ssp_clk cycles:
108 static uint32_t NextTransferTime;
109 static uint32_t LastTimeProxToAirStart;
110 static uint32_t LastProxToAirDuration;
111
112 // CARD TO READER - manchester
113 // Sequence D: 11110000 modulation with subcarrier during first half
114 // Sequence E: 00001111 modulation with subcarrier during second half
115 // Sequence F: 00000000 no modulation with subcarrier
116 // READER TO CARD - miller
117 // Sequence X: 00001100 drop after half a period
118 // Sequence Y: 00000000 no drop
119 // Sequence Z: 11000000 drop at start
120 #define SEC_D 0xf0
121 #define SEC_E 0x0f
122 #define SEC_F 0x00
123 #define SEC_X 0x0c
124 #define SEC_Y 0x00
125 #define SEC_Z 0xc0
126
127 void iso14a_set_trigger(bool enable) {
128 trigger = enable;
129 }
130
131 void iso14a_set_timeout(uint32_t timeout) {
132 iso14a_timeout = timeout;
133 if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106);
134 }
135
136 void iso14a_set_ATS_timeout(uint8_t *ats) {
137 uint8_t tb1;
138 uint8_t fwi;
139 uint32_t fwt;
140
141 if (ats[0] > 1) { // there is a format byte T0
142 if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
143
144 if ((ats[1] & 0x10) == 0x10) // there is an interface byte TA(1) preceding TB(1)
145 tb1 = ats[3];
146 else
147 tb1 = ats[2];
148
149 fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI)
150 fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc
151 //fwt = 4096 * (1 << fwi);
152
153 iso14a_set_timeout(fwt/(8*16));
154 //iso14a_set_timeout(fwt/128);
155 }
156 }
157 }
158
159 //-----------------------------------------------------------------------------
160 // Generate the parity value for a byte sequence
161 //
162 //-----------------------------------------------------------------------------
163 void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par) {
164 uint16_t paritybit_cnt = 0;
165 uint16_t paritybyte_cnt = 0;
166 uint8_t parityBits = 0;
167
168 for (uint16_t i = 0; i < iLen; i++) {
169 // Generate the parity bits
170 parityBits |= ((oddparity8(pbtCmd[i])) << (7-paritybit_cnt));
171 if (paritybit_cnt == 7) {
172 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
173 parityBits = 0; // and advance to next Parity Byte
174 paritybyte_cnt++;
175 paritybit_cnt = 0;
176 } else {
177 paritybit_cnt++;
178 }
179 }
180
181 // save remaining parity bits
182 par[paritybyte_cnt] = parityBits;
183 }
184
185 void AppendCrc14443a(uint8_t* data, int len) {
186 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
187 }
188
189 //=============================================================================
190 // ISO 14443 Type A - Miller decoder
191 //=============================================================================
192 // Basics:
193 // This decoder is used when the PM3 acts as a tag.
194 // The reader will generate "pauses" by temporarily switching of the field.
195 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
196 // The FPGA does a comparison with a threshold and would deliver e.g.:
197 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
198 // The Miller decoder needs to identify the following sequences:
199 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
200 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
201 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
202 // Note 1: the bitstream may start at any time. We therefore need to sync.
203 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
204 //-----------------------------------------------------------------------------
205 static tUart Uart;
206
207 // Lookup-Table to decide if 4 raw bits are a modulation.
208 // We accept the following:
209 // 0001 - a 3 tick wide pause
210 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
211 // 0111 - a 2 tick wide pause shifted left
212 // 1001 - a 2 tick wide pause shifted right
213 const bool Mod_Miller_LUT[] = {
214 FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE,
215 FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE
216 };
217 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
218 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
219
220 void UartReset() {
221 Uart.state = STATE_UNSYNCD;
222 Uart.bitCount = 0;
223 Uart.len = 0; // number of decoded data bytes
224 Uart.parityLen = 0; // number of decoded parity bytes
225 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
226 Uart.parityBits = 0; // holds 8 parity bits
227 Uart.startTime = 0;
228 Uart.endTime = 0;
229
230 Uart.byteCntMax = 0;
231 Uart.posCnt = 0;
232 Uart.syncBit = 9999;
233 }
234
235 void UartInit(uint8_t *data, uint8_t *parity) {
236 Uart.output = data;
237 Uart.parity = parity;
238 Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits
239 UartReset();
240 }
241
242 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
243 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) {
244 Uart.fourBits = (Uart.fourBits << 8) | bit;
245
246 if (Uart.state == STATE_UNSYNCD) { // not yet synced
247 Uart.syncBit = 9999; // not set
248
249 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
250 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
251 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
252
253 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
254 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
255 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
256 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
257 //
258 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
259 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
260
261 if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7;
262 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6;
263 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5;
264 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4;
265 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3;
266 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2;
267 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1;
268 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0;
269
270 if (Uart.syncBit != 9999) { // found a sync bit
271 Uart.startTime = non_real_time ? non_real_time : (GetCountSspClk() & 0xfffffff8);
272 Uart.startTime -= Uart.syncBit;
273 Uart.endTime = Uart.startTime;
274 Uart.state = STATE_START_OF_COMMUNICATION;
275 }
276 } else {
277
278 if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) {
279 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error
280 UartReset();
281 } else { // Modulation in first half = Sequence Z = logic "0"
282 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
283 UartReset();
284 } else {
285 Uart.bitCount++;
286 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
287 Uart.state = STATE_MILLER_Z;
288 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
289 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
290 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
291 Uart.parityBits <<= 1; // make room for the parity bit
292 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
293 Uart.bitCount = 0;
294 Uart.shiftReg = 0;
295 if((Uart.len&0x0007) == 0) { // every 8 data bytes
296 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
297 Uart.parityBits = 0;
298 }
299 }
300 }
301 }
302 } else {
303 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
304 Uart.bitCount++;
305 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
306 Uart.state = STATE_MILLER_X;
307 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
308 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
309 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
310 Uart.parityBits <<= 1; // make room for the new parity bit
311 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
312 Uart.bitCount = 0;
313 Uart.shiftReg = 0;
314 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
315 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
316 Uart.parityBits = 0;
317 }
318 }
319 } else { // no modulation in both halves - Sequence Y
320 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
321 Uart.state = STATE_UNSYNCD;
322 Uart.bitCount--; // last "0" was part of EOC sequence
323 Uart.shiftReg <<= 1; // drop it
324 if(Uart.bitCount > 0) { // if we decoded some bits
325 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
326 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
327 Uart.parityBits <<= 1; // add a (void) parity bit
328 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits
329 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
330 return TRUE;
331 } else if (Uart.len & 0x0007) { // there are some parity bits to store
332 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits
333 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
334 }
335 if (Uart.len) {
336 return TRUE; // we are finished with decoding the raw data sequence
337 } else {
338 UartReset(); // Nothing received - start over
339 }
340 }
341 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
342 UartReset();
343 } else { // a logic "0"
344 Uart.bitCount++;
345 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
346 Uart.state = STATE_MILLER_Y;
347 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
348 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
349 Uart.parityBits <<= 1; // make room for the parity bit
350 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
351 Uart.bitCount = 0;
352 Uart.shiftReg = 0;
353 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
354 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
355 Uart.parityBits = 0;
356 }
357 }
358 }
359 }
360 }
361 }
362 return FALSE; // not finished yet, need more data
363 }
364
365 //=============================================================================
366 // ISO 14443 Type A - Manchester decoder
367 //=============================================================================
368 // Basics:
369 // This decoder is used when the PM3 acts as a reader.
370 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
371 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
372 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
373 // The Manchester decoder needs to identify the following sequences:
374 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
375 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
376 // 8 ticks unmodulated: Sequence F = end of communication
377 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
378 // Note 1: the bitstream may start at any time. We therefore need to sync.
379 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
380 static tDemod Demod;
381
382 // Lookup-Table to decide if 4 raw bits are a modulation.
383 // We accept three or four "1" in any position
384 const bool Mod_Manchester_LUT[] = {
385 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
386 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
387 };
388
389 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
390 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
391
392 void DemodReset() {
393 Demod.state = DEMOD_UNSYNCD;
394 Demod.len = 0; // number of decoded data bytes
395 Demod.parityLen = 0;
396 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
397 Demod.parityBits = 0; //
398 Demod.collisionPos = 0; // Position of collision bit
399 Demod.twoBits = 0xffff; // buffer for 2 Bits
400 Demod.highCnt = 0;
401 Demod.startTime = 0;
402 Demod.endTime = 0;
403 Demod.bitCount = 0;
404 Demod.syncBit = 0xFFFF;
405 Demod.samples = 0;
406 }
407
408 void DemodInit(uint8_t *data, uint8_t *parity) {
409 Demod.output = data;
410 Demod.parity = parity;
411 DemodReset();
412 }
413
414 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
415 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time) {
416 Demod.twoBits = (Demod.twoBits << 8) | bit;
417
418 if (Demod.state == DEMOD_UNSYNCD) {
419
420 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
421 if (Demod.twoBits == 0x0000) {
422 Demod.highCnt++;
423 } else {
424 Demod.highCnt = 0;
425 }
426 } else {
427 Demod.syncBit = 0xFFFF; // not set
428 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
429 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
430 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
431 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
432 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
433 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
434 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
435 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
436 if (Demod.syncBit != 0xFFFF) {
437 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
438 Demod.startTime -= Demod.syncBit;
439 Demod.bitCount = offset; // number of decoded data bits
440 Demod.state = DEMOD_MANCHESTER_DATA;
441 }
442 }
443 } else {
444
445 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
446 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
447 if (!Demod.collisionPos) {
448 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
449 }
450 } // modulation in first half only - Sequence D = 1
451 Demod.bitCount++;
452 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
453 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
454 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
455 Demod.parityBits <<= 1; // make room for the parity bit
456 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
457 Demod.bitCount = 0;
458 Demod.shiftReg = 0;
459 if((Demod.len&0x0007) == 0) { // every 8 data bytes
460 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
461 Demod.parityBits = 0;
462 }
463 }
464 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
465 } else { // no modulation in first half
466 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
467 Demod.bitCount++;
468 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
469 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
470 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
471 Demod.parityBits <<= 1; // make room for the new parity bit
472 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
473 Demod.bitCount = 0;
474 Demod.shiftReg = 0;
475 if ((Demod.len&0x0007) == 0) { // every 8 data bytes
476 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
477 Demod.parityBits = 0;
478 }
479 }
480 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
481 } else { // no modulation in both halves - End of communication
482 if(Demod.bitCount > 0) { // there are some remaining data bits
483 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
484 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
485 Demod.parityBits <<= 1; // add a (void) parity bit
486 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
487 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
488 return TRUE;
489 } else if (Demod.len & 0x0007) { // there are some parity bits to store
490 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
491 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
492 }
493 if (Demod.len) {
494 return TRUE; // we are finished with decoding the raw data sequence
495 } else { // nothing received. Start over
496 DemodReset();
497 }
498 }
499 }
500 }
501 return FALSE; // not finished yet, need more data
502 }
503
504 //=============================================================================
505 // Finally, a `sniffer' for ISO 14443 Type A
506 // Both sides of communication!
507 //=============================================================================
508
509 //-----------------------------------------------------------------------------
510 // Record the sequence of commands sent by the reader to the tag, with
511 // triggering so that we start recording at the point that the tag is moved
512 // near the reader.
513 // "hf 14a sniff"
514 //-----------------------------------------------------------------------------
515 void RAMFUNC SniffIso14443a(uint8_t param) {
516 // param:
517 // bit 0 - trigger from first card answer
518 // bit 1 - trigger from first reader 7-bit request
519 LEDsoff();
520
521 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
522
523 // Allocate memory from BigBuf for some buffers
524 // free all previous allocations first
525 BigBuf_free(); BigBuf_Clear_ext(false);
526 clear_trace();
527 set_tracing(TRUE);
528
529 // The command (reader -> tag) that we're receiving.
530 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
531 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
532
533 // The response (tag -> reader) that we're receiving.
534 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
535 uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE);
536
537 // The DMA buffer, used to stream samples from the FPGA
538 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
539
540 uint8_t *data = dmaBuf;
541 uint8_t previous_data = 0;
542 int maxDataLen = 0;
543 int dataLen = 0;
544 bool TagIsActive = FALSE;
545 bool ReaderIsActive = FALSE;
546
547 // Set up the demodulator for tag -> reader responses.
548 DemodInit(receivedResponse, receivedResponsePar);
549
550 // Set up the demodulator for the reader -> tag commands
551 UartInit(receivedCmd, receivedCmdPar);
552
553 // Setup and start DMA.
554 if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE) ){
555 if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
556 return;
557 }
558
559 // We won't start recording the frames that we acquire until we trigger;
560 // a good trigger condition to get started is probably when we see a
561 // response from the tag.
562 // triggered == FALSE -- to wait first for card
563 bool triggered = !(param & 0x03);
564
565 // And now we loop, receiving samples.
566 for(uint32_t rsamples = 0; TRUE; ) {
567
568 if(BUTTON_PRESS()) {
569 DbpString("cancelled by button");
570 break;
571 }
572
573 LED_A_ON();
574 WDT_HIT();
575
576 int register readBufDataP = data - dmaBuf;
577 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
578 if (readBufDataP <= dmaBufDataP){
579 dataLen = dmaBufDataP - readBufDataP;
580 } else {
581 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
582 }
583 // test for length of buffer
584 if(dataLen > maxDataLen) {
585 maxDataLen = dataLen;
586 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
587 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
588 break;
589 }
590 }
591 if(dataLen < 1) continue;
592
593 // primary buffer was stopped( <-- we lost data!
594 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
595 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
596 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
597 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
598 }
599 // secondary buffer sets as primary, secondary buffer was stopped
600 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
601 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
602 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
603 }
604
605 LED_A_OFF();
606
607 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
608
609 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
610 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
611 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
612 LED_C_ON();
613
614 // check - if there is a short 7bit request from reader
615 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
616
617 if(triggered) {
618 if (!LogTrace(receivedCmd,
619 Uart.len,
620 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
621 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
622 Uart.parity,
623 TRUE)) break;
624 }
625 /* And ready to receive another command. */
626 UartReset();
627 /* And also reset the demod code, which might have been */
628 /* false-triggered by the commands from the reader. */
629 DemodReset();
630 LED_B_OFF();
631 }
632 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
633 }
634
635 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
636 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
637 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
638 LED_B_ON();
639
640 if (!LogTrace(receivedResponse,
641 Demod.len,
642 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
643 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
644 Demod.parity,
645 FALSE)) break;
646
647 if ((!triggered) && (param & 0x01)) triggered = TRUE;
648
649 // And ready to receive another response.
650 DemodReset();
651 // And reset the Miller decoder including itS (now outdated) input buffer
652 UartInit(receivedCmd, receivedCmdPar);
653 LED_C_OFF();
654 }
655 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
656 }
657 }
658
659 previous_data = *data;
660 rsamples++;
661 data++;
662 if(data == dmaBuf + DMA_BUFFER_SIZE) {
663 data = dmaBuf;
664 }
665 } // main cycle
666
667 if (MF_DBGLEVEL >= 1) {
668 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
669 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]);
670 }
671 FpgaDisableSscDma();
672 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
673 LEDsoff();
674 set_tracing(FALSE);
675 }
676
677 //-----------------------------------------------------------------------------
678 // Prepare tag messages
679 //-----------------------------------------------------------------------------
680 static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity) {
681 ToSendReset();
682
683 // Correction bit, might be removed when not needed
684 ToSendStuffBit(0);
685 ToSendStuffBit(0);
686 ToSendStuffBit(0);
687 ToSendStuffBit(0);
688 ToSendStuffBit(1); // 1
689 ToSendStuffBit(0);
690 ToSendStuffBit(0);
691 ToSendStuffBit(0);
692
693 // Send startbit
694 ToSend[++ToSendMax] = SEC_D;
695 LastProxToAirDuration = 8 * ToSendMax - 4;
696
697 for(uint16_t i = 0; i < len; i++) {
698 uint8_t b = cmd[i];
699
700 // Data bits
701 for(uint16_t j = 0; j < 8; j++) {
702 if(b & 1) {
703 ToSend[++ToSendMax] = SEC_D;
704 } else {
705 ToSend[++ToSendMax] = SEC_E;
706 }
707 b >>= 1;
708 }
709
710 // Get the parity bit
711 if (parity[i>>3] & (0x80>>(i&0x0007))) {
712 ToSend[++ToSendMax] = SEC_D;
713 LastProxToAirDuration = 8 * ToSendMax - 4;
714 } else {
715 ToSend[++ToSendMax] = SEC_E;
716 LastProxToAirDuration = 8 * ToSendMax;
717 }
718 }
719
720 // Send stopbit
721 ToSend[++ToSendMax] = SEC_F;
722
723 // Convert from last byte pos to length
724 ++ToSendMax;
725 }
726
727 static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len) {
728 uint8_t par[MAX_PARITY_SIZE] = {0};
729 GetParity(cmd, len, par);
730 CodeIso14443aAsTagPar(cmd, len, par);
731 }
732
733 static void Code4bitAnswerAsTag(uint8_t cmd) {
734 uint8_t b = cmd;
735
736 ToSendReset();
737
738 // Correction bit, might be removed when not needed
739 ToSendStuffBit(0);
740 ToSendStuffBit(0);
741 ToSendStuffBit(0);
742 ToSendStuffBit(0);
743 ToSendStuffBit(1); // 1
744 ToSendStuffBit(0);
745 ToSendStuffBit(0);
746 ToSendStuffBit(0);
747
748 // Send startbit
749 ToSend[++ToSendMax] = SEC_D;
750
751 for(uint8_t i = 0; i < 4; i++) {
752 if(b & 1) {
753 ToSend[++ToSendMax] = SEC_D;
754 LastProxToAirDuration = 8 * ToSendMax - 4;
755 } else {
756 ToSend[++ToSendMax] = SEC_E;
757 LastProxToAirDuration = 8 * ToSendMax;
758 }
759 b >>= 1;
760 }
761
762 // Send stopbit
763 ToSend[++ToSendMax] = SEC_F;
764
765 // Convert from last byte pos to length
766 ToSendMax++;
767 }
768
769 //-----------------------------------------------------------------------------
770 // Wait for commands from reader
771 // Stop when button is pressed
772 // Or return TRUE when command is captured
773 //-----------------------------------------------------------------------------
774 static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len) {
775 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
776 // only, since we are receiving, not transmitting).
777 // Signal field is off with the appropriate LED
778 LED_D_OFF();
779 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
780
781 // Now run a `software UART` on the stream of incoming samples.
782 UartInit(received, parity);
783
784 // clear RXRDY:
785 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
786
787 for(;;) {
788 WDT_HIT();
789
790 if(BUTTON_PRESS()) return FALSE;
791
792 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
793 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
794 if(MillerDecoding(b, 0)) {
795 *len = Uart.len;
796 return TRUE;
797 }
798 }
799 }
800 }
801
802 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
803 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
804 // This will need the following byte array for a modulation sequence
805 // 144 data bits (18 * 8)
806 // 18 parity bits
807 // 2 Start and stop
808 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
809 // 1 just for the case
810 // ----------- +
811 // 166 bytes, since every bit that needs to be send costs us a byte
812 //
813 // Prepare the tag modulation bits from the message
814 CodeIso14443aAsTag(response_info->response,response_info->response_n);
815
816 // Make sure we do not exceed the free buffer space
817 if (ToSendMax > max_buffer_size) {
818 Dbprintf("Out of memory, when modulating bits for tag answer:");
819 Dbhexdump(response_info->response_n,response_info->response,false);
820 return FALSE;
821 }
822
823 // Copy the byte array, used for this modulation to the buffer position
824 memcpy(response_info->modulation,ToSend,ToSendMax);
825
826 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
827 response_info->modulation_n = ToSendMax;
828 response_info->ProxToAirDuration = LastProxToAirDuration;
829 return TRUE;
830 }
831
832 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
833 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
834 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
835 // -> need 273 bytes buffer
836 // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370
837 // 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits
838 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453
839
840 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
841 // Retrieve and store the current buffer index
842 response_info->modulation = free_buffer_pointer;
843
844 // Determine the maximum size we can use from our buffer
845 size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE;
846
847 // Forward the prepare tag modulation function to the inner function
848 if (prepare_tag_modulation(response_info, max_buffer_size)) {
849 // Update the free buffer offset
850 free_buffer_pointer += ToSendMax;
851 return true;
852 } else {
853 return false;
854 }
855 }
856
857 //-----------------------------------------------------------------------------
858 // Main loop of simulated tag: receive commands from reader, decide what
859 // response to send, and send it.
860 // 'hf 14a sim'
861 //-----------------------------------------------------------------------------
862 void SimulateIso14443aTag(int tagType, int flags, byte_t* data) {
863
864 // Here, we collect CUID, block1, keytype1, NT1, NR1, AR1, CUID, block2, keytyp2, NT2, NR2, AR2
865 // it should also collect block, keytype.
866 // This can be used in a reader-only attack.
867 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
868 uint8_t ar_nr_collected = 0;
869 uint8_t sak = 0;
870 uint32_t cuid = 0;
871 uint32_t nonce = 0;
872
873 // PACK response to PWD AUTH for EV1/NTAG
874 uint8_t response8[4] = {0,0,0,0};
875 // Counter for EV1/NTAG
876 uint32_t counters[] = {0,0,0};
877
878 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
879 uint8_t response1[] = {0,0};
880
881 switch (tagType) {
882 case 1: { // MIFARE Classic 1k
883 response1[0] = 0x04;
884 sak = 0x08;
885 } break;
886 case 2: { // MIFARE Ultralight
887 response1[0] = 0x44;
888 sak = 0x00;
889 } break;
890 case 3: { // MIFARE DESFire
891 response1[0] = 0x04;
892 response1[1] = 0x03;
893 sak = 0x20;
894 } break;
895 case 4: { // ISO/IEC 14443-4 - javacard (JCOP)
896 response1[0] = 0x04;
897 sak = 0x28;
898 } break;
899 case 5: { // MIFARE TNP3XXX
900 response1[0] = 0x01;
901 response1[1] = 0x0f;
902 sak = 0x01;
903 } break;
904 case 6: { // MIFARE Mini 320b
905 response1[0] = 0x44;
906 sak = 0x09;
907 } break;
908 case 7: { // NTAG
909 response1[0] = 0x44;
910 sak = 0x00;
911 // PACK
912 response8[0] = 0x80;
913 response8[1] = 0x80;
914 ComputeCrc14443(CRC_14443_A, response8, 2, &response8[2], &response8[3]);
915 // uid not supplied then get from emulator memory
916 if (data[0]==0) {
917 uint16_t start = 4 * (0+12);
918 uint8_t emdata[8];
919 emlGetMemBt( emdata, start, sizeof(emdata));
920 memcpy(data, emdata, 3); //uid bytes 0-2
921 memcpy(data+3, emdata+4, 4); //uid bytes 3-7
922 flags |= FLAG_7B_UID_IN_DATA;
923 }
924 } break;
925 default: {
926 Dbprintf("Error: unkown tagtype (%d)",tagType);
927 return;
928 } break;
929 }
930
931 // The second response contains the (mandatory) first 24 bits of the UID
932 uint8_t response2[5] = {0x00};
933
934 // For UID size 7,
935 uint8_t response2a[5] = {0x00};
936
937 if ( (flags & FLAG_7B_UID_IN_DATA) == FLAG_7B_UID_IN_DATA ) {
938 response2[0] = 0x88; // Cascade Tag marker
939 response2[1] = data[0];
940 response2[2] = data[1];
941 response2[3] = data[2];
942
943 response2a[0] = data[3];
944 response2a[1] = data[4];
945 response2a[2] = data[5];
946 response2a[3] = data[6]; //??
947 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
948
949 // Configure the ATQA and SAK accordingly
950 response1[0] |= 0x40;
951 sak |= 0x04;
952
953 cuid = bytes_to_num(data+3, 4);
954 } else {
955 memcpy(response2, data, 4);
956 // Configure the ATQA and SAK accordingly
957 response1[0] &= 0xBF;
958 sak &= 0xFB;
959 cuid = bytes_to_num(data, 4);
960 }
961
962 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
963 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
964
965 // Prepare the mandatory SAK (for 4 and 7 byte UID)
966 uint8_t response3[3] = {sak, 0x00, 0x00};
967 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
968
969 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
970 uint8_t response3a[3] = {0x00};
971 response3a[0] = sak & 0xFB;
972 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
973
974 uint8_t response5[] = { 0x01, 0x01, 0x01, 0x01 }; // Very random tag nonce
975 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
976 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
977 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
978 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
979 // TC(1) = 0x02: CID supported, NAD not supported
980 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
981
982 // the randon nonce
983 nonce = bytes_to_num(response5, 4);
984
985 // Prepare GET_VERSION (different for UL EV-1 / NTAG)
986 //uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
987 //uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
988 // Prepare CHK_TEARING
989 //uint8_t response9[] = {0xBD,0x90,0x3f};
990
991 #define TAG_RESPONSE_COUNT 10
992 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
993 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
994 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
995 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
996 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
997 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
998 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
999 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1000
1001 { .response = response8, .response_n = sizeof(response8) } // EV1/NTAG PACK response
1002 };
1003 //{ .response = response7_NTAG, .response_n = sizeof(response7_NTAG)}, // EV1/NTAG GET_VERSION response
1004 //{ .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response
1005
1006
1007 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1008 // Such a response is less time critical, so we can prepare them on the fly
1009 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1010 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1011 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1012 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1013 tag_response_info_t dynamic_response_info = {
1014 .response = dynamic_response_buffer,
1015 .response_n = 0,
1016 .modulation = dynamic_modulation_buffer,
1017 .modulation_n = 0
1018 };
1019
1020 // We need to listen to the high-frequency, peak-detected path.
1021 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1022
1023 BigBuf_free_keep_EM();
1024 clear_trace();
1025 set_tracing(TRUE);
1026
1027 // allocate buffers:
1028 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1029 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
1030 free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE);
1031
1032 // Prepare the responses of the anticollision phase
1033 // there will be not enough time to do this at the moment the reader sends it REQA
1034 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++)
1035 prepare_allocated_tag_modulation(&responses[i]);
1036
1037 int len = 0;
1038
1039 // To control where we are in the protocol
1040 int order = 0;
1041 int lastorder;
1042
1043 // Just to allow some checks
1044 int happened = 0;
1045 int happened2 = 0;
1046 int cmdsRecvd = 0;
1047 tag_response_info_t* p_response;
1048
1049 LED_A_ON();
1050 for(;;) {
1051 WDT_HIT();
1052
1053 // Clean receive command buffer
1054 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1055 DbpString("Button press");
1056 break;
1057 }
1058
1059 // incease nonce at every command recieved
1060 nonce++;
1061 num_to_bytes(nonce, 4, response5);
1062
1063 p_response = NULL;
1064
1065 // Okay, look at the command now.
1066 lastorder = order;
1067 if(receivedCmd[0] == ISO14443A_CMD_REQA) { // Received a REQUEST
1068 p_response = &responses[0]; order = 1;
1069 } else if(receivedCmd[0] == ISO14443A_CMD_WUPA) { // Received a WAKEUP
1070 p_response = &responses[0]; order = 6;
1071 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT) { // Received request for UID (cascade 1)
1072 p_response = &responses[1]; order = 2;
1073 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2) { // Received request for UID (cascade 2)
1074 p_response = &responses[2]; order = 20;
1075 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT) { // Received a SELECT (cascade 1)
1076 p_response = &responses[3]; order = 3;
1077 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2) { // Received a SELECT (cascade 2)
1078 p_response = &responses[4]; order = 30;
1079 } else if(receivedCmd[0] == ISO14443A_CMD_READBLOCK) { // Received a (plain) READ
1080 uint8_t block = receivedCmd[1];
1081 // if Ultralight or NTAG (4 byte blocks)
1082 if ( tagType == 7 || tagType == 2 ) {
1083 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1084 uint16_t start = 4 * (block+12);
1085 uint8_t emdata[MAX_MIFARE_FRAME_SIZE];
1086 emlGetMemBt( emdata, start, 16);
1087 AppendCrc14443a(emdata, 16);
1088 EmSendCmdEx(emdata, sizeof(emdata), false);
1089 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1090 p_response = NULL;
1091 } else { // all other tags (16 byte block tags)
1092 EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
1093 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1094 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1095 p_response = NULL;
1096 }
1097 } else if(receivedCmd[0] == MIFARE_ULEV1_FASTREAD) { // Received a FAST READ (ranged read)
1098 uint8_t emdata[MAX_FRAME_SIZE];
1099 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1100 int start = (receivedCmd[1]+12) * 4;
1101 int len = (receivedCmd[2] - receivedCmd[1] + 1) * 4;
1102 emlGetMemBt( emdata, start, len);
1103 AppendCrc14443a(emdata, len);
1104 EmSendCmdEx(emdata, len+2, false);
1105 p_response = NULL;
1106 } else if(receivedCmd[0] == MIFARE_ULEV1_READSIG && tagType == 7) { // Received a READ SIGNATURE --
1107 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1108 uint16_t start = 4 * 4;
1109 uint8_t emdata[34];
1110 emlGetMemBt( emdata, start, 32);
1111 AppendCrc14443a(emdata, 32);
1112 EmSendCmdEx(emdata, sizeof(emdata), false);
1113 p_response = NULL;
1114 } else if (receivedCmd[0] == MIFARE_ULEV1_READ_CNT && tagType == 7) { // Received a READ COUNTER --
1115 uint8_t index = receivedCmd[1];
1116 uint8_t data[] = {0x00,0x00,0x00,0x14,0xa5};
1117 if ( counters[index] > 0) {
1118 num_to_bytes(counters[index], 3, data);
1119 AppendCrc14443a(data, sizeof(data)-2);
1120 }
1121 EmSendCmdEx(data,sizeof(data),false);
1122 p_response = NULL;
1123 } else if (receivedCmd[0] == MIFARE_ULEV1_INCR_CNT && tagType == 7) { // Received a INC COUNTER --
1124 // number of counter
1125 uint8_t counter = receivedCmd[1];
1126 uint32_t val = bytes_to_num(receivedCmd+2,4);
1127 counters[counter] = val;
1128
1129 // send ACK
1130 uint8_t ack[] = {0x0a};
1131 EmSendCmdEx(ack,sizeof(ack),false);
1132 p_response = NULL;
1133 } else if(receivedCmd[0] == MIFARE_ULEV1_CHECKTEAR && tagType == 7) { // Received a CHECK_TEARING_EVENT --
1134 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1135 uint8_t emdata[3];
1136 uint8_t counter=0;
1137 if (receivedCmd[1]<3) counter = receivedCmd[1];
1138 emlGetMemBt( emdata, 10+counter, 1);
1139 AppendCrc14443a(emdata, sizeof(emdata)-2);
1140 EmSendCmdEx(emdata, sizeof(emdata), false);
1141 p_response = NULL;
1142 } else if(receivedCmd[0] == ISO14443A_CMD_HALT) { // Received a HALT
1143 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1144 p_response = NULL;
1145 } else if(receivedCmd[0] == MIFARE_AUTH_KEYA || receivedCmd[0] == MIFARE_AUTH_KEYB) { // Received an authentication request
1146 if ( tagType == 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
1147 uint8_t emdata[10];
1148 emlGetMemBt( emdata, 0, 8 );
1149 AppendCrc14443a(emdata, sizeof(emdata)-2);
1150 EmSendCmdEx(emdata, sizeof(emdata), false);
1151 p_response = NULL;
1152 } else {
1153 p_response = &responses[5]; order = 7;
1154 }
1155 } else if(receivedCmd[0] == ISO14443A_CMD_RATS) { // Received a RATS request
1156 if (tagType == 1 || tagType == 2) { // RATS not supported
1157 EmSend4bit(CARD_NACK_NA);
1158 p_response = NULL;
1159 } else {
1160 p_response = &responses[6]; order = 70;
1161 }
1162 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1163 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1164 uint32_t nr = bytes_to_num(receivedCmd,4);
1165 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1166
1167 if ( (flags & FLAG_NR_AR_ATTACK) == FLAG_NR_AR_ATTACK ) {
1168 if(ar_nr_collected < 2){
1169 ar_nr_responses[ar_nr_collected*4] = cuid;
1170 ar_nr_responses[ar_nr_collected*4+1] = nonce;
1171 ar_nr_responses[ar_nr_collected*4+2] = nr;
1172 ar_nr_responses[ar_nr_collected*4+3] = ar;
1173 ar_nr_collected++;
1174 }
1175 if(ar_nr_collected > 1 ) {
1176 if (MF_DBGLEVEL >= 2 && !(flags & FLAG_INTERACTIVE)) {
1177 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
1178 Dbprintf("../tools/mfkey/mfkey32v2.exe %08x %08x %08x %08x %08x %08x %08x",
1179 ar_nr_responses[0], // CUID
1180 ar_nr_responses[1], // NT_1
1181 ar_nr_responses[2], // AR_1
1182 ar_nr_responses[3], // NR_1
1183 ar_nr_responses[5], // NT_2
1184 ar_nr_responses[6], // AR_2
1185 ar_nr_responses[7] // NR_2
1186 );
1187 }
1188 uint8_t len = ar_nr_collected*4*4;
1189 cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len);
1190 ar_nr_collected = 0;
1191 memset(ar_nr_responses, 0x00, len);
1192 }
1193 }
1194
1195 } else if (receivedCmd[0] == MIFARE_ULC_AUTH_1 ) { // ULC authentication, or Desfire Authentication
1196 } else if (receivedCmd[0] == MIFARE_ULEV1_AUTH) { // NTAG / EV-1 authentication
1197 if ( tagType == 7 ) {
1198 uint16_t start = 13; //first 4 blocks of emu are [getversion answer - check tearing - pack - 0x00]
1199 uint8_t emdata[4];
1200 emlGetMemBt( emdata, start, 2);
1201 AppendCrc14443a(emdata, 2);
1202 EmSendCmdEx(emdata, sizeof(emdata), false);
1203 p_response = NULL;
1204 uint32_t pwd = bytes_to_num(receivedCmd+1,4);
1205
1206 if ( MF_DBGLEVEL >= 3) Dbprintf("Auth attempt: %08x", pwd);
1207 }
1208 } else {
1209 // Check for ISO 14443A-4 compliant commands, look at left nibble
1210 switch (receivedCmd[0]) {
1211 case 0x02:
1212 case 0x03: { // IBlock (command no CID)
1213 dynamic_response_info.response[0] = receivedCmd[0];
1214 dynamic_response_info.response[1] = 0x90;
1215 dynamic_response_info.response[2] = 0x00;
1216 dynamic_response_info.response_n = 3;
1217 } break;
1218 case 0x0B:
1219 case 0x0A: { // IBlock (command CID)
1220 dynamic_response_info.response[0] = receivedCmd[0];
1221 dynamic_response_info.response[1] = 0x00;
1222 dynamic_response_info.response[2] = 0x90;
1223 dynamic_response_info.response[3] = 0x00;
1224 dynamic_response_info.response_n = 4;
1225 } break;
1226
1227 case 0x1A:
1228 case 0x1B: { // Chaining command
1229 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1230 dynamic_response_info.response_n = 2;
1231 } break;
1232
1233 case 0xaa:
1234 case 0xbb: {
1235 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1236 dynamic_response_info.response_n = 2;
1237 } break;
1238
1239 case 0xBA: { // ping / pong
1240 dynamic_response_info.response[0] = 0xAB;
1241 dynamic_response_info.response[1] = 0x00;
1242 dynamic_response_info.response_n = 2;
1243 } break;
1244
1245 case 0xCA:
1246 case 0xC2: { // Readers sends deselect command
1247 dynamic_response_info.response[0] = 0xCA;
1248 dynamic_response_info.response[1] = 0x00;
1249 dynamic_response_info.response_n = 2;
1250 } break;
1251
1252 default: {
1253 // Never seen this command before
1254 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1255 Dbprintf("Received unknown command (len=%d):",len);
1256 Dbhexdump(len,receivedCmd,false);
1257 // Do not respond
1258 dynamic_response_info.response_n = 0;
1259 } break;
1260 }
1261
1262 if (dynamic_response_info.response_n > 0) {
1263 // Copy the CID from the reader query
1264 dynamic_response_info.response[1] = receivedCmd[1];
1265
1266 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1267 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1268 dynamic_response_info.response_n += 2;
1269
1270 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1271 Dbprintf("Error preparing tag response");
1272 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1273 break;
1274 }
1275 p_response = &dynamic_response_info;
1276 }
1277 }
1278
1279 // Count number of wakeups received after a halt
1280 if(order == 6 && lastorder == 5) { happened++; }
1281
1282 // Count number of other messages after a halt
1283 if(order != 6 && lastorder == 5) { happened2++; }
1284
1285 // comment this limit if you want to simulation longer
1286 if (!tracing) {
1287 Dbprintf("Trace Full. Simulation stopped.");
1288 break;
1289 }
1290 // comment this limit if you want to simulation longer
1291 if(cmdsRecvd > 999) {
1292 DbpString("1000 commands later...");
1293 break;
1294 }
1295 cmdsRecvd++;
1296
1297 if (p_response != NULL) {
1298 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1299 // do the tracing for the previous reader request and this tag answer:
1300 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1301 GetParity(p_response->response, p_response->response_n, par);
1302
1303 EmLogTrace(Uart.output,
1304 Uart.len,
1305 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1306 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1307 Uart.parity,
1308 p_response->response,
1309 p_response->response_n,
1310 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1311 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1312 par);
1313 }
1314 }
1315
1316 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1317 set_tracing(FALSE);
1318 BigBuf_free_keep_EM();
1319 LED_A_OFF();
1320
1321 if (MF_DBGLEVEL >= 4){
1322 Dbprintf("-[ Wake ups after halt [%d]", happened);
1323 Dbprintf("-[ Messages after halt [%d]", happened2);
1324 Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd);
1325 }
1326 }
1327
1328 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1329 // of bits specified in the delay parameter.
1330 void PrepareDelayedTransfer(uint16_t delay) {
1331 delay &= 0x07;
1332 if (!delay) return;
1333
1334 uint8_t bitmask = 0;
1335 uint8_t bits_to_shift = 0;
1336 uint8_t bits_shifted = 0;
1337 uint16_t i = 0;
1338
1339 for (i = 0; i < delay; ++i)
1340 bitmask |= (0x01 << i);
1341
1342 ToSend[++ToSendMax] = 0x00;
1343
1344 for (i = 0; i < ToSendMax; ++i) {
1345 bits_to_shift = ToSend[i] & bitmask;
1346 ToSend[i] = ToSend[i] >> delay;
1347 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1348 bits_shifted = bits_to_shift;
1349 }
1350 }
1351
1352
1353 //-------------------------------------------------------------------------------------
1354 // Transmit the command (to the tag) that was placed in ToSend[].
1355 // Parameter timing:
1356 // if NULL: transfer at next possible time, taking into account
1357 // request guard time and frame delay time
1358 // if == 0: transfer immediately and return time of transfer
1359 // if != 0: delay transfer until time specified
1360 //-------------------------------------------------------------------------------------
1361 static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing) {
1362 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1363
1364 uint32_t ThisTransferTime = 0;
1365
1366 if (timing) {
1367 if(*timing == 0) { // Measure time
1368 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1369 } else {
1370 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1371 }
1372 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1373 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1374 LastTimeProxToAirStart = *timing;
1375 } else {
1376 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1377
1378 while(GetCountSspClk() < ThisTransferTime);
1379
1380 LastTimeProxToAirStart = ThisTransferTime;
1381 }
1382
1383 // clear TXRDY
1384 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1385
1386 uint16_t c = 0;
1387 for(;;) {
1388 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1389 AT91C_BASE_SSC->SSC_THR = cmd[c];
1390 ++c;
1391 if(c >= len)
1392 break;
1393 }
1394 }
1395
1396 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1397 }
1398
1399 //-----------------------------------------------------------------------------
1400 // Prepare reader command (in bits, support short frames) to send to FPGA
1401 //-----------------------------------------------------------------------------
1402 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity)
1403 {
1404 int i, j;
1405 int last = 0;
1406 uint8_t b;
1407
1408 ToSendReset();
1409
1410 // Start of Communication (Seq. Z)
1411 ToSend[++ToSendMax] = SEC_Z;
1412 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1413
1414 size_t bytecount = nbytes(bits);
1415 // Generate send structure for the data bits
1416 for (i = 0; i < bytecount; i++) {
1417 // Get the current byte to send
1418 b = cmd[i];
1419 size_t bitsleft = MIN((bits-(i*8)),8);
1420
1421 for (j = 0; j < bitsleft; j++) {
1422 if (b & 1) {
1423 // Sequence X
1424 ToSend[++ToSendMax] = SEC_X;
1425 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1426 last = 1;
1427 } else {
1428 if (last == 0) {
1429 // Sequence Z
1430 ToSend[++ToSendMax] = SEC_Z;
1431 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1432 } else {
1433 // Sequence Y
1434 ToSend[++ToSendMax] = SEC_Y;
1435 last = 0;
1436 }
1437 }
1438 b >>= 1;
1439 }
1440
1441 // Only transmit parity bit if we transmitted a complete byte
1442 if (j == 8 && parity != NULL) {
1443 // Get the parity bit
1444 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1445 // Sequence X
1446 ToSend[++ToSendMax] = SEC_X;
1447 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1448 last = 1;
1449 } else {
1450 if (last == 0) {
1451 // Sequence Z
1452 ToSend[++ToSendMax] = SEC_Z;
1453 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1454 } else {
1455 // Sequence Y
1456 ToSend[++ToSendMax] = SEC_Y;
1457 last = 0;
1458 }
1459 }
1460 }
1461 }
1462
1463 // End of Communication: Logic 0 followed by Sequence Y
1464 if (last == 0) {
1465 // Sequence Z
1466 ToSend[++ToSendMax] = SEC_Z;
1467 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1468 } else {
1469 // Sequence Y
1470 ToSend[++ToSendMax] = SEC_Y;
1471 last = 0;
1472 }
1473 ToSend[++ToSendMax] = SEC_Y;
1474
1475 // Convert to length of command:
1476 ++ToSendMax;
1477 }
1478
1479 //-----------------------------------------------------------------------------
1480 // Prepare reader command to send to FPGA
1481 //-----------------------------------------------------------------------------
1482 void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity) {
1483 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1484 }
1485
1486 //-----------------------------------------------------------------------------
1487 // Wait for commands from reader
1488 // Stop when button is pressed (return 1) or field was gone (return 2)
1489 // Or return 0 when command is captured
1490 //-----------------------------------------------------------------------------
1491 static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity) {
1492 *len = 0;
1493
1494 uint32_t timer = 0, vtime = 0;
1495 int analogCnt = 0;
1496 int analogAVG = 0;
1497
1498 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1499 // only, since we are receiving, not transmitting).
1500 // Signal field is off with the appropriate LED
1501 LED_D_OFF();
1502 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1503
1504 // Set ADC to read field strength
1505 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1506 AT91C_BASE_ADC->ADC_MR =
1507 ADC_MODE_PRESCALE(63) |
1508 ADC_MODE_STARTUP_TIME(1) |
1509 ADC_MODE_SAMPLE_HOLD_TIME(15);
1510 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1511 // start ADC
1512 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1513
1514 // Now run a 'software UART' on the stream of incoming samples.
1515 UartInit(received, parity);
1516
1517 // Clear RXRDY:
1518 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1519
1520 for(;;) {
1521 WDT_HIT();
1522
1523 if (BUTTON_PRESS()) return 1;
1524
1525 // test if the field exists
1526 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1527 analogCnt++;
1528 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1529 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1530 if (analogCnt >= 32) {
1531 if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1532 vtime = GetTickCount();
1533 if (!timer) timer = vtime;
1534 // 50ms no field --> card to idle state
1535 if (vtime - timer > 50) return 2;
1536 } else
1537 if (timer) timer = 0;
1538 analogCnt = 0;
1539 analogAVG = 0;
1540 }
1541 }
1542
1543 // receive and test the miller decoding
1544 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1545 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1546 if(MillerDecoding(b, 0)) {
1547 *len = Uart.len;
1548 return 0;
1549 }
1550 }
1551 }
1552 }
1553
1554 int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded) {
1555 uint8_t b;
1556 uint16_t i = 0;
1557 uint32_t ThisTransferTime;
1558
1559 // Modulate Manchester
1560 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1561
1562 // include correction bit if necessary
1563 if (Uart.parityBits & 0x01) {
1564 correctionNeeded = TRUE;
1565 }
1566 // 1236, so correction bit needed
1567 i = (correctionNeeded) ? 0 : 1;
1568
1569 // clear receiving shift register and holding register
1570 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1571 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1572 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1573 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1574
1575 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1576 for (uint8_t j = 0; j < 5; j++) { // allow timeout - better late than never
1577 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1578 if (AT91C_BASE_SSC->SSC_RHR) break;
1579 }
1580
1581 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1582
1583 // Clear TXRDY:
1584 AT91C_BASE_SSC->SSC_THR = SEC_F;
1585
1586 // send cycle
1587 for(; i < respLen; ) {
1588 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1589 AT91C_BASE_SSC->SSC_THR = resp[i++];
1590 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1591 }
1592
1593 if(BUTTON_PRESS()) break;
1594 }
1595
1596 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1597 uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; // twich /8 ?? >>3,
1598 for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
1599 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1600 AT91C_BASE_SSC->SSC_THR = SEC_F;
1601 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1602 i++;
1603 }
1604 }
1605 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1606 return 0;
1607 }
1608
1609 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1610 Code4bitAnswerAsTag(resp);
1611 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1612 // do the tracing for the previous reader request and this tag answer:
1613 uint8_t par[1] = {0x00};
1614 GetParity(&resp, 1, par);
1615 EmLogTrace(Uart.output,
1616 Uart.len,
1617 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1618 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1619 Uart.parity,
1620 &resp,
1621 1,
1622 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1623 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1624 par);
1625 return res;
1626 }
1627
1628 int EmSend4bit(uint8_t resp){
1629 return EmSend4bitEx(resp, false);
1630 }
1631
1632 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1633 CodeIso14443aAsTagPar(resp, respLen, par);
1634 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1635 // do the tracing for the previous reader request and this tag answer:
1636 EmLogTrace(Uart.output,
1637 Uart.len,
1638 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1639 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1640 Uart.parity,
1641 resp,
1642 respLen,
1643 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1644 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1645 par);
1646 return res;
1647 }
1648
1649 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1650 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1651 GetParity(resp, respLen, par);
1652 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1653 }
1654
1655 int EmSendCmd(uint8_t *resp, uint16_t respLen){
1656 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1657 GetParity(resp, respLen, par);
1658 return EmSendCmdExPar(resp, respLen, false, par);
1659 }
1660
1661 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1662 return EmSendCmdExPar(resp, respLen, false, par);
1663 }
1664
1665 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1666 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1667 {
1668 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1669 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1670 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1671 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1672 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1673 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1674 reader_EndTime = tag_StartTime - exact_fdt;
1675 reader_StartTime = reader_EndTime - reader_modlen;
1676
1677 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE))
1678 return FALSE;
1679 else
1680 return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1681
1682 }
1683
1684 //-----------------------------------------------------------------------------
1685 // Wait a certain time for tag response
1686 // If a response is captured return TRUE
1687 // If it takes too long return FALSE
1688 //-----------------------------------------------------------------------------
1689 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset) {
1690 uint32_t c = 0x00;
1691
1692 // Set FPGA mode to "reader listen mode", no modulation (listen
1693 // only, since we are receiving, not transmitting).
1694 // Signal field is on with the appropriate LED
1695 LED_D_ON();
1696 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1697
1698 // Now get the answer from the card
1699 DemodInit(receivedResponse, receivedResponsePar);
1700
1701 // clear RXRDY:
1702 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1703
1704 for(;;) {
1705 WDT_HIT();
1706
1707 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1708 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1709 if(ManchesterDecoding(b, offset, 0)) {
1710 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1711 return TRUE;
1712 } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) {
1713 return FALSE;
1714 }
1715 }
1716 }
1717 }
1718
1719 void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing) {
1720
1721 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1722 // Send command to tag
1723 TransmitFor14443a(ToSend, ToSendMax, timing);
1724 if(trigger) LED_A_ON();
1725
1726 LogTrace(frame, nbytes(bits), (LastTimeProxToAirStart<<4) + DELAY_ARM2AIR_AS_READER, ((LastTimeProxToAirStart + LastProxToAirDuration)<<4) + DELAY_ARM2AIR_AS_READER, par, TRUE);
1727 }
1728
1729 void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing) {
1730 ReaderTransmitBitsPar(frame, len*8, par, timing);
1731 }
1732
1733 void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing) {
1734 // Generate parity and redirect
1735 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1736 GetParity(frame, len/8, par);
1737 ReaderTransmitBitsPar(frame, len, par, timing);
1738 }
1739
1740 void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing) {
1741 // Generate parity and redirect
1742 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1743 GetParity(frame, len, par);
1744 ReaderTransmitBitsPar(frame, len*8, par, timing);
1745 }
1746
1747 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity) {
1748 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset))
1749 return FALSE;
1750 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1751 return Demod.len;
1752 }
1753
1754 int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity) {
1755 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0))
1756 return FALSE;
1757 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1758 return Demod.len;
1759 }
1760
1761 // performs iso14443a anticollision (optional) and card select procedure
1762 // fills the uid and cuid pointer unless NULL
1763 // fills the card info record unless NULL
1764 // if anticollision is false, then the UID must be provided in uid_ptr[]
1765 // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
1766 int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades) {
1767 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1768 uint8_t sel_all[] = { 0x93,0x20 };
1769 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1770 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1771 uint8_t resp[MAX_FRAME_SIZE] = {0}; // theoretically. A usual RATS will be much smaller
1772 uint8_t resp_par[MAX_PARITY_SIZE] = {0};
1773 byte_t uid_resp[4] = {0};
1774 size_t uid_resp_len = 0;
1775
1776 uint8_t sak = 0x04; // cascade uid
1777 int cascade_level = 0;
1778 int len;
1779
1780 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1781 ReaderTransmitBitsPar(wupa, 7, NULL, NULL);
1782
1783 // Receive the ATQA
1784 if(!ReaderReceive(resp, resp_par)) return 0;
1785
1786 if(p_hi14a_card) {
1787 memcpy(p_hi14a_card->atqa, resp, 2);
1788 p_hi14a_card->uidlen = 0;
1789 memset(p_hi14a_card->uid,0,10);
1790 }
1791
1792 if (anticollision) {
1793 // clear uid
1794 if (uid_ptr)
1795 memset(uid_ptr,0,10);
1796 }
1797
1798 // check for proprietary anticollision:
1799 if ((resp[0] & 0x1F) == 0) return 3;
1800
1801 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1802 // which case we need to make a cascade 2 request and select - this is a long UID
1803 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1804 for(; sak & 0x04; cascade_level++) {
1805 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1806 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1807
1808 if (anticollision) {
1809 // SELECT_ALL
1810 ReaderTransmit(sel_all, sizeof(sel_all), NULL);
1811 if (!ReaderReceive(resp, resp_par)) return 0;
1812
1813 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1814 memset(uid_resp, 0, 4);
1815 uint16_t uid_resp_bits = 0;
1816 uint16_t collision_answer_offset = 0;
1817 // anti-collision-loop:
1818 while (Demod.collisionPos) {
1819 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1820 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1821 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1822 uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8);
1823 }
1824 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1825 uid_resp_bits++;
1826 // construct anticollosion command:
1827 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1828 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1829 sel_uid[2+i] = uid_resp[i];
1830 }
1831 collision_answer_offset = uid_resp_bits%8;
1832 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1833 if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0;
1834 }
1835 // finally, add the last bits and BCC of the UID
1836 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1837 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1838 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1839 }
1840
1841 } else { // no collision, use the response to SELECT_ALL as current uid
1842 memcpy(uid_resp, resp, 4);
1843 }
1844
1845 } else {
1846 if (cascade_level < num_cascades - 1) {
1847 uid_resp[0] = 0x88;
1848 memcpy(uid_resp+1, uid_ptr+cascade_level*3, 3);
1849 } else {
1850 memcpy(uid_resp, uid_ptr+cascade_level*3, 4);
1851 }
1852 }
1853 uid_resp_len = 4;
1854
1855 // calculate crypto UID. Always use last 4 Bytes.
1856 if(cuid_ptr)
1857 *cuid_ptr = bytes_to_num(uid_resp, 4);
1858
1859 // Construct SELECT UID command
1860 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1861 memcpy(sel_uid+2, uid_resp, 4); // the UID received during anticollision, or the provided UID
1862 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1863 AppendCrc14443a(sel_uid, 7); // calculate and add CRC
1864 ReaderTransmit(sel_uid, sizeof(sel_uid), NULL);
1865
1866 // Receive the SAK
1867 if (!ReaderReceive(resp, resp_par)) return 0;
1868
1869 sak = resp[0];
1870
1871 // Test if more parts of the uid are coming
1872 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1873 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1874 // http://www.nxp.com/documents/application_note/AN10927.pdf
1875 uid_resp[0] = uid_resp[1];
1876 uid_resp[1] = uid_resp[2];
1877 uid_resp[2] = uid_resp[3];
1878 uid_resp_len = 3;
1879 }
1880
1881 if(uid_ptr && anticollision)
1882 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1883
1884 if(p_hi14a_card) {
1885 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1886 p_hi14a_card->uidlen += uid_resp_len;
1887 }
1888 }
1889
1890 if(p_hi14a_card) {
1891 p_hi14a_card->sak = sak;
1892 p_hi14a_card->ats_len = 0;
1893 }
1894
1895 // non iso14443a compliant tag
1896 if( (sak & 0x20) == 0) return 2;
1897
1898 // Request for answer to select
1899 AppendCrc14443a(rats, 2);
1900 ReaderTransmit(rats, sizeof(rats), NULL);
1901
1902 if (!(len = ReaderReceive(resp, resp_par))) return 0;
1903
1904 if(p_hi14a_card) {
1905 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1906 p_hi14a_card->ats_len = len;
1907 }
1908
1909 // reset the PCB block number
1910 iso14_pcb_blocknum = 0;
1911
1912 // set default timeout based on ATS
1913 iso14a_set_ATS_timeout(resp);
1914
1915 return 1;
1916 }
1917
1918 void iso14443a_setup(uint8_t fpga_minor_mode) {
1919 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1920 // Set up the synchronous serial port
1921 FpgaSetupSsc();
1922 // connect Demodulated Signal to ADC:
1923 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1924
1925 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
1926
1927 LED_D_OFF();
1928 // Signal field is on with the appropriate LED
1929 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD ||
1930 fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN)
1931 LED_D_ON();
1932
1933 // Prepare the demodulation functions
1934 DemodReset();
1935 UartReset();
1936
1937 iso14a_set_timeout(10*106); // 10ms default
1938
1939 //NextTransferTime = 2 * DELAY_ARM2AIR_AS_READER;
1940 NextTransferTime = DELAY_ARM2AIR_AS_READER << 1;
1941
1942 // Start the timer
1943 StartCountSspClk();
1944 }
1945
1946 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
1947 uint8_t parity[MAX_PARITY_SIZE] = {0x00};
1948 uint8_t real_cmd[cmd_len+4];
1949 real_cmd[0] = 0x0a; //I-Block
1950 // put block number into the PCB
1951 real_cmd[0] |= iso14_pcb_blocknum;
1952 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1953 memcpy(real_cmd+2, cmd, cmd_len);
1954 AppendCrc14443a(real_cmd,cmd_len+2);
1955
1956 ReaderTransmit(real_cmd, cmd_len+4, NULL);
1957 size_t len = ReaderReceive(data, parity);
1958 //DATA LINK ERROR
1959 if (!len) return 0;
1960
1961 uint8_t *data_bytes = (uint8_t *) data;
1962
1963 // if we received an I- or R(ACK)-Block with a block number equal to the
1964 // current block number, toggle the current block number
1965 if (len >= 4 // PCB+CID+CRC = 4 bytes
1966 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1967 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1968 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1969 {
1970 iso14_pcb_blocknum ^= 1;
1971 }
1972
1973 return len;
1974 }
1975
1976 //-----------------------------------------------------------------------------
1977 // Read an ISO 14443a tag. Send out commands and store answers.
1978 //
1979 //-----------------------------------------------------------------------------
1980 void ReaderIso14443a(UsbCommand *c) {
1981 iso14a_command_t param = c->arg[0];
1982 size_t len = c->arg[1] & 0xffff;
1983 size_t lenbits = c->arg[1] >> 16;
1984 uint32_t timeout = c->arg[2];
1985 uint8_t *cmd = c->d.asBytes;
1986 uint32_t arg0 = 0;
1987 byte_t buf[USB_CMD_DATA_SIZE] = {0x00};
1988 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1989
1990 if (param & ISO14A_CONNECT)
1991 clear_trace();
1992
1993 set_tracing(TRUE);
1994
1995 if (param & ISO14A_REQUEST_TRIGGER)
1996 iso14a_set_trigger(TRUE);
1997
1998 if (param & ISO14A_CONNECT) {
1999 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
2000 if(!(param & ISO14A_NO_SELECT)) {
2001 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
2002 arg0 = iso14443a_select_card(NULL,card,NULL, true, 0);
2003 cmd_send(CMD_ACK, arg0, card->uidlen, 0, buf, sizeof(iso14a_card_select_t));
2004 // if it fails, the cmdhf14a.c client quites.. however this one still executes.
2005 if ( arg0 == 0 ) return;
2006 }
2007 }
2008
2009 if (param & ISO14A_SET_TIMEOUT)
2010 iso14a_set_timeout(timeout);
2011
2012 if (param & ISO14A_APDU) {
2013 arg0 = iso14_apdu(cmd, len, buf);
2014 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2015 }
2016
2017 if (param & ISO14A_RAW) {
2018 if(param & ISO14A_APPEND_CRC) {
2019 if(param & ISO14A_TOPAZMODE) {
2020 AppendCrc14443b(cmd,len);
2021 } else {
2022 AppendCrc14443a(cmd,len);
2023 }
2024 len += 2;
2025 if (lenbits) lenbits += 16;
2026 }
2027 if(lenbits>0) { // want to send a specific number of bits (e.g. short commands)
2028 if(param & ISO14A_TOPAZMODE) {
2029 int bits_to_send = lenbits;
2030 uint16_t i = 0;
2031 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity
2032 bits_to_send -= 7;
2033 while (bits_to_send > 0) {
2034 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity
2035 bits_to_send -= 8;
2036 }
2037 } else {
2038 GetParity(cmd, lenbits/8, par);
2039 ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity
2040 }
2041 } else { // want to send complete bytes only
2042 if(param & ISO14A_TOPAZMODE) {
2043 uint16_t i = 0;
2044 ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy
2045 while (i < len) {
2046 ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy
2047 }
2048 } else {
2049 ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity
2050 }
2051 }
2052 arg0 = ReaderReceive(buf, par);
2053 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2054 }
2055
2056 if (param & ISO14A_REQUEST_TRIGGER)
2057 iso14a_set_trigger(FALSE);
2058
2059 if (param & ISO14A_NO_DISCONNECT)
2060 return;
2061
2062 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2063 set_tracing(FALSE);
2064 LEDsoff();
2065 }
2066
2067 // Determine the distance between two nonces.
2068 // Assume that the difference is small, but we don't know which is first.
2069 // Therefore try in alternating directions.
2070 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
2071
2072 if (nt1 == nt2) return 0;
2073
2074 uint16_t i;
2075 uint32_t nttmp1 = nt1;
2076 uint32_t nttmp2 = nt2;
2077
2078 for (i = 1; i < (32768/8); ++i) {
2079 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i;
2080 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -i;
2081
2082 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+1;
2083 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+1);
2084 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+2;
2085 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+2);
2086 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+3;
2087 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+3);
2088 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+4;
2089 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+4);
2090 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+5;
2091 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+5);
2092 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+6;
2093 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+6);
2094 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+7;
2095 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+7);
2096 }
2097 // either nt1 or nt2 are invalid nonces
2098 return(-99999);
2099 }
2100
2101 //-----------------------------------------------------------------------------
2102 // Recover several bits of the cypher stream. This implements (first stages of)
2103 // the algorithm described in "The Dark Side of Security by Obscurity and
2104 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2105 // (article by Nicolas T. Courtois, 2009)
2106 //-----------------------------------------------------------------------------
2107 void ReaderMifare(bool first_try, uint8_t block ) {
2108 uint8_t mf_auth[] = { MIFARE_AUTH_KEYA, block, 0x00, 0x00 };
2109 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2110 uint8_t uid[10] = {0,0,0,0,0,0,0,0,0,0};
2111 uint8_t par_list[8] = {0,0,0,0,0,0,0,0};
2112 uint8_t ks_list[8] = {0,0,0,0,0,0,0,0};
2113 uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE] = {0x00};
2114 uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE] = {0x00};
2115 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2116 byte_t nt_diff = 0;
2117 uint32_t nt = 0;
2118 uint32_t previous_nt = 0;
2119 uint32_t cuid = 0;
2120
2121 int32_t catch_up_cycles = 0;
2122 int32_t last_catch_up = 0;
2123 int32_t isOK = 0;
2124 int32_t nt_distance = 0;
2125
2126 uint16_t elapsed_prng_sequences = 1;
2127 uint16_t consecutive_resyncs = 0;
2128 uint16_t unexpected_random = 0;
2129 uint16_t sync_tries = 0;
2130
2131 // static variables here, is re-used in the next call
2132 static uint32_t nt_attacked = 0;
2133 static uint32_t sync_time = 0;
2134 static uint32_t sync_cycles = 0;
2135 static uint8_t par_low = 0;
2136 static uint8_t mf_nr_ar3 = 0;
2137
2138 #define PRNG_SEQUENCE_LENGTH (1 << 16)
2139 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2140 #define MAX_SYNC_TRIES 32
2141
2142 BigBuf_free(); BigBuf_Clear_ext(false);
2143 clear_trace();
2144 set_tracing(TRUE);
2145 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2146
2147 AppendCrc14443a(mf_auth, 2);
2148
2149 if (first_try) {
2150 sync_time = GetCountSspClk() & 0xfffffff8;
2151 sync_cycles = PRNG_SEQUENCE_LENGTH + 1130; //65536; //0x10000 // Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2152 mf_nr_ar3 = 0;
2153 nt_attacked = 0;
2154 par_low = 0;
2155 } else {
2156 // we were unsuccessful on a previous call.
2157 // Try another READER nonce (first 3 parity bits remain the same)
2158 ++mf_nr_ar3;
2159 mf_nr_ar[3] = mf_nr_ar3;
2160 par[0] = par_low;
2161 }
2162
2163 bool have_uid = FALSE;
2164 uint8_t cascade_levels = 0;
2165
2166 LED_C_ON();
2167 uint16_t i;
2168 for(i = 0; TRUE; ++i) {
2169
2170 WDT_HIT();
2171
2172 // Test if the action was cancelled
2173 if(BUTTON_PRESS()) {
2174 isOK = -1;
2175 break;
2176 }
2177
2178 // this part is from Piwi's faster nonce collecting part in Hardnested.
2179 if (!have_uid) { // need a full select cycle to get the uid first
2180 iso14a_card_select_t card_info;
2181 if(!iso14443a_select_card(uid, &card_info, &cuid, true, 0)) {
2182 if (MF_DBGLEVEL >= 4) Dbprintf("Mifare: Can't select card (ALL)");
2183 break;
2184 }
2185 switch (card_info.uidlen) {
2186 case 4 : cascade_levels = 1; break;
2187 case 7 : cascade_levels = 2; break;
2188 case 10: cascade_levels = 3; break;
2189 default: break;
2190 }
2191 have_uid = TRUE;
2192 } else { // no need for anticollision. We can directly select the card
2193 if(!iso14443a_select_card(uid, NULL, &cuid, false, cascade_levels)) {
2194 if (MF_DBGLEVEL >= 4) Dbprintf("Mifare: Can't select card (UID)");
2195 continue;
2196 }
2197 }
2198
2199 // Sending timeslot of ISO14443a frame
2200 sync_time = (sync_time & 0xfffffff8 ) + sync_cycles + catch_up_cycles;
2201 catch_up_cycles = 0;
2202
2203 // if we missed the sync time already, advance to the next nonce repeat
2204 while( GetCountSspClk() > sync_time) {
2205 ++elapsed_prng_sequences;
2206 sync_time = (sync_time & 0xfffffff8 ) + sync_cycles;
2207 }
2208
2209 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2210 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2211
2212 // Receive the (4 Byte) "random" nonce from TAG
2213 if (!ReaderReceive(receivedAnswer, receivedAnswerPar))
2214 continue;
2215
2216 previous_nt = nt;
2217 nt = bytes_to_num(receivedAnswer, 4);
2218
2219 // Transmit reader nonce with fake par
2220 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2221
2222 WDT_HIT();
2223 LED_B_ON();
2224 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2225
2226 nt_distance = dist_nt(previous_nt, nt);
2227
2228 // if no distance between, then we are in sync.
2229 if (nt_distance == 0) {
2230 nt_attacked = nt;
2231 } else {
2232 if (nt_distance == -99999) { // invalid nonce received
2233 ++unexpected_random;
2234 if (unexpected_random > MAX_UNEXPECTED_RANDOM) {
2235 isOK = -3; // Card has an unpredictable PRNG. Give up
2236 break;
2237 } else {
2238 if (sync_cycles <= 0) sync_cycles += PRNG_SEQUENCE_LENGTH;
2239 LED_B_OFF();
2240 continue; // continue trying...
2241 }
2242 }
2243
2244 if (++sync_tries > MAX_SYNC_TRIES) {
2245 isOK = -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2246 break;
2247 }
2248
2249 sync_cycles = (sync_cycles - nt_distance)/elapsed_prng_sequences;
2250
2251 if (sync_cycles <= 0)
2252 sync_cycles += PRNG_SEQUENCE_LENGTH;
2253
2254 if (MF_DBGLEVEL >= 4)
2255 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i, nt_distance, elapsed_prng_sequences, sync_cycles);
2256
2257 LED_B_OFF();
2258 continue;
2259 }
2260 }
2261 LED_B_OFF();
2262
2263 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2264
2265 catch_up_cycles = ABS(dist_nt(nt_attacked, nt));
2266 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2267 catch_up_cycles = 0;
2268 continue;
2269 }
2270 // average?
2271 catch_up_cycles /= elapsed_prng_sequences;
2272
2273 if (catch_up_cycles == last_catch_up) {
2274 ++consecutive_resyncs;
2275 } else {
2276 last_catch_up = catch_up_cycles;
2277 consecutive_resyncs = 0;
2278 }
2279
2280 if (consecutive_resyncs < 3) {
2281 if (MF_DBGLEVEL >= 4)
2282 Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, catch_up_cycles, consecutive_resyncs);
2283 } else {
2284 sync_cycles += catch_up_cycles;
2285
2286 if (MF_DBGLEVEL >= 4)
2287 Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, catch_up_cycles, sync_cycles);
2288
2289 last_catch_up = 0;
2290 catch_up_cycles = 0;
2291 consecutive_resyncs = 0;
2292 }
2293 continue;
2294 }
2295
2296 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2297 if (ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2298 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2299
2300 if (nt_diff == 0)
2301 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2302
2303 par_list[nt_diff] = SwapBits(par[0], 8);
2304 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05; // xor with NACK value to get keystream
2305
2306 // Test if the information is complete
2307 if (nt_diff == 0x07) {
2308 isOK = 1;
2309 break;
2310 }
2311
2312 nt_diff = (nt_diff + 1) & 0x07;
2313 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2314 par[0] = par_low;
2315
2316 } else {
2317 // No NACK.
2318 if (nt_diff == 0 && first_try) {
2319 par[0]++;
2320 if (par[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2321 isOK = -2;
2322 break;
2323 }
2324 } else {
2325 // Why this?
2326 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2327 }
2328 }
2329
2330 // reset the resyncs since we got a complete transaction on right time.
2331 consecutive_resyncs = 0;
2332 } // end for loop
2333
2334 mf_nr_ar[3] &= 0x1F;
2335
2336 if (MF_DBGLEVEL >= 4) Dbprintf("Number of sent auth requestes: %u", i);
2337
2338 uint8_t buf[28] = {0x00};
2339 memset(buf, 0x00, sizeof(buf));
2340 num_to_bytes(cuid, 4, buf);
2341 num_to_bytes(nt, 4, buf + 4);
2342 memcpy(buf + 8, par_list, 8);
2343 memcpy(buf + 16, ks_list, 8);
2344 memcpy(buf + 24, mf_nr_ar, 4);
2345
2346 cmd_send(CMD_ACK, isOK, 0, 0, buf, sizeof(buf) );
2347
2348 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2349 LEDsoff();
2350 set_tracing(FALSE);
2351 }
2352
2353 /**
2354 *MIFARE 1K simulate.
2355 *
2356 *@param flags :
2357 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2358 * FLAG_4B_UID_IN_DATA - use 4-byte UID in the data-section
2359 * FLAG_7B_UID_IN_DATA - use 7-byte UID in the data-section
2360 * FLAG_10B_UID_IN_DATA - use 10-byte UID in the data-section
2361 * FLAG_UID_IN_EMUL - use 4-byte UID from emulator memory
2362 * FLAG_NR_AR_ATTACK - collect NR_AR responses for bruteforcing later
2363 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2364 */
2365 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain) {
2366 int cardSTATE = MFEMUL_NOFIELD;
2367 int _UID_LEN = 0; // 4, 7, 10
2368 int vHf = 0; // in mV
2369 int res = 0;
2370 uint32_t selTimer = 0;
2371 uint32_t authTimer = 0;
2372 uint16_t len = 0;
2373 uint8_t cardWRBL = 0;
2374 uint8_t cardAUTHSC = 0;
2375 uint8_t cardAUTHKEY = 0xff; // no authentication
2376 uint32_t cuid = 0;
2377 uint32_t ans = 0;
2378 uint32_t cardINTREG = 0;
2379 uint8_t cardINTBLOCK = 0;
2380 struct Crypto1State mpcs = {0, 0};
2381 struct Crypto1State *pcs;
2382 pcs = &mpcs;
2383 uint32_t numReads = 0; //Counts numer of times reader read a block
2384 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00};
2385 uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE] = {0x00};
2386 uint8_t response[MAX_MIFARE_FRAME_SIZE] = {0x00};
2387 uint8_t response_par[MAX_MIFARE_PARITY_SIZE] = {0x00};
2388
2389 uint8_t atqa[] = {0x04, 0x00}; // Mifare classic 1k
2390 uint8_t sak_4[] = {0x0C, 0x00, 0x00}; // CL1 - 4b uid
2391 uint8_t sak_7[] = {0x0C, 0x00, 0x00}; // CL2 - 7b uid
2392 uint8_t sak_10[] = {0x0C, 0x00, 0x00}; // CL3 - 10b uid
2393 //uint8_t sak[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
2394
2395 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2396 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2397 uint8_t rUIDBCC3[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2398
2399 uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01}; // very random nonce
2400 //uint8_t rAUTH_NT[] = {0x55, 0x41, 0x49, 0x92};// nonce from nested? why this?
2401 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2402
2403 // Here, we collect CUID, NT, NR, AR, CUID2, NT2, NR2, AR2
2404 // This can be used in a reader-only attack.
2405 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0};
2406 uint8_t ar_nr_collected = 0;
2407
2408 // Authenticate response - nonce
2409 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2410 ar_nr_responses[1] = nonce;
2411
2412 //-- Determine the UID
2413 // Can be set from emulator memory or incoming data
2414 // Length: 4,7,or 10 bytes
2415 if ( (flags & FLAG_UID_IN_EMUL) == FLAG_UID_IN_EMUL)
2416 emlGetMemBt(datain, 0, 10); // load 10bytes from EMUL to the datain pointer. to be used below.
2417
2418 if ( (flags & FLAG_4B_UID_IN_DATA) == FLAG_4B_UID_IN_DATA) {
2419 memcpy(rUIDBCC1, datain, 4);
2420 _UID_LEN = 4;
2421 } else if ( (flags & FLAG_7B_UID_IN_DATA) == FLAG_7B_UID_IN_DATA) {
2422 memcpy(&rUIDBCC1[1], datain, 3);
2423 memcpy( rUIDBCC2, datain+3, 4);
2424 _UID_LEN = 7;
2425 } else if ( (flags & FLAG_10B_UID_IN_DATA) == FLAG_10B_UID_IN_DATA) {
2426 memcpy(&rUIDBCC1[1], datain, 3);
2427 memcpy(&rUIDBCC2[1], datain+3, 3);
2428 memcpy( rUIDBCC3, datain+6, 4);
2429 _UID_LEN = 10;
2430 }
2431
2432 switch (_UID_LEN) {
2433 case 4:
2434 sak_4[0] &= 0xFB;
2435 // save CUID
2436 ar_nr_responses[0] = cuid = bytes_to_num(rUIDBCC1, 4);
2437 // BCC
2438 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2439 if (MF_DBGLEVEL >= 2) {
2440 Dbprintf("4B UID: %02x%02x%02x%02x",
2441 rUIDBCC1[0],
2442 rUIDBCC1[1],
2443 rUIDBCC1[2],
2444 rUIDBCC1[3]
2445 );
2446 }
2447 break;
2448 case 7:
2449 atqa[0] |= 0x40;
2450 sak_7[0] &= 0xFB;
2451 // save CUID
2452 ar_nr_responses[0] = cuid = bytes_to_num(rUIDBCC2, 4);
2453 // CascadeTag, CT
2454 rUIDBCC1[0] = 0x88;
2455 // BCC
2456 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2457 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2458 if (MF_DBGLEVEL >= 2) {
2459 Dbprintf("7B UID: %02x %02x %02x %02x %02x %02x %02x",
2460 rUIDBCC1[1],
2461 rUIDBCC1[2],
2462 rUIDBCC1[3],
2463 rUIDBCC2[0],
2464 rUIDBCC2[1],
2465 rUIDBCC2[2],
2466 rUIDBCC2[3]
2467 );
2468 }
2469 break;
2470 case 10:
2471 atqa[0] |= 0x80;
2472 sak_10[0] &= 0xFB;
2473 // save CUID
2474 ar_nr_responses[0] = cuid = bytes_to_num(rUIDBCC3, 4);
2475 // CascadeTag, CT
2476 rUIDBCC1[0] = 0x88;
2477 rUIDBCC2[0] = 0x88;
2478 // BCC
2479 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2480 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2481 rUIDBCC3[4] = rUIDBCC3[0] ^ rUIDBCC3[1] ^ rUIDBCC3[2] ^ rUIDBCC3[3];
2482
2483 if (MF_DBGLEVEL >= 2) {
2484 Dbprintf("10B UID: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
2485 rUIDBCC1[1],
2486 rUIDBCC1[2],
2487 rUIDBCC1[3],
2488 rUIDBCC2[1],
2489 rUIDBCC2[2],
2490 rUIDBCC2[3],
2491 rUIDBCC3[0],
2492 rUIDBCC3[1],
2493 rUIDBCC3[2],
2494 rUIDBCC3[3]
2495 );
2496 }
2497 break;
2498 default:
2499 break;
2500 }
2501 // calc some crcs
2502 ComputeCrc14443(CRC_14443_A, sak_4, 1, &sak_4[1], &sak_4[2]);
2503 ComputeCrc14443(CRC_14443_A, sak_7, 1, &sak_7[1], &sak_7[2]);
2504 ComputeCrc14443(CRC_14443_A, sak_10, 1, &sak_10[1], &sak_10[2]);
2505
2506 // We need to listen to the high-frequency, peak-detected path.
2507 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2508
2509 // free eventually allocated BigBuf memory but keep Emulator Memory
2510 BigBuf_free_keep_EM();
2511 clear_trace();
2512 set_tracing(TRUE);
2513
2514 bool finished = FALSE;
2515 while (!BUTTON_PRESS() && !finished && !usb_poll_validate_length()) {
2516 WDT_HIT();
2517
2518 // find reader field
2519 if (cardSTATE == MFEMUL_NOFIELD) {
2520 vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
2521 if (vHf > MF_MINFIELDV) {
2522 cardSTATE_TO_IDLE();
2523 LED_A_ON();
2524 }
2525 }
2526 if (cardSTATE == MFEMUL_NOFIELD) continue;
2527
2528 //Now, get data
2529 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2530 if (res == 2) { //Field is off!
2531 cardSTATE = MFEMUL_NOFIELD;
2532 LEDsoff();
2533 continue;
2534 } else if (res == 1) {
2535 break; //return value 1 means button press
2536 }
2537
2538 // REQ or WUP request in ANY state and WUP in HALTED state
2539 // this if-statement doesn't match the specification above. (iceman)
2540 if (len == 1 && ((receivedCmd[0] == ISO14443A_CMD_REQA && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == ISO14443A_CMD_WUPA)) {
2541 selTimer = GetTickCount();
2542 EmSendCmdEx(atqa, sizeof(atqa), (receivedCmd[0] == ISO14443A_CMD_WUPA));
2543 cardSTATE = MFEMUL_SELECT1;
2544 crypto1_destroy(pcs);
2545 cardAUTHKEY = 0xff;
2546 LEDsoff();
2547 nonce++;
2548 continue;
2549 }
2550
2551 switch (cardSTATE) {
2552 case MFEMUL_NOFIELD:
2553 case MFEMUL_HALTED:
2554 case MFEMUL_IDLE:{
2555 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2556 break;
2557 }
2558 case MFEMUL_SELECT1:{
2559 if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT && receivedCmd[1] == 0x20)) {
2560 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2561 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2562 break;
2563 }
2564 // select card
2565 if (len == 9 &&
2566 ( receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT &&
2567 receivedCmd[1] == 0x70 &&
2568 memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2569
2570 // SAK 4b
2571 EmSendCmd(sak_4, sizeof(sak_4));
2572 switch(_UID_LEN){
2573 case 4:
2574 cardSTATE = MFEMUL_WORK;
2575 LED_B_ON();
2576 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2577 continue;
2578 case 7:
2579 case 10:
2580 cardSTATE = MFEMUL_SELECT2;
2581 continue;
2582 default:break;
2583 }
2584 } else {
2585 cardSTATE_TO_IDLE();
2586 }
2587 break;
2588 }
2589 case MFEMUL_SELECT2:{
2590 if (!len) {
2591 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2592 break;
2593 }
2594 if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2 && receivedCmd[1] == 0x20)) {
2595 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2596 break;
2597 }
2598 if (len == 9 &&
2599 (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2 &&
2600 receivedCmd[1] == 0x70 &&
2601 memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0) ) {
2602
2603 EmSendCmd(sak_7, sizeof(sak_7));
2604 switch(_UID_LEN){
2605 case 7:
2606 cardSTATE = MFEMUL_WORK;
2607 LED_B_ON();
2608 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2609 continue;
2610 case 10:
2611 cardSTATE = MFEMUL_SELECT3;
2612 continue;
2613 default:break;
2614 }
2615 }
2616 cardSTATE_TO_IDLE();
2617 break;
2618 }
2619 case MFEMUL_SELECT3:{
2620 if (!len) {
2621 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2622 break;
2623 }
2624 if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3 && receivedCmd[1] == 0x20)) {
2625 EmSendCmd(rUIDBCC3, sizeof(rUIDBCC3));
2626 break;
2627 }
2628 if (len == 9 &&
2629 (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3 &&
2630 receivedCmd[1] == 0x70 &&
2631 memcmp(&receivedCmd[2], rUIDBCC3, 4) == 0) ) {
2632
2633 EmSendCmd(sak_10, sizeof(sak_10));
2634 cardSTATE = MFEMUL_WORK;
2635 LED_B_ON();
2636 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol3 time: %d", GetTickCount() - selTimer);
2637 break;
2638 }
2639 cardSTATE_TO_IDLE();
2640 break;
2641 }
2642 case MFEMUL_AUTH1:{
2643 if( len != 8) {
2644 cardSTATE_TO_IDLE();
2645 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2646 break;
2647 }
2648
2649 uint32_t nr = bytes_to_num(receivedCmd, 4);
2650 uint32_t ar = bytes_to_num(&receivedCmd[4], 4);
2651
2652 //Collect AR/NR
2653 //if(ar_nr_collected < 2 && cardAUTHSC == 2){
2654 if(ar_nr_collected < 2) {
2655 //if(ar_nr_responses[2] != nr) {
2656 ar_nr_responses[ar_nr_collected*4] = cuid;
2657 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2658 ar_nr_responses[ar_nr_collected*4+2] = nr;
2659 ar_nr_responses[ar_nr_collected*4+3] = ar;
2660 ar_nr_collected++;
2661 //}
2662
2663 // Interactive mode flag, means we need to send ACK
2664 finished = ( ((flags & FLAG_INTERACTIVE) == FLAG_INTERACTIVE)&& ar_nr_collected == 2);
2665 }
2666 /*
2667 crypto1_word(pcs, ar , 1);
2668 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2669
2670 test if auth OK
2671 if (cardRr != prng_successor(nonce, 64)){
2672
2673 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2674 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2675 cardRr, prng_successor(nonce, 64));
2676 Shouldn't we respond anything here?
2677 Right now, we don't nack or anything, which causes the
2678 reader to do a WUPA after a while. /Martin
2679 -- which is the correct response. /piwi
2680 cardSTATE_TO_IDLE();
2681 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2682 break;
2683 }
2684 */
2685
2686 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2687 num_to_bytes(ans, 4, rAUTH_AT);
2688 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2689 LED_C_ON();
2690
2691 if (MF_DBGLEVEL >= 4) {
2692 Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2693 cardAUTHSC,
2694 cardAUTHKEY == 0 ? 'A' : 'B',
2695 GetTickCount() - authTimer
2696 );
2697 }
2698 cardSTATE = MFEMUL_WORK;
2699 break;
2700 }
2701 case MFEMUL_WORK:{
2702 if (len == 0) {
2703 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2704 break;
2705 }
2706 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2707
2708 if(encrypted_data)
2709 mf_crypto1_decrypt(pcs, receivedCmd, len);
2710
2711 if (len == 4 && (receivedCmd[0] == MIFARE_AUTH_KEYA ||
2712 receivedCmd[0] == MIFARE_AUTH_KEYB) ) {
2713
2714 authTimer = GetTickCount();
2715 cardAUTHSC = receivedCmd[1] / 4; // received block num
2716 cardAUTHKEY = receivedCmd[0] - 0x60; // & 1
2717 crypto1_destroy(pcs);
2718 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2719
2720 if (!encrypted_data) {
2721 // first authentication
2722 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2723 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2724
2725 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2726
2727 } else {
2728 // nested authentication
2729 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2730 num_to_bytes(ans, 4, rAUTH_AT);
2731
2732 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2733 }
2734
2735 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2736 cardSTATE = MFEMUL_AUTH1;
2737 break;
2738 }
2739
2740 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2741 // BUT... ACK --> NACK
2742 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2743 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2744 break;
2745 }
2746
2747 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2748 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2749 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2750 break;
2751 }
2752
2753 if(len != 4) {
2754 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2755 break;
2756 }
2757
2758 if ( receivedCmd[0] == ISO14443A_CMD_READBLOCK ||
2759 receivedCmd[0] == ISO14443A_CMD_WRITEBLOCK ||
2760 receivedCmd[0] == MIFARE_CMD_INC ||
2761 receivedCmd[0] == MIFARE_CMD_DEC ||
2762 receivedCmd[0] == MIFARE_CMD_RESTORE ||
2763 receivedCmd[0] == MIFARE_CMD_TRANSFER ) {
2764
2765 if (receivedCmd[1] >= 16 * 4) {
2766 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2767 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2768 break;
2769 }
2770
2771 if (receivedCmd[1] / 4 != cardAUTHSC) {
2772 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2773 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2774 break;
2775 }
2776 }
2777 // read block
2778 if (receivedCmd[0] == ISO14443A_CMD_READBLOCK) {
2779 if (MF_DBGLEVEL >= 4) Dbprintf("Reader reading block %d (0x%02x)", receivedCmd[1], receivedCmd[1]);
2780
2781 emlGetMem(response, receivedCmd[1], 1);
2782 AppendCrc14443a(response, 16);
2783 mf_crypto1_encrypt(pcs, response, 18, response_par);
2784 EmSendCmdPar(response, 18, response_par);
2785 numReads++;
2786 if(exitAfterNReads > 0 && numReads >= exitAfterNReads) {
2787 Dbprintf("%d reads done, exiting", numReads);
2788 finished = true;
2789 }
2790 break;
2791 }
2792 // write block
2793 if (receivedCmd[0] == ISO14443A_CMD_WRITEBLOCK) {
2794 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)", receivedCmd[1], receivedCmd[1]);
2795 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2796 cardSTATE = MFEMUL_WRITEBL2;
2797 cardWRBL = receivedCmd[1];
2798 break;
2799 }
2800 // increment, decrement, restore
2801 if ( receivedCmd[0] == MIFARE_CMD_INC ||
2802 receivedCmd[0] == MIFARE_CMD_DEC ||
2803 receivedCmd[0] == MIFARE_CMD_RESTORE) {
2804
2805 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0], receivedCmd[1], receivedCmd[1]);
2806
2807 if (emlCheckValBl(receivedCmd[1])) {
2808 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2809 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2810 break;
2811 }
2812 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2813 if (receivedCmd[0] == MIFARE_CMD_INC) cardSTATE = MFEMUL_INTREG_INC;
2814 if (receivedCmd[0] == MIFARE_CMD_DEC) cardSTATE = MFEMUL_INTREG_DEC;
2815 if (receivedCmd[0] == MIFARE_CMD_RESTORE) cardSTATE = MFEMUL_INTREG_REST;
2816 cardWRBL = receivedCmd[1];
2817 break;
2818 }
2819 // transfer
2820 if (receivedCmd[0] == MIFARE_CMD_TRANSFER) {
2821 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)", receivedCmd[0], receivedCmd[1], receivedCmd[1]);
2822 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2823 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2824 else
2825 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2826 break;
2827 }
2828 // halt
2829 if (receivedCmd[0] == ISO14443A_CMD_HALT && receivedCmd[1] == 0x00) {
2830 LED_B_OFF();
2831 LED_C_OFF();
2832 cardSTATE = MFEMUL_HALTED;
2833 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2834 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2835 break;
2836 }
2837 // RATS
2838 if (receivedCmd[0] == ISO14443A_CMD_RATS) {
2839 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2840 break;
2841 }
2842 // command not allowed
2843 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2844 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2845 break;
2846 }
2847 case MFEMUL_WRITEBL2:{
2848 if (len == 18) {
2849 mf_crypto1_decrypt(pcs, receivedCmd, len);
2850 emlSetMem(receivedCmd, cardWRBL, 1);
2851 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2852 cardSTATE = MFEMUL_WORK;
2853 } else {
2854 cardSTATE_TO_IDLE();
2855 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2856 }
2857 break;
2858 }
2859 case MFEMUL_INTREG_INC:{
2860 mf_crypto1_decrypt(pcs, receivedCmd, len);
2861 memcpy(&ans, receivedCmd, 4);
2862 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2863 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2864 cardSTATE_TO_IDLE();
2865 break;
2866 }
2867 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2868 cardINTREG = cardINTREG + ans;
2869 cardSTATE = MFEMUL_WORK;
2870 break;
2871 }
2872 case MFEMUL_INTREG_DEC:{
2873 mf_crypto1_decrypt(pcs, receivedCmd, len);
2874 memcpy(&ans, receivedCmd, 4);
2875 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2876 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2877 cardSTATE_TO_IDLE();
2878 break;
2879 }
2880 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2881 cardINTREG = cardINTREG - ans;
2882 cardSTATE = MFEMUL_WORK;
2883 break;
2884 }
2885 case MFEMUL_INTREG_REST:{
2886 mf_crypto1_decrypt(pcs, receivedCmd, len);
2887 memcpy(&ans, receivedCmd, 4);
2888 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2889 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2890 cardSTATE_TO_IDLE();
2891 break;
2892 }
2893 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2894 cardSTATE = MFEMUL_WORK;
2895 break;
2896 }
2897 }
2898 }
2899
2900 // Interactive mode flag, means we need to send ACK
2901 if((flags & FLAG_INTERACTIVE) == FLAG_INTERACTIVE) {
2902 //May just aswell send the collected ar_nr in the response aswell
2903 uint8_t len = ar_nr_collected * 4 * 4;
2904 cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len);
2905 }
2906
2907 if( ((flags & FLAG_NR_AR_ATTACK) == FLAG_NR_AR_ATTACK ) && MF_DBGLEVEL >= 1 ) {
2908 if(ar_nr_collected > 1 ) {
2909 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2910 Dbprintf("../tools/mfkey/mfkey32v2.exe %08x %08x %08x %08x %08x %08x %08x",
2911 ar_nr_responses[0], // CUID
2912 ar_nr_responses[1], // NT1
2913 ar_nr_responses[2], // NR1
2914 ar_nr_responses[3], // AR1
2915 //ar_nr_responses[4], // CUID2
2916 ar_nr_responses[5], // NT2
2917 ar_nr_responses[6], // NR2
2918 ar_nr_responses[7] // AR2
2919 );
2920 } else {
2921 Dbprintf("Failed to obtain two AR/NR pairs!");
2922 if(ar_nr_collected == 1 ) {
2923 Dbprintf("Only got these: UID=%08x, nonce=%08x, NR1=%08x, AR1=%08x",
2924 ar_nr_responses[0], // CUID
2925 ar_nr_responses[1], // NT
2926 ar_nr_responses[2], // NR1
2927 ar_nr_responses[3] // AR1
2928 );
2929 }
2930 }
2931 }
2932 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen());
2933
2934 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2935 LEDsoff();
2936 set_tracing(FALSE);
2937 }
2938
2939
2940 //-----------------------------------------------------------------------------
2941 // MIFARE sniffer.
2942 //
2943 // if no activity for 2sec, it sends the collected data to the client.
2944 //-----------------------------------------------------------------------------
2945 // "hf mf sniff"
2946 void RAMFUNC SniffMifare(uint8_t param) {
2947
2948 LEDsoff();
2949
2950 // free eventually allocated BigBuf memory
2951 BigBuf_free(); BigBuf_Clear_ext(false);
2952 clear_trace();
2953 set_tracing(TRUE);
2954
2955 // The command (reader -> tag) that we're receiving.
2956 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00};
2957 uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE] = {0x00};
2958
2959 // The response (tag -> reader) that we're receiving.
2960 uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE] = {0x00};
2961 uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE] = {0x00};
2962
2963 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
2964
2965 // allocate the DMA buffer, used to stream samples from the FPGA
2966 // [iceman] is this sniffed data unsigned?
2967 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
2968 uint8_t *data = dmaBuf;
2969 uint8_t previous_data = 0;
2970 int maxDataLen = 0;
2971 int dataLen = 0;
2972 bool ReaderIsActive = FALSE;
2973 bool TagIsActive = FALSE;
2974
2975 // Set up the demodulator for tag -> reader responses.
2976 DemodInit(receivedResponse, receivedResponsePar);
2977
2978 // Set up the demodulator for the reader -> tag commands
2979 UartInit(receivedCmd, receivedCmdPar);
2980
2981 // Setup and start DMA.
2982 // set transfer address and number of bytes. Start transfer.
2983 if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE) ){
2984 if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
2985 return;
2986 }
2987
2988 LED_D_OFF();
2989
2990 MfSniffInit();
2991
2992 // And now we loop, receiving samples.
2993 for(uint32_t sniffCounter = 0;; ) {
2994
2995 LED_A_ON();
2996 WDT_HIT();
2997
2998 if(BUTTON_PRESS()) {
2999 DbpString("cancelled by button");
3000 break;
3001 }
3002
3003 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
3004 // check if a transaction is completed (timeout after 2000ms).
3005 // if yes, stop the DMA transfer and send what we have so far to the client
3006 if (MfSniffSend(2000)) {
3007 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3008 sniffCounter = 0;
3009 data = dmaBuf;
3010 maxDataLen = 0;
3011 ReaderIsActive = FALSE;
3012 TagIsActive = FALSE;
3013 // Setup and start DMA. set transfer address and number of bytes. Start transfer.
3014 if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE) ){
3015 if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
3016 return;
3017 }
3018 }
3019 }
3020
3021 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
3022 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
3023
3024 if (readBufDataP <= dmaBufDataP) // we are processing the same block of data which is currently being transferred
3025 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
3026 else
3027 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
3028
3029 // test for length of buffer
3030 if(dataLen > maxDataLen) { // we are more behind than ever...
3031 maxDataLen = dataLen;
3032 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
3033 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
3034 break;
3035 }
3036 }
3037 if(dataLen < 1) continue;
3038
3039 // primary buffer was stopped ( <-- we lost data!
3040 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
3041 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
3042 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
3043 Dbprintf("RxEmpty ERROR, data length:%d", dataLen); // temporary
3044 }
3045 // secondary buffer sets as primary, secondary buffer was stopped
3046 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
3047 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
3048 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
3049 }
3050
3051 LED_A_OFF();
3052
3053 if (sniffCounter & 0x01) {
3054
3055 // no need to try decoding tag data if the reader is sending
3056 if(!TagIsActive) {
3057 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
3058 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
3059 LED_C_INV();
3060
3061 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
3062
3063 UartInit(receivedCmd, receivedCmdPar);
3064 DemodReset();
3065 }
3066 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
3067 }
3068
3069 // no need to try decoding tag data if the reader is sending
3070 if(!ReaderIsActive) {
3071 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
3072 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
3073 LED_C_INV();
3074
3075 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
3076
3077 DemodReset();
3078 UartInit(receivedCmd, receivedCmdPar);
3079 }
3080 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
3081 }
3082 }
3083
3084 previous_data = *data;
3085 sniffCounter++;
3086 data++;
3087
3088 if(data == dmaBuf + DMA_BUFFER_SIZE)
3089 data = dmaBuf;
3090
3091 } // main cycle
3092
3093 if (MF_DBGLEVEL >= 1) Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
3094
3095 FpgaDisableSscDma();
3096 MfSniffEnd();
3097 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
3098 LEDsoff();
3099 set_tracing(FALSE);
3100 }
Impressum, Datenschutz