1 //-----------------------------------------------------------------------------
2 // The main application code. This is the first thing called after start.c
4 // Jonathan Westhues, Mar 2006
5 // Edits by Gerhard de Koning Gans, Sep 2007 (##)
6 //-----------------------------------------------------------------------------
17 // The large multi-purpose buffer, typically used to hold A/D samples,
18 // maybe pre-processed in some way.
22 //=============================================================================
23 // A buffer where we can queue things up to be sent through the FPGA, for
24 // any purpose (fake tag, as reader, whatever). We go MSB first, since that
25 // is the order in which they go out on the wire.
26 //=============================================================================
33 void BufferClear(void)
35 memset(BigBuf
,0,sizeof(BigBuf
));
36 DbpString("Buffer cleared");
39 void ToSendReset(void)
45 void ToSendStuffBit(int b
)
49 ToSend
[ToSendMax
] = 0;
54 ToSend
[ToSendMax
] |= (1 << (7 - ToSendBit
));
59 if(ToSendBit
>= sizeof(ToSend
)) {
61 DbpString("ToSendStuffBit overflowed!");
65 //=============================================================================
66 // Debug print functions, to go out over USB, to the usual PC-side client.
67 //=============================================================================
69 void DbpString(char *str
)
71 /* this holds up stuff unless we're connected to usb */
76 c
.cmd
= CMD_DEBUG_PRINT_STRING
;
78 memcpy(c
.d
.asBytes
, str
, c
.ext1
);
80 UsbSendPacket((BYTE
*)&c
, sizeof(c
));
81 // TODO fix USB so stupid things like this aren't req'd
85 void DbpIntegers(int x1
, int x2
, int x3
)
87 /* this holds up stuff unless we're connected to usb */
92 c
.cmd
= CMD_DEBUG_PRINT_INTEGERS
;
97 UsbSendPacket((BYTE
*)&c
, sizeof(c
));
102 void AcquireRawAdcSamples125k(BOOL at134khz
)
105 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 88); //134.8Khz
106 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
| FPGA_LF_READER_USE_134_KHZ
);
108 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
109 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
| FPGA_LF_READER_USE_125_KHZ
);
112 // Connect the A/D to the peak-detected low-frequency path.
113 SetAdcMuxFor(GPIO_MUXSEL_LOPKD
);
115 // Give it a bit of time for the resonant antenna to settle.
118 // Now set up the SSC to get the ADC samples that are now streaming at us.
121 // Now call the acquisition routine
122 DoAcquisition125k(at134khz
);
125 // split into two routines so we can avoid timing issues after sending commands //
126 void DoAcquisition125k(BOOL at134khz
)
128 BYTE
*dest
= (BYTE
*)BigBuf
;
129 int n
= sizeof(BigBuf
);
135 if(SSC_STATUS
& (SSC_STATUS_TX_READY
)) {
136 SSC_TRANSMIT_HOLDING
= 0x43;
139 if(SSC_STATUS
& (SSC_STATUS_RX_READY
)) {
140 dest
[i
] = (BYTE
)SSC_RECEIVE_HOLDING
;
148 DbpIntegers(dest
[0], dest
[1], at134khz
);
151 void ModThenAcquireRawAdcSamples125k(int delay_off
,int period_0
,int period_1
,BYTE
*command
)
155 // see if 'h' was specified
156 if(command
[strlen((char *) command
) - 1] == 'h')
162 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 88); //134.8Khz
163 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
| FPGA_LF_READER_USE_134_KHZ
);
165 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
166 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
| FPGA_LF_READER_USE_125_KHZ
);
169 // Give it a bit of time for the resonant antenna to settle.
172 // Now set up the SSC to get the ADC samples that are now streaming at us.
175 // now modulate the reader field
176 while(*command
!= '\0' && *command
!= ' ')
178 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
180 SpinDelayUs(delay_off
);
182 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 88); //134.8Khz
183 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
| FPGA_LF_READER_USE_134_KHZ
);
185 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
186 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
| FPGA_LF_READER_USE_125_KHZ
);
189 if(*(command
++) == '0')
190 SpinDelayUs(period_0
);
192 SpinDelayUs(period_1
);
194 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
196 SpinDelayUs(delay_off
);
198 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 88); //134.8Khz
199 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
| FPGA_LF_READER_USE_134_KHZ
);
201 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
202 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
| FPGA_LF_READER_USE_125_KHZ
);
206 DoAcquisition125k(at134khz
);
209 //-----------------------------------------------------------------------------
210 // Read an ADC channel and block till it completes, then return the result
211 // in ADC units (0 to 1023). Also a routine to average 32 samples and
213 //-----------------------------------------------------------------------------
214 static int ReadAdc(int ch
)
218 ADC_CONTROL
= ADC_CONTROL_RESET
;
219 ADC_MODE
= ADC_MODE_PRESCALE(32) | ADC_MODE_STARTUP_TIME(16) |
220 ADC_MODE_SAMPLE_HOLD_TIME(8);
221 ADC_CHANNEL_ENABLE
= ADC_CHANNEL(ch
);
223 ADC_CONTROL
= ADC_CONTROL_START
;
224 while(!(ADC_STATUS
& ADC_END_OF_CONVERSION(ch
)))
226 d
= ADC_CHANNEL_DATA(ch
);
231 static int AvgAdc(int ch
)
236 for(i
= 0; i
< 32; i
++) {
240 return (a
+ 15) >> 5;
243 void MeasureAntennaTuning(void)
245 BYTE
*dest
= (BYTE
*)BigBuf
;
246 int i
, ptr
= 0, adcval
= 0, peak
= 0, peakv
= 0, peakf
= 0;;
247 int vLf125
= 0, vLf134
= 0, vHf
= 0; // in mV
251 DbpString("Measuring antenna characteristics, please wait.");
252 memset(BigBuf
,0,sizeof(BigBuf
));
255 * Sweeps the useful LF range of the proxmark from
256 * 46.8kHz (divisor=255) to 600kHz (divisor=19) and
257 * read the voltage in the antenna, the result left
258 * in the buffer is a graph which should clearly show
259 * the resonating frequency of your LF antenna
260 * ( hopefully around 95 if it is tuned to 125kHz!)
262 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
263 for (i
=255; i
>19; i
--) {
264 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, i
);
266 // Vref = 3.3V, and a 10000:240 voltage divider on the input
267 // can measure voltages up to 137500 mV
268 adcval
= ((137500 * AvgAdc(ADC_CHAN_LF
)) >> 10);
269 if (i
==95) vLf125
= adcval
; // voltage at 125Khz
270 if (i
==89) vLf134
= adcval
; // voltage at 134Khz
272 dest
[i
] = adcval
>>8; // scale int to fit in byte for graphing purposes
281 // Let the FPGA drive the high-frequency antenna around 13.56 MHz.
282 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
);
284 // Vref = 3300mV, and an 10:1 voltage divider on the input
285 // can measure voltages up to 33000 mV
286 vHf
= (33000 * AvgAdc(ADC_CHAN_HF
)) >> 10;
288 c
.cmd
= CMD_MEASURED_ANTENNA_TUNING
;
289 c
.ext1
= (vLf125
<< 0) | (vLf134
<< 16);
291 c
.ext3
= peakf
| (peakv
<< 16);
292 UsbSendPacket((BYTE
*)&c
, sizeof(c
));
295 void SimulateTagLowFrequency(int period
, int ledcontrol
)
298 BYTE
*tab
= (BYTE
*)BigBuf
;
300 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_SIMULATOR
);
302 PIO_ENABLE
= (1 << GPIO_SSC_DOUT
) | (1 << GPIO_SSC_CLK
);
304 PIO_OUTPUT_ENABLE
= (1 << GPIO_SSC_DOUT
);
305 PIO_OUTPUT_DISABLE
= (1 << GPIO_SSC_CLK
);
307 #define SHORT_COIL() LOW(GPIO_SSC_DOUT)
308 #define OPEN_COIL() HIGH(GPIO_SSC_DOUT)
312 while(!(PIO_PIN_DATA_STATUS
& (1<<GPIO_SSC_CLK
))) {
314 DbpString("Stopped");
331 while(PIO_PIN_DATA_STATUS
& (1<<GPIO_SSC_CLK
)) {
333 DbpString("Stopped");
340 if(i
== period
) i
= 0;
344 // compose fc/8 fc/10 waveform
345 static void fc(int c
, int *n
) {
346 BYTE
*dest
= (BYTE
*)BigBuf
;
349 // for when we want an fc8 pattern every 4 logical bits
360 // an fc/8 encoded bit is a bit pattern of 11000000 x6 = 48 samples
362 for (idx
=0; idx
<6; idx
++) {
374 // an fc/10 encoded bit is a bit pattern of 1110000000 x5 = 50 samples
376 for (idx
=0; idx
<5; idx
++) {
391 // prepare a waveform pattern in the buffer based on the ID given then
392 // simulate a HID tag until the button is pressed
393 static void CmdHIDsimTAG(int hi
, int lo
, int ledcontrol
)
397 HID tag bitstream format
398 The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits
399 A 1 bit is represented as 6 fc8 and 5 fc10 patterns
400 A 0 bit is represented as 5 fc10 and 6 fc8 patterns
401 A fc8 is inserted before every 4 bits
402 A special start of frame pattern is used consisting a0b0 where a and b are neither 0
403 nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10)
407 DbpString("Tags can only have 44 bits.");
411 // special start of frame marker containing invalid bit sequences
412 fc(8, &n
); fc(8, &n
); // invalid
413 fc(8, &n
); fc(10, &n
); // logical 0
414 fc(10, &n
); fc(10, &n
); // invalid
415 fc(8, &n
); fc(10, &n
); // logical 0
418 // manchester encode bits 43 to 32
419 for (i
=11; i
>=0; i
--) {
420 if ((i
%4)==3) fc(0,&n
);
422 fc(10, &n
); fc(8, &n
); // low-high transition
424 fc(8, &n
); fc(10, &n
); // high-low transition
429 // manchester encode bits 31 to 0
430 for (i
=31; i
>=0; i
--) {
431 if ((i
%4)==3) fc(0,&n
);
433 fc(10, &n
); fc(8, &n
); // low-high transition
435 fc(8, &n
); fc(10, &n
); // high-low transition
441 SimulateTagLowFrequency(n
, ledcontrol
);
447 // loop to capture raw HID waveform then FSK demodulate the TAG ID from it
448 static void CmdHIDdemodFSK(int findone
, int *high
, int *low
, int ledcontrol
)
450 BYTE
*dest
= (BYTE
*)BigBuf
;
451 int m
=0, n
=0, i
=0, idx
=0, found
=0, lastval
=0;
454 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
455 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
| FPGA_LF_READER_USE_125_KHZ
);
457 // Connect the A/D to the peak-detected low-frequency path.
458 SetAdcMuxFor(GPIO_MUXSEL_LOPKD
);
460 // Give it a bit of time for the resonant antenna to settle.
463 // Now set up the SSC to get the ADC samples that are now streaming at us.
471 DbpString("Stopped");
481 if(SSC_STATUS
& (SSC_STATUS_TX_READY
)) {
482 SSC_TRANSMIT_HOLDING
= 0x43;
486 if(SSC_STATUS
& (SSC_STATUS_RX_READY
)) {
487 dest
[i
] = (BYTE
)SSC_RECEIVE_HOLDING
;
488 // we don't care about actual value, only if it's more or less than a
489 // threshold essentially we capture zero crossings for later analysis
490 if(dest
[i
] < 127) dest
[i
] = 0; else dest
[i
] = 1;
502 // sync to first lo-hi transition
503 for( idx
=1; idx
<m
; idx
++) {
504 if (dest
[idx
-1]<dest
[idx
])
510 // count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)
511 // or 10 (fc/10) cycles but in practice due to noise etc we may end up with with anywhere
512 // between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10
513 for( i
=0; idx
<m
; idx
++) {
514 if (dest
[idx
-1]<dest
[idx
]) {
529 // we now have a set of cycle counts, loop over previous results and aggregate data into bit patterns
534 for( idx
=0; idx
<m
; idx
++) {
535 if (dest
[idx
]==lastval
) {
538 // a bit time is five fc/10 or six fc/8 cycles so figure out how many bits a pattern width represents,
539 // an extra fc/8 pattern preceeds every 4 bits (about 200 cycles) just to complicate things but it gets
540 // swallowed up by rounding
541 // expected results are 1 or 2 bits, any more and it's an invalid manchester encoding
542 // special start of frame markers use invalid manchester states (no transitions) by using sequences
545 n
=(n
+1)/6; // fc/8 in sets of 6
547 n
=(n
+1)/5; // fc/10 in sets of 5
549 switch (n
) { // stuff appropriate bits in buffer
552 dest
[i
++]=dest
[idx
-1];
555 dest
[i
++]=dest
[idx
-1];
556 dest
[i
++]=dest
[idx
-1];
558 case 3: // 3 bit start of frame markers
559 dest
[i
++]=dest
[idx
-1];
560 dest
[i
++]=dest
[idx
-1];
561 dest
[i
++]=dest
[idx
-1];
563 // When a logic 0 is immediately followed by the start of the next transmisson
564 // (special pattern) a pattern of 4 bit duration lengths is created.
566 dest
[i
++]=dest
[idx
-1];
567 dest
[i
++]=dest
[idx
-1];
568 dest
[i
++]=dest
[idx
-1];
569 dest
[i
++]=dest
[idx
-1];
571 default: // this shouldn't happen, don't stuff any bits
581 // final loop, go over previously decoded manchester data and decode into usable tag ID
582 // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
583 for( idx
=0; idx
<m
-6; idx
++) {
584 // search for a start of frame marker
585 if ( dest
[idx
] && dest
[idx
+1] && dest
[idx
+2] && (!dest
[idx
+3]) && (!dest
[idx
+4]) && (!dest
[idx
+5]) )
589 if (found
&& (hi
|lo
)) {
591 DbpIntegers(hi
, lo
, (lo
>>1)&0xffff);
592 /* if we're only looking for one tag */
605 if (dest
[idx
] && (!dest
[idx
+1]) ) {
608 } else if ( (!dest
[idx
]) && dest
[idx
+1]) {
618 if ( dest
[idx
] && dest
[idx
+1] && dest
[idx
+2] && (!dest
[idx
+3]) && (!dest
[idx
+4]) && (!dest
[idx
+5]) )
622 if (found
&& (hi
|lo
)) {
624 DbpIntegers(hi
, lo
, (lo
>>1)&0xffff);
625 /* if we're only looking for one tag */
642 void SimulateTagHfListen(void)
644 BYTE
*dest
= (BYTE
*)BigBuf
;
645 int n
= sizeof(BigBuf
);
650 // We're using this mode just so that I can test it out; the simulated
651 // tag mode would work just as well and be simpler.
652 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
| FPGA_HF_READER_RX_XCORR_SNOOP
);
654 // We need to listen to the high-frequency, peak-detected path.
655 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
661 if(SSC_STATUS
& (SSC_STATUS_TX_READY
)) {
662 SSC_TRANSMIT_HOLDING
= 0xff;
664 if(SSC_STATUS
& (SSC_STATUS_RX_READY
)) {
665 BYTE r
= (BYTE
)SSC_RECEIVE_HOLDING
;
685 DbpString("simulate tag (now type bitsamples)");
688 void UsbPacketReceived(BYTE
*packet
, int len
)
690 UsbCommand
*c
= (UsbCommand
*)packet
;
693 case CMD_ACQUIRE_RAW_ADC_SAMPLES_125K
:
694 AcquireRawAdcSamples125k(c
->ext1
);
697 case CMD_MOD_THEN_ACQUIRE_RAW_ADC_SAMPLES_125K
:
698 ModThenAcquireRawAdcSamples125k(c
->ext1
,c
->ext2
,c
->ext3
,c
->d
.asBytes
);
701 case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_15693
:
702 AcquireRawAdcSamplesIso15693();
709 case CMD_READER_ISO_15693
:
710 ReaderIso15693(c
->ext1
);
713 case CMD_SIMTAG_ISO_15693
:
714 SimTagIso15693(c
->ext1
);
717 case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_14443
:
718 AcquireRawAdcSamplesIso14443(c
->ext1
);
721 case CMD_READ_SRI512_TAG
:
722 ReadSRI512Iso14443(c
->ext1
);
725 case CMD_READER_ISO_14443a
:
726 ReaderIso14443a(c
->ext1
);
729 case CMD_SNOOP_ISO_14443
:
733 case CMD_SNOOP_ISO_14443a
:
737 case CMD_SIMULATE_TAG_HF_LISTEN
:
738 SimulateTagHfListen();
741 case CMD_SIMULATE_TAG_ISO_14443
:
742 SimulateIso14443Tag();
745 case CMD_SIMULATE_TAG_ISO_14443a
:
746 SimulateIso14443aTag(c
->ext1
, c
->ext2
); // ## Simulate iso14443a tag - pass tag type & UID
749 case CMD_MEASURE_ANTENNA_TUNING
:
750 MeasureAntennaTuning();
753 case CMD_LISTEN_READER_FIELD
:
754 ListenReaderField(c
->ext1
);
757 case CMD_HID_DEMOD_FSK
:
758 CmdHIDdemodFSK(0, 0, 0, 1); // Demodulate HID tag
761 case CMD_HID_SIM_TAG
:
762 CmdHIDsimTAG(c
->ext1
, c
->ext2
, 1); // Simulate HID tag by ID
765 case CMD_FPGA_MAJOR_MODE_OFF
: // ## FPGA Control
766 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
768 LED_D_OFF(); // LED D indicates field ON or OFF
771 case CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K
:
772 case CMD_DOWNLOAD_RAW_BITS_TI_TYPE
: {
774 if(c
->cmd
== CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K
) {
775 n
.cmd
= CMD_DOWNLOADED_RAW_ADC_SAMPLES_125K
;
777 n
.cmd
= CMD_DOWNLOADED_RAW_BITS_TI_TYPE
;
780 memcpy(n
.d
.asDwords
, BigBuf
+c
->ext1
, 12*sizeof(DWORD
));
781 UsbSendPacket((BYTE
*)&n
, sizeof(n
));
784 case CMD_DOWNLOADED_SIM_SAMPLES_125K
: {
785 BYTE
*b
= (BYTE
*)BigBuf
;
786 memcpy(b
+c
->ext1
, c
->d
.asBytes
, 48);
789 case CMD_SIMULATE_TAG_125K
:
791 SimulateTagLowFrequency(c
->ext1
, 1);
802 case CMD_SET_LF_DIVISOR
:
803 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, c
->ext1
);
810 case CMD_SETUP_WRITE
:
811 case CMD_FINISH_WRITE
:
812 case CMD_HARDWARE_RESET
:
813 USB_D_PLUS_PULLUP_OFF();
816 RSTC_CONTROL
= RST_CONTROL_KEY
| RST_CONTROL_PROCESSOR_RESET
;
818 // We're going to reset, and the bootrom will take control.
824 DbpString("unknown command");
829 void ReadMem(int addr
)
831 const DWORD
*data
= ((DWORD
*)addr
);
834 DbpString("Reading memory at address");
835 DbpIntegers(0, 0, addr
);
836 for (i
= 0; i
< 8; i
+= 2)
837 DbpIntegers(0, data
[i
], data
[i
+1]);
842 memset(BigBuf
,0,sizeof(BigBuf
));
852 // The FPGA gets its clock from us from PCK0 output, so set that up.
853 PIO_PERIPHERAL_B_SEL
= (1 << GPIO_PCK0
);
854 PIO_DISABLE
= (1 << GPIO_PCK0
);
855 PMC_SYS_CLK_ENABLE
= PMC_SYS_CLK_PROGRAMMABLE_CLK_0
;
856 // PCK0 is PLL clock / 4 = 96Mhz / 4 = 24Mhz
857 PMC_PROGRAMMABLE_CLK_0
= PMC_CLK_SELECTION_PLL_CLOCK
|
858 PMC_CLK_PRESCALE_DIV_4
;
859 PIO_OUTPUT_ENABLE
= (1 << GPIO_PCK0
);
862 SPI_CONTROL
= SPI_CONTROL_RESET
;
864 SSC_CONTROL
= SSC_CONTROL_RESET
;
866 // Load the FPGA image, which we have stored in our flash.
873 // test text on different colored backgrounds
874 LCDString(" The quick brown fox ", &FONT6x8
,1,1+8*0,WHITE
,BLACK
);
875 LCDString(" jumped over the ", &FONT6x8
,1,1+8*1,BLACK
,WHITE
);
876 LCDString(" lazy dog. ", &FONT6x8
,1,1+8*2,YELLOW
,RED
);
877 LCDString(" AaBbCcDdEeFfGgHhIiJj ", &FONT6x8
,1,1+8*3,RED
,GREEN
);
878 LCDString(" KkLlMmNnOoPpQqRrSsTt ", &FONT6x8
,1,1+8*4,MAGENTA
,BLUE
);
879 LCDString("UuVvWwXxYyZz0123456789", &FONT6x8
,1,1+8*5,BLUE
,YELLOW
);
880 LCDString("`-=[]_;',./~!@#$%^&*()", &FONT6x8
,1,1+8*6,BLACK
,CYAN
);
881 LCDString(" _+{}|:\\\"<>? ",&FONT6x8
,1,1+8*7,BLUE
,MAGENTA
);
884 LCDFill(0, 1+8* 8, 132, 8, BLACK
);
885 LCDFill(0, 1+8* 9, 132, 8, WHITE
);
886 LCDFill(0, 1+8*10, 132, 8, RED
);
887 LCDFill(0, 1+8*11, 132, 8, GREEN
);
888 LCDFill(0, 1+8*12, 132, 8, BLUE
);
889 LCDFill(0, 1+8*13, 132, 8, YELLOW
);
890 LCDFill(0, 1+8*14, 132, 8, CYAN
);
891 LCDFill(0, 1+8*15, 132, 8, MAGENTA
);
896 usbattached
= UsbPoll(FALSE
);
899 if (BUTTON_HELD(1000) > 0)
905 // samy's sniff and repeat routine
908 DbpString("Stand-alone mode! No PC necessary.");
910 // 3 possible options? no just 2 for now
913 int high
[OPTS
], low
[OPTS
];
915 // Oooh pretty -- notify user we're in elite samy mode now
917 LED(LED_ORANGE
, 200);
919 LED(LED_ORANGE
, 200);
921 LED(LED_ORANGE
, 200);
923 LED(LED_ORANGE
, 200);
929 // Turn on selected LED
930 LED(selected
+ 1, 0);
934 usbattached
= UsbPoll(FALSE
);
937 // Was our button held down or pressed?
938 int button_pressed
= BUTTON_HELD(1000);
941 // Button was held for a second, begin recording
942 if (button_pressed
> 0)
945 LED(selected
+ 1, 0);
949 DbpString("Starting recording");
951 // wait for button to be released
952 while(BUTTON_PRESS())
955 /* need this delay to prevent catching some weird data */
958 CmdHIDdemodFSK(1, &high
[selected
], &low
[selected
], 0);
959 DbpString("Recorded");
960 DbpIntegers(selected
, high
[selected
], low
[selected
]);
963 LED(selected
+ 1, 0);
964 // Finished recording
966 // If we were previously playing, set playing off
967 // so next button push begins playing what we recorded
971 // Change where to record (or begin playing)
972 else if (button_pressed
)
974 // Next option if we were previously playing
976 selected
= (selected
+ 1) % OPTS
;
980 LED(selected
+ 1, 0);
982 // Begin transmitting
986 DbpString("Playing");
987 // wait for button to be released
988 while(BUTTON_PRESS())
990 DbpIntegers(selected
, high
[selected
], low
[selected
]);
991 CmdHIDsimTAG(high
[selected
], low
[selected
], 0);
992 DbpString("Done playing");
993 if (BUTTON_HELD(1000) > 0)
995 DbpString("Exiting");
1000 /* We pressed a button so ignore it here with a delay */
1003 // when done, we're done playing, move to next option
1004 selected
= (selected
+ 1) % OPTS
;
1007 LED(selected
+ 1, 0);
1010 while(BUTTON_PRESS())
1017 // listen for external reader
1018 void ListenReaderField(int limit
)
1020 int lf_av
, lf_av_new
, lf_baseline
= 0, lf_count
= 0;
1021 int hf_av
, hf_av_new
, hf_baseline
= 0, hf_count
= 0;
1031 lf_av
= ReadAdc(ADC_CHAN_LF
);
1033 if(limit
!= HF_ONLY
)
1035 DbpString("LF 125/134 Baseline:");
1036 DbpIntegers(lf_av
,0,0);
1040 hf_av
= ReadAdc(ADC_CHAN_HF
);
1043 if (limit
!= LF_ONLY
)
1045 DbpString("HF 13.56 Baseline:");
1046 DbpIntegers(hf_av
,0,0);
1054 DbpString("Stopped");
1062 if (limit
!= HF_ONLY
)
1064 if (abs(lf_av
- lf_baseline
) > 10)
1069 lf_av_new
= ReadAdc(ADC_CHAN_LF
);
1070 // see if there's a significant change
1071 if(abs(lf_av
- lf_av_new
) > 10)
1073 DbpString("LF 125/134 Field Change:");
1074 DbpIntegers(lf_av
,lf_av_new
,lf_count
);
1080 if (limit
!= LF_ONLY
)
1082 if (abs(hf_av
- hf_baseline
) > 10)
1087 hf_av_new
= ReadAdc(ADC_CHAN_HF
);
1088 // see if there's a significant change
1089 if(abs(hf_av
- hf_av_new
) > 10)
1091 DbpString("HF 13.56 Field Change:");
1092 DbpIntegers(hf_av
,hf_av_new
,hf_count
);