1 //-----------------------------------------------------------------------------
2 // Gerhard de Koning Gans - May 2008
3 // Hagen Fritsch - June 2010
4 // Gerhard de Koning Gans - May 2011
5 // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
10 //-----------------------------------------------------------------------------
11 // Routines to support iClass.
12 //-----------------------------------------------------------------------------
13 // Based on ISO14443a implementation. Still in experimental phase.
14 // Contribution made during a security research at Radboud University Nijmegen
16 // Please feel free to contribute and extend iClass support!!
17 //-----------------------------------------------------------------------------
21 // We still have sometimes a demodulation error when snooping iClass communication.
22 // The resulting trace of a read-block-03 command may look something like this:
24 // + 22279: : 0c 03 e8 01
26 // ...with an incorrect answer...
28 // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
30 // We still left the error signalling bytes in the traces like 0xbb
32 // A correct trace should look like this:
34 // + 21112: : 0c 03 e8 01
35 // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
37 //-----------------------------------------------------------------------------
39 #include "proxmark3.h"
45 // Needed for CRC in emulation mode;
46 // same construction as in ISO 14443;
47 // different initial value (CRC_ICLASS)
48 #include "iso14443crc.h"
49 #include "iso15693tools.h"
50 #include "protocols.h"
51 #include "optimized_cipher.h"
53 static int timeout
= 4096;
56 static int SendIClassAnswer(uint8_t *resp
, int respLen
, int delay
);
58 //-----------------------------------------------------------------------------
59 // The software UART that receives commands from the reader, and its state
61 //-----------------------------------------------------------------------------
65 STATE_START_OF_COMMUNICATION
,
85 static RAMFUNC
int OutOfNDecoding(int bit
)
91 Uart
.bitBuffer
= bit
^ 0xFF0;
96 Uart
.bitBuffer
^= bit
;
100 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
103 if(Uart.byteCnt > 15) { return TRUE; }
109 if(Uart
.state
!= STATE_UNSYNCD
) {
112 if((Uart
.bitBuffer
& Uart
.syncBit
) ^ Uart
.syncBit
) {
118 if(((Uart
.bitBuffer
<< 1) & Uart
.syncBit
) ^ Uart
.syncBit
) {
124 if(bit
!= bitright
) { bit
= bitright
; }
127 // So, now we only have to deal with *bit*, lets see...
128 if(Uart
.posCnt
== 1) {
129 // measurement first half bitperiod
131 // Drop in first half means that we are either seeing
134 if(Uart
.nOutOfCnt
== 1) {
135 // End of Communication
136 Uart
.state
= STATE_UNSYNCD
;
138 if(Uart
.byteCnt
== 0) {
139 // Its not straightforward to show single EOFs
140 // So just leave it and do not return TRUE
141 Uart
.output
[0] = 0xf0;
148 else if(Uart
.state
!= STATE_START_OF_COMMUNICATION
) {
149 // When not part of SOF or EOF, it is an error
150 Uart
.state
= STATE_UNSYNCD
;
157 // measurement second half bitperiod
158 // Count the bitslot we are in... (ISO 15693)
162 if(Uart
.dropPosition
) {
163 if(Uart
.state
== STATE_START_OF_COMMUNICATION
) {
169 // It is an error if we already have seen a drop in current frame
170 Uart
.state
= STATE_UNSYNCD
;
174 Uart
.dropPosition
= Uart
.nOutOfCnt
;
181 if(Uart
.nOutOfCnt
== Uart
.OutOfCnt
&& Uart
.OutOfCnt
== 4) {
184 if(Uart
.state
== STATE_START_OF_COMMUNICATION
) {
185 if(Uart
.dropPosition
== 4) {
186 Uart
.state
= STATE_RECEIVING
;
189 else if(Uart
.dropPosition
== 3) {
190 Uart
.state
= STATE_RECEIVING
;
192 //Uart.output[Uart.byteCnt] = 0xdd;
196 Uart
.state
= STATE_UNSYNCD
;
199 Uart
.dropPosition
= 0;
204 if(!Uart
.dropPosition
) {
205 Uart
.state
= STATE_UNSYNCD
;
214 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
215 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
217 Uart
.shiftReg
^= ((Uart
.dropPosition
& 0x03) << 6);
219 Uart
.dropPosition
= 0;
221 if(Uart
.bitCnt
== 8) {
222 Uart
.output
[Uart
.byteCnt
] = (Uart
.shiftReg
& 0xff);
230 else if(Uart
.nOutOfCnt
== Uart
.OutOfCnt
) {
233 if(!Uart
.dropPosition
) {
234 Uart
.state
= STATE_UNSYNCD
;
240 Uart
.output
[Uart
.byteCnt
] = (Uart
.dropPosition
& 0xff);
245 Uart
.dropPosition
= 0;
250 Uart.output[Uart.byteCnt] = 0xAA;
252 Uart.output[Uart.byteCnt] = error & 0xFF;
254 Uart.output[Uart.byteCnt] = 0xAA;
256 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
258 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
260 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
262 Uart.output[Uart.byteCnt] = 0xAA;
270 bit
= Uart
.bitBuffer
& 0xf0;
272 bit
^= 0x0F; // drops become 1s ;-)
274 // should have been high or at least (4 * 128) / fc
275 // according to ISO this should be at least (9 * 128 + 20) / fc
276 if(Uart
.highCnt
== 8) {
277 // we went low, so this could be start of communication
278 // it turns out to be safer to choose a less significant
279 // syncbit... so we check whether the neighbour also represents the drop
280 Uart
.posCnt
= 1; // apparently we are busy with our first half bit period
281 Uart
.syncBit
= bit
& 8;
283 if(!Uart
.syncBit
) { Uart
.syncBit
= bit
& 4; Uart
.samples
= 2; }
284 else if(bit
& 4) { Uart
.syncBit
= bit
& 4; Uart
.samples
= 2; bit
<<= 2; }
285 if(!Uart
.syncBit
) { Uart
.syncBit
= bit
& 2; Uart
.samples
= 1; }
286 else if(bit
& 2) { Uart
.syncBit
= bit
& 2; Uart
.samples
= 1; bit
<<= 1; }
287 if(!Uart
.syncBit
) { Uart
.syncBit
= bit
& 1; Uart
.samples
= 0;
288 if(Uart
.syncBit
&& (Uart
.bitBuffer
& 8)) {
291 // the first half bit period is expected in next sample
296 else if(bit
& 1) { Uart
.syncBit
= bit
& 1; Uart
.samples
= 0; }
299 Uart
.state
= STATE_START_OF_COMMUNICATION
;
303 Uart
.OutOfCnt
= 4; // Start at 1/4, could switch to 1/256
304 Uart
.dropPosition
= 0;
313 if(Uart
.highCnt
< 8) {
322 //=============================================================================
324 //=============================================================================
329 DEMOD_START_OF_COMMUNICATION
,
330 DEMOD_START_OF_COMMUNICATION2
,
331 DEMOD_START_OF_COMMUNICATION3
,
335 DEMOD_END_OF_COMMUNICATION
,
336 DEMOD_END_OF_COMMUNICATION2
,
359 static RAMFUNC
int ManchesterDecoding(int v
)
366 Demod
.buffer
= Demod
.buffer2
;
367 Demod
.buffer2
= Demod
.buffer3
;
375 if(Demod
.state
==DEMOD_UNSYNCD
) {
376 Demod
.output
[Demod
.len
] = 0xfa;
379 Demod
.posCount
= 1; // This is the first half bit period, so after syncing handle the second part
382 Demod
.syncBit
= 0x08;
389 Demod
.syncBit
= 0x04;
396 Demod
.syncBit
= 0x02;
399 if(bit
& 0x01 && Demod
.syncBit
) {
400 Demod
.syncBit
= 0x01;
405 Demod
.state
= DEMOD_START_OF_COMMUNICATION
;
406 Demod
.sub
= SUB_FIRST_HALF
;
411 //if(trigger) LED_A_OFF(); // Not useful in this case...
412 switch(Demod
.syncBit
) {
413 case 0x08: Demod
.samples
= 3; break;
414 case 0x04: Demod
.samples
= 2; break;
415 case 0x02: Demod
.samples
= 1; break;
416 case 0x01: Demod
.samples
= 0; break;
418 // SOF must be long burst... otherwise stay unsynced!!!
419 if(!(Demod
.buffer
& Demod
.syncBit
) || !(Demod
.buffer2
& Demod
.syncBit
)) {
420 Demod
.state
= DEMOD_UNSYNCD
;
424 // SOF must be long burst... otherwise stay unsynced!!!
425 if(!(Demod
.buffer2
& Demod
.syncBit
) || !(Demod
.buffer3
& Demod
.syncBit
)) {
426 Demod
.state
= DEMOD_UNSYNCD
;
436 modulation
= bit
& Demod
.syncBit
;
437 modulation
|= ((bit
<< 1) ^ ((Demod
.buffer
& 0x08) >> 3)) & Demod
.syncBit
;
441 if(Demod
.posCount
==0) {
444 Demod
.sub
= SUB_FIRST_HALF
;
447 Demod
.sub
= SUB_NONE
;
452 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
453 if(Demod.state!=DEMOD_ERROR_WAIT) {
454 Demod.state = DEMOD_ERROR_WAIT;
455 Demod.output[Demod.len] = 0xaa;
459 //else if(modulation) {
461 if(Demod
.sub
== SUB_FIRST_HALF
) {
462 Demod
.sub
= SUB_BOTH
;
465 Demod
.sub
= SUB_SECOND_HALF
;
468 else if(Demod
.sub
== SUB_NONE
) {
469 if(Demod
.state
== DEMOD_SOF_COMPLETE
) {
470 Demod
.output
[Demod
.len
] = 0x0f;
472 Demod
.state
= DEMOD_UNSYNCD
;
477 Demod
.state
= DEMOD_ERROR_WAIT
;
480 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
481 Demod.state = DEMOD_ERROR_WAIT;
482 Demod.output[Demod.len] = 0xaa;
487 switch(Demod
.state
) {
488 case DEMOD_START_OF_COMMUNICATION
:
489 if(Demod
.sub
== SUB_BOTH
) {
490 //Demod.state = DEMOD_MANCHESTER_D;
491 Demod
.state
= DEMOD_START_OF_COMMUNICATION2
;
493 Demod
.sub
= SUB_NONE
;
496 Demod
.output
[Demod
.len
] = 0xab;
497 Demod
.state
= DEMOD_ERROR_WAIT
;
501 case DEMOD_START_OF_COMMUNICATION2
:
502 if(Demod
.sub
== SUB_SECOND_HALF
) {
503 Demod
.state
= DEMOD_START_OF_COMMUNICATION3
;
506 Demod
.output
[Demod
.len
] = 0xab;
507 Demod
.state
= DEMOD_ERROR_WAIT
;
511 case DEMOD_START_OF_COMMUNICATION3
:
512 if(Demod
.sub
== SUB_SECOND_HALF
) {
513 // Demod.state = DEMOD_MANCHESTER_D;
514 Demod
.state
= DEMOD_SOF_COMPLETE
;
515 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
519 Demod
.output
[Demod
.len
] = 0xab;
520 Demod
.state
= DEMOD_ERROR_WAIT
;
524 case DEMOD_SOF_COMPLETE
:
525 case DEMOD_MANCHESTER_D
:
526 case DEMOD_MANCHESTER_E
:
527 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
528 // 00001111 = 1 (0 in 14443)
529 if(Demod
.sub
== SUB_SECOND_HALF
) { // SUB_FIRST_HALF
531 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) ^ 0x100;
532 Demod
.state
= DEMOD_MANCHESTER_D
;
534 else if(Demod
.sub
== SUB_FIRST_HALF
) { // SUB_SECOND_HALF
536 Demod
.shiftReg
>>= 1;
537 Demod
.state
= DEMOD_MANCHESTER_E
;
539 else if(Demod
.sub
== SUB_BOTH
) {
540 Demod
.state
= DEMOD_MANCHESTER_F
;
543 Demod
.state
= DEMOD_ERROR_WAIT
;
548 case DEMOD_MANCHESTER_F
:
549 // Tag response does not need to be a complete byte!
550 if(Demod
.len
> 0 || Demod
.bitCount
> 0) {
551 if(Demod
.bitCount
> 1) { // was > 0, do not interpret last closing bit, is part of EOF
552 Demod
.shiftReg
>>= (9 - Demod
.bitCount
); // right align data
553 Demod
.output
[Demod
.len
] = Demod
.shiftReg
& 0xff;
557 Demod
.state
= DEMOD_UNSYNCD
;
561 Demod
.output
[Demod
.len
] = 0xad;
562 Demod
.state
= DEMOD_ERROR_WAIT
;
567 case DEMOD_ERROR_WAIT
:
568 Demod
.state
= DEMOD_UNSYNCD
;
572 Demod
.output
[Demod
.len
] = 0xdd;
573 Demod
.state
= DEMOD_UNSYNCD
;
577 /*if(Demod.bitCount>=9) {
578 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
581 Demod.parityBits <<= 1;
582 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
587 if(Demod
.bitCount
>=8) {
588 Demod
.shiftReg
>>= 1;
589 Demod
.output
[Demod
.len
] = (Demod
.shiftReg
& 0xff);
596 Demod
.output
[Demod
.len
] = 0xBB;
598 Demod
.output
[Demod
.len
] = error
& 0xFF;
600 Demod
.output
[Demod
.len
] = 0xBB;
602 Demod
.output
[Demod
.len
] = bit
& 0xFF;
604 Demod
.output
[Demod
.len
] = Demod
.buffer
& 0xFF;
607 Demod
.output
[Demod
.len
] = Demod
.buffer2
& 0xFF;
609 Demod
.output
[Demod
.len
] = Demod
.syncBit
& 0xFF;
611 Demod
.output
[Demod
.len
] = 0xBB;
618 } // end (state != UNSYNCED)
623 //=============================================================================
624 // Finally, a `sniffer' for iClass communication
625 // Both sides of communication!
626 //=============================================================================
628 //-----------------------------------------------------------------------------
629 // Record the sequence of commands sent by the reader to the tag, with
630 // triggering so that we start recording at the point that the tag is moved
632 //-----------------------------------------------------------------------------
633 void RAMFUNC
SnoopIClass(void)
637 // We won't start recording the frames that we acquire until we trigger;
638 // a good trigger condition to get started is probably when we see a
639 // response from the tag.
640 //int triggered = FALSE; // FALSE to wait first for card
642 // The command (reader -> tag) that we're receiving.
643 // The length of a received command will in most cases be no more than 18 bytes.
644 // So 32 should be enough!
645 #define ICLASS_BUFFER_SIZE 32
646 uint8_t readerToTagCmd
[ICLASS_BUFFER_SIZE
];
647 // The response (tag -> reader) that we're receiving.
648 uint8_t tagToReaderResponse
[ICLASS_BUFFER_SIZE
];
650 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
652 // free all BigBuf memory
654 // The DMA buffer, used to stream samples from the FPGA
655 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
659 iso14a_set_trigger(FALSE
);
666 // Count of samples received so far, so that we can include timing
667 // information in the trace buffer.
671 // Set up the demodulator for tag -> reader responses.
672 Demod
.output
= tagToReaderResponse
;
674 Demod
.state
= DEMOD_UNSYNCD
;
676 // Setup for the DMA.
679 lastRxCounter
= DMA_BUFFER_SIZE
;
680 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
);
682 // And the reader -> tag commands
683 memset(&Uart
, 0, sizeof(Uart
));
684 Uart
.output
= readerToTagCmd
;
685 Uart
.byteCntMax
= 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
686 Uart
.state
= STATE_UNSYNCD
;
688 // And put the FPGA in the appropriate mode
689 // Signal field is off with the appropriate LED
691 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_SNIFFER
);
692 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
694 uint32_t time_0
= GetCountSspClk();
695 uint32_t time_start
= 0;
696 uint32_t time_stop
= 0;
703 // And now we loop, receiving samples.
707 int behindBy
= (lastRxCounter
- AT91C_BASE_PDC_SSC
->PDC_RCR
) &
709 if(behindBy
> maxBehindBy
) {
710 maxBehindBy
= behindBy
;
711 if(behindBy
> (9 * DMA_BUFFER_SIZE
/ 10)) {
712 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy
);
716 if(behindBy
< 1) continue;
722 if(upTo
- dmaBuf
> DMA_BUFFER_SIZE
) {
723 upTo
-= DMA_BUFFER_SIZE
;
724 lastRxCounter
+= DMA_BUFFER_SIZE
;
725 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) upTo
;
726 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
733 decbyte
^= (1 << (3 - div
));
736 // FOR READER SIDE COMMUMICATION...
739 decbyter
^= (smpl
& 0x30);
743 if((div
+ 1) % 2 == 0) {
745 if(OutOfNDecoding((smpl
& 0xF0) >> 4)) {
746 rsamples
= samples
- Uart
.samples
;
747 time_stop
= (GetCountSspClk()-time_0
) << 4;
750 //if(!LogTrace(Uart.output,Uart.byteCnt, rsamples, Uart.parityBits,TRUE)) break;
751 //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
753 uint8_t parity
[MAX_PARITY_SIZE
];
754 GetParity(Uart
.output
, Uart
.byteCnt
, parity
);
755 LogTrace(Uart
.output
,Uart
.byteCnt
, time_start
, time_stop
, parity
, TRUE
);
759 /* And ready to receive another command. */
760 Uart
.state
= STATE_UNSYNCD
;
761 /* And also reset the demod code, which might have been */
762 /* false-triggered by the commands from the reader. */
763 Demod
.state
= DEMOD_UNSYNCD
;
767 time_start
= (GetCountSspClk()-time_0
) << 4;
774 if(ManchesterDecoding(smpl
& 0x0F)) {
775 time_stop
= (GetCountSspClk()-time_0
) << 4;
777 rsamples
= samples
- Demod
.samples
;
781 uint8_t parity
[MAX_PARITY_SIZE
];
782 GetParity(Demod
.output
, Demod
.len
, parity
);
783 LogTrace(Demod
.output
, Demod
.len
, time_start
, time_stop
, parity
, FALSE
);
786 // And ready to receive another response.
787 memset(&Demod
, 0, sizeof(Demod
));
788 Demod
.output
= tagToReaderResponse
;
789 Demod
.state
= DEMOD_UNSYNCD
;
792 time_start
= (GetCountSspClk()-time_0
) << 4;
801 DbpString("cancelled_a");
806 DbpString("COMMAND FINISHED");
808 Dbprintf("%x %x %x", maxBehindBy
, Uart
.state
, Uart
.byteCnt
);
809 Dbprintf("%x %x %x", Uart
.byteCntMax
, BigBuf_get_traceLen(), (int)Uart
.output
[0]);
812 AT91C_BASE_PDC_SSC
->PDC_PTCR
= AT91C_PDC_RXTDIS
;
813 Dbprintf("%x %x %x", maxBehindBy
, Uart
.state
, Uart
.byteCnt
);
814 Dbprintf("%x %x %x", Uart
.byteCntMax
, BigBuf_get_traceLen(), (int)Uart
.output
[0]);
821 void rotateCSN(uint8_t* originalCSN
, uint8_t* rotatedCSN
) {
823 for(i
= 0; i
< 8; i
++) {
824 rotatedCSN
[i
] = (originalCSN
[i
] >> 3) | (originalCSN
[(i
+1)%8] << 5);
828 //-----------------------------------------------------------------------------
829 // Wait for commands from reader
830 // Stop when button is pressed
831 // Or return TRUE when command is captured
832 //-----------------------------------------------------------------------------
833 static int GetIClassCommandFromReader(uint8_t *received
, int *len
, int maxLen
)
835 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
836 // only, since we are receiving, not transmitting).
837 // Signal field is off with the appropriate LED
839 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
841 // Now run a `software UART' on the stream of incoming samples.
842 Uart
.output
= received
;
843 Uart
.byteCntMax
= maxLen
;
844 Uart
.state
= STATE_UNSYNCD
;
849 if(BUTTON_PRESS()) return FALSE
;
851 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
852 AT91C_BASE_SSC
->SSC_THR
= 0x00;
854 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
855 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
857 if(OutOfNDecoding(b
& 0x0f)) {
865 static uint8_t encode4Bits(const uint8_t b
)
868 // OTA, the least significant bits first
870 // 1 - Bit value to send
871 // 2 - Reversed (big-endian)
877 case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
878 case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
879 case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
880 case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
881 case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
882 case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
883 case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
884 case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
885 case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
886 case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
887 case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
888 case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
889 case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
890 case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
891 case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
892 default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
897 //-----------------------------------------------------------------------------
898 // Prepare tag messages
899 //-----------------------------------------------------------------------------
900 static void CodeIClassTagAnswer(const uint8_t *cmd
, int len
)
904 * SOF comprises 3 parts;
905 * * An unmodulated time of 56.64 us
906 * * 24 pulses of 423.75 KHz (fc/32)
907 * * A logic 1, which starts with an unmodulated time of 18.88us
908 * followed by 8 pulses of 423.75kHz (fc/32)
911 * EOF comprises 3 parts:
912 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
914 * - 24 pulses of fc/32
915 * - An unmodulated time of 56.64 us
918 * A logic 0 starts with 8 pulses of fc/32
919 * followed by an unmodulated time of 256/fc (~18,88us).
921 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
922 * 8 pulses of fc/32 (also 18.88us)
924 * The mode FPGA_HF_SIMULATOR_MODULATE_424K_8BIT which we use to simulate tag,
926 * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us).
927 * - A 0-bit inptu to the FPGA becomes an unmodulated time of 18.88us
929 * In this mode the SOF can be written as 00011101 = 0x1D
930 * The EOF can be written as 10111000 = 0xb8
941 ToSend
[++ToSendMax
] = 0x1D;
943 for(i
= 0; i
< len
; i
++) {
945 ToSend
[++ToSendMax
] = encode4Bits(b
& 0xF); //Least significant half
946 ToSend
[++ToSendMax
] = encode4Bits((b
>>4) & 0xF);//Most significant half
950 ToSend
[++ToSendMax
] = 0xB8;
951 //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end
952 // Convert from last byte pos to length
957 static void CodeIClassTagSOF()
959 //So far a dummy implementation, not used
960 //int lastProxToAirDuration =0;
964 ToSend
[++ToSendMax
] = 0x1D;
965 // lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning
967 // Convert from last byte pos to length
970 #define MODE_SIM_CSN 0
971 #define MODE_EXIT_AFTER_MAC 1
972 #define MODE_FULLSIM 2
974 int doIClassSimulation(int simulationMode
, uint8_t *reader_mac_buf
);
976 * @brief SimulateIClass simulates an iClass card.
977 * @param arg0 type of simulation
978 * - 0 uses the first 8 bytes in usb data as CSN
979 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
980 * in the usb data. This mode collects MAC from the reader, in order to do an offline
981 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
982 * - Other : Uses the default CSN (031fec8af7ff12e0)
983 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
987 void SimulateIClass(uint32_t arg0
, uint32_t arg1
, uint32_t arg2
, uint8_t *datain
)
989 uint32_t simType
= arg0
;
990 uint32_t numberOfCSNS
= arg1
;
991 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
993 // Enable and clear the trace
996 //Use the emulator memory for SIM
997 uint8_t *emulator
= BigBuf_get_EM_addr();
1000 // Use the CSN from commandline
1001 memcpy(emulator
, datain
, 8);
1002 doIClassSimulation(MODE_SIM_CSN
,NULL
);
1003 }else if(simType
== 1)
1006 uint8_t csn_crc
[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1007 // Use the CSN from commandline
1008 memcpy(emulator
, csn_crc
, 8);
1009 doIClassSimulation(MODE_SIM_CSN
,NULL
);
1011 else if(simType
== 2)
1014 uint8_t mac_responses
[USB_CMD_DATA_SIZE
] = { 0 };
1015 Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS
);
1016 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1017 // in order to collect MAC's from the reader. This can later be used in an offlne-attack
1018 // in order to obtain the keys, as in the "dismantling iclass"-paper.
1020 for( ; i
< numberOfCSNS
&& i
*8+8 < USB_CMD_DATA_SIZE
; i
++)
1022 // The usb data is 512 bytes, fitting 65 8-byte CSNs in there.
1024 memcpy(emulator
, datain
+(i
*8), 8);
1025 if(doIClassSimulation(MODE_EXIT_AFTER_MAC
,mac_responses
+i
*8))
1027 cmd_send(CMD_ACK
,CMD_SIMULATE_TAG_ICLASS
,i
,0,mac_responses
,i
*8);
1028 return; // Button pressed
1031 cmd_send(CMD_ACK
,CMD_SIMULATE_TAG_ICLASS
,i
,0,mac_responses
,i
*8);
1033 }else if(simType
== 3){
1034 //This is 'full sim' mode, where we use the emulator storage for data.
1035 doIClassSimulation(MODE_FULLSIM
, NULL
);
1038 // We may want a mode here where we hardcode the csns to use (from proxclone).
1039 // That will speed things up a little, but not required just yet.
1040 Dbprintf("The mode is not implemented, reserved for future use");
1042 Dbprintf("Done...");
1045 void AppendCrc(uint8_t* data
, int len
)
1047 ComputeCrc14443(CRC_ICLASS
,data
,len
,data
+len
,data
+len
+1);
1051 * @brief Does the actual simulation
1052 * @param csn - csn to use
1053 * @param breakAfterMacReceived if true, returns after reader MAC has been received.
1055 int doIClassSimulation( int simulationMode
, uint8_t *reader_mac_buf
)
1057 // free eventually allocated BigBuf memory
1058 BigBuf_free_keep_EM();
1061 // State cipher_state_reserve;
1062 uint8_t *csn
= BigBuf_get_EM_addr();
1063 uint8_t *emulator
= csn
;
1064 uint8_t sof_data
[] = { 0x0F} ;
1065 // CSN followed by two CRC bytes
1066 uint8_t anticoll_data
[10] = { 0 };
1067 uint8_t csn_data
[10] = { 0 };
1068 memcpy(csn_data
,csn
,sizeof(csn_data
));
1069 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x",csn
[0],csn
[1],csn
[2],csn
[3],csn
[4],csn
[5],csn
[6],csn
[7]);
1071 // Construct anticollision-CSN
1072 rotateCSN(csn_data
,anticoll_data
);
1074 // Compute CRC on both CSNs
1075 ComputeCrc14443(CRC_ICLASS
, anticoll_data
, 8, &anticoll_data
[8], &anticoll_data
[9]);
1076 ComputeCrc14443(CRC_ICLASS
, csn_data
, 8, &csn_data
[8], &csn_data
[9]);
1078 uint8_t diversified_key
[8] = { 0 };
1080 uint8_t card_challenge_data
[8] = { 0x00 };
1081 if(simulationMode
== MODE_FULLSIM
)
1083 //The diversified key should be stored on block 3
1084 //Get the diversified key from emulator memory
1085 memcpy(diversified_key
, emulator
+(8*3),8);
1087 //Card challenge, a.k.a e-purse is on block 2
1088 memcpy(card_challenge_data
,emulator
+ (8 * 2) , 8);
1089 //Precalculate the cipher state, feeding it the CC
1090 cipher_state
= opt_doTagMAC_1(card_challenge_data
,diversified_key
);
1098 // Tag anticoll. CSN
1099 // Reader 81 anticoll. CSN
1102 uint8_t *modulated_response
;
1103 int modulated_response_size
= 0;
1104 uint8_t* trace_data
= NULL
;
1105 int trace_data_size
= 0;
1108 // Respond SOF -- takes 1 bytes
1109 uint8_t *resp_sof
= BigBuf_malloc(2);
1112 // Anticollision CSN (rotated CSN)
1113 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
1114 uint8_t *resp_anticoll
= BigBuf_malloc(28);
1115 int resp_anticoll_len
;
1118 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
1119 uint8_t *resp_csn
= BigBuf_malloc(30);
1123 // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
1124 uint8_t *resp_cc
= BigBuf_malloc(20);
1127 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
1130 // Prepare card messages
1133 // First card answer: SOF
1135 memcpy(resp_sof
, ToSend
, ToSendMax
); resp_sof_Len
= ToSendMax
;
1137 // Anticollision CSN
1138 CodeIClassTagAnswer(anticoll_data
, sizeof(anticoll_data
));
1139 memcpy(resp_anticoll
, ToSend
, ToSendMax
); resp_anticoll_len
= ToSendMax
;
1142 CodeIClassTagAnswer(csn_data
, sizeof(csn_data
));
1143 memcpy(resp_csn
, ToSend
, ToSendMax
); resp_csn_len
= ToSendMax
;
1146 CodeIClassTagAnswer(card_challenge_data
, sizeof(card_challenge_data
));
1147 memcpy(resp_cc
, ToSend
, ToSendMax
); resp_cc_len
= ToSendMax
;
1149 //This is used for responding to READ-block commands or other data which is dynamically generated
1150 //First the 'trace'-data, not encoded for FPGA
1151 uint8_t *data_generic_trace
= BigBuf_malloc(8 + 2);//8 bytes data + 2byte CRC is max tag answer
1152 //Then storage for the modulated data
1153 //Each bit is doubled when modulated for FPGA, and we also have SOF and EOF (2 bytes)
1154 uint8_t *data_response
= BigBuf_malloc( (8+2) * 2 + 2);
1156 // Start from off (no field generated)
1157 //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1159 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1162 // We need to listen to the high-frequency, peak-detected path.
1163 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1166 // To control where we are in the protocol
1168 uint32_t time_0
= GetCountSspClk();
1169 uint32_t t2r_time
=0;
1170 uint32_t r2t_time
=0;
1173 bool buttonPressed
= false;
1174 uint8_t response_delay
= 1;
1179 // Can be used to get a trigger for an oscilloscope..
1182 if(!GetIClassCommandFromReader(receivedCmd
, &len
, 100)) {
1183 buttonPressed
= true;
1186 r2t_time
= GetCountSspClk();
1190 // Okay, look at the command now.
1191 if(receivedCmd
[0] == ICLASS_CMD_ACTALL
) {
1192 // Reader in anticollission phase
1193 modulated_response
= resp_sof
; modulated_response_size
= resp_sof_Len
; //order = 1;
1194 trace_data
= sof_data
;
1195 trace_data_size
= sizeof(sof_data
);
1196 } else if(receivedCmd
[0] == ICLASS_CMD_READ_OR_IDENTIFY
&& len
== 1) {
1197 // Reader asks for anticollission CSN
1198 modulated_response
= resp_anticoll
; modulated_response_size
= resp_anticoll_len
; //order = 2;
1199 trace_data
= anticoll_data
;
1200 trace_data_size
= sizeof(anticoll_data
);
1201 //DbpString("Reader requests anticollission CSN:");
1202 } else if(receivedCmd
[0] == ICLASS_CMD_SELECT
) {
1203 // Reader selects anticollission CSN.
1204 // Tag sends the corresponding real CSN
1205 modulated_response
= resp_csn
; modulated_response_size
= resp_csn_len
; //order = 3;
1206 trace_data
= csn_data
;
1207 trace_data_size
= sizeof(csn_data
);
1208 //DbpString("Reader selects anticollission CSN:");
1209 } else if(receivedCmd
[0] == ICLASS_CMD_READCHECK_KD
) {
1210 // Read e-purse (88 02)
1211 modulated_response
= resp_cc
; modulated_response_size
= resp_cc_len
; //order = 4;
1212 trace_data
= card_challenge_data
;
1213 trace_data_size
= sizeof(card_challenge_data
);
1215 } else if(receivedCmd
[0] == ICLASS_CMD_CHECK
) {
1216 // Reader random and reader MAC!!!
1217 if(simulationMode
== MODE_FULLSIM
)
1219 //NR, from reader, is in receivedCmd +1
1220 opt_doTagMAC_2(cipher_state
,receivedCmd
+1,data_generic_trace
,diversified_key
);
1222 trace_data
= data_generic_trace
;
1223 trace_data_size
= 4;
1224 CodeIClassTagAnswer(trace_data
, trace_data_size
);
1225 memcpy(data_response
, ToSend
, ToSendMax
);
1226 modulated_response
= data_response
;
1227 modulated_response_size
= ToSendMax
;
1228 response_delay
= 0;//We need to hurry here...
1231 { //Not fullsim, we don't respond
1232 // We do not know what to answer, so lets keep quiet
1233 modulated_response
= resp_sof
; modulated_response_size
= 0;
1235 trace_data_size
= 0;
1236 if (simulationMode
== MODE_EXIT_AFTER_MAC
){
1238 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x"
1239 ,csn
[0],csn
[1],csn
[2],csn
[3],csn
[4],csn
[5],csn
[6],csn
[7]);
1240 Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len
,
1241 receivedCmd
[0], receivedCmd
[1], receivedCmd
[2],
1242 receivedCmd
[3], receivedCmd
[4], receivedCmd
[5],
1243 receivedCmd
[6], receivedCmd
[7], receivedCmd
[8]);
1244 if (reader_mac_buf
!= NULL
)
1246 memcpy(reader_mac_buf
,receivedCmd
+1,8);
1252 } else if(receivedCmd
[0] == ICLASS_CMD_HALT
&& len
== 1) {
1253 // Reader ends the session
1254 modulated_response
= resp_sof
; modulated_response_size
= 0; //order = 0;
1256 trace_data_size
= 0;
1257 } else if(simulationMode
== MODE_FULLSIM
&& receivedCmd
[0] == ICLASS_CMD_READ_OR_IDENTIFY
&& len
== 4){
1259 uint16_t blk
= receivedCmd
[1];
1261 memcpy(data_generic_trace
, emulator
+(blk
<< 3),8);
1263 AppendCrc(data_generic_trace
, 8);
1264 trace_data
= data_generic_trace
;
1265 trace_data_size
= 10;
1266 CodeIClassTagAnswer(trace_data
, trace_data_size
);
1267 memcpy(data_response
, ToSend
, ToSendMax
);
1268 modulated_response
= data_response
;
1269 modulated_response_size
= ToSendMax
;
1270 }else if(receivedCmd
[0] == ICLASS_CMD_UPDATE
&& simulationMode
== MODE_FULLSIM
)
1271 {//Probably the reader wants to update the nonce. Let's just ignore that for now.
1272 // OBS! If this is implemented, don't forget to regenerate the cipher_state
1273 //We're expected to respond with the data+crc, exactly what's already in the receivedcmd
1274 //receivedcmd is now UPDATE 1b | ADDRESS 1b| DATA 8b| Signature 4b or CRC 2b|
1277 memcpy(data_generic_trace
, receivedCmd
+2,8);
1279 AppendCrc(data_generic_trace
, 8);
1280 trace_data
= data_generic_trace
;
1281 trace_data_size
= 10;
1282 CodeIClassTagAnswer(trace_data
, trace_data_size
);
1283 memcpy(data_response
, ToSend
, ToSendMax
);
1284 modulated_response
= data_response
;
1285 modulated_response_size
= ToSendMax
;
1287 else if(receivedCmd
[0] == ICLASS_CMD_PAGESEL
)
1289 //Pagesel enables to select a page in the selected chip memory and return its configuration block
1290 //Chips with a single page will not answer to this command
1291 // It appears we're fine ignoring this.
1292 //Otherwise, we should answer 8bytes (block) + 2bytes CRC
1295 //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
1296 // Never seen this command before
1297 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1299 receivedCmd
[0], receivedCmd
[1], receivedCmd
[2],
1300 receivedCmd
[3], receivedCmd
[4], receivedCmd
[5],
1301 receivedCmd
[6], receivedCmd
[7], receivedCmd
[8]);
1303 modulated_response
= resp_sof
; modulated_response_size
= 0; //order = 0;
1305 trace_data_size
= 0;
1308 if(cmdsRecvd
> 100) {
1309 //DbpString("100 commands later...");
1316 A legit tag has about 380us delay between reader EOT and tag SOF.
1318 if(modulated_response_size
> 0) {
1319 SendIClassAnswer(modulated_response
, modulated_response_size
, response_delay
);
1320 t2r_time
= GetCountSspClk();
1324 uint8_t parity
[MAX_PARITY_SIZE
];
1325 GetParity(receivedCmd
, len
, parity
);
1326 LogTrace(receivedCmd
,len
, (r2t_time
-time_0
)<< 4, (r2t_time
-time_0
) << 4, parity
, TRUE
);
1328 if (trace_data
!= NULL
) {
1329 GetParity(trace_data
, trace_data_size
, parity
);
1330 LogTrace(trace_data
, trace_data_size
, (t2r_time
-time_0
) << 4, (t2r_time
-time_0
) << 4, parity
, FALSE
);
1333 DbpString("Trace full");
1340 //Dbprintf("%x", cmdsRecvd);
1347 DbpString("Button pressed");
1349 return buttonPressed
;
1352 static int SendIClassAnswer(uint8_t *resp
, int respLen
, int delay
)
1354 int i
= 0, d
=0;//, u = 0, d = 0;
1357 //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
1358 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR
|FPGA_HF_SIMULATOR_MODULATE_424K_8BIT
);
1360 AT91C_BASE_SSC
->SSC_THR
= 0x00;
1362 while(!BUTTON_PRESS()) {
1363 if((AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
)){
1364 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1366 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)){
1379 AT91C_BASE_SSC
->SSC_THR
= b
;
1382 // if (i > respLen +4) break;
1383 if (i
> respLen
+1) break;
1391 //-----------------------------------------------------------------------------
1392 // Transmit the command (to the tag) that was placed in ToSend[].
1393 //-----------------------------------------------------------------------------
1394 static void TransmitIClassCommand(const uint8_t *cmd
, int len
, int *samples
, int *wait
)
1397 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1398 AT91C_BASE_SSC
->SSC_THR
= 0x00;
1403 if(*wait
< 10) *wait
= 10;
1405 for(c
= 0; c
< *wait
;) {
1406 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1407 AT91C_BASE_SSC
->SSC_THR
= 0x00; // For exact timing!
1410 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1411 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
1421 bool firstpart
= TRUE
;
1424 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1426 // DOUBLE THE SAMPLES!
1428 sendbyte
= (cmd
[c
] & 0xf0) | (cmd
[c
] >> 4);
1431 sendbyte
= (cmd
[c
] & 0x0f) | (cmd
[c
] << 4);
1434 if(sendbyte
== 0xff) {
1437 AT91C_BASE_SSC
->SSC_THR
= sendbyte
;
1438 firstpart
= !firstpart
;
1444 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1445 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
1450 if (samples
&& wait
) *samples
= (c
+ *wait
) << 3;
1454 //-----------------------------------------------------------------------------
1455 // Prepare iClass reader command to send to FPGA
1456 //-----------------------------------------------------------------------------
1457 void CodeIClassCommand(const uint8_t * cmd
, int len
)
1464 // Start of Communication: 1 out of 4
1465 ToSend
[++ToSendMax
] = 0xf0;
1466 ToSend
[++ToSendMax
] = 0x00;
1467 ToSend
[++ToSendMax
] = 0x0f;
1468 ToSend
[++ToSendMax
] = 0x00;
1470 // Modulate the bytes
1471 for (i
= 0; i
< len
; i
++) {
1473 for(j
= 0; j
< 4; j
++) {
1474 for(k
= 0; k
< 4; k
++) {
1476 ToSend
[++ToSendMax
] = 0xf0;
1479 ToSend
[++ToSendMax
] = 0x00;
1486 // End of Communication
1487 ToSend
[++ToSendMax
] = 0x00;
1488 ToSend
[++ToSendMax
] = 0x00;
1489 ToSend
[++ToSendMax
] = 0xf0;
1490 ToSend
[++ToSendMax
] = 0x00;
1492 // Convert from last character reference to length
1496 void ReaderTransmitIClass(uint8_t* frame
, int len
)
1501 // This is tied to other size changes
1502 CodeIClassCommand(frame
,len
);
1505 TransmitIClassCommand(ToSend
, ToSendMax
, &samples
, &wait
);
1509 // Store reader command in buffer
1511 uint8_t par
[MAX_PARITY_SIZE
];
1512 GetParity(frame
, len
, par
);
1513 LogTrace(frame
, len
, rsamples
, rsamples
, par
, TRUE
);
1517 //-----------------------------------------------------------------------------
1518 // Wait a certain time for tag response
1519 // If a response is captured return TRUE
1520 // If it takes too long return FALSE
1521 //-----------------------------------------------------------------------------
1522 static int GetIClassAnswer(uint8_t *receivedResponse
, int maxLen
, int *samples
, int *elapsed
) //uint8_t *buffer
1524 // buffer needs to be 512 bytes
1527 // Set FPGA mode to "reader listen mode", no modulation (listen
1528 // only, since we are receiving, not transmitting).
1529 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1531 // Now get the answer from the card
1532 Demod
.output
= receivedResponse
;
1534 Demod
.state
= DEMOD_UNSYNCD
;
1537 if (elapsed
) *elapsed
= 0;
1545 if(BUTTON_PRESS()) return FALSE
;
1547 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1548 AT91C_BASE_SSC
->SSC_THR
= 0x00; // To make use of exact timing of next command from reader!!
1549 if (elapsed
) (*elapsed
)++;
1551 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1552 if(c
< timeout
) { c
++; } else { return FALSE
; }
1553 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1557 if(ManchesterDecoding(b
& 0x0f)) {
1565 int ReaderReceiveIClass(uint8_t* receivedAnswer
)
1568 if (!GetIClassAnswer(receivedAnswer
,160,&samples
,0)) return FALSE
;
1569 rsamples
+= samples
;
1571 uint8_t parity
[MAX_PARITY_SIZE
];
1572 GetParity(receivedAnswer
, Demod
.len
, parity
);
1573 LogTrace(receivedAnswer
,Demod
.len
,rsamples
,rsamples
,parity
,FALSE
);
1575 if(samples
== 0) return FALSE
;
1579 void setupIclassReader()
1581 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1582 // Reset trace buffer
1588 // Start from off (no field generated)
1589 // Signal field is off with the appropriate LED
1591 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1594 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1596 // Now give it time to spin up.
1597 // Signal field is on with the appropriate LED
1598 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1604 bool sendCmdGetResponseWithRetries(uint8_t* command
, size_t cmdsize
, uint8_t* resp
, uint8_t expected_size
, uint8_t retries
)
1606 while(retries
-- > 0)
1608 ReaderTransmitIClass(command
, cmdsize
);
1609 if(expected_size
== ReaderReceiveIClass(resp
)){
1613 return false;//Error
1617 * @brief Talks to an iclass tag, sends the commands to get CSN and CC.
1618 * @param card_data where the CSN and CC are stored for return
1621 * 2 = Got CSN and CC
1623 uint8_t handshakeIclassTag_ext(uint8_t *card_data
, bool use_credit_key
)
1625 static uint8_t act_all
[] = { 0x0a };
1626 //static uint8_t identify[] = { 0x0c };
1627 static uint8_t identify
[] = { 0x0c, 0x00, 0x73, 0x33 };
1628 static uint8_t select
[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1629 static uint8_t readcheck_cc
[]= { 0x88, 0x02 };
1631 readcheck_cc
[0] = 0x18;
1633 readcheck_cc
[0] = 0x88;
1635 uint8_t resp
[ICLASS_BUFFER_SIZE
];
1637 uint8_t read_status
= 0;
1640 ReaderTransmitIClass(act_all
, 1);
1642 if(!ReaderReceiveIClass(resp
)) return read_status
;//Fail
1644 ReaderTransmitIClass(identify
, 1);
1645 //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC
1646 uint8_t len
= ReaderReceiveIClass(resp
);
1647 if(len
!= 10) return read_status
;//Fail
1649 //Copy the Anti-collision CSN to our select-packet
1650 memcpy(&select
[1],resp
,8);
1652 ReaderTransmitIClass(select
, sizeof(select
));
1653 //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC
1654 len
= ReaderReceiveIClass(resp
);
1655 if(len
!= 10) return read_status
;//Fail
1657 //Success - level 1, we got CSN
1658 //Save CSN in response data
1659 memcpy(card_data
,resp
,8);
1661 //Flag that we got to at least stage 1, read CSN
1664 // Card selected, now read e-purse (cc)
1665 ReaderTransmitIClass(readcheck_cc
, sizeof(readcheck_cc
));
1666 if(ReaderReceiveIClass(resp
) == 8) {
1667 //Save CC (e-purse) in response data
1668 memcpy(card_data
+8,resp
,8);
1674 uint8_t handshakeIclassTag(uint8_t *card_data
) {
1675 return handshakeIclassTag_ext(card_data
, false);
1679 // Reader iClass Anticollission
1680 void ReaderIClass(uint8_t arg0
) {
1682 uint8_t card_data
[6 * 8]={0};
1683 memset(card_data
, 0xFF, sizeof(card_data
));
1684 uint8_t last_csn
[8]={0};
1686 //Read conf block CRC(0x01) => 0xfa 0x22
1687 uint8_t readConf
[] = { ICLASS_CMD_READ_OR_IDENTIFY
,0x01, 0xfa, 0x22};
1688 //Read conf block CRC(0x05) => 0xde 0x64
1689 uint8_t readAA
[] = { ICLASS_CMD_READ_OR_IDENTIFY
,0x05, 0xde, 0x64};
1693 uint8_t result_status
= 0;
1694 bool abort_after_read
= arg0
& FLAG_ICLASS_READER_ONLY_ONCE
;
1695 bool try_once
= arg0
& FLAG_ICLASS_READER_ONE_TRY
;
1696 bool use_credit_key
= false;
1697 if (arg0
& FLAG_ICLASS_READER_CEDITKEY
)
1698 use_credit_key
= true;
1700 setupIclassReader();
1703 while(!BUTTON_PRESS())
1705 if (try_once
&& tryCnt
> 5) break;
1708 DbpString("Trace full");
1713 read_status
= handshakeIclassTag_ext(card_data
, use_credit_key
);
1715 if(read_status
== 0) continue;
1716 if(read_status
== 1) result_status
= FLAG_ICLASS_READER_CSN
;
1717 if(read_status
== 2) result_status
= FLAG_ICLASS_READER_CSN
|FLAG_ICLASS_READER_CC
;
1719 // handshakeIclass returns CSN|CC, but the actual block
1720 // layout is CSN|CONFIG|CC, so here we reorder the data,
1721 // moving CC forward 8 bytes
1722 memcpy(card_data
+16,card_data
+8, 8);
1723 //Read block 1, config
1724 if(arg0
& FLAG_ICLASS_READER_CONF
)
1726 if(sendCmdGetResponseWithRetries(readConf
, sizeof(readConf
),card_data
+8, 10, 10))
1728 result_status
|= FLAG_ICLASS_READER_CONF
;
1730 Dbprintf("Failed to dump config block");
1735 if(arg0
& FLAG_ICLASS_READER_AA
){
1736 if(sendCmdGetResponseWithRetries(readAA
, sizeof(readAA
),card_data
+(8*4), 10, 10))
1738 result_status
|= FLAG_ICLASS_READER_AA
;
1740 //Dbprintf("Failed to dump AA block");
1745 // 1 : Configuration
1747 // (3,4 write-only, kc and kd)
1748 // 5 Application issuer area
1750 //Then we can 'ship' back the 8 * 5 bytes of data,
1751 // with 0xFF:s in block 3 and 4.
1754 //Send back to client, but don't bother if we already sent this
1755 if(memcmp(last_csn
, card_data
, 8) != 0)
1757 // If caller requires that we get CC, continue until we got it
1758 if( (arg0
& read_status
& FLAG_ICLASS_READER_CC
) || !(arg0
& FLAG_ICLASS_READER_CC
))
1760 cmd_send(CMD_ACK
,result_status
,0,0,card_data
,sizeof(card_data
));
1761 if(abort_after_read
) {
1765 //Save that we already sent this....
1766 memcpy(last_csn
, card_data
, 8);
1772 cmd_send(CMD_ACK
,0,0,0,card_data
, 0);
1776 void ReaderIClass_Replay(uint8_t arg0
, uint8_t *MAC
) {
1778 uint8_t card_data
[USB_CMD_DATA_SIZE
]={0};
1779 uint16_t block_crc_LUT
[255] = {0};
1781 {//Generate a lookup table for block crc
1782 for(int block
= 0; block
< 255; block
++){
1784 block_crc_LUT
[block
] = iclass_crc16(&bl
,1);
1787 //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]);
1789 uint8_t check
[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1790 uint8_t read
[] = { 0x0c, 0x00, 0x00, 0x00 };
1796 static struct memory_t
{
1804 uint8_t resp
[ICLASS_BUFFER_SIZE
];
1806 setupIclassReader();
1809 while(!BUTTON_PRESS()) {
1814 DbpString("Trace full");
1818 uint8_t read_status
= handshakeIclassTag(card_data
);
1819 if(read_status
< 2) continue;
1821 //for now replay captured auth (as cc not updated)
1822 memcpy(check
+5,MAC
,4);
1824 if(!sendCmdGetResponseWithRetries(check
, sizeof(check
),resp
, 4, 5))
1826 Dbprintf("Error: Authentication Fail!");
1830 //first get configuration block (block 1)
1831 crc
= block_crc_LUT
[1];
1834 read
[3] = crc
& 0xff;
1836 if(!sendCmdGetResponseWithRetries(read
, sizeof(read
),resp
, 10, 10))
1838 Dbprintf("Dump config (block 1) failed");
1843 memory
.k16
= (mem
& 0x80);
1844 memory
.book
= (mem
& 0x20);
1845 memory
.k2
= (mem
& 0x8);
1846 memory
.lockauth
= (mem
& 0x2);
1847 memory
.keyaccess
= (mem
& 0x1);
1849 cardsize
= memory
.k16
? 255 : 32;
1851 //Set card_data to all zeroes, we'll fill it with data
1852 memset(card_data
,0x0,USB_CMD_DATA_SIZE
);
1853 uint8_t failedRead
=0;
1854 uint32_t stored_data_length
=0;
1855 //then loop around remaining blocks
1856 for(int block
=0; block
< cardsize
; block
++){
1859 crc
= block_crc_LUT
[block
];
1861 read
[3] = crc
& 0xff;
1863 if(sendCmdGetResponseWithRetries(read
, sizeof(read
), resp
, 10, 10))
1865 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
1866 block
, resp
[0], resp
[1], resp
[2],
1867 resp
[3], resp
[4], resp
[5],
1870 //Fill up the buffer
1871 memcpy(card_data
+stored_data_length
,resp
,8);
1872 stored_data_length
+= 8;
1873 if(stored_data_length
+8 > USB_CMD_DATA_SIZE
)
1874 {//Time to send this off and start afresh
1876 stored_data_length
,//data length
1877 failedRead
,//Failed blocks?
1879 card_data
, stored_data_length
);
1881 stored_data_length
= 0;
1887 stored_data_length
+=8;//Otherwise, data becomes misaligned
1888 Dbprintf("Failed to dump block %d", block
);
1892 //Send off any remaining data
1893 if(stored_data_length
> 0)
1896 stored_data_length
,//data length
1897 failedRead
,//Failed blocks?
1899 card_data
, stored_data_length
);
1901 //If we got here, let's break
1904 //Signal end of transmission
1914 void iClass_ReadCheck(uint8_t blockNo
, uint8_t keyType
) {
1915 uint8_t readcheck
[] = { keyType
, blockNo
};
1916 uint8_t resp
[] = {0,0,0,0,0,0,0,0};
1918 isOK
= sendCmdGetResponseWithRetries(readcheck
, sizeof(readcheck
), resp
, sizeof(resp
), 6);
1919 cmd_send(CMD_ACK
,isOK
,0,0,0,0);
1922 void iClass_Authentication(uint8_t *MAC
) {
1923 uint8_t check
[] = { ICLASS_CMD_CHECK
, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1924 uint8_t resp
[ICLASS_BUFFER_SIZE
];
1925 memcpy(check
+5,MAC
,4);
1927 isOK
= sendCmdGetResponseWithRetries(check
, sizeof(check
), resp
, 4, 6);
1928 cmd_send(CMD_ACK
,isOK
,0,0,0,0);
1930 bool iClass_ReadBlock(uint8_t blockNo
, uint8_t *readdata
) {
1931 uint8_t readcmd
[] = {ICLASS_CMD_READ_OR_IDENTIFY
, blockNo
, 0x00, 0x00}; //0x88, 0x00 // can i use 0C?
1933 uint16_t rdCrc
= iclass_crc16(&bl
, 1);
1934 readcmd
[2] = rdCrc
>> 8;
1935 readcmd
[3] = rdCrc
& 0xff;
1936 uint8_t resp
[] = {0,0,0,0,0,0,0,0,0,0};
1939 //readcmd[1] = blockNo;
1940 isOK
= sendCmdGetResponseWithRetries(readcmd
, sizeof(readcmd
), resp
, 10, 10);
1941 memcpy(readdata
, resp
, sizeof(resp
));
1946 void iClass_ReadBlk(uint8_t blockno
) {
1947 uint8_t readblockdata
[] = {0,0,0,0,0,0,0,0,0,0};
1949 isOK
= iClass_ReadBlock(blockno
, readblockdata
);
1950 cmd_send(CMD_ACK
, isOK
, 0, 0, readblockdata
, 8);
1953 void iClass_Dump(uint8_t blockno
, uint8_t numblks
) {
1954 uint8_t readblockdata
[] = {0,0,0,0,0,0,0,0,0,0};
1959 uint8_t *dataout
= BigBuf_malloc(255*8);
1960 if (dataout
== NULL
){
1961 Dbprintf("out of memory");
1965 memset(dataout
,0xFF,255*8);
1967 for (;blkCnt
< numblks
; blkCnt
++) {
1968 isOK
= iClass_ReadBlock(blockno
+blkCnt
, readblockdata
);
1969 if (!isOK
|| (readblockdata
[0] == 0xBB || readblockdata
[7] == 0xBB || readblockdata
[2] == 0xBB)) { //try again
1970 isOK
= iClass_ReadBlock(blockno
+blkCnt
, readblockdata
);
1972 Dbprintf("Block %02X failed to read", blkCnt
+blockno
);
1976 memcpy(dataout
+(blkCnt
*8),readblockdata
,8);
1978 //return pointer to dump memory in arg3
1979 cmd_send(CMD_ACK
,isOK
,blkCnt
,BigBuf_max_traceLen(),0,0);
1980 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1985 bool iClass_WriteBlock_ext(uint8_t blockNo
, uint8_t *data
) {
1986 uint8_t write
[] = { ICLASS_CMD_UPDATE
, blockNo
, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1987 //uint8_t readblockdata[10];
1988 //write[1] = blockNo;
1989 memcpy(write
+2, data
, 12); // data + mac
1990 char *wrCmd
= (char *)(write
+1);
1991 uint16_t wrCrc
= iclass_crc16(wrCmd
, 13);
1992 write
[14] = wrCrc
>> 8;
1993 write
[15] = wrCrc
& 0xff;
1994 uint8_t resp
[] = {0,0,0,0,0,0,0,0,0,0};
1997 isOK
= sendCmdGetResponseWithRetries(write
,sizeof(write
),resp
,sizeof(resp
),10);
1998 if (isOK
) { //if reader responded correctly
1999 //Dbprintf("WriteResp: %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X",resp[0],resp[1],resp[2],resp[3],resp[4],resp[5],resp[6],resp[7],resp[8],resp[9]);
2000 if (memcmp(write
+2,resp
,8)) { //if response is not equal to write values
2001 if (blockNo
!= 3 && blockNo
!= 4) { //if not programming key areas (note key blocks don't get programmed with actual key data it is xor data)
2003 isOK
= sendCmdGetResponseWithRetries(write
,sizeof(write
),resp
,sizeof(resp
),10);
2011 void iClass_WriteBlock(uint8_t blockNo
, uint8_t *data
) {
2012 bool isOK
= iClass_WriteBlock_ext(blockNo
, data
);
2014 Dbprintf("Write block [%02x] successful",blockNo
);
2016 Dbprintf("Write block [%02x] failed",blockNo
);
2018 cmd_send(CMD_ACK
,isOK
,0,0,0,0);
2021 void iClass_Clone(uint8_t startblock
, uint8_t endblock
, uint8_t *data
) {
2024 int total_block
= (endblock
- startblock
) + 1;
2025 for (i
= 0; i
< total_block
;i
++){
2027 if (iClass_WriteBlock_ext(i
+startblock
, data
+(i
*12))){
2028 Dbprintf("Write block [%02x] successful",i
+ startblock
);
2031 if (iClass_WriteBlock_ext(i
+startblock
, data
+(i
*12))){
2032 Dbprintf("Write block [%02x] successful",i
+ startblock
);
2035 Dbprintf("Write block [%02x] failed",i
+ startblock
);
2039 if (written
== total_block
)
2040 Dbprintf("Clone complete");
2042 Dbprintf("Clone incomplete");
2044 cmd_send(CMD_ACK
,1,0,0,0,0);
2045 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);