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1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12 #include "iso14443a.h"
13
14 static uint32_t iso14a_timeout;
15 int rsamples = 0;
16 uint8_t trigger = 0;
17 // the block number for the ISO14443-4 PCB
18 static uint8_t iso14_pcb_blocknum = 0;
19
20 static uint8_t* free_buffer_pointer;
21
22 //
23 // ISO14443 timing:
24 //
25 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
26 #define REQUEST_GUARD_TIME (7000/16 + 1)
27 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
28 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
29 // bool LastCommandWasRequest = FALSE;
30
31 //
32 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
33 //
34 // When the PM acts as reader and is receiving tag data, it takes
35 // 3 ticks delay in the AD converter
36 // 16 ticks until the modulation detector completes and sets curbit
37 // 8 ticks until bit_to_arm is assigned from curbit
38 // 8*16 ticks for the transfer from FPGA to ARM
39 // 4*16 ticks until we measure the time
40 // - 8*16 ticks because we measure the time of the previous transfer
41 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
42
43 // When the PM acts as a reader and is sending, it takes
44 // 4*16 ticks until we can write data to the sending hold register
45 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
46 // 8 ticks until the first transfer starts
47 // 8 ticks later the FPGA samples the data
48 // 1 tick to assign mod_sig_coil
49 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
50
51 // When the PM acts as tag and is receiving it takes
52 // 2 ticks delay in the RF part (for the first falling edge),
53 // 3 ticks for the A/D conversion,
54 // 8 ticks on average until the start of the SSC transfer,
55 // 8 ticks until the SSC samples the first data
56 // 7*16 ticks to complete the transfer from FPGA to ARM
57 // 8 ticks until the next ssp_clk rising edge
58 // 4*16 ticks until we measure the time
59 // - 8*16 ticks because we measure the time of the previous transfer
60 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
61
62 // The FPGA will report its internal sending delay in
63 uint16_t FpgaSendQueueDelay;
64 // the 5 first bits are the number of bits buffered in mod_sig_buf
65 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
66 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
67
68 // When the PM acts as tag and is sending, it takes
69 // 4*16 ticks until we can write data to the sending hold register
70 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
71 // 8 ticks until the first transfer starts
72 // 8 ticks later the FPGA samples the data
73 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
74 // + 1 tick to assign mod_sig_coil
75 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
76
77 // When the PM acts as sniffer and is receiving tag data, it takes
78 // 3 ticks A/D conversion
79 // 14 ticks to complete the modulation detection
80 // 8 ticks (on average) until the result is stored in to_arm
81 // + the delays in transferring data - which is the same for
82 // sniffing reader and tag data and therefore not relevant
83 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
84
85 // When the PM acts as sniffer and is receiving reader data, it takes
86 // 2 ticks delay in analogue RF receiver (for the falling edge of the
87 // start bit, which marks the start of the communication)
88 // 3 ticks A/D conversion
89 // 8 ticks on average until the data is stored in to_arm.
90 // + the delays in transferring data - which is the same for
91 // sniffing reader and tag data and therefore not relevant
92 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
93
94 //variables used for timing purposes:
95 //these are in ssp_clk cycles:
96 static uint32_t NextTransferTime;
97 static uint32_t LastTimeProxToAirStart;
98 static uint32_t LastProxToAirDuration;
99
100 // CARD TO READER - manchester
101 // Sequence D: 11110000 modulation with subcarrier during first half
102 // Sequence E: 00001111 modulation with subcarrier during second half
103 // Sequence F: 00000000 no modulation with subcarrier
104 // READER TO CARD - miller
105 // Sequence X: 00001100 drop after half a period
106 // Sequence Y: 00000000 no drop
107 // Sequence Z: 11000000 drop at start
108 #define SEC_D 0xf0
109 #define SEC_E 0x0f
110 #define SEC_F 0x00
111 #define SEC_X 0x0c
112 #define SEC_Y 0x00
113 #define SEC_Z 0xc0
114
115 void iso14a_set_trigger(bool enable) {
116 trigger = enable;
117 }
118
119 void iso14a_set_timeout(uint32_t timeout) {
120 iso14a_timeout = timeout;
121 if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106);
122 }
123
124 void iso14a_set_ATS_timeout(uint8_t *ats) {
125 uint8_t tb1;
126 uint8_t fwi;
127 uint32_t fwt;
128
129 if (ats[0] > 1) { // there is a format byte T0
130 if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
131
132 if ((ats[1] & 0x10) == 0x10) // there is an interface byte TA(1) preceding TB(1)
133 tb1 = ats[3];
134 else
135 tb1 = ats[2];
136
137 fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI)
138 fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc
139 //fwt = 4096 * (1 << fwi);
140
141 iso14a_set_timeout(fwt/(8*16));
142 //iso14a_set_timeout(fwt/128);
143 }
144 }
145 }
146
147 //-----------------------------------------------------------------------------
148 // Generate the parity value for a byte sequence
149 //
150 //-----------------------------------------------------------------------------
151 void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par) {
152 uint16_t paritybit_cnt = 0;
153 uint16_t paritybyte_cnt = 0;
154 uint8_t parityBits = 0;
155
156 for (uint16_t i = 0; i < iLen; i++) {
157 // Generate the parity bits
158 parityBits |= ((oddparity8(pbtCmd[i])) << (7-paritybit_cnt));
159 if (paritybit_cnt == 7) {
160 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
161 parityBits = 0; // and advance to next Parity Byte
162 paritybyte_cnt++;
163 paritybit_cnt = 0;
164 } else {
165 paritybit_cnt++;
166 }
167 }
168
169 // save remaining parity bits
170 par[paritybyte_cnt] = parityBits;
171 }
172
173 void AppendCrc14443a(uint8_t* data, int len) {
174 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
175 }
176
177 //=============================================================================
178 // ISO 14443 Type A - Miller decoder
179 //=============================================================================
180 // Basics:
181 // This decoder is used when the PM3 acts as a tag.
182 // The reader will generate "pauses" by temporarily switching of the field.
183 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
184 // The FPGA does a comparison with a threshold and would deliver e.g.:
185 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
186 // The Miller decoder needs to identify the following sequences:
187 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
188 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
189 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
190 // Note 1: the bitstream may start at any time. We therefore need to sync.
191 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
192 //-----------------------------------------------------------------------------
193 static tUart Uart;
194
195 // Lookup-Table to decide if 4 raw bits are a modulation.
196 // We accept the following:
197 // 0001 - a 3 tick wide pause
198 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
199 // 0111 - a 2 tick wide pause shifted left
200 // 1001 - a 2 tick wide pause shifted right
201 const bool Mod_Miller_LUT[] = {
202 FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE,
203 FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE
204 };
205 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
206 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
207
208 void UartReset() {
209 Uart.state = STATE_UNSYNCD;
210 Uart.bitCount = 0;
211 Uart.len = 0; // number of decoded data bytes
212 Uart.parityLen = 0; // number of decoded parity bytes
213 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
214 Uart.parityBits = 0; // holds 8 parity bits
215 Uart.startTime = 0;
216 Uart.endTime = 0;
217
218 Uart.byteCntMax = 0;
219 Uart.posCnt = 0;
220 Uart.syncBit = 9999;
221 }
222
223 void UartInit(uint8_t *data, uint8_t *parity) {
224 Uart.output = data;
225 Uart.parity = parity;
226 Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits
227 UartReset();
228 }
229
230 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
231 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) {
232 Uart.fourBits = (Uart.fourBits << 8) | bit;
233
234 if (Uart.state == STATE_UNSYNCD) { // not yet synced
235 Uart.syncBit = 9999; // not set
236
237 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
238 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
239 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
240
241 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
242 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
243 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
244 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
245 //
246 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
247 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
248
249 if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7;
250 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6;
251 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5;
252 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4;
253 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3;
254 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2;
255 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1;
256 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0;
257
258 if (Uart.syncBit != 9999) { // found a sync bit
259 Uart.startTime = non_real_time ? non_real_time : (GetCountSspClk() & 0xfffffff8);
260 Uart.startTime -= Uart.syncBit;
261 Uart.endTime = Uart.startTime;
262 Uart.state = STATE_START_OF_COMMUNICATION;
263 }
264 } else {
265
266 if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) {
267 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error
268 UartReset();
269 } else { // Modulation in first half = Sequence Z = logic "0"
270 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
271 UartReset();
272 } else {
273 Uart.bitCount++;
274 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
275 Uart.state = STATE_MILLER_Z;
276 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
277 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
278 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
279 Uart.parityBits <<= 1; // make room for the parity bit
280 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
281 Uart.bitCount = 0;
282 Uart.shiftReg = 0;
283 if((Uart.len&0x0007) == 0) { // every 8 data bytes
284 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
285 Uart.parityBits = 0;
286 }
287 }
288 }
289 }
290 } else {
291 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
292 Uart.bitCount++;
293 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
294 Uart.state = STATE_MILLER_X;
295 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
296 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
297 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
298 Uart.parityBits <<= 1; // make room for the new parity bit
299 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
300 Uart.bitCount = 0;
301 Uart.shiftReg = 0;
302 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
303 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
304 Uart.parityBits = 0;
305 }
306 }
307 } else { // no modulation in both halves - Sequence Y
308 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
309 Uart.state = STATE_UNSYNCD;
310 Uart.bitCount--; // last "0" was part of EOC sequence
311 Uart.shiftReg <<= 1; // drop it
312 if(Uart.bitCount > 0) { // if we decoded some bits
313 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
314 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
315 Uart.parityBits <<= 1; // add a (void) parity bit
316 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits
317 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
318 return TRUE;
319 } else if (Uart.len & 0x0007) { // there are some parity bits to store
320 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits
321 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
322 }
323 if (Uart.len) {
324 return TRUE; // we are finished with decoding the raw data sequence
325 } else {
326 UartReset(); // Nothing received - start over
327 }
328 }
329 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
330 UartReset();
331 } else { // a logic "0"
332 Uart.bitCount++;
333 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
334 Uart.state = STATE_MILLER_Y;
335 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
336 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
337 Uart.parityBits <<= 1; // make room for the parity bit
338 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
339 Uart.bitCount = 0;
340 Uart.shiftReg = 0;
341 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
342 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
343 Uart.parityBits = 0;
344 }
345 }
346 }
347 }
348 }
349 }
350 return FALSE; // not finished yet, need more data
351 }
352
353 //=============================================================================
354 // ISO 14443 Type A - Manchester decoder
355 //=============================================================================
356 // Basics:
357 // This decoder is used when the PM3 acts as a reader.
358 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
359 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
360 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
361 // The Manchester decoder needs to identify the following sequences:
362 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
363 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
364 // 8 ticks unmodulated: Sequence F = end of communication
365 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
366 // Note 1: the bitstream may start at any time. We therefore need to sync.
367 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
368 static tDemod Demod;
369
370 // Lookup-Table to decide if 4 raw bits are a modulation.
371 // We accept three or four "1" in any position
372 const bool Mod_Manchester_LUT[] = {
373 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
374 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
375 };
376
377 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
378 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
379
380 void DemodReset() {
381 Demod.state = DEMOD_UNSYNCD;
382 Demod.len = 0; // number of decoded data bytes
383 Demod.parityLen = 0;
384 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
385 Demod.parityBits = 0; //
386 Demod.collisionPos = 0; // Position of collision bit
387 Demod.twoBits = 0xffff; // buffer for 2 Bits
388 Demod.highCnt = 0;
389 Demod.startTime = 0;
390 Demod.endTime = 0;
391 Demod.bitCount = 0;
392 Demod.syncBit = 0xFFFF;
393 Demod.samples = 0;
394 }
395
396 void DemodInit(uint8_t *data, uint8_t *parity) {
397 Demod.output = data;
398 Demod.parity = parity;
399 DemodReset();
400 }
401
402 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
403 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time) {
404 Demod.twoBits = (Demod.twoBits << 8) | bit;
405
406 if (Demod.state == DEMOD_UNSYNCD) {
407
408 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
409 if (Demod.twoBits == 0x0000) {
410 Demod.highCnt++;
411 } else {
412 Demod.highCnt = 0;
413 }
414 } else {
415 Demod.syncBit = 0xFFFF; // not set
416 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
417 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
418 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
419 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
420 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
421 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
422 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
423 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
424 if (Demod.syncBit != 0xFFFF) {
425 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
426 Demod.startTime -= Demod.syncBit;
427 Demod.bitCount = offset; // number of decoded data bits
428 Demod.state = DEMOD_MANCHESTER_DATA;
429 }
430 }
431 } else {
432
433 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
434 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
435 if (!Demod.collisionPos) {
436 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
437 }
438 } // modulation in first half only - Sequence D = 1
439 Demod.bitCount++;
440 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
441 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
442 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
443 Demod.parityBits <<= 1; // make room for the parity bit
444 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
445 Demod.bitCount = 0;
446 Demod.shiftReg = 0;
447 if((Demod.len&0x0007) == 0) { // every 8 data bytes
448 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
449 Demod.parityBits = 0;
450 }
451 }
452 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
453 } else { // no modulation in first half
454 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
455 Demod.bitCount++;
456 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
457 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
458 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
459 Demod.parityBits <<= 1; // make room for the new parity bit
460 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
461 Demod.bitCount = 0;
462 Demod.shiftReg = 0;
463 if ((Demod.len&0x0007) == 0) { // every 8 data bytes
464 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
465 Demod.parityBits = 0;
466 }
467 }
468 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
469 } else { // no modulation in both halves - End of communication
470 if(Demod.bitCount > 0) { // there are some remaining data bits
471 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
472 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
473 Demod.parityBits <<= 1; // add a (void) parity bit
474 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
475 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
476 return TRUE;
477 } else if (Demod.len & 0x0007) { // there are some parity bits to store
478 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
479 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
480 }
481 if (Demod.len) {
482 return TRUE; // we are finished with decoding the raw data sequence
483 } else { // nothing received. Start over
484 DemodReset();
485 }
486 }
487 }
488 }
489 return FALSE; // not finished yet, need more data
490 }
491
492 //=============================================================================
493 // Finally, a `sniffer' for ISO 14443 Type A
494 // Both sides of communication!
495 //=============================================================================
496
497 //-----------------------------------------------------------------------------
498 // Record the sequence of commands sent by the reader to the tag, with
499 // triggering so that we start recording at the point that the tag is moved
500 // near the reader.
501 // "hf 14a sniff"
502 //-----------------------------------------------------------------------------
503 void RAMFUNC SniffIso14443a(uint8_t param) {
504 // param:
505 // bit 0 - trigger from first card answer
506 // bit 1 - trigger from first reader 7-bit request
507 LEDsoff();
508
509 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
510
511 // Allocate memory from BigBuf for some buffers
512 // free all previous allocations first
513 BigBuf_free(); BigBuf_Clear_ext(false);
514 clear_trace();
515 set_tracing(TRUE);
516
517 // The command (reader -> tag) that we're receiving.
518 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
519 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
520
521 // The response (tag -> reader) that we're receiving.
522 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
523 uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE);
524
525 // The DMA buffer, used to stream samples from the FPGA
526 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
527
528 uint8_t *data = dmaBuf;
529 uint8_t previous_data = 0;
530 int maxDataLen = 0;
531 int dataLen = 0;
532 bool TagIsActive = FALSE;
533 bool ReaderIsActive = FALSE;
534
535 // Set up the demodulator for tag -> reader responses.
536 DemodInit(receivedResponse, receivedResponsePar);
537
538 // Set up the demodulator for the reader -> tag commands
539 UartInit(receivedCmd, receivedCmdPar);
540
541 // Setup and start DMA.
542 if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE) ){
543 if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
544 return;
545 }
546
547 // We won't start recording the frames that we acquire until we trigger;
548 // a good trigger condition to get started is probably when we see a
549 // response from the tag.
550 // triggered == FALSE -- to wait first for card
551 bool triggered = !(param & 0x03);
552
553 // And now we loop, receiving samples.
554 for(uint32_t rsamples = 0; TRUE; ) {
555
556 if(BUTTON_PRESS()) {
557 DbpString("cancelled by button");
558 break;
559 }
560
561 LED_A_ON();
562 WDT_HIT();
563
564 int register readBufDataP = data - dmaBuf;
565 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
566 if (readBufDataP <= dmaBufDataP){
567 dataLen = dmaBufDataP - readBufDataP;
568 } else {
569 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
570 }
571 // test for length of buffer
572 if(dataLen > maxDataLen) {
573 maxDataLen = dataLen;
574 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
575 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
576 break;
577 }
578 }
579 if(dataLen < 1) continue;
580
581 // primary buffer was stopped( <-- we lost data!
582 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
583 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
584 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
585 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
586 }
587 // secondary buffer sets as primary, secondary buffer was stopped
588 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
589 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
590 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
591 }
592
593 LED_A_OFF();
594
595 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
596
597 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
598 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
599 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
600 LED_C_ON();
601
602 // check - if there is a short 7bit request from reader
603 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
604
605 if(triggered) {
606 if (!LogTrace(receivedCmd,
607 Uart.len,
608 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
609 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
610 Uart.parity,
611 TRUE)) break;
612 }
613 /* And ready to receive another command. */
614 UartReset();
615 /* And also reset the demod code, which might have been */
616 /* false-triggered by the commands from the reader. */
617 DemodReset();
618 LED_B_OFF();
619 }
620 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
621 }
622
623 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
624 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
625 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
626 LED_B_ON();
627
628 if (!LogTrace(receivedResponse,
629 Demod.len,
630 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
631 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
632 Demod.parity,
633 FALSE)) break;
634
635 if ((!triggered) && (param & 0x01)) triggered = TRUE;
636
637 // And ready to receive another response.
638 DemodReset();
639 // And reset the Miller decoder including itS (now outdated) input buffer
640 UartInit(receivedCmd, receivedCmdPar);
641 LED_C_OFF();
642 }
643 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
644 }
645 }
646
647 previous_data = *data;
648 rsamples++;
649 data++;
650 if(data == dmaBuf + DMA_BUFFER_SIZE) {
651 data = dmaBuf;
652 }
653 } // main cycle
654
655 if (MF_DBGLEVEL >= 1) {
656 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
657 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]);
658 }
659 FpgaDisableSscDma();
660 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
661 LEDsoff();
662 set_tracing(FALSE);
663 }
664
665 //-----------------------------------------------------------------------------
666 // Prepare tag messages
667 //-----------------------------------------------------------------------------
668 static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity) {
669 ToSendReset();
670
671 // Correction bit, might be removed when not needed
672 ToSendStuffBit(0);
673 ToSendStuffBit(0);
674 ToSendStuffBit(0);
675 ToSendStuffBit(0);
676 ToSendStuffBit(1); // 1
677 ToSendStuffBit(0);
678 ToSendStuffBit(0);
679 ToSendStuffBit(0);
680
681 // Send startbit
682 ToSend[++ToSendMax] = SEC_D;
683 LastProxToAirDuration = 8 * ToSendMax - 4;
684
685 for(uint16_t i = 0; i < len; i++) {
686 uint8_t b = cmd[i];
687
688 // Data bits
689 for(uint16_t j = 0; j < 8; j++) {
690 if(b & 1) {
691 ToSend[++ToSendMax] = SEC_D;
692 } else {
693 ToSend[++ToSendMax] = SEC_E;
694 }
695 b >>= 1;
696 }
697
698 // Get the parity bit
699 if (parity[i>>3] & (0x80>>(i&0x0007))) {
700 ToSend[++ToSendMax] = SEC_D;
701 LastProxToAirDuration = 8 * ToSendMax - 4;
702 } else {
703 ToSend[++ToSendMax] = SEC_E;
704 LastProxToAirDuration = 8 * ToSendMax;
705 }
706 }
707
708 // Send stopbit
709 ToSend[++ToSendMax] = SEC_F;
710
711 // Convert from last byte pos to length
712 ++ToSendMax;
713 }
714
715 static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len) {
716 uint8_t par[MAX_PARITY_SIZE] = {0};
717 GetParity(cmd, len, par);
718 CodeIso14443aAsTagPar(cmd, len, par);
719 }
720
721 static void Code4bitAnswerAsTag(uint8_t cmd) {
722 uint8_t b = cmd;
723
724 ToSendReset();
725
726 // Correction bit, might be removed when not needed
727 ToSendStuffBit(0);
728 ToSendStuffBit(0);
729 ToSendStuffBit(0);
730 ToSendStuffBit(0);
731 ToSendStuffBit(1); // 1
732 ToSendStuffBit(0);
733 ToSendStuffBit(0);
734 ToSendStuffBit(0);
735
736 // Send startbit
737 ToSend[++ToSendMax] = SEC_D;
738
739 for(uint8_t i = 0; i < 4; i++) {
740 if(b & 1) {
741 ToSend[++ToSendMax] = SEC_D;
742 LastProxToAirDuration = 8 * ToSendMax - 4;
743 } else {
744 ToSend[++ToSendMax] = SEC_E;
745 LastProxToAirDuration = 8 * ToSendMax;
746 }
747 b >>= 1;
748 }
749
750 // Send stopbit
751 ToSend[++ToSendMax] = SEC_F;
752
753 // Convert from last byte pos to length
754 ToSendMax++;
755 }
756
757 //-----------------------------------------------------------------------------
758 // Wait for commands from reader
759 // Stop when button is pressed
760 // Or return TRUE when command is captured
761 //-----------------------------------------------------------------------------
762 static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len) {
763 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
764 // only, since we are receiving, not transmitting).
765 // Signal field is off with the appropriate LED
766 LED_D_OFF();
767 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
768
769 // Now run a `software UART` on the stream of incoming samples.
770 UartInit(received, parity);
771
772 // clear RXRDY:
773 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
774
775 for(;;) {
776 WDT_HIT();
777
778 if(BUTTON_PRESS()) return FALSE;
779
780 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
781 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
782 if(MillerDecoding(b, 0)) {
783 *len = Uart.len;
784 return TRUE;
785 }
786 }
787 }
788 }
789
790 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
791 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
792 // This will need the following byte array for a modulation sequence
793 // 144 data bits (18 * 8)
794 // 18 parity bits
795 // 2 Start and stop
796 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
797 // 1 just for the case
798 // ----------- +
799 // 166 bytes, since every bit that needs to be send costs us a byte
800 //
801 // Prepare the tag modulation bits from the message
802 CodeIso14443aAsTag(response_info->response,response_info->response_n);
803
804 // Make sure we do not exceed the free buffer space
805 if (ToSendMax > max_buffer_size) {
806 Dbprintf("Out of memory, when modulating bits for tag answer:");
807 Dbhexdump(response_info->response_n,response_info->response,false);
808 return FALSE;
809 }
810
811 // Copy the byte array, used for this modulation to the buffer position
812 memcpy(response_info->modulation,ToSend,ToSendMax);
813
814 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
815 response_info->modulation_n = ToSendMax;
816 response_info->ProxToAirDuration = LastProxToAirDuration;
817 return TRUE;
818 }
819
820 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
821 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
822 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
823 // -> need 273 bytes buffer
824 // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370
825 // 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits
826 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453
827
828 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
829 // Retrieve and store the current buffer index
830 response_info->modulation = free_buffer_pointer;
831
832 // Determine the maximum size we can use from our buffer
833 size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE;
834
835 // Forward the prepare tag modulation function to the inner function
836 if (prepare_tag_modulation(response_info, max_buffer_size)) {
837 // Update the free buffer offset
838 free_buffer_pointer += ToSendMax;
839 return true;
840 } else {
841 return false;
842 }
843 }
844
845 //-----------------------------------------------------------------------------
846 // Main loop of simulated tag: receive commands from reader, decide what
847 // response to send, and send it.
848 // 'hf 14a sim'
849 //-----------------------------------------------------------------------------
850 void SimulateIso14443aTag(int tagType, int flags, byte_t* data) {
851
852 uint8_t sak = 0;
853 uint32_t cuid = 0;
854 uint32_t nonce = 0;
855
856 // PACK response to PWD AUTH for EV1/NTAG
857 uint8_t response8[4] = {0,0,0,0};
858 // Counter for EV1/NTAG
859 uint32_t counters[] = {0,0,0};
860
861 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
862 uint8_t response1[] = {0,0};
863
864 // Here, we collect CUID, block1, keytype1, NT1, NR1, AR1, CUID, block2, keytyp2, NT2, NR2, AR2
865 // it should also collect block, keytype.
866 uint8_t cardAUTHSC = 0;
867 uint8_t cardAUTHKEY = 0xff; // no authentication
868 // allow collecting up to 8 sets of nonces to allow recovery of up to 8 keys
869 #define ATTACK_KEY_COUNT 8 // keep same as define in cmdhfmf.c -> readerAttack()
870 nonces_t ar_nr_resp[ATTACK_KEY_COUNT*2]; // for 2 separate attack types (nml, moebius)
871 memset(ar_nr_resp, 0x00, sizeof(ar_nr_resp));
872
873 uint8_t ar_nr_collected[ATTACK_KEY_COUNT*2]; // for 2nd attack type (moebius)
874 memset(ar_nr_collected, 0x00, sizeof(ar_nr_collected));
875 uint8_t nonce1_count = 0;
876 uint8_t nonce2_count = 0;
877 uint8_t moebius_n_count = 0;
878 bool gettingMoebius = false;
879 uint8_t mM = 0; // moebius_modifier for collection storage
880
881
882 switch (tagType) {
883 case 1: { // MIFARE Classic 1k
884 response1[0] = 0x04;
885 sak = 0x08;
886 } break;
887 case 2: { // MIFARE Ultralight
888 response1[0] = 0x44;
889 sak = 0x00;
890 } break;
891 case 3: { // MIFARE DESFire
892 response1[0] = 0x04;
893 response1[1] = 0x03;
894 sak = 0x20;
895 } break;
896 case 4: { // ISO/IEC 14443-4 - javacard (JCOP)
897 response1[0] = 0x04;
898 sak = 0x28;
899 } break;
900 case 5: { // MIFARE TNP3XXX
901 response1[0] = 0x01;
902 response1[1] = 0x0f;
903 sak = 0x01;
904 } break;
905 case 6: { // MIFARE Mini 320b
906 response1[0] = 0x44;
907 sak = 0x09;
908 } break;
909 case 7: { // NTAG
910 response1[0] = 0x44;
911 sak = 0x00;
912 // PACK
913 response8[0] = 0x80;
914 response8[1] = 0x80;
915 ComputeCrc14443(CRC_14443_A, response8, 2, &response8[2], &response8[3]);
916 // uid not supplied then get from emulator memory
917 if (data[0]==0) {
918 uint16_t start = 4 * (0+12);
919 uint8_t emdata[8];
920 emlGetMemBt( emdata, start, sizeof(emdata));
921 memcpy(data, emdata, 3); // uid bytes 0-2
922 memcpy(data+3, emdata+4, 4); // uid bytes 3-7
923 flags |= FLAG_7B_UID_IN_DATA;
924 }
925 } break;
926 default: {
927 Dbprintf("Error: unkown tagtype (%d)",tagType);
928 return;
929 } break;
930 }
931
932 // The second response contains the (mandatory) first 24 bits of the UID
933 uint8_t response2[5] = {0x00};
934
935 // For UID size 7,
936 uint8_t response2a[5] = {0x00};
937
938 if ( (flags & FLAG_7B_UID_IN_DATA) == FLAG_7B_UID_IN_DATA ) {
939 response2[0] = 0x88; // Cascade Tag marker
940 response2[1] = data[0];
941 response2[2] = data[1];
942 response2[3] = data[2];
943
944 response2a[0] = data[3];
945 response2a[1] = data[4];
946 response2a[2] = data[5];
947 response2a[3] = data[6]; //??
948 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
949
950 // Configure the ATQA and SAK accordingly
951 response1[0] |= 0x40;
952 sak |= 0x04;
953
954 cuid = bytes_to_num(data+3, 4);
955 } else {
956 memcpy(response2, data, 4);
957 // Configure the ATQA and SAK accordingly
958 response1[0] &= 0xBF;
959 sak &= 0xFB;
960 cuid = bytes_to_num(data, 4);
961 }
962
963 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
964 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
965
966 // Prepare the mandatory SAK (for 4 and 7 byte UID)
967 uint8_t response3[3] = {sak, 0x00, 0x00};
968 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
969
970 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
971 uint8_t response3a[3] = {0x00};
972 response3a[0] = sak & 0xFB;
973 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
974
975 uint8_t response5[] = { 0x01, 0x01, 0x01, 0x01 }; // Very random tag nonce
976 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
977 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
978 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
979 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
980 // TC(1) = 0x02: CID supported, NAD not supported
981 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
982
983 // the randon nonce
984 nonce = bytes_to_num(response5, 4);
985
986 // Prepare GET_VERSION (different for UL EV-1 / NTAG)
987 // uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
988 // uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
989 // Prepare CHK_TEARING
990 // uint8_t response9[] = {0xBD,0x90,0x3f};
991
992 #define TAG_RESPONSE_COUNT 10
993 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
994 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
995 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
996 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
997 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
998 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
999 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1000 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1001
1002 { .response = response8, .response_n = sizeof(response8) } // EV1/NTAG PACK response
1003 };
1004 // { .response = response7_NTAG, .response_n = sizeof(response7_NTAG)}, // EV1/NTAG GET_VERSION response
1005 // { .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response
1006
1007
1008 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1009 // Such a response is less time critical, so we can prepare them on the fly
1010 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1011 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1012 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1013 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1014 tag_response_info_t dynamic_response_info = {
1015 .response = dynamic_response_buffer,
1016 .response_n = 0,
1017 .modulation = dynamic_modulation_buffer,
1018 .modulation_n = 0
1019 };
1020
1021 // We need to listen to the high-frequency, peak-detected path.
1022 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1023
1024 BigBuf_free_keep_EM();
1025 clear_trace();
1026 set_tracing(TRUE);
1027
1028 // allocate buffers:
1029 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1030 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
1031 free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE);
1032
1033 // Prepare the responses of the anticollision phase
1034 // there will be not enough time to do this at the moment the reader sends it REQA
1035 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++)
1036 prepare_allocated_tag_modulation(&responses[i]);
1037
1038 int len = 0;
1039
1040 // To control where we are in the protocol
1041 int order = 0;
1042 int lastorder;
1043
1044 // Just to allow some checks
1045 int happened = 0;
1046 int happened2 = 0;
1047 int cmdsRecvd = 0;
1048 tag_response_info_t* p_response;
1049
1050 LED_A_ON();
1051 for(;;) {
1052 WDT_HIT();
1053
1054 // Clean receive command buffer
1055 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1056 DbpString("Button press");
1057 break;
1058 }
1059
1060 // incease nonce at every command recieved
1061 nonce++;
1062 num_to_bytes(nonce, 4, response5);
1063
1064 p_response = NULL;
1065
1066 // Okay, look at the command now.
1067 lastorder = order;
1068 if(receivedCmd[0] == ISO14443A_CMD_REQA) { // Received a REQUEST
1069 p_response = &responses[0]; order = 1;
1070 } else if(receivedCmd[0] == ISO14443A_CMD_WUPA) { // Received a WAKEUP
1071 p_response = &responses[0]; order = 6;
1072 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT) { // Received request for UID (cascade 1)
1073 p_response = &responses[1]; order = 2;
1074 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2) { // Received request for UID (cascade 2)
1075 p_response = &responses[2]; order = 20;
1076 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT) { // Received a SELECT (cascade 1)
1077 p_response = &responses[3]; order = 3;
1078 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2) { // Received a SELECT (cascade 2)
1079 p_response = &responses[4]; order = 30;
1080 } else if(receivedCmd[0] == ISO14443A_CMD_READBLOCK) { // Received a (plain) READ
1081 uint8_t block = receivedCmd[1];
1082 // if Ultralight or NTAG (4 byte blocks)
1083 if ( tagType == 7 || tagType == 2 ) {
1084 // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1085 uint16_t start = 4 * (block+12);
1086 uint8_t emdata[MAX_MIFARE_FRAME_SIZE];
1087 emlGetMemBt( emdata, start, 16);
1088 AppendCrc14443a(emdata, 16);
1089 EmSendCmdEx(emdata, sizeof(emdata), false);
1090 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1091 p_response = NULL;
1092 } else { // all other tags (16 byte block tags)
1093 uint8_t emdata[MAX_MIFARE_FRAME_SIZE];
1094 emlGetMemBt( emdata, block, 16);
1095 AppendCrc14443a(emdata, 16);
1096 EmSendCmdEx(emdata, sizeof(emdata), false);
1097 // EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
1098 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1099 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1100 p_response = NULL;
1101 }
1102 } else if(receivedCmd[0] == MIFARE_ULEV1_FASTREAD) { // Received a FAST READ (ranged read)
1103 uint8_t emdata[MAX_FRAME_SIZE];
1104 // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1105 int start = (receivedCmd[1]+12) * 4;
1106 int len = (receivedCmd[2] - receivedCmd[1] + 1) * 4;
1107 emlGetMemBt( emdata, start, len);
1108 AppendCrc14443a(emdata, len);
1109 EmSendCmdEx(emdata, len+2, false);
1110 p_response = NULL;
1111 } else if(receivedCmd[0] == MIFARE_ULEV1_READSIG && tagType == 7) { // Received a READ SIGNATURE --
1112 // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1113 uint16_t start = 4 * 4;
1114 uint8_t emdata[34];
1115 emlGetMemBt( emdata, start, 32);
1116 AppendCrc14443a(emdata, 32);
1117 EmSendCmdEx(emdata, sizeof(emdata), false);
1118 p_response = NULL;
1119 } else if (receivedCmd[0] == MIFARE_ULEV1_READ_CNT && tagType == 7) { // Received a READ COUNTER --
1120 uint8_t index = receivedCmd[1];
1121 uint8_t data[] = {0x00,0x00,0x00,0x14,0xa5};
1122 if ( counters[index] > 0) {
1123 num_to_bytes(counters[index], 3, data);
1124 AppendCrc14443a(data, sizeof(data)-2);
1125 }
1126 EmSendCmdEx(data,sizeof(data),false);
1127 p_response = NULL;
1128 } else if (receivedCmd[0] == MIFARE_ULEV1_INCR_CNT && tagType == 7) { // Received a INC COUNTER --
1129 // number of counter
1130 uint8_t counter = receivedCmd[1];
1131 uint32_t val = bytes_to_num(receivedCmd+2,4);
1132 counters[counter] = val;
1133
1134 // send ACK
1135 uint8_t ack[] = {0x0a};
1136 EmSendCmdEx(ack,sizeof(ack),false);
1137 p_response = NULL;
1138 } else if(receivedCmd[0] == MIFARE_ULEV1_CHECKTEAR && tagType == 7) { // Received a CHECK_TEARING_EVENT --
1139 // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1140 uint8_t emdata[3];
1141 uint8_t counter=0;
1142 if (receivedCmd[1]<3) counter = receivedCmd[1];
1143 emlGetMemBt( emdata, 10+counter, 1);
1144 AppendCrc14443a(emdata, sizeof(emdata)-2);
1145 EmSendCmdEx(emdata, sizeof(emdata), false);
1146 p_response = NULL;
1147 } else if(receivedCmd[0] == ISO14443A_CMD_HALT) { // Received a HALT
1148 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1149 p_response = NULL;
1150 } else if(receivedCmd[0] == MIFARE_AUTH_KEYA || receivedCmd[0] == MIFARE_AUTH_KEYB) { // Received an authentication request
1151 if ( tagType == 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
1152 uint8_t emdata[10];
1153 emlGetMemBt( emdata, 0, 8 );
1154 AppendCrc14443a(emdata, sizeof(emdata)-2);
1155 EmSendCmdEx(emdata, sizeof(emdata), false);
1156 p_response = NULL;
1157 } else {
1158 cardAUTHSC = receivedCmd[1] / 4; // received block num
1159 cardAUTHKEY = receivedCmd[0] - 0x60;
1160 p_response = &responses[5]; order = 7;
1161 }
1162 } else if(receivedCmd[0] == ISO14443A_CMD_RATS) { // Received a RATS request
1163 if (tagType == 1 || tagType == 2) { // RATS not supported
1164 EmSend4bit(CARD_NACK_NA);
1165 p_response = NULL;
1166 } else {
1167 p_response = &responses[6]; order = 70;
1168 }
1169 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1170 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1171 uint32_t nr = bytes_to_num(receivedCmd,4);
1172 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1173
1174 // Collect AR/NR per keytype & sector
1175 if ( (flags & FLAG_NR_AR_ATTACK) == FLAG_NR_AR_ATTACK ) {
1176 for (uint8_t i = 0; i < ATTACK_KEY_COUNT; i++) {
1177 if ( ar_nr_collected[i+mM]==0 || ((cardAUTHSC == ar_nr_resp[i+mM].sector) && (cardAUTHKEY == ar_nr_resp[i+mM].keytype) && (ar_nr_collected[i+mM] > 0)) ) {
1178 // if first auth for sector, or matches sector and keytype of previous auth
1179 if (ar_nr_collected[i+mM] < 2) {
1180 // if we haven't already collected 2 nonces for this sector
1181 if (ar_nr_resp[ar_nr_collected[i+mM]].ar != ar) {
1182 // Avoid duplicates... probably not necessary, ar should vary.
1183 if (ar_nr_collected[i+mM]==0) {
1184 // first nonce collect
1185 ar_nr_resp[i+mM].cuid = cuid;
1186 ar_nr_resp[i+mM].sector = cardAUTHSC;
1187 ar_nr_resp[i+mM].keytype = cardAUTHKEY;
1188 ar_nr_resp[i+mM].nonce = nonce;
1189 ar_nr_resp[i+mM].nr = nr;
1190 ar_nr_resp[i+mM].ar = ar;
1191 nonce1_count++;
1192 // add this nonce to first moebius nonce
1193 ar_nr_resp[i+ATTACK_KEY_COUNT].cuid = cuid;
1194 ar_nr_resp[i+ATTACK_KEY_COUNT].sector = cardAUTHSC;
1195 ar_nr_resp[i+ATTACK_KEY_COUNT].keytype = cardAUTHKEY;
1196 ar_nr_resp[i+ATTACK_KEY_COUNT].nonce = nonce;
1197 ar_nr_resp[i+ATTACK_KEY_COUNT].nr = nr;
1198 ar_nr_resp[i+ATTACK_KEY_COUNT].ar = ar;
1199 ar_nr_collected[i+ATTACK_KEY_COUNT]++;
1200 } else { // second nonce collect (std and moebius)
1201 ar_nr_resp[i+mM].nonce2 = nonce;
1202 ar_nr_resp[i+mM].nr2 = nr;
1203 ar_nr_resp[i+mM].ar2 = ar;
1204 if (!gettingMoebius) {
1205 nonce2_count++;
1206 // check if this was the last second nonce we need for std attack
1207 if ( nonce2_count == nonce1_count ) {
1208 // done collecting std test switch to moebius
1209 // first finish incrementing last sample
1210 ar_nr_collected[i+mM]++;
1211 // switch to moebius collection
1212 gettingMoebius = true;
1213 mM = ATTACK_KEY_COUNT;
1214 break;
1215 }
1216 } else {
1217 moebius_n_count++;
1218 // if we've collected all the nonces we need - finish.
1219 if (nonce1_count == moebius_n_count) {
1220 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_resp,sizeof(ar_nr_resp));
1221 nonce1_count = 0;
1222 nonce2_count = 0;
1223 moebius_n_count = 0;
1224 gettingMoebius = false;
1225 }
1226 }
1227 }
1228 ar_nr_collected[i+mM]++;
1229 }
1230 }
1231 // we found right spot for this nonce stop looking
1232 break;
1233 }
1234 }
1235 }
1236
1237 } else if (receivedCmd[0] == MIFARE_ULC_AUTH_1 ) { // ULC authentication, or Desfire Authentication
1238 } else if (receivedCmd[0] == MIFARE_ULEV1_AUTH) { // NTAG / EV-1 authentication
1239 if ( tagType == 7 ) {
1240 uint16_t start = 13; // first 4 blocks of emu are [getversion answer - check tearing - pack - 0x00]
1241 uint8_t emdata[4];
1242 emlGetMemBt( emdata, start, 2);
1243 AppendCrc14443a(emdata, 2);
1244 EmSendCmdEx(emdata, sizeof(emdata), false);
1245 p_response = NULL;
1246 uint32_t pwd = bytes_to_num(receivedCmd+1,4);
1247
1248 if ( MF_DBGLEVEL >= 3) Dbprintf("Auth attempt: %08x", pwd);
1249 }
1250 } else {
1251 // Check for ISO 14443A-4 compliant commands, look at left nibble
1252 switch (receivedCmd[0]) {
1253 case 0x02:
1254 case 0x03: { // IBlock (command no CID)
1255 dynamic_response_info.response[0] = receivedCmd[0];
1256 dynamic_response_info.response[1] = 0x90;
1257 dynamic_response_info.response[2] = 0x00;
1258 dynamic_response_info.response_n = 3;
1259 } break;
1260 case 0x0B:
1261 case 0x0A: { // IBlock (command CID)
1262 dynamic_response_info.response[0] = receivedCmd[0];
1263 dynamic_response_info.response[1] = 0x00;
1264 dynamic_response_info.response[2] = 0x90;
1265 dynamic_response_info.response[3] = 0x00;
1266 dynamic_response_info.response_n = 4;
1267 } break;
1268
1269 case 0x1A:
1270 case 0x1B: { // Chaining command
1271 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1272 dynamic_response_info.response_n = 2;
1273 } break;
1274
1275 case 0xaa:
1276 case 0xbb: {
1277 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1278 dynamic_response_info.response_n = 2;
1279 } break;
1280
1281 case 0xBA: { // ping / pong
1282 dynamic_response_info.response[0] = 0xAB;
1283 dynamic_response_info.response[1] = 0x00;
1284 dynamic_response_info.response_n = 2;
1285 } break;
1286
1287 case 0xCA:
1288 case 0xC2: { // Readers sends deselect command
1289 dynamic_response_info.response[0] = 0xCA;
1290 dynamic_response_info.response[1] = 0x00;
1291 dynamic_response_info.response_n = 2;
1292 } break;
1293
1294 default: {
1295 // Never seen this command before
1296 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1297 Dbprintf("Received unknown command (len=%d):",len);
1298 Dbhexdump(len,receivedCmd,false);
1299 // Do not respond
1300 dynamic_response_info.response_n = 0;
1301 } break;
1302 }
1303
1304 if (dynamic_response_info.response_n > 0) {
1305 // Copy the CID from the reader query
1306 dynamic_response_info.response[1] = receivedCmd[1];
1307
1308 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1309 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1310 dynamic_response_info.response_n += 2;
1311
1312 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1313 Dbprintf("Error preparing tag response");
1314 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1315 break;
1316 }
1317 p_response = &dynamic_response_info;
1318 }
1319 }
1320
1321 // Count number of wakeups received after a halt
1322 if(order == 6 && lastorder == 5) { happened++; }
1323
1324 // Count number of other messages after a halt
1325 if(order != 6 && lastorder == 5) { happened2++; }
1326
1327 // comment this limit if you want to simulation longer
1328 if (!tracing) {
1329 Dbprintf("Trace Full. Simulation stopped.");
1330 break;
1331 }
1332 // comment this limit if you want to simulation longer
1333 if(cmdsRecvd > 999) {
1334 DbpString("1000 commands later...");
1335 break;
1336 }
1337 cmdsRecvd++;
1338
1339 if (p_response != NULL) {
1340 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1341 // do the tracing for the previous reader request and this tag answer:
1342 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1343 GetParity(p_response->response, p_response->response_n, par);
1344
1345 EmLogTrace(Uart.output,
1346 Uart.len,
1347 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1348 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1349 Uart.parity,
1350 p_response->response,
1351 p_response->response_n,
1352 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1353 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1354 par);
1355 }
1356 }
1357
1358 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1359 set_tracing(FALSE);
1360 BigBuf_free_keep_EM();
1361 LED_A_OFF();
1362
1363 if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1) {
1364 for ( uint8_t i = 0; i < ATTACK_KEY_COUNT; i++) {
1365 if (ar_nr_collected[i] == 2) {
1366 Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i<ATTACK_KEY_COUNT/2) ? "keyA" : "keyB", ar_nr_resp[i].sector);
1367 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
1368 ar_nr_resp[i].cuid, //UID
1369 ar_nr_resp[i].nonce, //NT
1370 ar_nr_resp[i].nr, //NR1
1371 ar_nr_resp[i].ar, //AR1
1372 ar_nr_resp[i].nr2, //NR2
1373 ar_nr_resp[i].ar2 //AR2
1374 );
1375 }
1376 }
1377 for ( uint8_t i = ATTACK_KEY_COUNT; i < ATTACK_KEY_COUNT*2; i++) {
1378 if (ar_nr_collected[i] == 2) {
1379 Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i<ATTACK_KEY_COUNT/2) ? "keyA" : "keyB", ar_nr_resp[i].sector);
1380 Dbprintf("../tools/mfkey/mfkey32v2 %08x %08x %08x %08x %08x %08x %08x",
1381 ar_nr_resp[i].cuid, //UID
1382 ar_nr_resp[i].nonce, //NT
1383 ar_nr_resp[i].nr, //NR1
1384 ar_nr_resp[i].ar, //AR1
1385 ar_nr_resp[i].nonce2,//NT2
1386 ar_nr_resp[i].nr2, //NR2
1387 ar_nr_resp[i].ar2 //AR2
1388 );
1389 }
1390 }
1391 }
1392
1393 if (MF_DBGLEVEL >= 4){
1394 Dbprintf("-[ Wake ups after halt [%d]", happened);
1395 Dbprintf("-[ Messages after halt [%d]", happened2);
1396 Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd);
1397 }
1398 }
1399
1400 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1401 // of bits specified in the delay parameter.
1402 void PrepareDelayedTransfer(uint16_t delay) {
1403 delay &= 0x07;
1404 if (!delay) return;
1405
1406 uint8_t bitmask = 0;
1407 uint8_t bits_to_shift = 0;
1408 uint8_t bits_shifted = 0;
1409 uint16_t i = 0;
1410
1411 for (i = 0; i < delay; ++i)
1412 bitmask |= (0x01 << i);
1413
1414 ToSend[++ToSendMax] = 0x00;
1415
1416 for (i = 0; i < ToSendMax; ++i) {
1417 bits_to_shift = ToSend[i] & bitmask;
1418 ToSend[i] = ToSend[i] >> delay;
1419 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1420 bits_shifted = bits_to_shift;
1421 }
1422 }
1423
1424
1425 //-------------------------------------------------------------------------------------
1426 // Transmit the command (to the tag) that was placed in ToSend[].
1427 // Parameter timing:
1428 // if NULL: transfer at next possible time, taking into account
1429 // request guard time and frame delay time
1430 // if == 0: transfer immediately and return time of transfer
1431 // if != 0: delay transfer until time specified
1432 //-------------------------------------------------------------------------------------
1433 static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing) {
1434 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1435
1436 uint32_t ThisTransferTime = 0;
1437
1438 if (timing) {
1439 if(*timing == 0) { // Measure time
1440 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1441 } else {
1442 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1443 }
1444 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1445 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1446 LastTimeProxToAirStart = *timing;
1447 } else {
1448 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1449
1450 while(GetCountSspClk() < ThisTransferTime);
1451
1452 LastTimeProxToAirStart = ThisTransferTime;
1453 }
1454
1455 // clear TXRDY
1456 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1457
1458 uint16_t c = 0;
1459 for(;;) {
1460 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1461 AT91C_BASE_SSC->SSC_THR = cmd[c];
1462 ++c;
1463 if(c >= len)
1464 break;
1465 }
1466 }
1467
1468 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1469 }
1470
1471 //-----------------------------------------------------------------------------
1472 // Prepare reader command (in bits, support short frames) to send to FPGA
1473 //-----------------------------------------------------------------------------
1474 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity) {
1475 int i, j;
1476 int last = 0;
1477 uint8_t b;
1478
1479 ToSendReset();
1480
1481 // Start of Communication (Seq. Z)
1482 ToSend[++ToSendMax] = SEC_Z;
1483 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1484
1485 size_t bytecount = nbytes(bits);
1486 // Generate send structure for the data bits
1487 for (i = 0; i < bytecount; i++) {
1488 // Get the current byte to send
1489 b = cmd[i];
1490 size_t bitsleft = MIN((bits-(i*8)),8);
1491
1492 for (j = 0; j < bitsleft; j++) {
1493 if (b & 1) {
1494 // Sequence X
1495 ToSend[++ToSendMax] = SEC_X;
1496 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1497 last = 1;
1498 } else {
1499 if (last == 0) {
1500 // Sequence Z
1501 ToSend[++ToSendMax] = SEC_Z;
1502 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1503 } else {
1504 // Sequence Y
1505 ToSend[++ToSendMax] = SEC_Y;
1506 last = 0;
1507 }
1508 }
1509 b >>= 1;
1510 }
1511
1512 // Only transmit parity bit if we transmitted a complete byte
1513 if (j == 8 && parity != NULL) {
1514 // Get the parity bit
1515 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1516 // Sequence X
1517 ToSend[++ToSendMax] = SEC_X;
1518 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1519 last = 1;
1520 } else {
1521 if (last == 0) {
1522 // Sequence Z
1523 ToSend[++ToSendMax] = SEC_Z;
1524 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1525 } else {
1526 // Sequence Y
1527 ToSend[++ToSendMax] = SEC_Y;
1528 last = 0;
1529 }
1530 }
1531 }
1532 }
1533
1534 // End of Communication: Logic 0 followed by Sequence Y
1535 if (last == 0) {
1536 // Sequence Z
1537 ToSend[++ToSendMax] = SEC_Z;
1538 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1539 } else {
1540 // Sequence Y
1541 ToSend[++ToSendMax] = SEC_Y;
1542 last = 0;
1543 }
1544 ToSend[++ToSendMax] = SEC_Y;
1545
1546 // Convert to length of command:
1547 ++ToSendMax;
1548 }
1549
1550 //-----------------------------------------------------------------------------
1551 // Prepare reader command to send to FPGA
1552 //-----------------------------------------------------------------------------
1553 void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity) {
1554 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1555 }
1556
1557 //-----------------------------------------------------------------------------
1558 // Wait for commands from reader
1559 // Stop when button is pressed (return 1) or field was gone (return 2)
1560 // Or return 0 when command is captured
1561 //-----------------------------------------------------------------------------
1562 static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity) {
1563 *len = 0;
1564
1565 uint32_t timer = 0, vtime = 0;
1566 int analogCnt = 0;
1567 int analogAVG = 0;
1568
1569 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1570 // only, since we are receiving, not transmitting).
1571 // Signal field is off with the appropriate LED
1572 LED_D_OFF();
1573 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1574
1575 // Set ADC to read field strength
1576 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1577 AT91C_BASE_ADC->ADC_MR =
1578 ADC_MODE_PRESCALE(63) |
1579 ADC_MODE_STARTUP_TIME(1) |
1580 ADC_MODE_SAMPLE_HOLD_TIME(15);
1581 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1582 // start ADC
1583 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1584
1585 // Now run a 'software UART' on the stream of incoming samples.
1586 UartInit(received, parity);
1587
1588 // Clear RXRDY:
1589 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1590
1591 for(;;) {
1592 WDT_HIT();
1593
1594 if (BUTTON_PRESS()) return 1;
1595
1596 // test if the field exists
1597 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1598 analogCnt++;
1599 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1600 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1601 if (analogCnt >= 32) {
1602 if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1603 vtime = GetTickCount();
1604 if (!timer) timer = vtime;
1605 // 50ms no field --> card to idle state
1606 if (vtime - timer > 50) return 2;
1607 } else
1608 if (timer) timer = 0;
1609 analogCnt = 0;
1610 analogAVG = 0;
1611 }
1612 }
1613
1614 // receive and test the miller decoding
1615 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1616 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1617 if(MillerDecoding(b, 0)) {
1618 *len = Uart.len;
1619 return 0;
1620 }
1621 }
1622 }
1623 }
1624
1625 int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded) {
1626 uint8_t b;
1627 uint16_t i = 0;
1628 uint32_t ThisTransferTime;
1629
1630 // Modulate Manchester
1631 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1632
1633 // include correction bit if necessary
1634 if (Uart.parityBits & 0x01) {
1635 correctionNeeded = TRUE;
1636 }
1637 // 1236, so correction bit needed
1638 i = (correctionNeeded) ? 0 : 1;
1639
1640 // clear receiving shift register and holding register
1641 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1642 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1643 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1644 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1645
1646 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1647 for (uint8_t j = 0; j < 5; j++) { // allow timeout - better late than never
1648 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1649 if (AT91C_BASE_SSC->SSC_RHR) break;
1650 }
1651
1652 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1653
1654 // Clear TXRDY:
1655 AT91C_BASE_SSC->SSC_THR = SEC_F;
1656
1657 // send cycle
1658 for(; i < respLen; ) {
1659 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1660 AT91C_BASE_SSC->SSC_THR = resp[i++];
1661 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1662 }
1663
1664 if(BUTTON_PRESS()) break;
1665 }
1666
1667 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1668 uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; // twich /8 ?? >>3,
1669 for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
1670 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1671 AT91C_BASE_SSC->SSC_THR = SEC_F;
1672 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1673 i++;
1674 }
1675 }
1676 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1677 return 0;
1678 }
1679
1680 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1681 Code4bitAnswerAsTag(resp);
1682 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1683 // do the tracing for the previous reader request and this tag answer:
1684 uint8_t par[1] = {0x00};
1685 GetParity(&resp, 1, par);
1686 EmLogTrace(Uart.output,
1687 Uart.len,
1688 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1689 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1690 Uart.parity,
1691 &resp,
1692 1,
1693 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1694 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1695 par);
1696 return res;
1697 }
1698
1699 int EmSend4bit(uint8_t resp){
1700 return EmSend4bitEx(resp, false);
1701 }
1702
1703 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1704 CodeIso14443aAsTagPar(resp, respLen, par);
1705 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1706 // do the tracing for the previous reader request and this tag answer:
1707 EmLogTrace(Uart.output,
1708 Uart.len,
1709 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1710 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1711 Uart.parity,
1712 resp,
1713 respLen,
1714 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1715 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1716 par);
1717 return res;
1718 }
1719
1720 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1721 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1722 GetParity(resp, respLen, par);
1723 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1724 }
1725
1726 int EmSendCmd(uint8_t *resp, uint16_t respLen){
1727 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1728 GetParity(resp, respLen, par);
1729 return EmSendCmdExPar(resp, respLen, false, par);
1730 }
1731
1732 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1733 return EmSendCmdExPar(resp, respLen, false, par);
1734 }
1735
1736 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1737 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1738 {
1739 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1740 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1741 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1742 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1743 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1744 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1745 reader_EndTime = tag_StartTime - exact_fdt;
1746 reader_StartTime = reader_EndTime - reader_modlen;
1747
1748 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE))
1749 return FALSE;
1750 else
1751 return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1752
1753 }
1754
1755 //-----------------------------------------------------------------------------
1756 // Wait a certain time for tag response
1757 // If a response is captured return TRUE
1758 // If it takes too long return FALSE
1759 //-----------------------------------------------------------------------------
1760 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset) {
1761 uint32_t c = 0x00;
1762
1763 // Set FPGA mode to "reader listen mode", no modulation (listen
1764 // only, since we are receiving, not transmitting).
1765 // Signal field is on with the appropriate LED
1766 LED_D_ON();
1767 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1768
1769 // Now get the answer from the card
1770 DemodInit(receivedResponse, receivedResponsePar);
1771
1772 // clear RXRDY:
1773 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1774
1775 for(;;) {
1776 WDT_HIT();
1777
1778 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1779 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1780 if(ManchesterDecoding(b, offset, 0)) {
1781 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1782 return TRUE;
1783 } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) {
1784 return FALSE;
1785 }
1786 }
1787 }
1788 }
1789
1790 void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing) {
1791
1792 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1793 // Send command to tag
1794 TransmitFor14443a(ToSend, ToSendMax, timing);
1795 if(trigger) LED_A_ON();
1796
1797 LogTrace(frame, nbytes(bits), (LastTimeProxToAirStart<<4) + DELAY_ARM2AIR_AS_READER, ((LastTimeProxToAirStart + LastProxToAirDuration)<<4) + DELAY_ARM2AIR_AS_READER, par, TRUE);
1798 }
1799
1800 void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing) {
1801 ReaderTransmitBitsPar(frame, len*8, par, timing);
1802 }
1803
1804 void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing) {
1805 // Generate parity and redirect
1806 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1807 GetParity(frame, len/8, par);
1808 ReaderTransmitBitsPar(frame, len, par, timing);
1809 }
1810
1811 void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing) {
1812 // Generate parity and redirect
1813 uint8_t par[MAX_PARITY_SIZE] = {0x00};
1814 GetParity(frame, len, par);
1815 ReaderTransmitBitsPar(frame, len*8, par, timing);
1816 }
1817
1818 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity) {
1819 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset))
1820 return FALSE;
1821 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1822 return Demod.len;
1823 }
1824
1825 int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity) {
1826 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0))
1827 return FALSE;
1828 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1829 return Demod.len;
1830 }
1831
1832 // performs iso14443a anticollision (optional) and card select procedure
1833 // fills the uid and cuid pointer unless NULL
1834 // fills the card info record unless NULL
1835 // if anticollision is false, then the UID must be provided in uid_ptr[]
1836 // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
1837 int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades) {
1838 uint8_t wupa[] = { ISO14443A_CMD_WUPA }; // 0x26 - ISO14443A_CMD_REQA 0x52 - ISO14443A_CMD_WUPA
1839 uint8_t sel_all[] = { ISO14443A_CMD_ANTICOLL_OR_SELECT,0x20 };
1840 uint8_t sel_uid[] = { ISO14443A_CMD_ANTICOLL_OR_SELECT,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1841 uint8_t rats[] = { ISO14443A_CMD_RATS,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1842 uint8_t resp[MAX_FRAME_SIZE] = {0}; // theoretically. A usual RATS will be much smaller
1843 uint8_t resp_par[MAX_PARITY_SIZE] = {0};
1844 byte_t uid_resp[4] = {0};
1845 size_t uid_resp_len = 0;
1846
1847 uint8_t sak = 0x04; // cascade uid
1848 int cascade_level = 0;
1849 int len;
1850
1851 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1852 ReaderTransmitBitsPar(wupa, 7, NULL, NULL);
1853
1854 // Receive the ATQA
1855 if(!ReaderReceive(resp, resp_par)) return 0;
1856
1857 if(p_hi14a_card) {
1858 memcpy(p_hi14a_card->atqa, resp, 2);
1859 p_hi14a_card->uidlen = 0;
1860 memset(p_hi14a_card->uid,0,10);
1861 }
1862
1863 if (anticollision) {
1864 // clear uid
1865 if (uid_ptr)
1866 memset(uid_ptr,0,10);
1867 }
1868
1869 // reset the PCB block number
1870 iso14_pcb_blocknum = 0;
1871
1872 // check for proprietary anticollision:
1873 if ((resp[0] & 0x1F) == 0) return 3;
1874
1875 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1876 // which case we need to make a cascade 2 request and select - this is a long UID
1877 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1878 for(; sak & 0x04; cascade_level++) {
1879 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1880 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1881
1882 if (anticollision) {
1883 // SELECT_ALL
1884 ReaderTransmit(sel_all, sizeof(sel_all), NULL);
1885 if (!ReaderReceive(resp, resp_par)) return 0;
1886
1887 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1888 memset(uid_resp, 0, 4);
1889 uint16_t uid_resp_bits = 0;
1890 uint16_t collision_answer_offset = 0;
1891 // anti-collision-loop:
1892 while (Demod.collisionPos) {
1893 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1894 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1895 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1896 uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8);
1897 }
1898 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1899 uid_resp_bits++;
1900 // construct anticollosion command:
1901 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1902 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1903 sel_uid[2+i] = uid_resp[i];
1904 }
1905 collision_answer_offset = uid_resp_bits%8;
1906 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1907 if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0;
1908 }
1909 // finally, add the last bits and BCC of the UID
1910 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1911 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1912 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1913 }
1914
1915 } else { // no collision, use the response to SELECT_ALL as current uid
1916 memcpy(uid_resp, resp, 4);
1917 }
1918
1919 } else {
1920 if (cascade_level < num_cascades - 1) {
1921 uid_resp[0] = 0x88;
1922 memcpy(uid_resp+1, uid_ptr+cascade_level*3, 3);
1923 } else {
1924 memcpy(uid_resp, uid_ptr+cascade_level*3, 4);
1925 }
1926 }
1927 uid_resp_len = 4;
1928
1929 // calculate crypto UID. Always use last 4 Bytes.
1930 if(cuid_ptr)
1931 *cuid_ptr = bytes_to_num(uid_resp, 4);
1932
1933 // Construct SELECT UID command
1934 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1935 memcpy(sel_uid+2, uid_resp, 4); // the UID received during anticollision, or the provided UID
1936 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1937 AppendCrc14443a(sel_uid, 7); // calculate and add CRC
1938 ReaderTransmit(sel_uid, sizeof(sel_uid), NULL);
1939
1940 // Receive the SAK
1941 if (!ReaderReceive(resp, resp_par)) return 0;
1942
1943 sak = resp[0];
1944
1945 // Test if more parts of the uid are coming
1946 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1947 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1948 // http://www.nxp.com/documents/application_note/AN10927.pdf
1949 uid_resp[0] = uid_resp[1];
1950 uid_resp[1] = uid_resp[2];
1951 uid_resp[2] = uid_resp[3];
1952 uid_resp_len = 3;
1953 }
1954
1955 if(uid_ptr && anticollision)
1956 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1957
1958 if(p_hi14a_card) {
1959 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1960 p_hi14a_card->uidlen += uid_resp_len;
1961 }
1962 }
1963
1964 if(p_hi14a_card) {
1965 p_hi14a_card->sak = sak;
1966 p_hi14a_card->ats_len = 0;
1967 }
1968
1969 // non iso14443a compliant tag
1970 if( (sak & 0x20) == 0) return 2;
1971
1972 // Request for answer to select
1973 AppendCrc14443a(rats, 2);
1974 ReaderTransmit(rats, sizeof(rats), NULL);
1975
1976 if (!(len = ReaderReceive(resp, resp_par))) return 0;
1977
1978 if(p_hi14a_card) {
1979 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1980 p_hi14a_card->ats_len = len;
1981 }
1982
1983 // set default timeout based on ATS
1984 iso14a_set_ATS_timeout(resp);
1985 return 1;
1986 }
1987
1988 void iso14443a_setup(uint8_t fpga_minor_mode) {
1989
1990 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1991 // Set up the synchronous serial port
1992 FpgaSetupSsc();
1993 // connect Demodulated Signal to ADC:
1994 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1995
1996 LED_D_OFF();
1997 // Signal field is on with the appropriate LED
1998 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD ||
1999 fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN)
2000 LED_D_ON();
2001
2002 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
2003
2004 SpinDelay(20);
2005
2006 // Start the timer
2007 StartCountSspClk();
2008
2009 // Prepare the demodulation functions
2010 DemodReset();
2011 UartReset();
2012 NextTransferTime = 2 * DELAY_ARM2AIR_AS_READER;
2013 iso14a_set_timeout(10*106); // 20ms default
2014 }
2015
2016 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
2017 uint8_t parity[MAX_PARITY_SIZE] = {0x00};
2018 uint8_t real_cmd[cmd_len+4];
2019 real_cmd[0] = 0x0a; //I-Block
2020 // put block number into the PCB
2021 real_cmd[0] |= iso14_pcb_blocknum;
2022 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
2023 memcpy(real_cmd+2, cmd, cmd_len);
2024 AppendCrc14443a(real_cmd,cmd_len+2);
2025
2026 ReaderTransmit(real_cmd, cmd_len+4, NULL);
2027 size_t len = ReaderReceive(data, parity);
2028 //DATA LINK ERROR
2029 if (!len) return 0;
2030
2031 uint8_t *data_bytes = (uint8_t *) data;
2032
2033 // if we received an I- or R(ACK)-Block with a block number equal to the
2034 // current block number, toggle the current block number
2035 if (len >= 4 // PCB+CID+CRC = 4 bytes
2036 && ((data_bytes[0] & 0xC0) == 0 // I-Block
2037 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
2038 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
2039 {
2040 iso14_pcb_blocknum ^= 1;
2041 }
2042
2043 return len;
2044 }
2045
2046
2047 //-----------------------------------------------------------------------------
2048 // Read an ISO 14443a tag. Send out commands and store answers.
2049 //-----------------------------------------------------------------------------
2050 void ReaderIso14443a(UsbCommand *c) {
2051 iso14a_command_t param = c->arg[0];
2052 size_t len = c->arg[1] & 0xffff;
2053 size_t lenbits = c->arg[1] >> 16;
2054 uint32_t timeout = c->arg[2];
2055 uint8_t *cmd = c->d.asBytes;
2056 uint32_t arg0 = 0;
2057 byte_t buf[USB_CMD_DATA_SIZE] = {0x00};
2058 uint8_t par[MAX_PARITY_SIZE] = {0x00};
2059
2060 if (param & ISO14A_CONNECT)
2061 clear_trace();
2062
2063 set_tracing(TRUE);
2064
2065 if (param & ISO14A_REQUEST_TRIGGER)
2066 iso14a_set_trigger(TRUE);
2067
2068 if (param & ISO14A_CONNECT) {
2069 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
2070 if(!(param & ISO14A_NO_SELECT)) {
2071 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
2072 arg0 = iso14443a_select_card(NULL,card,NULL, true, 0);
2073 cmd_send(CMD_ACK, arg0, card->uidlen, 0, buf, sizeof(iso14a_card_select_t));
2074 // if it fails, the cmdhf14a.c client quites.. however this one still executes.
2075 if ( arg0 == 0 ) return;
2076 }
2077 }
2078
2079 if (param & ISO14A_SET_TIMEOUT)
2080 iso14a_set_timeout(timeout);
2081
2082 if (param & ISO14A_APDU) {
2083 arg0 = iso14_apdu(cmd, len, buf);
2084 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2085 }
2086
2087 if (param & ISO14A_RAW) {
2088 if(param & ISO14A_APPEND_CRC) {
2089 if(param & ISO14A_TOPAZMODE) {
2090 AppendCrc14443b(cmd,len);
2091 } else {
2092 AppendCrc14443a(cmd,len);
2093 }
2094 len += 2;
2095 if (lenbits) lenbits += 16;
2096 }
2097 if(lenbits>0) { // want to send a specific number of bits (e.g. short commands)
2098 if(param & ISO14A_TOPAZMODE) {
2099 int bits_to_send = lenbits;
2100 uint16_t i = 0;
2101 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity
2102 bits_to_send -= 7;
2103 while (bits_to_send > 0) {
2104 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity
2105 bits_to_send -= 8;
2106 }
2107 } else {
2108 GetParity(cmd, lenbits/8, par);
2109 ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity
2110 }
2111 } else { // want to send complete bytes only
2112 if(param & ISO14A_TOPAZMODE) {
2113 uint16_t i = 0;
2114 ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy
2115 while (i < len) {
2116 ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy
2117 }
2118 } else {
2119 ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity
2120 }
2121 }
2122 arg0 = ReaderReceive(buf, par);
2123 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2124 }
2125
2126 if (param & ISO14A_REQUEST_TRIGGER)
2127 iso14a_set_trigger(FALSE);
2128
2129 if (param & ISO14A_NO_DISCONNECT)
2130 return;
2131
2132 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2133 set_tracing(FALSE);
2134 LEDsoff();
2135 }
2136
2137 // Determine the distance between two nonces.
2138 // Assume that the difference is small, but we don't know which is first.
2139 // Therefore try in alternating directions.
2140 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
2141
2142 if (nt1 == nt2) return 0;
2143
2144 uint32_t nttmp1 = nt1;
2145 uint32_t nttmp2 = nt2;
2146
2147 // 0xFFFF -- Half up and half down to find distance between nonces
2148 for (uint16_t i = 1; i < 32768/8; i += 8) {
2149 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i;
2150 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+1;
2151 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+2;
2152 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+3;
2153 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+4;
2154 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+5;
2155 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+6;
2156 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i+7;
2157
2158 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -i;
2159 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+1);
2160 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+2);
2161 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+3);
2162 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+4);
2163 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+5);
2164 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+6);
2165 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -(i+7);
2166 }
2167 // either nt1 or nt2 are invalid nonces
2168 return(-99999);
2169 }
2170
2171 //-----------------------------------------------------------------------------
2172 // Recover several bits of the cypher stream. This implements (first stages of)
2173 // the algorithm described in "The Dark Side of Security by Obscurity and
2174 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2175 // (article by Nicolas T. Courtois, 2009)
2176 //-----------------------------------------------------------------------------
2177
2178 void ReaderMifare(bool first_try, uint8_t block, uint8_t keytype ) {
2179
2180 uint8_t mf_auth[] = { keytype, block, 0x00, 0x00 };
2181 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2182 uint8_t uid[10] = {0,0,0,0,0,0,0,0,0,0};
2183 uint8_t par_list[8] = {0,0,0,0,0,0,0,0};
2184 uint8_t ks_list[8] = {0,0,0,0,0,0,0,0};
2185 uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE] = {0x00};
2186 uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE] = {0x00};
2187 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2188 byte_t nt_diff = 0;
2189 uint32_t nt = 0;
2190 uint32_t previous_nt = 0;
2191 uint32_t cuid = 0;
2192
2193 int32_t catch_up_cycles = 0;
2194 int32_t last_catch_up = 0;
2195 int32_t isOK = 0;
2196 int32_t nt_distance = 0;
2197
2198 uint16_t elapsed_prng_sequences = 1;
2199 uint16_t consecutive_resyncs = 0;
2200 uint16_t unexpected_random = 0;
2201 uint16_t sync_tries = 0;
2202
2203 // static variables here, is re-used in the next call
2204 static uint32_t nt_attacked = 0;
2205 static uint32_t sync_time = 0;
2206 static uint32_t sync_cycles = 0;
2207 static uint8_t par_low = 0;
2208 static uint8_t mf_nr_ar3 = 0;
2209
2210 #define PRNG_SEQUENCE_LENGTH (1 << 16)
2211 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2212 #define MAX_SYNC_TRIES 32
2213
2214 AppendCrc14443a(mf_auth, 2);
2215
2216 BigBuf_free(); BigBuf_Clear_ext(false);
2217 clear_trace();
2218 set_tracing(FALSE);
2219 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2220
2221 sync_time = GetCountSspClk() & 0xfffffff8;
2222 sync_cycles = PRNG_SEQUENCE_LENGTH; // Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2223 nt_attacked = 0;
2224
2225 if (MF_DBGLEVEL >= 4) Dbprintf("Mifare::Sync %08x", sync_time);
2226
2227 if (first_try) {
2228 mf_nr_ar3 = 0;
2229 par_low = 0;
2230 } else {
2231 // we were unsuccessful on a previous call.
2232 // Try another READER nonce (first 3 parity bits remain the same)
2233 ++mf_nr_ar3;
2234 mf_nr_ar[3] = mf_nr_ar3;
2235 par[0] = par_low;
2236 }
2237
2238 bool have_uid = FALSE;
2239 uint8_t cascade_levels = 0;
2240
2241 LED_C_ON();
2242 uint16_t i;
2243 for(i = 0; TRUE; ++i) {
2244
2245 WDT_HIT();
2246
2247 // Test if the action was cancelled
2248 if(BUTTON_PRESS()) {
2249 isOK = -1;
2250 break;
2251 }
2252
2253 // this part is from Piwi's faster nonce collecting part in Hardnested.
2254 if (!have_uid) { // need a full select cycle to get the uid first
2255 iso14a_card_select_t card_info;
2256 if(!iso14443a_select_card(uid, &card_info, &cuid, true, 0)) {
2257 if (MF_DBGLEVEL >= 4) Dbprintf("Mifare: Can't select card (ALL)");
2258 break;
2259 }
2260 switch (card_info.uidlen) {
2261 case 4 : cascade_levels = 1; break;
2262 case 7 : cascade_levels = 2; break;
2263 case 10: cascade_levels = 3; break;
2264 default: break;
2265 }
2266 have_uid = TRUE;
2267 } else { // no need for anticollision. We can directly select the card
2268 if(!iso14443a_select_card(uid, NULL, &cuid, false, cascade_levels)) {
2269 if (MF_DBGLEVEL >= 4) Dbprintf("Mifare: Can't select card (UID)");
2270 continue;
2271 }
2272 }
2273
2274 // Sending timeslot of ISO14443a frame
2275 sync_time = (sync_time & 0xfffffff8 ) + sync_cycles + catch_up_cycles;
2276 catch_up_cycles = 0;
2277
2278 // if we missed the sync time already, advance to the next nonce repeat
2279 while( GetCountSspClk() > sync_time) {
2280 ++elapsed_prng_sequences;
2281 sync_time = (sync_time & 0xfffffff8 ) + sync_cycles;
2282 }
2283
2284 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2285 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2286
2287 // Receive the (4 Byte) "random" nonce from TAG
2288 if (!ReaderReceive(receivedAnswer, receivedAnswerPar))
2289 continue;
2290
2291 previous_nt = nt;
2292 nt = bytes_to_num(receivedAnswer, 4);
2293
2294 // Transmit reader nonce with fake par
2295 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2296
2297 // we didn't calibrate our clock yet,
2298 // iceman: has to be calibrated every time.
2299 if (previous_nt && !nt_attacked) {
2300
2301 nt_distance = dist_nt(previous_nt, nt);
2302
2303 // if no distance between, then we are in sync.
2304 if (nt_distance == 0) {
2305 nt_attacked = nt;
2306 } else {
2307 if (nt_distance == -99999) { // invalid nonce received
2308 ++unexpected_random;
2309 if (unexpected_random > MAX_UNEXPECTED_RANDOM) {
2310 isOK = -3; // Card has an unpredictable PRNG. Give up
2311 break;
2312 } else {
2313 if (sync_cycles <= 0) sync_cycles += PRNG_SEQUENCE_LENGTH;
2314 LED_B_OFF();
2315 continue; // continue trying...
2316 }
2317 }
2318
2319 if (++sync_tries > MAX_SYNC_TRIES) {
2320 isOK = -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2321 break;
2322 }
2323
2324 sync_cycles = (sync_cycles - nt_distance)/elapsed_prng_sequences;
2325
2326 if (sync_cycles <= 0)
2327 sync_cycles += PRNG_SEQUENCE_LENGTH;
2328
2329 if (MF_DBGLEVEL >= 4)
2330 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i, nt_distance, elapsed_prng_sequences, sync_cycles);
2331
2332 LED_B_OFF();
2333 continue;
2334 }
2335 }
2336 LED_B_OFF();
2337
2338 if ( (nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2339
2340 catch_up_cycles = ABS(dist_nt(nt_attacked, nt));
2341 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2342 catch_up_cycles = 0;
2343 continue;
2344 }
2345 // average?
2346 catch_up_cycles /= elapsed_prng_sequences;
2347
2348 if (catch_up_cycles == last_catch_up) {
2349 ++consecutive_resyncs;
2350 } else {
2351 last_catch_up = catch_up_cycles;
2352 consecutive_resyncs = 0;
2353 }
2354
2355 if (consecutive_resyncs < 3) {
2356 if (MF_DBGLEVEL >= 4)
2357 Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, catch_up_cycles, consecutive_resyncs);
2358 } else {
2359 sync_cycles += catch_up_cycles;
2360
2361 if (MF_DBGLEVEL >= 4)
2362 Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, catch_up_cycles, sync_cycles);
2363
2364 last_catch_up = 0;
2365 catch_up_cycles = 0;
2366 consecutive_resyncs = 0;
2367 }
2368 continue;
2369 }
2370
2371 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2372 if (ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2373 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2374
2375 if (nt_diff == 0)
2376 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2377
2378 par_list[nt_diff] = SwapBits(par[0], 8);
2379 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05; // xor with NACK value to get keystream
2380
2381 // Test if the information is complete
2382 if (nt_diff == 0x07) {
2383 isOK = 1;
2384 break;
2385 }
2386
2387 nt_diff = (nt_diff + 1) & 0x07;
2388 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2389 par[0] = par_low;
2390
2391 } else {
2392 // No NACK.
2393 if (nt_diff == 0 && first_try) {
2394 par[0]++;
2395 if (par[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2396 isOK = -2;
2397 break;
2398 }
2399 } else {
2400 // Why this?
2401 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2402 }
2403 }
2404
2405 // reset the resyncs since we got a complete transaction on right time.
2406 consecutive_resyncs = 0;
2407 } // end for loop
2408
2409 mf_nr_ar[3] &= 0x1F;
2410
2411 if (MF_DBGLEVEL >= 4) Dbprintf("Number of sent auth requestes: %u", i);
2412
2413 uint8_t buf[28] = {0x00};
2414 memset(buf, 0x00, sizeof(buf));
2415 num_to_bytes(cuid, 4, buf);
2416 num_to_bytes(nt, 4, buf + 4);
2417 memcpy(buf + 8, par_list, 8);
2418 memcpy(buf + 16, ks_list, 8);
2419 memcpy(buf + 24, mf_nr_ar, 4);
2420
2421 cmd_send(CMD_ACK, isOK, 0, 0, buf, sizeof(buf) );
2422
2423 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2424 LEDsoff();
2425 set_tracing(FALSE);
2426 }
2427
2428
2429 /**
2430 *MIFARE 1K simulate.
2431 *
2432 *@param flags :
2433 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2434 * FLAG_4B_UID_IN_DATA - use 4-byte UID in the data-section
2435 * FLAG_7B_UID_IN_DATA - use 7-byte UID in the data-section
2436 * FLAG_10B_UID_IN_DATA - use 10-byte UID in the data-section
2437 * FLAG_UID_IN_EMUL - use 4-byte UID from emulator memory
2438 * FLAG_NR_AR_ATTACK - collect NR_AR responses for bruteforcing later
2439 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2440 */
2441 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain) {
2442 int cardSTATE = MFEMUL_NOFIELD;
2443 int _UID_LEN = 0; // 4, 7, 10
2444 int vHf = 0; // in mV
2445 int res = 0;
2446 uint32_t selTimer = 0;
2447 uint32_t authTimer = 0;
2448 uint16_t len = 0;
2449 uint8_t cardWRBL = 0;
2450 uint8_t cardAUTHSC = 0;
2451 uint8_t cardAUTHKEY = 0xff; // no authentication
2452 uint32_t cuid = 0;
2453 uint32_t ans = 0;
2454 uint32_t cardINTREG = 0;
2455 uint8_t cardINTBLOCK = 0;
2456 struct Crypto1State mpcs = {0, 0};
2457 struct Crypto1State *pcs;
2458 pcs = &mpcs;
2459 uint32_t numReads = 0; // Counts numer of times reader read a block
2460 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00};
2461 uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE] = {0x00};
2462 uint8_t response[MAX_MIFARE_FRAME_SIZE] = {0x00};
2463 uint8_t response_par[MAX_MIFARE_PARITY_SIZE] = {0x00};
2464
2465 uint8_t atqa[] = {0x04, 0x00}; // Mifare classic 1k
2466 uint8_t sak_4[] = {0x0C, 0x00, 0x00}; // CL1 - 4b uid
2467 uint8_t sak_7[] = {0x0C, 0x00, 0x00}; // CL2 - 7b uid
2468 uint8_t sak_10[] = {0x0C, 0x00, 0x00}; // CL3 - 10b uid
2469 // uint8_t sak[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
2470
2471 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2472 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2473 uint8_t rUIDBCC3[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2474
2475 uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01}; // very random nonce
2476 // uint8_t rAUTH_NT[] = {0x55, 0x41, 0x49, 0x92};// nonce from nested? why this?
2477 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2478
2479 // Here, we collect CUID, NT, NR, AR, CUID2, NT2, NR2, AR2
2480 // This can be used in a reader-only attack.
2481 nonces_t ar_nr_resp[ATTACK_KEY_COUNT*2]; // for 2 separate attack types (nml, moebius)
2482 memset(ar_nr_resp, 0x00, sizeof(ar_nr_resp));
2483
2484 uint8_t ar_nr_collected[ATTACK_KEY_COUNT*2]; // for 2nd attack type (moebius)
2485 memset(ar_nr_collected, 0x00, sizeof(ar_nr_collected));
2486 uint8_t nonce1_count = 0;
2487 uint8_t nonce2_count = 0;
2488 uint8_t moebius_n_count = 0;
2489 bool gettingMoebius = false;
2490 uint8_t mM = 0; // moebius_modifier for collection storage
2491 bool doBufResetNext = false;
2492
2493 // Authenticate response - nonce
2494 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2495
2496 // -- Determine the UID
2497 // Can be set from emulator memory or incoming data
2498 // Length: 4,7,or 10 bytes
2499 if ( (flags & FLAG_UID_IN_EMUL) == FLAG_UID_IN_EMUL)
2500 emlGetMemBt(datain, 0, 10); // load 10bytes from EMUL to the datain pointer. to be used below.
2501
2502 if ( (flags & FLAG_4B_UID_IN_DATA) == FLAG_4B_UID_IN_DATA) {
2503 memcpy(rUIDBCC1, datain, 4);
2504 _UID_LEN = 4;
2505 } else if ( (flags & FLAG_7B_UID_IN_DATA) == FLAG_7B_UID_IN_DATA) {
2506 memcpy(&rUIDBCC1[1], datain, 3);
2507 memcpy( rUIDBCC2, datain+3, 4);
2508 _UID_LEN = 7;
2509 } else if ( (flags & FLAG_10B_UID_IN_DATA) == FLAG_10B_UID_IN_DATA) {
2510 memcpy(&rUIDBCC1[1], datain, 3);
2511 memcpy(&rUIDBCC2[1], datain+3, 3);
2512 memcpy( rUIDBCC3, datain+6, 4);
2513 _UID_LEN = 10;
2514 }
2515
2516 switch (_UID_LEN) {
2517 case 4:
2518 sak_4[0] &= 0xFB;
2519 // save CUID
2520 cuid = bytes_to_num(rUIDBCC1, 4);
2521 // BCC
2522 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2523 if (MF_DBGLEVEL >= 2) {
2524 Dbprintf("4B UID: %02x%02x%02x%02x",
2525 rUIDBCC1[0],
2526 rUIDBCC1[1],
2527 rUIDBCC1[2],
2528 rUIDBCC1[3]
2529 );
2530 }
2531 break;
2532 case 7:
2533 atqa[0] |= 0x40;
2534 sak_7[0] &= 0xFB;
2535 // save CUID
2536 cuid = bytes_to_num(rUIDBCC2, 4);
2537 // CascadeTag, CT
2538 rUIDBCC1[0] = 0x88;
2539 // BCC
2540 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2541 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2542 if (MF_DBGLEVEL >= 2) {
2543 Dbprintf("7B UID: %02x %02x %02x %02x %02x %02x %02x",
2544 rUIDBCC1[1],
2545 rUIDBCC1[2],
2546 rUIDBCC1[3],
2547 rUIDBCC2[0],
2548 rUIDBCC2[1],
2549 rUIDBCC2[2],
2550 rUIDBCC2[3]
2551 );
2552 }
2553 break;
2554 case 10:
2555 atqa[0] |= 0x80;
2556 sak_10[0] &= 0xFB;
2557 // save CUID
2558 cuid = bytes_to_num(rUIDBCC3, 4);
2559 // CascadeTag, CT
2560 rUIDBCC1[0] = 0x88;
2561 rUIDBCC2[0] = 0x88;
2562 // BCC
2563 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2564 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2565 rUIDBCC3[4] = rUIDBCC3[0] ^ rUIDBCC3[1] ^ rUIDBCC3[2] ^ rUIDBCC3[3];
2566
2567 if (MF_DBGLEVEL >= 2) {
2568 Dbprintf("10B UID: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
2569 rUIDBCC1[1],
2570 rUIDBCC1[2],
2571 rUIDBCC1[3],
2572 rUIDBCC2[1],
2573 rUIDBCC2[2],
2574 rUIDBCC2[3],
2575 rUIDBCC3[0],
2576 rUIDBCC3[1],
2577 rUIDBCC3[2],
2578 rUIDBCC3[3]
2579 );
2580 }
2581 break;
2582 default:
2583 break;
2584 }
2585 // calc some crcs
2586 ComputeCrc14443(CRC_14443_A, sak_4, 1, &sak_4[1], &sak_4[2]);
2587 ComputeCrc14443(CRC_14443_A, sak_7, 1, &sak_7[1], &sak_7[2]);
2588 ComputeCrc14443(CRC_14443_A, sak_10, 1, &sak_10[1], &sak_10[2]);
2589
2590 // We need to listen to the high-frequency, peak-detected path.
2591 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2592
2593 // free eventually allocated BigBuf memory but keep Emulator Memory
2594 BigBuf_free_keep_EM();
2595 clear_trace();
2596 set_tracing(TRUE);
2597
2598 bool finished = FALSE;
2599 while (!BUTTON_PRESS() && !finished && !usb_poll_validate_length()) {
2600 WDT_HIT();
2601
2602 // find reader field
2603 if (cardSTATE == MFEMUL_NOFIELD) {
2604 vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
2605 if (vHf > MF_MINFIELDV) {
2606 cardSTATE_TO_IDLE();
2607 LED_A_ON();
2608 }
2609 }
2610 if (cardSTATE == MFEMUL_NOFIELD) continue;
2611
2612 // Now, get data
2613 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2614 if (res == 2) { //Field is off!
2615 cardSTATE = MFEMUL_NOFIELD;
2616 LEDsoff();
2617 continue;
2618 } else if (res == 1) {
2619 break; // return value 1 means button press
2620 }
2621
2622 // REQ or WUP request in ANY state and WUP in HALTED state
2623 // this if-statement doesn't match the specification above. (iceman)
2624 if (len == 1 && ((receivedCmd[0] == ISO14443A_CMD_REQA && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == ISO14443A_CMD_WUPA)) {
2625 selTimer = GetTickCount();
2626 EmSendCmdEx(atqa, sizeof(atqa), (receivedCmd[0] == ISO14443A_CMD_WUPA));
2627 cardSTATE = MFEMUL_SELECT1;
2628 crypto1_destroy(pcs);
2629 cardAUTHKEY = 0xff;
2630 LEDsoff();
2631 nonce++;
2632 continue;
2633 }
2634
2635 switch (cardSTATE) {
2636 case MFEMUL_NOFIELD:
2637 case MFEMUL_HALTED:
2638 case MFEMUL_IDLE:{
2639 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2640 break;
2641 }
2642 case MFEMUL_SELECT1:{
2643 if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT && receivedCmd[1] == 0x20)) {
2644 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2645 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2646 break;
2647 }
2648 // select card
2649 if (len == 9 &&
2650 ( receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT &&
2651 receivedCmd[1] == 0x70 &&
2652 memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2653
2654 // SAK 4b
2655 EmSendCmd(sak_4, sizeof(sak_4));
2656 switch(_UID_LEN){
2657 case 4:
2658 cardSTATE = MFEMUL_WORK;
2659 LED_B_ON();
2660 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2661 continue;
2662 case 7:
2663 case 10:
2664 cardSTATE = MFEMUL_SELECT2;
2665 continue;
2666 default:break;
2667 }
2668 } else {
2669 cardSTATE_TO_IDLE();
2670 }
2671 break;
2672 }
2673 case MFEMUL_SELECT2:{
2674 if (!len) {
2675 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2676 break;
2677 }
2678 if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2 && receivedCmd[1] == 0x20)) {
2679 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2680 break;
2681 }
2682 if (len == 9 &&
2683 (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2 &&
2684 receivedCmd[1] == 0x70 &&
2685 memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0) ) {
2686
2687 EmSendCmd(sak_7, sizeof(sak_7));
2688 switch(_UID_LEN){
2689 case 7:
2690 cardSTATE = MFEMUL_WORK;
2691 LED_B_ON();
2692 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2693 continue;
2694 case 10:
2695 cardSTATE = MFEMUL_SELECT3;
2696 continue;
2697 default:break;
2698 }
2699 }
2700 cardSTATE_TO_IDLE();
2701 break;
2702 }
2703 case MFEMUL_SELECT3:{
2704 if (!len) {
2705 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2706 break;
2707 }
2708 if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3 && receivedCmd[1] == 0x20)) {
2709 EmSendCmd(rUIDBCC3, sizeof(rUIDBCC3));
2710 break;
2711 }
2712 if (len == 9 &&
2713 (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3 &&
2714 receivedCmd[1] == 0x70 &&
2715 memcmp(&receivedCmd[2], rUIDBCC3, 4) == 0) ) {
2716
2717 EmSendCmd(sak_10, sizeof(sak_10));
2718 cardSTATE = MFEMUL_WORK;
2719 LED_B_ON();
2720 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol3 time: %d", GetTickCount() - selTimer);
2721 break;
2722 }
2723 cardSTATE_TO_IDLE();
2724 break;
2725 }
2726 case MFEMUL_AUTH1:{
2727 if( len != 8) {
2728 cardSTATE_TO_IDLE();
2729 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2730 break;
2731 }
2732
2733 uint32_t nr = bytes_to_num(receivedCmd, 4);
2734 uint32_t ar = bytes_to_num(&receivedCmd[4], 4);
2735
2736 if (doBufResetNext) {
2737 // Reset, lets try again!
2738 Dbprintf("Re-read after previous NR_AR_ATTACK, resetting buffer");
2739 memset(ar_nr_resp, 0x00, sizeof(ar_nr_resp));
2740 memset(ar_nr_collected, 0x00, sizeof(ar_nr_collected));
2741 mM = 0;
2742 doBufResetNext = false;
2743 }
2744
2745 for (uint8_t i = 0; i < ATTACK_KEY_COUNT; i++) {
2746 if ( ar_nr_collected[i+mM]==0 || ((cardAUTHSC == ar_nr_resp[i+mM].sector) && (cardAUTHKEY == ar_nr_resp[i+mM].keytype) && (ar_nr_collected[i+mM] > 0)) ) {
2747
2748 // if first auth for sector, or matches sector and keytype of previous auth
2749 if (ar_nr_collected[i+mM] < 2) {
2750 // if we haven't already collected 2 nonces for this sector
2751 if (ar_nr_resp[ar_nr_collected[i+mM]].ar != ar) {
2752 // Avoid duplicates... probably not necessary, ar should vary.
2753 if (ar_nr_collected[i+mM]==0) {
2754 // first nonce collect
2755 ar_nr_resp[i+mM].cuid = cuid;
2756 ar_nr_resp[i+mM].sector = cardAUTHSC;
2757 ar_nr_resp[i+mM].keytype = cardAUTHKEY;
2758 ar_nr_resp[i+mM].nonce = nonce;
2759 ar_nr_resp[i+mM].nr = nr;
2760 ar_nr_resp[i+mM].ar = ar;
2761 nonce1_count++;
2762 // add this nonce to first moebius nonce
2763 ar_nr_resp[i+ATTACK_KEY_COUNT].cuid = cuid;
2764 ar_nr_resp[i+ATTACK_KEY_COUNT].sector = cardAUTHSC;
2765 ar_nr_resp[i+ATTACK_KEY_COUNT].keytype = cardAUTHKEY;
2766 ar_nr_resp[i+ATTACK_KEY_COUNT].nonce = nonce;
2767 ar_nr_resp[i+ATTACK_KEY_COUNT].nr = nr;
2768 ar_nr_resp[i+ATTACK_KEY_COUNT].ar = ar;
2769 ar_nr_collected[i+ATTACK_KEY_COUNT]++;
2770 } else { // second nonce collect (std and moebius)
2771 ar_nr_resp[i+mM].nonce2 = nonce;
2772 ar_nr_resp[i+mM].nr2 = nr;
2773 ar_nr_resp[i+mM].ar2 = ar;
2774 if (!gettingMoebius) {
2775 nonce2_count++;
2776 // check if this was the last second nonce we need for std attack
2777 if ( nonce2_count == nonce1_count ) {
2778 // done collecting std test switch to moebius
2779 // first finish incrementing last sample
2780 ar_nr_collected[i+mM]++;
2781 // switch to moebius collection
2782 gettingMoebius = true;
2783 mM = ATTACK_KEY_COUNT;
2784 break;
2785 }
2786 } else {
2787 moebius_n_count++;
2788 // if we've collected all the nonces we need - finish.
2789
2790 if (nonce1_count == moebius_n_count) {
2791 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_resp,sizeof(ar_nr_resp));
2792 nonce1_count = 0;
2793 nonce2_count = 0;
2794 moebius_n_count = 0;
2795 gettingMoebius = false;
2796 doBufResetNext = true;
2797 finished = ( ((flags & FLAG_INTERACTIVE) == FLAG_INTERACTIVE));
2798 }
2799 }
2800 }
2801 ar_nr_collected[i+mM]++;
2802 }
2803 }
2804 // we found right spot for this nonce stop looking
2805 break;
2806 }
2807 }
2808
2809
2810 /*
2811 // Collect AR/NR
2812 // if(ar_nr_collected < 2 && cardAUTHSC == 2){
2813 if(ar_nr_collected < 2) {
2814 // if(ar_nr_responses[2] != nr) {
2815 ar_nr_responses[ar_nr_collected*4] = cuid;
2816 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2817 ar_nr_responses[ar_nr_collected*4+2] = nr;
2818 ar_nr_responses[ar_nr_collected*4+3] = ar;
2819 ar_nr_collected++;
2820 // }
2821
2822 // Interactive mode flag, means we need to send ACK
2823 finished = ( ((flags & FLAG_INTERACTIVE) == FLAG_INTERACTIVE)&& ar_nr_collected == 2);
2824 }
2825
2826 crypto1_word(pcs, ar , 1);
2827 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2828
2829 test if auth OK
2830 if (cardRr != prng_successor(nonce, 64)){
2831
2832 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2833 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2834 cardRr, prng_successor(nonce, 64));
2835 Shouldn't we respond anything here?
2836 Right now, we don't nack or anything, which causes the
2837 reader to do a WUPA after a while. /Martin
2838 -- which is the correct response. /piwi
2839 cardSTATE_TO_IDLE();
2840 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2841 break;
2842 }
2843 */
2844
2845 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2846 num_to_bytes(ans, 4, rAUTH_AT);
2847 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2848 LED_C_ON();
2849
2850 if (MF_DBGLEVEL >= 4) {
2851 Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2852 cardAUTHSC,
2853 cardAUTHKEY == 0 ? 'A' : 'B',
2854 GetTickCount() - authTimer
2855 );
2856 }
2857 cardSTATE = MFEMUL_WORK;
2858 break;
2859 }
2860 case MFEMUL_WORK:{
2861 if (len == 0) {
2862 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2863 break;
2864 }
2865 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2866
2867 if(encrypted_data)
2868 mf_crypto1_decrypt(pcs, receivedCmd, len);
2869
2870 if (len == 4 && (receivedCmd[0] == MIFARE_AUTH_KEYA ||
2871 receivedCmd[0] == MIFARE_AUTH_KEYB) ) {
2872
2873 authTimer = GetTickCount();
2874 cardAUTHSC = receivedCmd[1] / 4; // received block num
2875 cardAUTHKEY = receivedCmd[0] - 0x60; // & 1
2876 crypto1_destroy(pcs);
2877 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2878
2879 if (!encrypted_data) {
2880 // first authentication
2881 crypto1_word(pcs, cuid ^ nonce, 0);// Update crypto state
2882 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2883
2884 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2885
2886 } else {
2887 // nested authentication
2888 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2889 num_to_bytes(ans, 4, rAUTH_AT);
2890
2891 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2892 }
2893
2894 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2895 cardSTATE = MFEMUL_AUTH1;
2896 break;
2897 }
2898
2899 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2900 // BUT... ACK --> NACK
2901 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2902 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2903 break;
2904 }
2905
2906 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2907 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2908 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2909 break;
2910 }
2911
2912 if(len != 4) {
2913 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2914 break;
2915 }
2916
2917 if ( receivedCmd[0] == ISO14443A_CMD_READBLOCK ||
2918 receivedCmd[0] == ISO14443A_CMD_WRITEBLOCK ||
2919 receivedCmd[0] == MIFARE_CMD_INC ||
2920 receivedCmd[0] == MIFARE_CMD_DEC ||
2921 receivedCmd[0] == MIFARE_CMD_RESTORE ||
2922 receivedCmd[0] == MIFARE_CMD_TRANSFER ) {
2923
2924 if (receivedCmd[1] >= 16 * 4) {
2925 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2926 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2927 break;
2928 }
2929
2930 if (receivedCmd[1] / 4 != cardAUTHSC) {
2931 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2932 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2933 break;
2934 }
2935 }
2936 // read block
2937 if (receivedCmd[0] == ISO14443A_CMD_READBLOCK) {
2938 if (MF_DBGLEVEL >= 4) Dbprintf("Reader reading block %d (0x%02x)", receivedCmd[1], receivedCmd[1]);
2939
2940 emlGetMem(response, receivedCmd[1], 1);
2941 AppendCrc14443a(response, 16);
2942 mf_crypto1_encrypt(pcs, response, 18, response_par);
2943 EmSendCmdPar(response, 18, response_par);
2944 numReads++;
2945 if(exitAfterNReads > 0 && numReads >= exitAfterNReads) {
2946 Dbprintf("%d reads done, exiting", numReads);
2947 finished = true;
2948 }
2949 break;
2950 }
2951 // write block
2952 if (receivedCmd[0] == ISO14443A_CMD_WRITEBLOCK) {
2953 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)", receivedCmd[1], receivedCmd[1]);
2954 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2955 cardSTATE = MFEMUL_WRITEBL2;
2956 cardWRBL = receivedCmd[1];
2957 break;
2958 }
2959 // increment, decrement, restore
2960 if ( receivedCmd[0] == MIFARE_CMD_INC ||
2961 receivedCmd[0] == MIFARE_CMD_DEC ||
2962 receivedCmd[0] == MIFARE_CMD_RESTORE) {
2963
2964 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0], receivedCmd[1], receivedCmd[1]);
2965
2966 if (emlCheckValBl(receivedCmd[1])) {
2967 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2968 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2969 break;
2970 }
2971 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2972 if (receivedCmd[0] == MIFARE_CMD_INC) cardSTATE = MFEMUL_INTREG_INC;
2973 if (receivedCmd[0] == MIFARE_CMD_DEC) cardSTATE = MFEMUL_INTREG_DEC;
2974 if (receivedCmd[0] == MIFARE_CMD_RESTORE) cardSTATE = MFEMUL_INTREG_REST;
2975 cardWRBL = receivedCmd[1];
2976 break;
2977 }
2978 // transfer
2979 if (receivedCmd[0] == MIFARE_CMD_TRANSFER) {
2980 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)", receivedCmd[0], receivedCmd[1], receivedCmd[1]);
2981 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2982 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2983 else
2984 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2985 break;
2986 }
2987 // halt
2988 if (receivedCmd[0] == ISO14443A_CMD_HALT && receivedCmd[1] == 0x00) {
2989 LED_B_OFF();
2990 LED_C_OFF();
2991 cardSTATE = MFEMUL_HALTED;
2992 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2993 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2994 break;
2995 }
2996 // RATS
2997 if (receivedCmd[0] == ISO14443A_CMD_RATS) {
2998 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2999 break;
3000 }
3001 // command not allowed
3002 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
3003 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
3004 break;
3005 }
3006 case MFEMUL_WRITEBL2:{
3007 if (len == 18) {
3008 mf_crypto1_decrypt(pcs, receivedCmd, len);
3009 emlSetMem(receivedCmd, cardWRBL, 1);
3010 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
3011 cardSTATE = MFEMUL_WORK;
3012 } else {
3013 cardSTATE_TO_IDLE();
3014 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
3015 }
3016 break;
3017 }
3018 case MFEMUL_INTREG_INC:{
3019 mf_crypto1_decrypt(pcs, receivedCmd, len);
3020 memcpy(&ans, receivedCmd, 4);
3021 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
3022 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
3023 cardSTATE_TO_IDLE();
3024 break;
3025 }
3026 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
3027 cardINTREG = cardINTREG + ans;
3028 cardSTATE = MFEMUL_WORK;
3029 break;
3030 }
3031 case MFEMUL_INTREG_DEC:{
3032 mf_crypto1_decrypt(pcs, receivedCmd, len);
3033 memcpy(&ans, receivedCmd, 4);
3034 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
3035 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
3036 cardSTATE_TO_IDLE();
3037 break;
3038 }
3039 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
3040 cardINTREG = cardINTREG - ans;
3041 cardSTATE = MFEMUL_WORK;
3042 break;
3043 }
3044 case MFEMUL_INTREG_REST:{
3045 mf_crypto1_decrypt(pcs, receivedCmd, len);
3046 memcpy(&ans, receivedCmd, 4);
3047 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
3048 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
3049 cardSTATE_TO_IDLE();
3050 break;
3051 }
3052 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
3053 cardSTATE = MFEMUL_WORK;
3054 break;
3055 }
3056 }
3057 }
3058
3059 // Interactive mode flag, means we need to send ACK
3060 /*
3061 if((flags & FLAG_INTERACTIVE) == FLAG_INTERACTIVE) {
3062 // May just aswell send the collected ar_nr in the response aswell
3063 uint8_t len = ar_nr_collected * 4 * 4;
3064 cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len);
3065 }
3066
3067 */
3068 if( ((flags & FLAG_NR_AR_ATTACK) == FLAG_NR_AR_ATTACK ) && MF_DBGLEVEL >= 1 ) {
3069 for ( uint8_t i = 0; i < ATTACK_KEY_COUNT; i++) {
3070 if (ar_nr_collected[i] == 2) {
3071 Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i<ATTACK_KEY_COUNT/2) ? "keyA" : "keyB", ar_nr_resp[i].sector);
3072 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
3073 ar_nr_resp[i].cuid, //UID
3074 ar_nr_resp[i].nonce, //NT
3075 ar_nr_resp[i].nr, //NR1
3076 ar_nr_resp[i].ar, //AR1
3077 ar_nr_resp[i].nr2, //NR2
3078 ar_nr_resp[i].ar2 //AR2
3079 );
3080 }
3081 }
3082 for ( uint8_t i = ATTACK_KEY_COUNT; i < ATTACK_KEY_COUNT*2; i++) {
3083 if (ar_nr_collected[i] == 2) {
3084 Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i<ATTACK_KEY_COUNT/2) ? "keyA" : "keyB", ar_nr_resp[i].sector);
3085 Dbprintf("../tools/mfkey/mfkey32v2 %08x %08x %08x %08x %08x %08x %08x",
3086 ar_nr_resp[i].cuid, //UID
3087 ar_nr_resp[i].nonce, //NT
3088 ar_nr_resp[i].nr, //NR1
3089 ar_nr_resp[i].ar, //AR1
3090 ar_nr_resp[i].nonce2,//NT2
3091 ar_nr_resp[i].nr2, //NR2
3092 ar_nr_resp[i].ar2 //AR2
3093 );
3094 }
3095 }
3096 }
3097
3098
3099 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen());
3100
3101 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
3102 LEDsoff();
3103 set_tracing(FALSE);
3104 }
3105
3106
3107 //-----------------------------------------------------------------------------
3108 // MIFARE sniffer.
3109 //
3110 // if no activity for 2sec, it sends the collected data to the client.
3111 //-----------------------------------------------------------------------------
3112 // "hf mf sniff"
3113 void RAMFUNC SniffMifare(uint8_t param) {
3114
3115 LEDsoff();
3116
3117 // free eventually allocated BigBuf memory
3118 BigBuf_free(); BigBuf_Clear_ext(false);
3119 clear_trace();
3120 set_tracing(TRUE);
3121
3122 // The command (reader -> tag) that we're receiving.
3123 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00};
3124 uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE] = {0x00};
3125
3126 // The response (tag -> reader) that we're receiving.
3127 uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE] = {0x00};
3128 uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE] = {0x00};
3129
3130 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
3131
3132 // allocate the DMA buffer, used to stream samples from the FPGA
3133 // [iceman] is this sniffed data unsigned?
3134 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
3135 uint8_t *data = dmaBuf;
3136 uint8_t previous_data = 0;
3137 int maxDataLen = 0;
3138 int dataLen = 0;
3139 bool ReaderIsActive = FALSE;
3140 bool TagIsActive = FALSE;
3141
3142 // Set up the demodulator for tag -> reader responses.
3143 DemodInit(receivedResponse, receivedResponsePar);
3144
3145 // Set up the demodulator for the reader -> tag commands
3146 UartInit(receivedCmd, receivedCmdPar);
3147
3148 // Setup and start DMA.
3149 // set transfer address and number of bytes. Start transfer.
3150 if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE) ){
3151 if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
3152 return;
3153 }
3154
3155 LED_D_OFF();
3156
3157 MfSniffInit();
3158
3159 // And now we loop, receiving samples.
3160 for(uint32_t sniffCounter = 0;; ) {
3161
3162 LED_A_ON();
3163 WDT_HIT();
3164
3165 if(BUTTON_PRESS()) {
3166 DbpString("cancelled by button");
3167 break;
3168 }
3169
3170 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
3171 // check if a transaction is completed (timeout after 2000ms).
3172 // if yes, stop the DMA transfer and send what we have so far to the client
3173 if (MfSniffSend(2000)) {
3174 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3175 sniffCounter = 0;
3176 data = dmaBuf;
3177 maxDataLen = 0;
3178 ReaderIsActive = FALSE;
3179 TagIsActive = FALSE;
3180 // Setup and start DMA. set transfer address and number of bytes. Start transfer.
3181 if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE) ){
3182 if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
3183 return;
3184 }
3185 }
3186 }
3187
3188 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
3189 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
3190
3191 if (readBufDataP <= dmaBufDataP) // we are processing the same block of data which is currently being transferred
3192 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
3193 else
3194 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
3195
3196 // test for length of buffer
3197 if(dataLen > maxDataLen) { // we are more behind than ever...
3198 maxDataLen = dataLen;
3199 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
3200 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
3201 break;
3202 }
3203 }
3204 if(dataLen < 1) continue;
3205
3206 // primary buffer was stopped ( <-- we lost data!
3207 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
3208 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
3209 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
3210 Dbprintf("RxEmpty ERROR, data length:%d", dataLen); // temporary
3211 }
3212 // secondary buffer sets as primary, secondary buffer was stopped
3213 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
3214 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
3215 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
3216 }
3217
3218 LED_A_OFF();
3219
3220 if (sniffCounter & 0x01) {
3221
3222 // no need to try decoding tag data if the reader is sending
3223 if(!TagIsActive) {
3224 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
3225 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
3226 LED_C_INV();
3227
3228 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
3229
3230 UartInit(receivedCmd, receivedCmdPar);
3231 DemodReset();
3232 }
3233 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
3234 }
3235
3236 // no need to try decoding tag data if the reader is sending
3237 if(!ReaderIsActive) {
3238 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
3239 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
3240 LED_C_INV();
3241
3242 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
3243
3244 DemodReset();
3245 UartInit(receivedCmd, receivedCmdPar);
3246 }
3247 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
3248 }
3249 }
3250
3251 previous_data = *data;
3252 sniffCounter++;
3253 data++;
3254
3255 if(data == dmaBuf + DMA_BUFFER_SIZE)
3256 data = dmaBuf;
3257
3258 } // main cycle
3259
3260 if (MF_DBGLEVEL >= 1) Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
3261
3262 FpgaDisableSscDma();
3263 MfSniffEnd();
3264 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
3265 LEDsoff();
3266 set_tracing(FALSE);
3267 }
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