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Legic: rewrite reader to use xcorrelation and precise timing (#654)
[proxmark3-svn] / armsrc / iclass.c
1 //-----------------------------------------------------------------------------
2 // Gerhard de Koning Gans - May 2008
3 // Hagen Fritsch - June 2010
4 // Gerhard de Koning Gans - May 2011
5 // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support iClass.
12 //-----------------------------------------------------------------------------
13 // Based on ISO14443a implementation. Still in experimental phase.
14 // Contribution made during a security research at Radboud University Nijmegen
15 //
16 // Please feel free to contribute and extend iClass support!!
17 //-----------------------------------------------------------------------------
18 //
19 // FIX:
20 // ====
21 // We still have sometimes a demodulation error when snooping iClass communication.
22 // The resulting trace of a read-block-03 command may look something like this:
23 //
24 // + 22279: : 0c 03 e8 01
25 //
26 // ...with an incorrect answer...
27 //
28 // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29 //
30 // We still left the error signalling bytes in the traces like 0xbb
31 //
32 // A correct trace should look like this:
33 //
34 // + 21112: : 0c 03 e8 01
35 // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36 //
37 //-----------------------------------------------------------------------------
38
39 #include "proxmark3.h"
40 #include "apps.h"
41 #include "util.h"
42 #include "string.h"
43 #include "common.h"
44 #include "cmd.h"
45 #include "iso14443a.h"
46 // Needed for CRC in emulation mode;
47 // same construction as in ISO 14443;
48 // different initial value (CRC_ICLASS)
49 #include "iso14443crc.h"
50 #include "iso15693tools.h"
51 #include "protocols.h"
52 #include "optimized_cipher.h"
53 #include "usb_cdc.h" // for usb_poll_validate_length
54
55 static int timeout = 4096;
56
57
58 static int SendIClassAnswer(uint8_t *resp, int respLen, int delay);
59
60 //-----------------------------------------------------------------------------
61 // The software UART that receives commands from the reader, and its state
62 // variables.
63 //-----------------------------------------------------------------------------
64 static struct {
65 enum {
66 STATE_UNSYNCD,
67 STATE_START_OF_COMMUNICATION,
68 STATE_RECEIVING
69 } state;
70 uint16_t shiftReg;
71 int bitCnt;
72 int byteCnt;
73 int byteCntMax;
74 int posCnt;
75 int nOutOfCnt;
76 int OutOfCnt;
77 int syncBit;
78 int samples;
79 int highCnt;
80 int swapper;
81 int counter;
82 int bitBuffer;
83 int dropPosition;
84 uint8_t *output;
85 } Uart;
86
87 static RAMFUNC int OutOfNDecoding(int bit)
88 {
89 //int error = 0;
90 int bitright;
91
92 if(!Uart.bitBuffer) {
93 Uart.bitBuffer = bit ^ 0xFF0;
94 return false;
95 }
96 else {
97 Uart.bitBuffer <<= 4;
98 Uart.bitBuffer ^= bit;
99 }
100
101 /*if(Uart.swapper) {
102 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
103 Uart.byteCnt++;
104 Uart.swapper = 0;
105 if(Uart.byteCnt > 15) { return true; }
106 }
107 else {
108 Uart.swapper = 1;
109 }*/
110
111 if(Uart.state != STATE_UNSYNCD) {
112 Uart.posCnt++;
113
114 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
115 bit = 0x00;
116 }
117 else {
118 bit = 0x01;
119 }
120 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
121 bitright = 0x00;
122 }
123 else {
124 bitright = 0x01;
125 }
126 if(bit != bitright) { bit = bitright; }
127
128
129 // So, now we only have to deal with *bit*, lets see...
130 if(Uart.posCnt == 1) {
131 // measurement first half bitperiod
132 if(!bit) {
133 // Drop in first half means that we are either seeing
134 // an SOF or an EOF.
135
136 if(Uart.nOutOfCnt == 1) {
137 // End of Communication
138 Uart.state = STATE_UNSYNCD;
139 Uart.highCnt = 0;
140 if(Uart.byteCnt == 0) {
141 // Its not straightforward to show single EOFs
142 // So just leave it and do not return true
143 Uart.output[0] = 0xf0;
144 Uart.byteCnt++;
145 }
146 else {
147 return true;
148 }
149 }
150 else if(Uart.state != STATE_START_OF_COMMUNICATION) {
151 // When not part of SOF or EOF, it is an error
152 Uart.state = STATE_UNSYNCD;
153 Uart.highCnt = 0;
154 //error = 4;
155 }
156 }
157 }
158 else {
159 // measurement second half bitperiod
160 // Count the bitslot we are in... (ISO 15693)
161 Uart.nOutOfCnt++;
162
163 if(!bit) {
164 if(Uart.dropPosition) {
165 if(Uart.state == STATE_START_OF_COMMUNICATION) {
166 //error = 1;
167 }
168 else {
169 //error = 7;
170 }
171 // It is an error if we already have seen a drop in current frame
172 Uart.state = STATE_UNSYNCD;
173 Uart.highCnt = 0;
174 }
175 else {
176 Uart.dropPosition = Uart.nOutOfCnt;
177 }
178 }
179
180 Uart.posCnt = 0;
181
182
183 if(Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
184 Uart.nOutOfCnt = 0;
185
186 if(Uart.state == STATE_START_OF_COMMUNICATION) {
187 if(Uart.dropPosition == 4) {
188 Uart.state = STATE_RECEIVING;
189 Uart.OutOfCnt = 256;
190 }
191 else if(Uart.dropPosition == 3) {
192 Uart.state = STATE_RECEIVING;
193 Uart.OutOfCnt = 4;
194 //Uart.output[Uart.byteCnt] = 0xdd;
195 //Uart.byteCnt++;
196 }
197 else {
198 Uart.state = STATE_UNSYNCD;
199 Uart.highCnt = 0;
200 }
201 Uart.dropPosition = 0;
202 }
203 else {
204 // RECEIVING DATA
205 // 1 out of 4
206 if(!Uart.dropPosition) {
207 Uart.state = STATE_UNSYNCD;
208 Uart.highCnt = 0;
209 //error = 9;
210 }
211 else {
212 Uart.shiftReg >>= 2;
213
214 // Swap bit order
215 Uart.dropPosition--;
216 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
217 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
218
219 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
220 Uart.bitCnt += 2;
221 Uart.dropPosition = 0;
222
223 if(Uart.bitCnt == 8) {
224 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
225 Uart.byteCnt++;
226 Uart.bitCnt = 0;
227 Uart.shiftReg = 0;
228 }
229 }
230 }
231 }
232 else if(Uart.nOutOfCnt == Uart.OutOfCnt) {
233 // RECEIVING DATA
234 // 1 out of 256
235 if(!Uart.dropPosition) {
236 Uart.state = STATE_UNSYNCD;
237 Uart.highCnt = 0;
238 //error = 3;
239 }
240 else {
241 Uart.dropPosition--;
242 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
243 Uart.byteCnt++;
244 Uart.bitCnt = 0;
245 Uart.shiftReg = 0;
246 Uart.nOutOfCnt = 0;
247 Uart.dropPosition = 0;
248 }
249 }
250
251 /*if(error) {
252 Uart.output[Uart.byteCnt] = 0xAA;
253 Uart.byteCnt++;
254 Uart.output[Uart.byteCnt] = error & 0xFF;
255 Uart.byteCnt++;
256 Uart.output[Uart.byteCnt] = 0xAA;
257 Uart.byteCnt++;
258 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
259 Uart.byteCnt++;
260 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
261 Uart.byteCnt++;
262 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
263 Uart.byteCnt++;
264 Uart.output[Uart.byteCnt] = 0xAA;
265 Uart.byteCnt++;
266 return true;
267 }*/
268 }
269
270 }
271 else {
272 bit = Uart.bitBuffer & 0xf0;
273 bit >>= 4;
274 bit ^= 0x0F; // drops become 1s ;-)
275 if(bit) {
276 // should have been high or at least (4 * 128) / fc
277 // according to ISO this should be at least (9 * 128 + 20) / fc
278 if(Uart.highCnt == 8) {
279 // we went low, so this could be start of communication
280 // it turns out to be safer to choose a less significant
281 // syncbit... so we check whether the neighbour also represents the drop
282 Uart.posCnt = 1; // apparently we are busy with our first half bit period
283 Uart.syncBit = bit & 8;
284 Uart.samples = 3;
285 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
286 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
287 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
288 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
289 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
290 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
291 Uart.syncBit = 8;
292
293 // the first half bit period is expected in next sample
294 Uart.posCnt = 0;
295 Uart.samples = 3;
296 }
297 }
298 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
299
300 Uart.syncBit <<= 4;
301 Uart.state = STATE_START_OF_COMMUNICATION;
302 Uart.bitCnt = 0;
303 Uart.byteCnt = 0;
304 Uart.nOutOfCnt = 0;
305 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
306 Uart.dropPosition = 0;
307 Uart.shiftReg = 0;
308 //error = 0;
309 }
310 else {
311 Uart.highCnt = 0;
312 }
313 }
314 else {
315 if(Uart.highCnt < 8) {
316 Uart.highCnt++;
317 }
318 }
319 }
320
321 return false;
322 }
323
324 //=============================================================================
325 // Manchester
326 //=============================================================================
327
328 static struct {
329 enum {
330 DEMOD_UNSYNCD,
331 DEMOD_START_OF_COMMUNICATION,
332 DEMOD_START_OF_COMMUNICATION2,
333 DEMOD_START_OF_COMMUNICATION3,
334 DEMOD_SOF_COMPLETE,
335 DEMOD_MANCHESTER_D,
336 DEMOD_MANCHESTER_E,
337 DEMOD_END_OF_COMMUNICATION,
338 DEMOD_END_OF_COMMUNICATION2,
339 DEMOD_MANCHESTER_F,
340 DEMOD_ERROR_WAIT
341 } state;
342 int bitCount;
343 int posCount;
344 int syncBit;
345 uint16_t shiftReg;
346 int buffer;
347 int buffer2;
348 int buffer3;
349 int buff;
350 int samples;
351 int len;
352 enum {
353 SUB_NONE,
354 SUB_FIRST_HALF,
355 SUB_SECOND_HALF,
356 SUB_BOTH
357 } sub;
358 uint8_t *output;
359 } Demod;
360
361 static RAMFUNC int ManchesterDecoding(int v)
362 {
363 int bit;
364 int modulation;
365 int error = 0;
366
367 bit = Demod.buffer;
368 Demod.buffer = Demod.buffer2;
369 Demod.buffer2 = Demod.buffer3;
370 Demod.buffer3 = v;
371
372 if(Demod.buff < 3) {
373 Demod.buff++;
374 return false;
375 }
376
377 if(Demod.state==DEMOD_UNSYNCD) {
378 Demod.output[Demod.len] = 0xfa;
379 Demod.syncBit = 0;
380 //Demod.samples = 0;
381 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
382
383 if(bit & 0x08) {
384 Demod.syncBit = 0x08;
385 }
386
387 if(bit & 0x04) {
388 if(Demod.syncBit) {
389 bit <<= 4;
390 }
391 Demod.syncBit = 0x04;
392 }
393
394 if(bit & 0x02) {
395 if(Demod.syncBit) {
396 bit <<= 2;
397 }
398 Demod.syncBit = 0x02;
399 }
400
401 if(bit & 0x01 && Demod.syncBit) {
402 Demod.syncBit = 0x01;
403 }
404
405 if(Demod.syncBit) {
406 Demod.len = 0;
407 Demod.state = DEMOD_START_OF_COMMUNICATION;
408 Demod.sub = SUB_FIRST_HALF;
409 Demod.bitCount = 0;
410 Demod.shiftReg = 0;
411 Demod.samples = 0;
412 if(Demod.posCount) {
413 //if(trigger) LED_A_OFF(); // Not useful in this case...
414 switch(Demod.syncBit) {
415 case 0x08: Demod.samples = 3; break;
416 case 0x04: Demod.samples = 2; break;
417 case 0x02: Demod.samples = 1; break;
418 case 0x01: Demod.samples = 0; break;
419 }
420 // SOF must be long burst... otherwise stay unsynced!!!
421 if(!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
422 Demod.state = DEMOD_UNSYNCD;
423 }
424 }
425 else {
426 // SOF must be long burst... otherwise stay unsynced!!!
427 if(!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
428 Demod.state = DEMOD_UNSYNCD;
429 error = 0x88;
430 }
431
432 }
433 error = 0;
434
435 }
436 }
437 else {
438 modulation = bit & Demod.syncBit;
439 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
440
441 Demod.samples += 4;
442
443 if(Demod.posCount==0) {
444 Demod.posCount = 1;
445 if(modulation) {
446 Demod.sub = SUB_FIRST_HALF;
447 }
448 else {
449 Demod.sub = SUB_NONE;
450 }
451 }
452 else {
453 Demod.posCount = 0;
454 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
455 if(Demod.state!=DEMOD_ERROR_WAIT) {
456 Demod.state = DEMOD_ERROR_WAIT;
457 Demod.output[Demod.len] = 0xaa;
458 error = 0x01;
459 }
460 }*/
461 //else if(modulation) {
462 if(modulation) {
463 if(Demod.sub == SUB_FIRST_HALF) {
464 Demod.sub = SUB_BOTH;
465 }
466 else {
467 Demod.sub = SUB_SECOND_HALF;
468 }
469 }
470 else if(Demod.sub == SUB_NONE) {
471 if(Demod.state == DEMOD_SOF_COMPLETE) {
472 Demod.output[Demod.len] = 0x0f;
473 Demod.len++;
474 Demod.state = DEMOD_UNSYNCD;
475 // error = 0x0f;
476 return true;
477 }
478 else {
479 Demod.state = DEMOD_ERROR_WAIT;
480 error = 0x33;
481 }
482 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
483 Demod.state = DEMOD_ERROR_WAIT;
484 Demod.output[Demod.len] = 0xaa;
485 error = 0x01;
486 }*/
487 }
488
489 switch(Demod.state) {
490 case DEMOD_START_OF_COMMUNICATION:
491 if(Demod.sub == SUB_BOTH) {
492 //Demod.state = DEMOD_MANCHESTER_D;
493 Demod.state = DEMOD_START_OF_COMMUNICATION2;
494 Demod.posCount = 1;
495 Demod.sub = SUB_NONE;
496 }
497 else {
498 Demod.output[Demod.len] = 0xab;
499 Demod.state = DEMOD_ERROR_WAIT;
500 error = 0xd2;
501 }
502 break;
503 case DEMOD_START_OF_COMMUNICATION2:
504 if(Demod.sub == SUB_SECOND_HALF) {
505 Demod.state = DEMOD_START_OF_COMMUNICATION3;
506 }
507 else {
508 Demod.output[Demod.len] = 0xab;
509 Demod.state = DEMOD_ERROR_WAIT;
510 error = 0xd3;
511 }
512 break;
513 case DEMOD_START_OF_COMMUNICATION3:
514 if(Demod.sub == SUB_SECOND_HALF) {
515 // Demod.state = DEMOD_MANCHESTER_D;
516 Demod.state = DEMOD_SOF_COMPLETE;
517 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
518 //Demod.len++;
519 }
520 else {
521 Demod.output[Demod.len] = 0xab;
522 Demod.state = DEMOD_ERROR_WAIT;
523 error = 0xd4;
524 }
525 break;
526 case DEMOD_SOF_COMPLETE:
527 case DEMOD_MANCHESTER_D:
528 case DEMOD_MANCHESTER_E:
529 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
530 // 00001111 = 1 (0 in 14443)
531 if(Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
532 Demod.bitCount++;
533 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
534 Demod.state = DEMOD_MANCHESTER_D;
535 }
536 else if(Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
537 Demod.bitCount++;
538 Demod.shiftReg >>= 1;
539 Demod.state = DEMOD_MANCHESTER_E;
540 }
541 else if(Demod.sub == SUB_BOTH) {
542 Demod.state = DEMOD_MANCHESTER_F;
543 }
544 else {
545 Demod.state = DEMOD_ERROR_WAIT;
546 error = 0x55;
547 }
548 break;
549
550 case DEMOD_MANCHESTER_F:
551 // Tag response does not need to be a complete byte!
552 if(Demod.len > 0 || Demod.bitCount > 0) {
553 if(Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
554 Demod.shiftReg >>= (9 - Demod.bitCount); // right align data
555 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
556 Demod.len++;
557 }
558
559 Demod.state = DEMOD_UNSYNCD;
560 return true;
561 }
562 else {
563 Demod.output[Demod.len] = 0xad;
564 Demod.state = DEMOD_ERROR_WAIT;
565 error = 0x03;
566 }
567 break;
568
569 case DEMOD_ERROR_WAIT:
570 Demod.state = DEMOD_UNSYNCD;
571 break;
572
573 default:
574 Demod.output[Demod.len] = 0xdd;
575 Demod.state = DEMOD_UNSYNCD;
576 break;
577 }
578
579 /*if(Demod.bitCount>=9) {
580 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
581 Demod.len++;
582
583 Demod.parityBits <<= 1;
584 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
585
586 Demod.bitCount = 0;
587 Demod.shiftReg = 0;
588 }*/
589 if(Demod.bitCount>=8) {
590 Demod.shiftReg >>= 1;
591 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
592 Demod.len++;
593 Demod.bitCount = 0;
594 Demod.shiftReg = 0;
595 }
596
597 if(error) {
598 Demod.output[Demod.len] = 0xBB;
599 Demod.len++;
600 Demod.output[Demod.len] = error & 0xFF;
601 Demod.len++;
602 Demod.output[Demod.len] = 0xBB;
603 Demod.len++;
604 Demod.output[Demod.len] = bit & 0xFF;
605 Demod.len++;
606 Demod.output[Demod.len] = Demod.buffer & 0xFF;
607 Demod.len++;
608 // Look harder ;-)
609 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
610 Demod.len++;
611 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
612 Demod.len++;
613 Demod.output[Demod.len] = 0xBB;
614 Demod.len++;
615 return true;
616 }
617
618 }
619
620 } // end (state != UNSYNCED)
621
622 return false;
623 }
624
625 //=============================================================================
626 // Finally, a `sniffer' for iClass communication
627 // Both sides of communication!
628 //=============================================================================
629
630 //-----------------------------------------------------------------------------
631 // Record the sequence of commands sent by the reader to the tag, with
632 // triggering so that we start recording at the point that the tag is moved
633 // near the reader.
634 //-----------------------------------------------------------------------------
635 void RAMFUNC SnoopIClass(void)
636 {
637
638
639 // We won't start recording the frames that we acquire until we trigger;
640 // a good trigger condition to get started is probably when we see a
641 // response from the tag.
642 //int triggered = false; // false to wait first for card
643
644 // The command (reader -> tag) that we're receiving.
645 // The length of a received command will in most cases be no more than 18 bytes.
646 // So 32 should be enough!
647 #define ICLASS_BUFFER_SIZE 32
648 uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE];
649 // The response (tag -> reader) that we're receiving.
650 uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE];
651
652 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
653
654 // free all BigBuf memory
655 BigBuf_free();
656 // The DMA buffer, used to stream samples from the FPGA
657 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
658
659 set_tracing(true);
660 clear_trace();
661 iso14a_set_trigger(false);
662
663 int lastRxCounter;
664 uint8_t *upTo;
665 int smpl;
666 int maxBehindBy = 0;
667
668 // Count of samples received so far, so that we can include timing
669 // information in the trace buffer.
670 int samples = 0;
671 rsamples = 0;
672
673 // Set up the demodulator for tag -> reader responses.
674 Demod.output = tagToReaderResponse;
675 Demod.len = 0;
676 Demod.state = DEMOD_UNSYNCD;
677
678 // Setup for the DMA.
679 FpgaSetupSsc();
680 upTo = dmaBuf;
681 lastRxCounter = DMA_BUFFER_SIZE;
682 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
683
684 // And the reader -> tag commands
685 memset(&Uart, 0, sizeof(Uart));
686 Uart.output = readerToTagCmd;
687 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
688 Uart.state = STATE_UNSYNCD;
689
690 // And put the FPGA in the appropriate mode
691 // Signal field is off with the appropriate LED
692 LED_D_OFF();
693 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
694 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
695
696 uint32_t time_0 = GetCountSspClk();
697 uint32_t time_start = 0;
698 uint32_t time_stop = 0;
699
700 int div = 0;
701 //int div2 = 0;
702 int decbyte = 0;
703 int decbyter = 0;
704
705 // And now we loop, receiving samples.
706 for(;;) {
707 LED_A_ON();
708 WDT_HIT();
709 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
710 (DMA_BUFFER_SIZE-1);
711 if(behindBy > maxBehindBy) {
712 maxBehindBy = behindBy;
713 if(behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
714 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
715 goto done;
716 }
717 }
718 if(behindBy < 1) continue;
719
720 LED_A_OFF();
721 smpl = upTo[0];
722 upTo++;
723 lastRxCounter -= 1;
724 if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
725 upTo -= DMA_BUFFER_SIZE;
726 lastRxCounter += DMA_BUFFER_SIZE;
727 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
728 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
729 }
730
731 //samples += 4;
732 samples += 1;
733
734 if(smpl & 0xF) {
735 decbyte ^= (1 << (3 - div));
736 }
737
738 // FOR READER SIDE COMMUMICATION...
739
740 decbyter <<= 2;
741 decbyter ^= (smpl & 0x30);
742
743 div++;
744
745 if((div + 1) % 2 == 0) {
746 smpl = decbyter;
747 if(OutOfNDecoding((smpl & 0xF0) >> 4)) {
748 rsamples = samples - Uart.samples;
749 time_stop = (GetCountSspClk()-time_0) << 4;
750 LED_C_ON();
751
752 //if(!LogTrace(Uart.output,Uart.byteCnt, rsamples, Uart.parityBits,true)) break;
753 //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, true)) break;
754 if(tracing) {
755 uint8_t parity[MAX_PARITY_SIZE];
756 GetParity(Uart.output, Uart.byteCnt, parity);
757 LogTrace(Uart.output,Uart.byteCnt, time_start, time_stop, parity, true);
758 }
759
760
761 /* And ready to receive another command. */
762 Uart.state = STATE_UNSYNCD;
763 /* And also reset the demod code, which might have been */
764 /* false-triggered by the commands from the reader. */
765 Demod.state = DEMOD_UNSYNCD;
766 LED_B_OFF();
767 Uart.byteCnt = 0;
768 }else{
769 time_start = (GetCountSspClk()-time_0) << 4;
770 }
771 decbyter = 0;
772 }
773
774 if(div > 3) {
775 smpl = decbyte;
776 if(ManchesterDecoding(smpl & 0x0F)) {
777 time_stop = (GetCountSspClk()-time_0) << 4;
778
779 rsamples = samples - Demod.samples;
780 LED_B_ON();
781
782 if(tracing) {
783 uint8_t parity[MAX_PARITY_SIZE];
784 GetParity(Demod.output, Demod.len, parity);
785 LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, false);
786 }
787
788 // And ready to receive another response.
789 memset(&Demod, 0, sizeof(Demod));
790 Demod.output = tagToReaderResponse;
791 Demod.state = DEMOD_UNSYNCD;
792 LED_C_OFF();
793 }else{
794 time_start = (GetCountSspClk()-time_0) << 4;
795 }
796
797 div = 0;
798 decbyte = 0x00;
799 }
800 //}
801
802 if(BUTTON_PRESS()) {
803 DbpString("cancelled_a");
804 goto done;
805 }
806 }
807
808 DbpString("COMMAND FINISHED");
809
810 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
811 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
812
813 done:
814 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
815 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
816 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
817 LED_A_OFF();
818 LED_B_OFF();
819 LED_C_OFF();
820 LED_D_OFF();
821 }
822
823 void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
824 int i;
825 for(i = 0; i < 8; i++) {
826 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
827 }
828 }
829
830 //-----------------------------------------------------------------------------
831 // Wait for commands from reader
832 // Stop when button is pressed
833 // Or return true when command is captured
834 //-----------------------------------------------------------------------------
835 static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen)
836 {
837 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
838 // only, since we are receiving, not transmitting).
839 // Signal field is off with the appropriate LED
840 LED_D_OFF();
841 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
842
843 // Now run a `software UART' on the stream of incoming samples.
844 Uart.output = received;
845 Uart.byteCntMax = maxLen;
846 Uart.state = STATE_UNSYNCD;
847
848 for(;;) {
849 WDT_HIT();
850
851 if(BUTTON_PRESS()) return false;
852
853 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
854 AT91C_BASE_SSC->SSC_THR = 0x00;
855 }
856 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
857 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
858
859 if(OutOfNDecoding(b & 0x0f)) {
860 *len = Uart.byteCnt;
861 return true;
862 }
863 }
864 }
865 }
866
867 static uint8_t encode4Bits(const uint8_t b)
868 {
869 uint8_t c = b & 0xF;
870 // OTA, the least significant bits first
871 // The columns are
872 // 1 - Bit value to send
873 // 2 - Reversed (big-endian)
874 // 3 - Encoded
875 // 4 - Hex values
876
877 switch(c){
878 // 1 2 3 4
879 case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
880 case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
881 case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
882 case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
883 case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
884 case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
885 case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
886 case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
887 case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
888 case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
889 case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
890 case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
891 case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
892 case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
893 case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
894 default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
895
896 }
897 }
898
899 //-----------------------------------------------------------------------------
900 // Prepare tag messages
901 //-----------------------------------------------------------------------------
902 static void CodeIClassTagAnswer(const uint8_t *cmd, int len)
903 {
904
905 /*
906 * SOF comprises 3 parts;
907 * * An unmodulated time of 56.64 us
908 * * 24 pulses of 423.75 KHz (fc/32)
909 * * A logic 1, which starts with an unmodulated time of 18.88us
910 * followed by 8 pulses of 423.75kHz (fc/32)
911 *
912 *
913 * EOF comprises 3 parts:
914 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
915 * time of 18.88us.
916 * - 24 pulses of fc/32
917 * - An unmodulated time of 56.64 us
918 *
919 *
920 * A logic 0 starts with 8 pulses of fc/32
921 * followed by an unmodulated time of 256/fc (~18,88us).
922 *
923 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
924 * 8 pulses of fc/32 (also 18.88us)
925 *
926 * The mode FPGA_HF_SIMULATOR_MODULATE_424K_8BIT which we use to simulate tag,
927 * works like this.
928 * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us).
929 * - A 0-bit inptu to the FPGA becomes an unmodulated time of 18.88us
930 *
931 * In this mode the SOF can be written as 00011101 = 0x1D
932 * The EOF can be written as 10111000 = 0xb8
933 * A logic 1 is 01
934 * A logic 0 is 10
935 *
936 * */
937
938 int i;
939
940 ToSendReset();
941
942 // Send SOF
943 ToSend[++ToSendMax] = 0x1D;
944
945 for(i = 0; i < len; i++) {
946 uint8_t b = cmd[i];
947 ToSend[++ToSendMax] = encode4Bits(b & 0xF); //Least significant half
948 ToSend[++ToSendMax] = encode4Bits((b >>4) & 0xF);//Most significant half
949 }
950
951 // Send EOF
952 ToSend[++ToSendMax] = 0xB8;
953 //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end
954 // Convert from last byte pos to length
955 ToSendMax++;
956 }
957
958 // Only SOF
959 static void CodeIClassTagSOF()
960 {
961 //So far a dummy implementation, not used
962 //int lastProxToAirDuration =0;
963
964 ToSendReset();
965 // Send SOF
966 ToSend[++ToSendMax] = 0x1D;
967 // lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning
968
969 // Convert from last byte pos to length
970 ToSendMax++;
971 }
972 #define MODE_SIM_CSN 0
973 #define MODE_EXIT_AFTER_MAC 1
974 #define MODE_FULLSIM 2
975
976 int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf);
977 /**
978 * @brief SimulateIClass simulates an iClass card.
979 * @param arg0 type of simulation
980 * - 0 uses the first 8 bytes in usb data as CSN
981 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
982 * in the usb data. This mode collects MAC from the reader, in order to do an offline
983 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
984 * - Other : Uses the default CSN (031fec8af7ff12e0)
985 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
986 * @param arg2
987 * @param datain
988 */
989 void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain)
990 {
991 uint32_t simType = arg0;
992 uint32_t numberOfCSNS = arg1;
993 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
994
995 // Enable and clear the trace
996 set_tracing(true);
997 clear_trace();
998 //Use the emulator memory for SIM
999 uint8_t *emulator = BigBuf_get_EM_addr();
1000
1001 if(simType == 0) {
1002 // Use the CSN from commandline
1003 memcpy(emulator, datain, 8);
1004 doIClassSimulation(MODE_SIM_CSN,NULL);
1005 }else if(simType == 1)
1006 {
1007 //Default CSN
1008 uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1009 // Use the CSN from commandline
1010 memcpy(emulator, csn_crc, 8);
1011 doIClassSimulation(MODE_SIM_CSN,NULL);
1012 }
1013 else if(simType == 2)
1014 {
1015
1016 uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 };
1017 Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS);
1018 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1019 // in order to collect MAC's from the reader. This can later be used in an offlne-attack
1020 // in order to obtain the keys, as in the "dismantling iclass"-paper.
1021 int i = 0;
1022 for( ; i < numberOfCSNS && i*8+8 < USB_CMD_DATA_SIZE; i++)
1023 {
1024 // The usb data is 512 bytes, fitting 65 8-byte CSNs in there.
1025
1026 memcpy(emulator, datain+(i*8), 8);
1027 if(doIClassSimulation(MODE_EXIT_AFTER_MAC,mac_responses+i*8))
1028 {
1029 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
1030 return; // Button pressed
1031 }
1032 }
1033 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
1034
1035 }else if(simType == 3){
1036 //This is 'full sim' mode, where we use the emulator storage for data.
1037 doIClassSimulation(MODE_FULLSIM, NULL);
1038 }
1039 else{
1040 // We may want a mode here where we hardcode the csns to use (from proxclone).
1041 // That will speed things up a little, but not required just yet.
1042 Dbprintf("The mode is not implemented, reserved for future use");
1043 }
1044 Dbprintf("Done...");
1045
1046 }
1047 void AppendCrc(uint8_t* data, int len)
1048 {
1049 ComputeCrc14443(CRC_ICLASS,data,len,data+len,data+len+1);
1050 }
1051
1052 /**
1053 * @brief Does the actual simulation
1054 * @param csn - csn to use
1055 * @param breakAfterMacReceived if true, returns after reader MAC has been received.
1056 */
1057 int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
1058 {
1059 // free eventually allocated BigBuf memory
1060 BigBuf_free_keep_EM();
1061
1062 State cipher_state;
1063 // State cipher_state_reserve;
1064 uint8_t *csn = BigBuf_get_EM_addr();
1065 uint8_t *emulator = csn;
1066 uint8_t sof_data[] = { 0x0F} ;
1067 // CSN followed by two CRC bytes
1068 uint8_t anticoll_data[10] = { 0 };
1069 uint8_t csn_data[10] = { 0 };
1070 memcpy(csn_data,csn,sizeof(csn_data));
1071 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x",csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1072
1073 // Construct anticollision-CSN
1074 rotateCSN(csn_data,anticoll_data);
1075
1076 // Compute CRC on both CSNs
1077 ComputeCrc14443(CRC_ICLASS, anticoll_data, 8, &anticoll_data[8], &anticoll_data[9]);
1078 ComputeCrc14443(CRC_ICLASS, csn_data, 8, &csn_data[8], &csn_data[9]);
1079
1080 uint8_t diversified_key[8] = { 0 };
1081 // e-Purse
1082 uint8_t card_challenge_data[8] = { 0x00 };
1083 if(simulationMode == MODE_FULLSIM)
1084 {
1085 //The diversified key should be stored on block 3
1086 //Get the diversified key from emulator memory
1087 memcpy(diversified_key, emulator+(8*3),8);
1088
1089 //Card challenge, a.k.a e-purse is on block 2
1090 memcpy(card_challenge_data,emulator + (8 * 2) , 8);
1091 //Precalculate the cipher state, feeding it the CC
1092 cipher_state = opt_doTagMAC_1(card_challenge_data,diversified_key);
1093
1094 }
1095
1096 int exitLoop = 0;
1097 // Reader 0a
1098 // Tag 0f
1099 // Reader 0c
1100 // Tag anticoll. CSN
1101 // Reader 81 anticoll. CSN
1102 // Tag CSN
1103
1104 uint8_t *modulated_response;
1105 int modulated_response_size = 0;
1106 uint8_t* trace_data = NULL;
1107 int trace_data_size = 0;
1108
1109
1110 // Respond SOF -- takes 1 bytes
1111 uint8_t *resp_sof = BigBuf_malloc(2);
1112 int resp_sof_Len;
1113
1114 // Anticollision CSN (rotated CSN)
1115 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
1116 uint8_t *resp_anticoll = BigBuf_malloc(28);
1117 int resp_anticoll_len;
1118
1119 // CSN
1120 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
1121 uint8_t *resp_csn = BigBuf_malloc(30);
1122 int resp_csn_len;
1123
1124 // e-Purse
1125 // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
1126 uint8_t *resp_cc = BigBuf_malloc(20);
1127 int resp_cc_len;
1128
1129 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1130 int len;
1131
1132 // Prepare card messages
1133 ToSendMax = 0;
1134
1135 // First card answer: SOF
1136 CodeIClassTagSOF();
1137 memcpy(resp_sof, ToSend, ToSendMax); resp_sof_Len = ToSendMax;
1138
1139 // Anticollision CSN
1140 CodeIClassTagAnswer(anticoll_data, sizeof(anticoll_data));
1141 memcpy(resp_anticoll, ToSend, ToSendMax); resp_anticoll_len = ToSendMax;
1142
1143 // CSN
1144 CodeIClassTagAnswer(csn_data, sizeof(csn_data));
1145 memcpy(resp_csn, ToSend, ToSendMax); resp_csn_len = ToSendMax;
1146
1147 // e-Purse
1148 CodeIClassTagAnswer(card_challenge_data, sizeof(card_challenge_data));
1149 memcpy(resp_cc, ToSend, ToSendMax); resp_cc_len = ToSendMax;
1150
1151 //This is used for responding to READ-block commands or other data which is dynamically generated
1152 //First the 'trace'-data, not encoded for FPGA
1153 uint8_t *data_generic_trace = BigBuf_malloc(8 + 2);//8 bytes data + 2byte CRC is max tag answer
1154 //Then storage for the modulated data
1155 //Each bit is doubled when modulated for FPGA, and we also have SOF and EOF (2 bytes)
1156 uint8_t *data_response = BigBuf_malloc( (8+2) * 2 + 2);
1157
1158 // Start from off (no field generated)
1159 //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1160 //SpinDelay(200);
1161 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1162 SpinDelay(100);
1163 StartCountSspClk();
1164 // We need to listen to the high-frequency, peak-detected path.
1165 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1166 FpgaSetupSsc();
1167
1168 // To control where we are in the protocol
1169 int cmdsRecvd = 0;
1170 uint32_t time_0 = GetCountSspClk();
1171 uint32_t t2r_time =0;
1172 uint32_t r2t_time =0;
1173
1174 LED_A_ON();
1175 bool buttonPressed = false;
1176 uint8_t response_delay = 1;
1177 while(!exitLoop) {
1178 response_delay = 1;
1179 LED_B_OFF();
1180 //Signal tracer
1181 // Can be used to get a trigger for an oscilloscope..
1182 LED_C_OFF();
1183
1184 if(!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
1185 buttonPressed = true;
1186 break;
1187 }
1188 r2t_time = GetCountSspClk();
1189 //Signal tracer
1190 LED_C_ON();
1191
1192 // Okay, look at the command now.
1193 if(receivedCmd[0] == ICLASS_CMD_ACTALL ) {
1194 // Reader in anticollission phase
1195 modulated_response = resp_sof; modulated_response_size = resp_sof_Len; //order = 1;
1196 trace_data = sof_data;
1197 trace_data_size = sizeof(sof_data);
1198 } else if(receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) {
1199 // Reader asks for anticollission CSN
1200 modulated_response = resp_anticoll; modulated_response_size = resp_anticoll_len; //order = 2;
1201 trace_data = anticoll_data;
1202 trace_data_size = sizeof(anticoll_data);
1203 //DbpString("Reader requests anticollission CSN:");
1204 } else if(receivedCmd[0] == ICLASS_CMD_SELECT) {
1205 // Reader selects anticollission CSN.
1206 // Tag sends the corresponding real CSN
1207 modulated_response = resp_csn; modulated_response_size = resp_csn_len; //order = 3;
1208 trace_data = csn_data;
1209 trace_data_size = sizeof(csn_data);
1210 //DbpString("Reader selects anticollission CSN:");
1211 } else if(receivedCmd[0] == ICLASS_CMD_READCHECK_KD) {
1212 // Read e-purse (88 02)
1213 modulated_response = resp_cc; modulated_response_size = resp_cc_len; //order = 4;
1214 trace_data = card_challenge_data;
1215 trace_data_size = sizeof(card_challenge_data);
1216 LED_B_ON();
1217 } else if(receivedCmd[0] == ICLASS_CMD_CHECK) {
1218 // Reader random and reader MAC!!!
1219 if(simulationMode == MODE_FULLSIM)
1220 {
1221 //NR, from reader, is in receivedCmd +1
1222 opt_doTagMAC_2(cipher_state,receivedCmd+1,data_generic_trace,diversified_key);
1223
1224 trace_data = data_generic_trace;
1225 trace_data_size = 4;
1226 CodeIClassTagAnswer(trace_data , trace_data_size);
1227 memcpy(data_response, ToSend, ToSendMax);
1228 modulated_response = data_response;
1229 modulated_response_size = ToSendMax;
1230 response_delay = 0;//We need to hurry here...
1231 //exitLoop = true;
1232 }else
1233 { //Not fullsim, we don't respond
1234 // We do not know what to answer, so lets keep quiet
1235 modulated_response = resp_sof; modulated_response_size = 0;
1236 trace_data = NULL;
1237 trace_data_size = 0;
1238 if (simulationMode == MODE_EXIT_AFTER_MAC){
1239 // dbprintf:ing ...
1240 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x"
1241 ,csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1242 Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len,
1243 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1244 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1245 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1246 if (reader_mac_buf != NULL)
1247 {
1248 memcpy(reader_mac_buf,receivedCmd+1,8);
1249 }
1250 exitLoop = true;
1251 }
1252 }
1253
1254 } else if(receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
1255 // Reader ends the session
1256 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
1257 trace_data = NULL;
1258 trace_data_size = 0;
1259 } else if(simulationMode == MODE_FULLSIM && receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4){
1260 //Read block
1261 uint16_t blk = receivedCmd[1];
1262 //Take the data...
1263 memcpy(data_generic_trace, emulator+(blk << 3),8);
1264 //Add crc
1265 AppendCrc(data_generic_trace, 8);
1266 trace_data = data_generic_trace;
1267 trace_data_size = 10;
1268 CodeIClassTagAnswer(trace_data , trace_data_size);
1269 memcpy(data_response, ToSend, ToSendMax);
1270 modulated_response = data_response;
1271 modulated_response_size = ToSendMax;
1272 }else if(receivedCmd[0] == ICLASS_CMD_UPDATE && simulationMode == MODE_FULLSIM)
1273 {//Probably the reader wants to update the nonce. Let's just ignore that for now.
1274 // OBS! If this is implemented, don't forget to regenerate the cipher_state
1275 //We're expected to respond with the data+crc, exactly what's already in the receivedcmd
1276 //receivedcmd is now UPDATE 1b | ADDRESS 1b| DATA 8b| Signature 4b or CRC 2b|
1277
1278 //Take the data...
1279 memcpy(data_generic_trace, receivedCmd+2,8);
1280 //Add crc
1281 AppendCrc(data_generic_trace, 8);
1282 trace_data = data_generic_trace;
1283 trace_data_size = 10;
1284 CodeIClassTagAnswer(trace_data , trace_data_size);
1285 memcpy(data_response, ToSend, ToSendMax);
1286 modulated_response = data_response;
1287 modulated_response_size = ToSendMax;
1288 }
1289 else if(receivedCmd[0] == ICLASS_CMD_PAGESEL)
1290 {//Pagesel
1291 //Pagesel enables to select a page in the selected chip memory and return its configuration block
1292 //Chips with a single page will not answer to this command
1293 // It appears we're fine ignoring this.
1294 //Otherwise, we should answer 8bytes (block) + 2bytes CRC
1295 }
1296 else {
1297 //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
1298 // Never seen this command before
1299 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1300 len,
1301 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1302 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1303 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1304 // Do not respond
1305 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
1306 trace_data = NULL;
1307 trace_data_size = 0;
1308 }
1309
1310 if(cmdsRecvd > 100) {
1311 //DbpString("100 commands later...");
1312 //break;
1313 }
1314 else {
1315 cmdsRecvd++;
1316 }
1317 /**
1318 A legit tag has about 380us delay between reader EOT and tag SOF.
1319 **/
1320 if(modulated_response_size > 0) {
1321 SendIClassAnswer(modulated_response, modulated_response_size, response_delay);
1322 t2r_time = GetCountSspClk();
1323 }
1324
1325 if (tracing) {
1326 uint8_t parity[MAX_PARITY_SIZE];
1327 GetParity(receivedCmd, len, parity);
1328 LogTrace(receivedCmd,len, (r2t_time-time_0)<< 4, (r2t_time-time_0) << 4, parity, true);
1329
1330 if (trace_data != NULL) {
1331 GetParity(trace_data, trace_data_size, parity);
1332 LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, false);
1333 }
1334 if(!tracing) {
1335 DbpString("Trace full");
1336 //break;
1337 }
1338
1339 }
1340 }
1341
1342 //Dbprintf("%x", cmdsRecvd);
1343 LED_A_OFF();
1344 LED_B_OFF();
1345 LED_C_OFF();
1346
1347 if(buttonPressed)
1348 {
1349 DbpString("Button pressed");
1350 }
1351 return buttonPressed;
1352 }
1353
1354 static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
1355 {
1356 int i = 0, d=0;//, u = 0, d = 0;
1357 uint8_t b = 0;
1358
1359 //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
1360 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K_8BIT);
1361
1362 AT91C_BASE_SSC->SSC_THR = 0x00;
1363 FpgaSetupSsc();
1364 while(!BUTTON_PRESS()) {
1365 if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
1366 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1367 }
1368 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){
1369 b = 0x00;
1370 if(d < delay) {
1371 d++;
1372 }
1373 else {
1374 if( i < respLen){
1375 b = resp[i];
1376 //Hack
1377 //b = 0xAC;
1378 }
1379 i++;
1380 }
1381 AT91C_BASE_SSC->SSC_THR = b;
1382 }
1383
1384 // if (i > respLen +4) break;
1385 if (i > respLen +1) break;
1386 }
1387
1388 return 0;
1389 }
1390
1391 /// THE READER CODE
1392
1393 //-----------------------------------------------------------------------------
1394 // Transmit the command (to the tag) that was placed in ToSend[].
1395 //-----------------------------------------------------------------------------
1396 static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait)
1397 {
1398 int c;
1399 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1400 AT91C_BASE_SSC->SSC_THR = 0x00;
1401 FpgaSetupSsc();
1402
1403 if (wait)
1404 {
1405 if(*wait < 10) *wait = 10;
1406
1407 for(c = 0; c < *wait;) {
1408 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1409 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1410 c++;
1411 }
1412 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1413 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1414 (void)r;
1415 }
1416 WDT_HIT();
1417 }
1418
1419 }
1420
1421
1422 uint8_t sendbyte;
1423 bool firstpart = true;
1424 c = 0;
1425 for(;;) {
1426 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1427
1428 // DOUBLE THE SAMPLES!
1429 if(firstpart) {
1430 sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4);
1431 }
1432 else {
1433 sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4);
1434 c++;
1435 }
1436 if(sendbyte == 0xff) {
1437 sendbyte = 0xfe;
1438 }
1439 AT91C_BASE_SSC->SSC_THR = sendbyte;
1440 firstpart = !firstpart;
1441
1442 if(c >= len) {
1443 break;
1444 }
1445 }
1446 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1447 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1448 (void)r;
1449 }
1450 WDT_HIT();
1451 }
1452 if (samples && wait) *samples = (c + *wait) << 3;
1453 }
1454
1455
1456 //-----------------------------------------------------------------------------
1457 // Prepare iClass reader command to send to FPGA
1458 //-----------------------------------------------------------------------------
1459 void CodeIClassCommand(const uint8_t * cmd, int len)
1460 {
1461 int i, j, k;
1462 uint8_t b;
1463
1464 ToSendReset();
1465
1466 // Start of Communication: 1 out of 4
1467 ToSend[++ToSendMax] = 0xf0;
1468 ToSend[++ToSendMax] = 0x00;
1469 ToSend[++ToSendMax] = 0x0f;
1470 ToSend[++ToSendMax] = 0x00;
1471
1472 // Modulate the bytes
1473 for (i = 0; i < len; i++) {
1474 b = cmd[i];
1475 for(j = 0; j < 4; j++) {
1476 for(k = 0; k < 4; k++) {
1477 if(k == (b & 3)) {
1478 ToSend[++ToSendMax] = 0xf0;
1479 }
1480 else {
1481 ToSend[++ToSendMax] = 0x00;
1482 }
1483 }
1484 b >>= 2;
1485 }
1486 }
1487
1488 // End of Communication
1489 ToSend[++ToSendMax] = 0x00;
1490 ToSend[++ToSendMax] = 0x00;
1491 ToSend[++ToSendMax] = 0xf0;
1492 ToSend[++ToSendMax] = 0x00;
1493
1494 // Convert from last character reference to length
1495 ToSendMax++;
1496 }
1497
1498 void ReaderTransmitIClass(uint8_t* frame, int len)
1499 {
1500 int wait = 0;
1501 int samples = 0;
1502
1503 // This is tied to other size changes
1504 CodeIClassCommand(frame,len);
1505
1506 // Select the card
1507 TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait);
1508 if(trigger)
1509 LED_A_ON();
1510
1511 // Store reader command in buffer
1512 if (tracing) {
1513 uint8_t par[MAX_PARITY_SIZE];
1514 GetParity(frame, len, par);
1515 LogTrace(frame, len, rsamples, rsamples, par, true);
1516 }
1517 }
1518
1519 //-----------------------------------------------------------------------------
1520 // Wait a certain time for tag response
1521 // If a response is captured return true
1522 // If it takes too long return false
1523 //-----------------------------------------------------------------------------
1524 static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
1525 {
1526 // buffer needs to be 512 bytes
1527 int c;
1528
1529 // Set FPGA mode to "reader listen mode", no modulation (listen
1530 // only, since we are receiving, not transmitting).
1531 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1532
1533 // Now get the answer from the card
1534 Demod.output = receivedResponse;
1535 Demod.len = 0;
1536 Demod.state = DEMOD_UNSYNCD;
1537
1538 uint8_t b;
1539 if (elapsed) *elapsed = 0;
1540
1541 bool skip = false;
1542
1543 c = 0;
1544 for(;;) {
1545 WDT_HIT();
1546
1547 if(BUTTON_PRESS()) return false;
1548
1549 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1550 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1551 if (elapsed) (*elapsed)++;
1552 }
1553 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1554 if(c < timeout) { c++; } else { return false; }
1555 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1556 skip = !skip;
1557 if(skip) continue;
1558
1559 if(ManchesterDecoding(b & 0x0f)) {
1560 *samples = c << 3;
1561 return true;
1562 }
1563 }
1564 }
1565 }
1566
1567 int ReaderReceiveIClass(uint8_t* receivedAnswer)
1568 {
1569 int samples = 0;
1570 if (!GetIClassAnswer(receivedAnswer,160,&samples,0)) return false;
1571 rsamples += samples;
1572 if (tracing) {
1573 uint8_t parity[MAX_PARITY_SIZE];
1574 GetParity(receivedAnswer, Demod.len, parity);
1575 LogTrace(receivedAnswer,Demod.len,rsamples,rsamples,parity,false);
1576 }
1577 if(samples == 0) return false;
1578 return Demod.len;
1579 }
1580
1581 void setupIclassReader()
1582 {
1583 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1584 // Reset trace buffer
1585 set_tracing(true);
1586 clear_trace();
1587
1588 // Setup SSC
1589 FpgaSetupSsc();
1590 // Start from off (no field generated)
1591 // Signal field is off with the appropriate LED
1592 LED_D_OFF();
1593 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1594 SpinDelay(200);
1595
1596 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1597
1598 // Now give it time to spin up.
1599 // Signal field is on with the appropriate LED
1600 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1601 SpinDelay(200);
1602 LED_A_ON();
1603
1604 }
1605
1606 bool sendCmdGetResponseWithRetries(uint8_t* command, size_t cmdsize, uint8_t* resp, uint8_t expected_size, uint8_t retries)
1607 {
1608 while(retries-- > 0)
1609 {
1610 ReaderTransmitIClass(command, cmdsize);
1611 if(expected_size == ReaderReceiveIClass(resp)){
1612 return true;
1613 }
1614 }
1615 return false;//Error
1616 }
1617
1618 /**
1619 * @brief Talks to an iclass tag, sends the commands to get CSN and CC.
1620 * @param card_data where the CSN and CC are stored for return
1621 * @return 0 = fail
1622 * 1 = Got CSN
1623 * 2 = Got CSN and CC
1624 */
1625 uint8_t handshakeIclassTag_ext(uint8_t *card_data, bool use_credit_key)
1626 {
1627 static uint8_t act_all[] = { 0x0a };
1628 //static uint8_t identify[] = { 0x0c };
1629 static uint8_t identify[] = { 0x0c, 0x00, 0x73, 0x33 };
1630 static uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1631 static uint8_t readcheck_cc[]= { 0x88, 0x02 };
1632 if (use_credit_key)
1633 readcheck_cc[0] = 0x18;
1634 else
1635 readcheck_cc[0] = 0x88;
1636
1637 uint8_t resp[ICLASS_BUFFER_SIZE];
1638
1639 uint8_t read_status = 0;
1640
1641 // Send act_all
1642 ReaderTransmitIClass(act_all, 1);
1643 // Card present?
1644 if(!ReaderReceiveIClass(resp)) return read_status;//Fail
1645 //Send Identify
1646 ReaderTransmitIClass(identify, 1);
1647 //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC
1648 uint8_t len = ReaderReceiveIClass(resp);
1649 if(len != 10) return read_status;//Fail
1650
1651 //Copy the Anti-collision CSN to our select-packet
1652 memcpy(&select[1],resp,8);
1653 //Select the card
1654 ReaderTransmitIClass(select, sizeof(select));
1655 //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC
1656 len = ReaderReceiveIClass(resp);
1657 if(len != 10) return read_status;//Fail
1658
1659 //Success - level 1, we got CSN
1660 //Save CSN in response data
1661 memcpy(card_data,resp,8);
1662
1663 //Flag that we got to at least stage 1, read CSN
1664 read_status = 1;
1665
1666 // Card selected, now read e-purse (cc) (only 8 bytes no CRC)
1667 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1668 if(ReaderReceiveIClass(resp) == 8) {
1669 //Save CC (e-purse) in response data
1670 memcpy(card_data+8,resp,8);
1671 read_status++;
1672 }
1673
1674 return read_status;
1675 }
1676 uint8_t handshakeIclassTag(uint8_t *card_data) {
1677 return handshakeIclassTag_ext(card_data, false);
1678 }
1679
1680
1681 // Reader iClass Anticollission
1682 void ReaderIClass(uint8_t arg0) {
1683
1684 uint8_t card_data[6 * 8]={0};
1685 memset(card_data, 0xFF, sizeof(card_data));
1686 uint8_t last_csn[8]={0,0,0,0,0,0,0,0};
1687 uint8_t resp[ICLASS_BUFFER_SIZE];
1688 memset(resp, 0xFF, sizeof(resp));
1689 //Read conf block CRC(0x01) => 0xfa 0x22
1690 uint8_t readConf[] = { ICLASS_CMD_READ_OR_IDENTIFY,0x01, 0xfa, 0x22};
1691 //Read App Issuer Area block CRC(0x05) => 0xde 0x64
1692 uint8_t readAA[] = { ICLASS_CMD_READ_OR_IDENTIFY,0x05, 0xde, 0x64};
1693
1694 int read_status= 0;
1695 uint8_t result_status = 0;
1696 // flag to read until one tag is found successfully
1697 bool abort_after_read = arg0 & FLAG_ICLASS_READER_ONLY_ONCE;
1698 // flag to only try 5 times to find one tag then return
1699 bool try_once = arg0 & FLAG_ICLASS_READER_ONE_TRY;
1700 // if neither abort_after_read nor try_once then continue reading until button pressed.
1701
1702 bool use_credit_key = arg0 & FLAG_ICLASS_READER_CEDITKEY;
1703 // test flags for what blocks to be sure to read
1704 uint8_t flagReadConfig = arg0 & FLAG_ICLASS_READER_CONF;
1705 uint8_t flagReadCC = arg0 & FLAG_ICLASS_READER_CC;
1706 uint8_t flagReadAA = arg0 & FLAG_ICLASS_READER_AA;
1707
1708 set_tracing(true);
1709 setupIclassReader();
1710
1711 uint16_t tryCnt=0;
1712 bool userCancelled = BUTTON_PRESS() || usb_poll_validate_length();
1713 while(!userCancelled)
1714 {
1715 // if only looking for one card try 2 times if we missed it the first time
1716 if (try_once && tryCnt > 2) break;
1717 tryCnt++;
1718 if(!tracing) {
1719 DbpString("Trace full");
1720 break;
1721 }
1722 WDT_HIT();
1723
1724 read_status = handshakeIclassTag_ext(card_data, use_credit_key);
1725
1726 if(read_status == 0) continue;
1727 if(read_status == 1) result_status = FLAG_ICLASS_READER_CSN;
1728 if(read_status == 2) result_status = FLAG_ICLASS_READER_CSN|FLAG_ICLASS_READER_CC;
1729
1730 // handshakeIclass returns CSN|CC, but the actual block
1731 // layout is CSN|CONFIG|CC, so here we reorder the data,
1732 // moving CC forward 8 bytes
1733 memcpy(card_data+16,card_data+8, 8);
1734 //Read block 1, config
1735 if(flagReadConfig) {
1736 if(sendCmdGetResponseWithRetries(readConf, sizeof(readConf), resp, 10, 10))
1737 {
1738 result_status |= FLAG_ICLASS_READER_CONF;
1739 memcpy(card_data+8, resp, 8);
1740 } else {
1741 Dbprintf("Failed to dump config block");
1742 }
1743 }
1744
1745 //Read block 5, AA
1746 if(flagReadAA) {
1747 if(sendCmdGetResponseWithRetries(readAA, sizeof(readAA), resp, 10, 10))
1748 {
1749 result_status |= FLAG_ICLASS_READER_AA;
1750 memcpy(card_data+(8*5), resp, 8);
1751 } else {
1752 //Dbprintf("Failed to dump AA block");
1753 }
1754 }
1755
1756 // 0 : CSN
1757 // 1 : Configuration
1758 // 2 : e-purse
1759 // (3,4 write-only, kc and kd)
1760 // 5 Application issuer area
1761 //
1762 //Then we can 'ship' back the 8 * 6 bytes of data,
1763 // with 0xFF:s in block 3 and 4.
1764
1765 LED_B_ON();
1766 //Send back to client, but don't bother if we already sent this -
1767 // only useful if looping in arm (not try_once && not abort_after_read)
1768 if(memcmp(last_csn, card_data, 8) != 0)
1769 {
1770 // If caller requires that we get Conf, CC, AA, continue until we got it
1771 if( (result_status ^ FLAG_ICLASS_READER_CSN ^ flagReadConfig ^ flagReadCC ^ flagReadAA) == 0) {
1772 cmd_send(CMD_ACK,result_status,0,0,card_data,sizeof(card_data));
1773 if(abort_after_read) {
1774 LED_A_OFF();
1775 LED_B_OFF();
1776 return;
1777 }
1778 //Save that we already sent this....
1779 memcpy(last_csn, card_data, 8);
1780 }
1781
1782 }
1783 LED_B_OFF();
1784 userCancelled = BUTTON_PRESS() || usb_poll_validate_length();
1785 }
1786 if (userCancelled) {
1787 cmd_send(CMD_ACK,0xFF,0,0,card_data, 0);
1788 } else {
1789 cmd_send(CMD_ACK,0,0,0,card_data, 0);
1790 }
1791 LED_A_OFF();
1792 }
1793
1794 void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
1795
1796 uint8_t card_data[USB_CMD_DATA_SIZE]={0};
1797 uint16_t block_crc_LUT[255] = {0};
1798
1799 {//Generate a lookup table for block crc
1800 for(int block = 0; block < 255; block++){
1801 char bl = block;
1802 block_crc_LUT[block] = iclass_crc16(&bl ,1);
1803 }
1804 }
1805 //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]);
1806
1807 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1808 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1809
1810 uint16_t crc = 0;
1811 uint8_t cardsize=0;
1812 uint8_t mem=0;
1813
1814 static struct memory_t{
1815 int k16;
1816 int book;
1817 int k2;
1818 int lockauth;
1819 int keyaccess;
1820 } memory;
1821
1822 uint8_t resp[ICLASS_BUFFER_SIZE];
1823
1824 setupIclassReader();
1825 set_tracing(true);
1826
1827 while(!BUTTON_PRESS()) {
1828
1829 WDT_HIT();
1830
1831 if(!tracing) {
1832 DbpString("Trace full");
1833 break;
1834 }
1835
1836 uint8_t read_status = handshakeIclassTag(card_data);
1837 if(read_status < 2) continue;
1838
1839 //for now replay captured auth (as cc not updated)
1840 memcpy(check+5,MAC,4);
1841
1842 if(!sendCmdGetResponseWithRetries(check, sizeof(check),resp, 4, 5))
1843 {
1844 Dbprintf("Error: Authentication Fail!");
1845 continue;
1846 }
1847
1848 //first get configuration block (block 1)
1849 crc = block_crc_LUT[1];
1850 read[1]=1;
1851 read[2] = crc >> 8;
1852 read[3] = crc & 0xff;
1853
1854 if(!sendCmdGetResponseWithRetries(read, sizeof(read),resp, 10, 10))
1855 {
1856 Dbprintf("Dump config (block 1) failed");
1857 continue;
1858 }
1859
1860 mem=resp[5];
1861 memory.k16= (mem & 0x80);
1862 memory.book= (mem & 0x20);
1863 memory.k2= (mem & 0x8);
1864 memory.lockauth= (mem & 0x2);
1865 memory.keyaccess= (mem & 0x1);
1866
1867 cardsize = memory.k16 ? 255 : 32;
1868 WDT_HIT();
1869 //Set card_data to all zeroes, we'll fill it with data
1870 memset(card_data,0x0,USB_CMD_DATA_SIZE);
1871 uint8_t failedRead =0;
1872 uint32_t stored_data_length =0;
1873 //then loop around remaining blocks
1874 for(int block=0; block < cardsize; block++){
1875
1876 read[1]= block;
1877 crc = block_crc_LUT[block];
1878 read[2] = crc >> 8;
1879 read[3] = crc & 0xff;
1880
1881 if(sendCmdGetResponseWithRetries(read, sizeof(read), resp, 10, 10))
1882 {
1883 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
1884 block, resp[0], resp[1], resp[2],
1885 resp[3], resp[4], resp[5],
1886 resp[6], resp[7]);
1887
1888 //Fill up the buffer
1889 memcpy(card_data+stored_data_length,resp,8);
1890 stored_data_length += 8;
1891 if(stored_data_length +8 > USB_CMD_DATA_SIZE)
1892 {//Time to send this off and start afresh
1893 cmd_send(CMD_ACK,
1894 stored_data_length,//data length
1895 failedRead,//Failed blocks?
1896 0,//Not used ATM
1897 card_data, stored_data_length);
1898 //reset
1899 stored_data_length = 0;
1900 failedRead = 0;
1901 }
1902
1903 }else{
1904 failedRead = 1;
1905 stored_data_length +=8;//Otherwise, data becomes misaligned
1906 Dbprintf("Failed to dump block %d", block);
1907 }
1908 }
1909
1910 //Send off any remaining data
1911 if(stored_data_length > 0)
1912 {
1913 cmd_send(CMD_ACK,
1914 stored_data_length,//data length
1915 failedRead,//Failed blocks?
1916 0,//Not used ATM
1917 card_data, stored_data_length);
1918 }
1919 //If we got here, let's break
1920 break;
1921 }
1922 //Signal end of transmission
1923 cmd_send(CMD_ACK,
1924 0,//data length
1925 0,//Failed blocks?
1926 0,//Not used ATM
1927 card_data, 0);
1928
1929 LED_A_OFF();
1930 }
1931
1932 void iClass_ReadCheck(uint8_t blockNo, uint8_t keyType) {
1933 uint8_t readcheck[] = { keyType, blockNo };
1934 uint8_t resp[] = {0,0,0,0,0,0,0,0};
1935 size_t isOK = 0;
1936 isOK = sendCmdGetResponseWithRetries(readcheck, sizeof(readcheck), resp, sizeof(resp), 6);
1937 cmd_send(CMD_ACK,isOK,0,0,0,0);
1938 }
1939
1940 void iClass_Authentication(uint8_t *MAC) {
1941 uint8_t check[] = { ICLASS_CMD_CHECK, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1942 uint8_t resp[ICLASS_BUFFER_SIZE];
1943 memcpy(check+5,MAC,4);
1944 bool isOK;
1945 isOK = sendCmdGetResponseWithRetries(check, sizeof(check), resp, 4, 6);
1946 cmd_send(CMD_ACK,isOK,0,0,0,0);
1947 }
1948 bool iClass_ReadBlock(uint8_t blockNo, uint8_t *readdata) {
1949 uint8_t readcmd[] = {ICLASS_CMD_READ_OR_IDENTIFY, blockNo, 0x00, 0x00}; //0x88, 0x00 // can i use 0C?
1950 char bl = blockNo;
1951 uint16_t rdCrc = iclass_crc16(&bl, 1);
1952 readcmd[2] = rdCrc >> 8;
1953 readcmd[3] = rdCrc & 0xff;
1954 uint8_t resp[] = {0,0,0,0,0,0,0,0,0,0};
1955 bool isOK = false;
1956
1957 //readcmd[1] = blockNo;
1958 isOK = sendCmdGetResponseWithRetries(readcmd, sizeof(readcmd), resp, 10, 10);
1959 memcpy(readdata, resp, sizeof(resp));
1960
1961 return isOK;
1962 }
1963
1964 void iClass_ReadBlk(uint8_t blockno) {
1965 uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0};
1966 bool isOK = false;
1967 isOK = iClass_ReadBlock(blockno, readblockdata);
1968 cmd_send(CMD_ACK, isOK, 0, 0, readblockdata, 8);
1969 }
1970
1971 void iClass_Dump(uint8_t blockno, uint8_t numblks) {
1972 uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0};
1973 bool isOK = false;
1974 uint8_t blkCnt = 0;
1975
1976 BigBuf_free();
1977 uint8_t *dataout = BigBuf_malloc(255*8);
1978 if (dataout == NULL){
1979 Dbprintf("out of memory");
1980 OnError(1);
1981 return;
1982 }
1983 memset(dataout,0xFF,255*8);
1984
1985 for (;blkCnt < numblks; blkCnt++) {
1986 isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata);
1987 if (!isOK || (readblockdata[0] == 0xBB || readblockdata[7] == 0xBB || readblockdata[2] == 0xBB)) { //try again
1988 isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata);
1989 if (!isOK) {
1990 Dbprintf("Block %02X failed to read", blkCnt+blockno);
1991 break;
1992 }
1993 }
1994 memcpy(dataout+(blkCnt*8),readblockdata,8);
1995 }
1996 //return pointer to dump memory in arg3
1997 cmd_send(CMD_ACK,isOK,blkCnt,BigBuf_max_traceLen(),0,0);
1998 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1999 LEDsoff();
2000 BigBuf_free();
2001 }
2002
2003 bool iClass_WriteBlock_ext(uint8_t blockNo, uint8_t *data) {
2004 uint8_t write[] = { ICLASS_CMD_UPDATE, blockNo, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
2005 //uint8_t readblockdata[10];
2006 //write[1] = blockNo;
2007 memcpy(write+2, data, 12); // data + mac
2008 char *wrCmd = (char *)(write+1);
2009 uint16_t wrCrc = iclass_crc16(wrCmd, 13);
2010 write[14] = wrCrc >> 8;
2011 write[15] = wrCrc & 0xff;
2012 uint8_t resp[] = {0,0,0,0,0,0,0,0,0,0};
2013 bool isOK = false;
2014
2015 isOK = sendCmdGetResponseWithRetries(write,sizeof(write),resp,sizeof(resp),10);
2016 if (isOK) { //if reader responded correctly
2017 //Dbprintf("WriteResp: %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X",resp[0],resp[1],resp[2],resp[3],resp[4],resp[5],resp[6],resp[7],resp[8],resp[9]);
2018 if (memcmp(write+2,resp,8)) { //if response is not equal to write values
2019 if (blockNo != 3 && blockNo != 4) { //if not programming key areas (note key blocks don't get programmed with actual key data it is xor data)
2020 //error try again
2021 isOK = sendCmdGetResponseWithRetries(write,sizeof(write),resp,sizeof(resp),10);
2022 }
2023
2024 }
2025 }
2026 return isOK;
2027 }
2028
2029 void iClass_WriteBlock(uint8_t blockNo, uint8_t *data) {
2030 bool isOK = iClass_WriteBlock_ext(blockNo, data);
2031 if (isOK){
2032 Dbprintf("Write block [%02x] successful",blockNo);
2033 } else {
2034 Dbprintf("Write block [%02x] failed",blockNo);
2035 }
2036 cmd_send(CMD_ACK,isOK,0,0,0,0);
2037 }
2038
2039 void iClass_Clone(uint8_t startblock, uint8_t endblock, uint8_t *data) {
2040 int i;
2041 int written = 0;
2042 int total_block = (endblock - startblock) + 1;
2043 for (i = 0; i < total_block;i++){
2044 // block number
2045 if (iClass_WriteBlock_ext(i+startblock, data+(i*12))){
2046 Dbprintf("Write block [%02x] successful",i + startblock);
2047 written++;
2048 } else {
2049 if (iClass_WriteBlock_ext(i+startblock, data+(i*12))){
2050 Dbprintf("Write block [%02x] successful",i + startblock);
2051 written++;
2052 } else {
2053 Dbprintf("Write block [%02x] failed",i + startblock);
2054 }
2055 }
2056 }
2057 if (written == total_block)
2058 Dbprintf("Clone complete");
2059 else
2060 Dbprintf("Clone incomplete");
2061
2062 cmd_send(CMD_ACK,1,0,0,0,0);
2063 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2064 LEDsoff();
2065 }
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