1 //-----------------------------------------------------------------------------
2 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
3 // at your option, any later version. See the LICENSE.txt file for the text of
5 //-----------------------------------------------------------------------------
6 // Hitag2 emulation (preliminary test version)
8 // (c) 2009 Henryk Plötz <henryk@ploetzli.ch>
9 //-----------------------------------------------------------------------------
10 // Hitag2 complete rewrite of the code
11 // - Fixed modulation/encoding issues
12 // - Rewrote code for transponder emulation
13 // - Added snooping of transponder communication
14 // - Added reader functionality
16 // (c) 2012 Roel Verdult
17 //-----------------------------------------------------------------------------
19 #include "proxmark3.h"
29 static bool bAuthenticating
;
31 static bool bSuccessful
;
38 TAG_STATE_RESET
= 0x01, // Just powered up, awaiting GetSnr
39 TAG_STATE_ACTIVATING
= 0x02 , // In activation phase (password mode), sent UID, awaiting reader password
40 TAG_STATE_ACTIVATED
= 0x03, // Activation complete, awaiting read/write commands
41 TAG_STATE_WRITING
= 0x04, // In write command, awaiting sector contents to be written
43 unsigned int active_sector
;
46 byte_t sectors
[12][4];
49 static struct hitag2_tag tag
= {
50 .state
= TAG_STATE_RESET
,
51 .sectors
= { // Password mode: | Crypto mode:
52 [0] = { 0x02, 0x4e, 0x02, 0x20}, // UID | UID
53 [1] = { 0x4d, 0x49, 0x4b, 0x52}, // Password RWD | 32 bit LSB key
54 [2] = { 0x20, 0xf0, 0x4f, 0x4e}, // Reserved | 16 bit MSB key, 16 bit reserved
55 [3] = { 0x0e, 0xaa, 0x48, 0x54}, // Configuration, password TAG | Configuration, password TAG
56 [4] = { 0x46, 0x5f, 0x4f, 0x4b}, // Data: F_OK
57 [5] = { 0x55, 0x55, 0x55, 0x55}, // Data: UUUU
58 [6] = { 0xaa, 0xaa, 0xaa, 0xaa}, // Data: ....
59 [7] = { 0x55, 0x55, 0x55, 0x55}, // Data: UUUU
60 [8] = { 0x00, 0x00, 0x00, 0x00}, // RSK Low
61 [9] = { 0x00, 0x00, 0x00, 0x00}, // RSK High
62 [10] = { 0x00, 0x00, 0x00, 0x00}, // RCF
63 [11] = { 0x00, 0x00, 0x00, 0x00}, // SYNC
67 // ToDo: define a meaningful maximum size for auth_table. The bigger this is, the lower will be the available memory for traces.
68 // Historically it used to be FREE_BUFFER_SIZE, which was 2744.
69 #define AUTH_TABLE_LENGTH 2744
70 static byte_t
* auth_table
;
71 static size_t auth_table_pos
= 0;
72 static size_t auth_table_len
= AUTH_TABLE_LENGTH
;
74 static byte_t password
[4];
75 static byte_t NrAr
[8];
77 static uint64_t cipher_state
;
79 /* Following is a modified version of cryptolib.com/ciphers/hitag2/ */
80 // Software optimized 48-bit Philips/NXP Mifare Hitag2 PCF7936/46/47/52 stream cipher algorithm by I.C. Wiener 2006-2007.
81 // For educational purposes only.
82 // No warranties or guarantees of any kind.
83 // This code is released into the public domain by its author.
90 #define rev8(x) ((((x)>>7)&1)+((((x)>>6)&1)<<1)+((((x)>>5)&1)<<2)+((((x)>>4)&1)<<3)+((((x)>>3)&1)<<4)+((((x)>>2)&1)<<5)+((((x)>>1)&1)<<6)+(((x)&1)<<7))
91 #define rev16(x) (rev8 (x)+(rev8 (x>> 8)<< 8))
92 #define rev32(x) (rev16(x)+(rev16(x>>16)<<16))
93 #define rev64(x) (rev32(x)+(rev32(x>>32)<<32))
94 #define bit(x,n) (((x)>>(n))&1)
95 #define bit32(x,n) ((((x)[(n)>>5])>>((n)))&1)
96 #define inv32(x,i,n) ((x)[(i)>>5]^=((u32)(n))<<((i)&31))
97 #define rotl64(x, n) ((((u64)(x))<<((n)&63))+(((u64)(x))>>((0-(n))&63)))
99 // Single bit Hitag2 functions:
101 #define i4(x,a,b,c,d) ((u32)((((x)>>(a))&1)+(((x)>>(b))&1)*2+(((x)>>(c))&1)*4+(((x)>>(d))&1)*8))
103 static const u32 ht2_f4a
= 0x2C79; // 0010 1100 0111 1001
104 static const u32 ht2_f4b
= 0x6671; // 0110 0110 0111 0001
105 static const u32 ht2_f5c
= 0x7907287B; // 0111 1001 0000 0111 0010 1000 0111 1011
107 static u32
_f20 (const u64 x
)
111 i5
= ((ht2_f4a
>> i4 (x
, 1, 2, 4, 5)) & 1)* 1
112 + ((ht2_f4b
>> i4 (x
, 7,11,13,14)) & 1)* 2
113 + ((ht2_f4b
>> i4 (x
,16,20,22,25)) & 1)* 4
114 + ((ht2_f4b
>> i4 (x
,27,28,30,32)) & 1)* 8
115 + ((ht2_f4a
>> i4 (x
,33,42,43,45)) & 1)*16;
117 return (ht2_f5c
>> i5
) & 1;
120 static u64
_hitag2_init (const u64 key
, const u32 serial
, const u32 IV
)
123 u64 x
= ((key
& 0xFFFF) << 32) + serial
;
125 for (i
= 0; i
< 32; i
++)
128 x
+= (u64
) (_f20 (x
) ^ (((IV
>> i
) ^ (key
>> (i
+16))) & 1)) << 47;
133 static u64
_hitag2_round (u64
*state
)
138 ((((x
>> 0) ^ (x
>> 2) ^ (x
>> 3) ^ (x
>> 6)
139 ^ (x
>> 7) ^ (x
>> 8) ^ (x
>> 16) ^ (x
>> 22)
140 ^ (x
>> 23) ^ (x
>> 26) ^ (x
>> 30) ^ (x
>> 41)
141 ^ (x
>> 42) ^ (x
>> 43) ^ (x
>> 46) ^ (x
>> 47)) & 1) << 47);
147 static u32
_hitag2_byte (u64
* x
)
151 for (i
= 0, c
= 0; i
< 8; i
++) c
+= (u32
) _hitag2_round (x
) << (i
^7);
155 static int hitag2_reset(void)
157 tag
.state
= TAG_STATE_RESET
;
158 tag
.crypto_active
= 0;
162 static int hitag2_init(void)
164 // memcpy(&tag, &resetdata, sizeof(tag));
169 static void hitag2_cipher_reset(struct hitag2_tag
*tag
, const byte_t
*iv
)
171 uint64_t key
= ((uint64_t)tag
->sectors
[2][2]) |
172 ((uint64_t)tag
->sectors
[2][3] << 8) |
173 ((uint64_t)tag
->sectors
[1][0] << 16) |
174 ((uint64_t)tag
->sectors
[1][1] << 24) |
175 ((uint64_t)tag
->sectors
[1][2] << 32) |
176 ((uint64_t)tag
->sectors
[1][3] << 40);
177 uint32_t uid
= ((uint32_t)tag
->sectors
[0][0]) |
178 ((uint32_t)tag
->sectors
[0][1] << 8) |
179 ((uint32_t)tag
->sectors
[0][2] << 16) |
180 ((uint32_t)tag
->sectors
[0][3] << 24);
181 uint32_t iv_
= (((uint32_t)(iv
[0]))) |
182 (((uint32_t)(iv
[1])) << 8) |
183 (((uint32_t)(iv
[2])) << 16) |
184 (((uint32_t)(iv
[3])) << 24);
185 tag
->cs
= _hitag2_init(rev64(key
), rev32(uid
), rev32(iv_
));
188 static int hitag2_cipher_authenticate(uint64_t* cs
, const byte_t
*authenticator_is
)
190 byte_t authenticator_should
[4];
191 authenticator_should
[0] = ~_hitag2_byte(cs
);
192 authenticator_should
[1] = ~_hitag2_byte(cs
);
193 authenticator_should
[2] = ~_hitag2_byte(cs
);
194 authenticator_should
[3] = ~_hitag2_byte(cs
);
195 return (memcmp(authenticator_should
, authenticator_is
, 4) == 0);
198 static int hitag2_cipher_transcrypt(uint64_t* cs
, byte_t
*data
, unsigned int bytes
, unsigned int bits
)
201 for(i
=0; i
<bytes
; i
++) data
[i
] ^= _hitag2_byte(cs
);
202 for(i
=0; i
<bits
; i
++) data
[bytes
] ^= _hitag2_round(cs
) << (7-i
);
206 // Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK)
207 // TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
208 // Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
209 // T0 = TIMER_CLOCK1 / 125000 = 192
212 #define SHORT_COIL() LOW(GPIO_SSC_DOUT)
213 #define OPEN_COIL() HIGH(GPIO_SSC_DOUT)
215 #define HITAG_FRAME_LEN 20
216 #define HITAG_T_STOP 36 /* T_EOF should be > 36 */
217 #define HITAG_T_LOW 8 /* T_LOW should be 4..10 */
218 #define HITAG_T_0_MIN 15 /* T[0] should be 18..22 */
219 #define HITAG_T_1_MIN 25 /* T[1] should be 26..30 */
220 //#define HITAG_T_EOF 40 /* T_EOF should be > 36 */
221 #define HITAG_T_EOF 80 /* T_EOF should be > 36 */
222 #define HITAG_T_WAIT_1 200 /* T_wresp should be 199..206 */
223 #define HITAG_T_WAIT_2 90 /* T_wresp should be 199..206 */
224 #define HITAG_T_WAIT_MAX 300 /* bit more than HITAG_T_WAIT_1 + HITAG_T_WAIT_2 */
226 #define HITAG_T_TAG_ONE_HALF_PERIOD 10
227 #define HITAG_T_TAG_TWO_HALF_PERIOD 25
228 #define HITAG_T_TAG_THREE_HALF_PERIOD 41
229 #define HITAG_T_TAG_FOUR_HALF_PERIOD 57
231 #define HITAG_T_TAG_HALF_PERIOD 16
232 #define HITAG_T_TAG_FULL_PERIOD 32
234 #define HITAG_T_TAG_CAPTURE_ONE_HALF 13
235 #define HITAG_T_TAG_CAPTURE_TWO_HALF 25
236 #define HITAG_T_TAG_CAPTURE_THREE_HALF 41
237 #define HITAG_T_TAG_CAPTURE_FOUR_HALF 57
240 static void hitag_send_bit(int bit
) {
242 // Reset clock for the next bit
243 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_SWTRG
;
245 // Fixed modulation, earlier proxmark version used inverted signal
247 // Manchester: Unloaded, then loaded |__--|
249 while(AT91C_BASE_TC0
->TC_CV
< T0
*HITAG_T_TAG_HALF_PERIOD
);
251 while(AT91C_BASE_TC0
->TC_CV
< T0
*HITAG_T_TAG_FULL_PERIOD
);
253 // Manchester: Loaded, then unloaded |--__|
255 while(AT91C_BASE_TC0
->TC_CV
< T0
*HITAG_T_TAG_HALF_PERIOD
);
257 while(AT91C_BASE_TC0
->TC_CV
< T0
*HITAG_T_TAG_FULL_PERIOD
);
262 static void hitag_send_frame(const byte_t
* frame
, size_t frame_len
)
264 // Send start of frame
265 for(size_t i
=0; i
<5; i
++) {
269 // Send the content of the frame
270 for(size_t i
=0; i
<frame_len
; i
++) {
271 hitag_send_bit((frame
[i
/8] >> (7-(i
%8)))&1);
274 // Drop the modulation
279 static void hitag2_handle_reader_command(byte_t
* rx
, const size_t rxlen
, byte_t
* tx
, size_t* txlen
)
281 byte_t rx_air
[HITAG_FRAME_LEN
];
283 // Copy the (original) received frame how it is send over the air
284 memcpy(rx_air
,rx
,nbytes(rxlen
));
286 if(tag
.crypto_active
) {
287 hitag2_cipher_transcrypt(&(tag
.cs
),rx
,rxlen
/8,rxlen
%8);
290 // Reset the transmission frame length
293 // Try to find out which command was send by selecting on length (in bits)
295 // Received 11000 from the reader, request for UID, send UID
297 // Always send over the air in the clear plaintext mode
298 if(rx_air
[0] != 0xC0) {
303 memcpy(tx
,tag
.sectors
[0],4);
304 tag
.crypto_active
= 0;
308 // Read/Write command: ..xx x..y yy with yyy == ~xxx, xxx is sector number
310 unsigned int sector
= (~( ((rx
[0]<<2)&0x04) | ((rx
[1]>>6)&0x03) ) & 0x07);
311 // Verify complement of sector index
312 if(sector
!= ((rx
[0]>>3)&0x07)) {
313 //DbpString("Transmission error (read/write)");
317 switch (rx
[0] & 0xC6) {
318 // Read command: 11xx x00y
320 memcpy(tx
,tag
.sectors
[sector
],4);
324 // Inverted Read command: 01xx x10y
326 for (size_t i
=0; i
<4; i
++) {
327 tx
[i
] = tag
.sectors
[sector
][i
] ^ 0xff;
332 // Write command: 10xx x01y
334 // Prepare write, acknowledge by repeating command
335 memcpy(tx
,rx
,nbytes(rxlen
));
337 tag
.active_sector
= sector
;
338 tag
.state
=TAG_STATE_WRITING
;
343 Dbprintf("Unknown command: %02x %02x",rx
[0],rx
[1]);
350 // Writing data or Reader password
352 if(tag
.state
== TAG_STATE_WRITING
) {
353 // These are the sector contents to be written. We don't have to do anything else.
354 memcpy(tag
.sectors
[tag
.active_sector
],rx
,nbytes(rxlen
));
355 tag
.state
=TAG_STATE_RESET
;
358 // Received RWD password, respond with configuration and our password
359 if(memcmp(rx
,tag
.sectors
[1],4) != 0) {
360 DbpString("Reader password is wrong");
364 memcpy(tx
,tag
.sectors
[3],4);
369 // Received RWD authentication challenge and respnse
371 // Store the authentication attempt
372 if (auth_table_len
< (AUTH_TABLE_LENGTH
-8)) {
373 memcpy(auth_table
+auth_table_len
,rx
,8);
377 // Reset the cipher state
378 hitag2_cipher_reset(&tag
,rx
);
379 // Check if the authentication was correct
380 if(!hitag2_cipher_authenticate(&(tag
.cs
),rx
+4)) {
381 // The reader failed to authenticate, do nothing
382 Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x Failed!",rx
[0],rx
[1],rx
[2],rx
[3],rx
[4],rx
[5],rx
[6],rx
[7]);
385 // Succesful, but commented out reporting back to the Host, this may delay to much.
386 // Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x OK!",rx[0],rx[1],rx[2],rx[3],rx[4],rx[5],rx[6],rx[7]);
388 // Activate encryption algorithm for all further communication
389 tag
.crypto_active
= 1;
391 // Use the tag password as response
392 memcpy(tx
,tag
.sectors
[3],4);
398 // LogTraceHitag(rx,rxlen,0,0,false);
399 // LogTraceHitag(tx,*txlen,0,0,true);
401 if(tag
.crypto_active
) {
402 hitag2_cipher_transcrypt(&(tag
.cs
), tx
, *txlen
/8, *txlen
%8);
406 static void hitag_reader_send_bit(int bit
) {
408 // Reset clock for the next bit
409 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_SWTRG
;
411 // Binary puls length modulation (BPLM) is used to encode the data stream
412 // This means that a transmission of a one takes longer than that of a zero
414 // Enable modulation, which means, drop the field
417 // Wait for 4-10 times the carrier period
418 while(AT91C_BASE_TC0
->TC_CV
< T0
*6);
421 // Disable modulation, just activates the field again
426 while(AT91C_BASE_TC0
->TC_CV
< T0
*22);
427 // SpinDelayUs(16*8);
430 while(AT91C_BASE_TC0
->TC_CV
< T0
*28);
431 // SpinDelayUs(22*8);
437 static void hitag_reader_send_frame(const byte_t
* frame
, size_t frame_len
)
439 // Send the content of the frame
440 for(size_t i
=0; i
<frame_len
; i
++) {
441 hitag_reader_send_bit((frame
[i
/8] >> (7-(i
%8)))&1);
444 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_SWTRG
;
445 // Enable modulation, which means, drop the field
447 // Wait for 4-10 times the carrier period
448 while(AT91C_BASE_TC0
->TC_CV
< T0
*6);
449 // Disable modulation, just activates the field again
455 static bool hitag2_password(byte_t
* rx
, const size_t rxlen
, byte_t
* tx
, size_t* txlen
) {
456 // Reset the transmission frame length
459 // Try to find out which command was send by selecting on length (in bits)
461 // No answer, try to resurrect
463 // Stop if there is no answer (after sending password)
465 DbpString("Password failed!");
469 memcpy(tx
,"\xc0",nbytes(*txlen
));
472 // Received UID, tag password
476 memcpy(tx
,password
,4);
478 memcpy(tag
.sectors
[blocknr
],rx
,4);
483 //store password in block1, the TAG answers with Block3, but we need the password in memory
484 memcpy(tag
.sectors
[blocknr
],tx
,4);
486 memcpy(tag
.sectors
[blocknr
],rx
,4);
491 DbpString("Read succesful!");
496 tx
[0] = 0xc0 | (blocknr
<< 3) | ((blocknr
^7) >> 2);
497 tx
[1] = ((blocknr
^7) << 6);
501 // Unexpected response
503 Dbprintf("Uknown frame length: %d",rxlen
);
510 static bool hitag2_crypto(byte_t
* rx
, const size_t rxlen
, byte_t
* tx
, size_t* txlen
) {
511 // Reset the transmission frame length
515 hitag2_cipher_transcrypt(&cipher_state
,rx
,rxlen
/8,rxlen
%8);
518 // Try to find out which command was send by selecting on length (in bits)
520 // No answer, try to resurrect
522 // Stop if there is no answer while we are in crypto mode (after sending NrAr)
524 // Failed during authentication
525 if (bAuthenticating
) {
526 DbpString("Authentication failed!");
529 // Failed reading a block, could be (read/write) locked, skip block and re-authenticate
531 // Write the low part of the key in memory
532 memcpy(tag
.sectors
[1],key
+2,4);
533 } else if (blocknr
== 2) {
534 // Write the high part of the key in memory
535 tag
.sectors
[2][0] = 0x00;
536 tag
.sectors
[2][1] = 0x00;
537 tag
.sectors
[2][2] = key
[0];
538 tag
.sectors
[2][3] = key
[1];
540 // Just put zero's in the memory (of the unreadable block)
541 memset(tag
.sectors
[blocknr
],0x00,4);
548 memcpy(tx
,"\xc0",nbytes(*txlen
));
552 // Received UID, crypto tag answer
555 uint64_t ui64key
= key
[0] | ((uint64_t)key
[1]) << 8 | ((uint64_t)key
[2]) << 16 | ((uint64_t)key
[3]) << 24 | ((uint64_t)key
[4]) << 32 | ((uint64_t)key
[5]) << 40;
556 uint32_t ui32uid
= rx
[0] | ((uint32_t)rx
[1]) << 8 | ((uint32_t)rx
[2]) << 16 | ((uint32_t)rx
[3]) << 24;
557 cipher_state
= _hitag2_init(rev64(ui64key
), rev32(ui32uid
), 0);
560 hitag2_cipher_transcrypt(&cipher_state
,tx
+4,4,0);
563 bAuthenticating
= true;
565 // Check if we received answer tag (at)
566 if (bAuthenticating
) {
567 bAuthenticating
= false;
569 // Store the received block
570 memcpy(tag
.sectors
[blocknr
],rx
,4);
574 DbpString("Read succesful!");
579 tx
[0] = 0xc0 | (blocknr
<< 3) | ((blocknr
^7) >> 2);
580 tx
[1] = ((blocknr
^7) << 6);
584 // Unexpected response
586 Dbprintf("Uknown frame length: %d",rxlen
);
593 // We have to return now to avoid double encryption
594 if (!bAuthenticating
) {
595 hitag2_cipher_transcrypt(&cipher_state
,tx
,*txlen
/8,*txlen
%8);
603 static bool hitag2_authenticate(byte_t
* rx
, const size_t rxlen
, byte_t
* tx
, size_t* txlen
) {
604 // Reset the transmission frame length
607 // Try to find out which command was send by selecting on length (in bits)
609 // No answer, try to resurrect
611 // Stop if there is no answer while we are in crypto mode (after sending NrAr)
613 DbpString("Authentication failed!");
617 memcpy(tx
,"\xc0",nbytes(*txlen
));
620 // Received UID, crypto tag answer
627 DbpString("Authentication succesful!");
628 // We are done... for now
633 // Unexpected response
635 Dbprintf("Uknown frame length: %d",rxlen
);
644 static bool hitag2_test_auth_attempts(byte_t
* rx
, const size_t rxlen
, byte_t
* tx
, size_t* txlen
) {
646 // Reset the transmission frame length
649 // Try to find out which command was send by selecting on length (in bits)
651 // No answer, try to resurrect
653 // Stop if there is no answer while we are in crypto mode (after sending NrAr)
655 Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x Failed, removed entry!",NrAr
[0],NrAr
[1],NrAr
[2],NrAr
[3],NrAr
[4],NrAr
[5],NrAr
[6],NrAr
[7]);
657 // Removing failed entry from authentiations table
658 memcpy(auth_table
+auth_table_pos
,auth_table
+auth_table_pos
+8,8);
661 // Return if we reached the end of the authentications table
663 if (auth_table_pos
== auth_table_len
) {
667 // Copy the next authentication attempt in row (at the same position, b/c we removed last failed entry)
668 memcpy(NrAr
,auth_table
+auth_table_pos
,8);
671 memcpy(tx
,"\xc0",nbytes(*txlen
));
674 // Received UID, crypto tag answer, or read block response
681 Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x OK",NrAr
[0],NrAr
[1],NrAr
[2],NrAr
[3],NrAr
[4],NrAr
[5],NrAr
[6],NrAr
[7]);
683 if ((auth_table_pos
+8) == auth_table_len
) {
687 memcpy(NrAr
,auth_table
+auth_table_pos
,8);
692 Dbprintf("Uknown frame length: %d",rxlen
);
700 static bool hitag2_read_uid(byte_t
* rx
, const size_t rxlen
, byte_t
* tx
, size_t* txlen
) {
701 // Reset the transmission frame length
704 // Try to find out which command was send by selecting on length (in bits)
706 // No answer, try to resurrect
708 // Just starting or if there is no answer
710 memcpy(tx
,"\xc0",nbytes(*txlen
));
714 // Check if we received answer tag (at)
715 if (bAuthenticating
) {
716 bAuthenticating
= false;
718 // Store the received block
719 memcpy(tag
.sectors
[blocknr
],rx
,4);
723 //DbpString("Read successful!");
728 // Unexpected response
730 Dbprintf("Uknown frame length: %d",rxlen
);
737 void SnoopHitag(uint32_t type
) {
746 byte_t rx
[HITAG_FRAME_LEN
];
749 FpgaDownloadAndGo(FPGA_BITSTREAM_LF
);
751 // Clean up trace and prepare it for storing frames
759 auth_table
= (byte_t
*)BigBuf_malloc(AUTH_TABLE_LENGTH
);
760 memset(auth_table
, 0x00, AUTH_TABLE_LENGTH
);
762 DbpString("Starting Hitag2 snoop");
765 // Set up eavesdropping mode, frequency divisor which will drive the FPGA
766 // and analog mux selection.
767 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT
| FPGA_LF_EDGE_DETECT_TOGGLE_MODE
);
768 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
769 SetAdcMuxFor(GPIO_MUXSEL_LOPKD
);
772 // Configure output pin that is connected to the FPGA (for modulating)
773 AT91C_BASE_PIOA
->PIO_OER
= GPIO_SSC_DOUT
;
774 AT91C_BASE_PIOA
->PIO_PER
= GPIO_SSC_DOUT
;
776 // Disable modulation, we are going to eavesdrop, not modulate ;)
779 // Enable Peripheral Clock for TIMER_CLOCK1, used to capture edges of the reader frames
780 AT91C_BASE_PMC
->PMC_PCER
= (1 << AT91C_ID_TC1
);
781 AT91C_BASE_PIOA
->PIO_BSR
= GPIO_SSC_FRAME
;
783 // Disable timer during configuration
784 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
;
786 // Capture mode, defaul timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger,
787 // external trigger rising edge, load RA on rising edge of TIOA.
788 uint32_t t1_channel_mode
= AT91C_TC_CLKS_TIMER_DIV1_CLOCK
| AT91C_TC_ETRGEDG_BOTH
| AT91C_TC_ABETRG
| AT91C_TC_LDRA_BOTH
;
789 AT91C_BASE_TC1
->TC_CMR
= t1_channel_mode
;
791 // Enable and reset counter
792 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKEN
| AT91C_TC_SWTRG
;
794 // Reset the received frame, frame count and timing info
795 memset(rx
,0x00,sizeof(rx
));
799 reader_frame
= false;
804 while(!BUTTON_PRESS()) {
808 // Receive frame, watch for at most T0*EOF periods
809 while (AT91C_BASE_TC1
->TC_CV
< T0
*HITAG_T_EOF
) {
810 // Check if rising edge in modulation is detected
811 if(AT91C_BASE_TC1
->TC_SR
& AT91C_TC_LDRAS
) {
812 // Retrieve the new timing values
813 int ra
= (AT91C_BASE_TC1
->TC_RA
/T0
);
815 // Find out if we are dealing with a rising or falling edge
816 rising_edge
= (AT91C_BASE_PIOA
->PIO_PDSR
& GPIO_SSC_FRAME
) > 0;
818 // Shorter periods will only happen with reader frames
819 if (!reader_frame
&& rising_edge
&& ra
< HITAG_T_TAG_CAPTURE_ONE_HALF
) {
820 // Switch from tag to reader capture
823 memset(rx
,0x00,sizeof(rx
));
827 // Only handle if reader frame and rising edge, or tag frame and falling edge
828 if (reader_frame
!= rising_edge
) {
833 // Add the buffered timing values of earlier captured edges which were skipped
839 // Capture reader frame
840 if(ra
>= HITAG_T_STOP
) {
842 //DbpString("wierd0?");
844 // Capture the T0 periods that have passed since last communication or field drop (reset)
845 response
= (ra
- HITAG_T_LOW
);
846 } else if(ra
>= HITAG_T_1_MIN
) {
848 rx
[rxlen
/ 8] |= 1 << (7-(rxlen
%8));
850 } else if(ra
>= HITAG_T_0_MIN
) {
852 rx
[rxlen
/ 8] |= 0 << (7-(rxlen
%8));
855 // Ignore wierd value, is to small to mean anything
859 // Capture tag frame (manchester decoding using only falling edges)
860 if(ra
>= HITAG_T_EOF
) {
862 //DbpString("wierd1?");
864 // Capture the T0 periods that have passed since last communication or field drop (reset)
865 // We always recieve a 'one' first, which has the falling edge after a half period |-_|
866 response
= ra
-HITAG_T_TAG_HALF_PERIOD
;
867 } else if(ra
>= HITAG_T_TAG_CAPTURE_FOUR_HALF
) {
868 // Manchester coding example |-_|_-|-_| (101)
869 rx
[rxlen
/ 8] |= 0 << (7-(rxlen
%8));
871 rx
[rxlen
/ 8] |= 1 << (7-(rxlen
%8));
873 } else if(ra
>= HITAG_T_TAG_CAPTURE_THREE_HALF
) {
874 // Manchester coding example |_-|...|_-|-_| (0...01)
875 rx
[rxlen
/ 8] |= 0 << (7-(rxlen
%8));
877 // We have to skip this half period at start and add the 'one' the second time
879 rx
[rxlen
/ 8] |= 1 << (7-(rxlen
%8));
884 } else if(ra
>= HITAG_T_TAG_CAPTURE_TWO_HALF
) {
885 // Manchester coding example |_-|_-| (00) or |-_|-_| (11)
887 // Ignore bits that are transmitted during SOF
890 // bit is same as last bit
891 rx
[rxlen
/ 8] |= lastbit
<< (7-(rxlen
%8));
895 // Ignore wierd value, is to small to mean anything
901 // Check if frame was captured
904 if (!LogTraceHitag(rx
,rxlen
,response
,0,reader_frame
)) {
905 DbpString("Trace full");
909 // Check if we recognize a valid authentication attempt
910 if (nbytes(rxlen
) == 8) {
911 // Store the authentication attempt
912 if (auth_table_len
< (AUTH_TABLE_LENGTH
-8)) {
913 memcpy(auth_table
+auth_table_len
,rx
,8);
918 // Reset the received frame and response timing info
919 memset(rx
,0x00,sizeof(rx
));
921 reader_frame
= false;
930 // Save the timer overflow, will be 0 when frame was received
931 overflow
+= (AT91C_BASE_TC1
->TC_CV
/T0
);
933 // Reset the frame length
935 // Reset the timer to restart while-loop that receives frames
936 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_SWTRG
;
942 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
;
943 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKDIS
;
944 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
947 // Dbprintf("frame received: %d",frame_count);
948 // Dbprintf("Authentication Attempts: %d",(auth_table_len/8));
949 // DbpString("All done");
952 void SimulateHitagTag(bool tag_mem_supplied
, byte_t
* data
) {
956 byte_t rx
[HITAG_FRAME_LEN
];
958 byte_t tx
[HITAG_FRAME_LEN
];
960 bool bQuitTraceFull
= false;
963 FpgaDownloadAndGo(FPGA_BITSTREAM_LF
);
965 // Clean up trace and prepare it for storing frames
973 auth_table
= (byte_t
*)BigBuf_malloc(AUTH_TABLE_LENGTH
);
974 memset(auth_table
, 0x00, AUTH_TABLE_LENGTH
);
976 DbpString("Starting Hitag2 simulation");
980 if (tag_mem_supplied
) {
981 DbpString("Loading hitag2 memory...");
982 memcpy((byte_t
*)tag
.sectors
,data
,48);
986 for (size_t i
=0; i
<12; i
++) {
987 for (size_t j
=0; j
<4; j
++) {
989 block
|= tag
.sectors
[i
][j
];
991 Dbprintf("| %d | %08x |",i
,block
);
994 // Set up simulator mode, frequency divisor which will drive the FPGA
995 // and analog mux selection.
996 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT
);
997 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
998 SetAdcMuxFor(GPIO_MUXSEL_LOPKD
);
1001 // Configure output pin that is connected to the FPGA (for modulating)
1002 AT91C_BASE_PIOA
->PIO_OER
= GPIO_SSC_DOUT
;
1003 AT91C_BASE_PIOA
->PIO_PER
= GPIO_SSC_DOUT
;
1005 // Disable modulation at default, which means release resistance
1008 // Enable Peripheral Clock for TIMER_CLOCK0, used to measure exact timing before answering
1009 AT91C_BASE_PMC
->PMC_PCER
= (1 << AT91C_ID_TC0
);
1011 // Enable Peripheral Clock for TIMER_CLOCK1, used to capture edges of the reader frames
1012 AT91C_BASE_PMC
->PMC_PCER
= (1 << AT91C_ID_TC1
);
1013 AT91C_BASE_PIOA
->PIO_BSR
= GPIO_SSC_FRAME
;
1015 // Disable timer during configuration
1016 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
;
1018 // Capture mode, default timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger,
1019 // external trigger rising edge, load RA on rising edge of TIOA.
1020 AT91C_BASE_TC1
->TC_CMR
= AT91C_TC_CLKS_TIMER_DIV1_CLOCK
| AT91C_TC_ETRGEDG_RISING
| AT91C_TC_ABETRG
| AT91C_TC_LDRA_RISING
;
1022 // Reset the received frame, frame count and timing info
1023 memset(rx
,0x00,sizeof(rx
));
1028 // Enable and reset counter
1029 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKEN
| AT91C_TC_SWTRG
;
1031 while(!BUTTON_PRESS()) {
1035 // Receive frame, watch for at most T0*EOF periods
1036 while (AT91C_BASE_TC1
->TC_CV
< T0
*HITAG_T_EOF
) {
1037 // Check if rising edge in modulation is detected
1038 if(AT91C_BASE_TC1
->TC_SR
& AT91C_TC_LDRAS
) {
1039 // Retrieve the new timing values
1040 int ra
= (AT91C_BASE_TC1
->TC_RA
/T0
) + overflow
;
1043 // Reset timer every frame, we have to capture the last edge for timing
1044 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKEN
| AT91C_TC_SWTRG
;
1048 // Capture reader frame
1049 if(ra
>= HITAG_T_STOP
) {
1051 //DbpString("wierd0?");
1053 // Capture the T0 periods that have passed since last communication or field drop (reset)
1054 response
= (ra
- HITAG_T_LOW
);
1055 } else if(ra
>= HITAG_T_1_MIN
) {
1057 rx
[rxlen
/ 8] |= 1 << (7-(rxlen
%8));
1059 } else if(ra
>= HITAG_T_0_MIN
) {
1061 rx
[rxlen
/ 8] |= 0 << (7-(rxlen
%8));
1064 // Ignore wierd value, is to small to mean anything
1069 // Check if frame was captured
1073 if (!LogTraceHitag(rx
,rxlen
,response
,0,true)) {
1074 DbpString("Trace full");
1075 if (bQuitTraceFull
) {
1083 // Disable timer 1 with external trigger to avoid triggers during our own modulation
1084 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
;
1086 // Process the incoming frame (rx) and prepare the outgoing frame (tx)
1087 hitag2_handle_reader_command(rx
,rxlen
,tx
,&txlen
);
1089 // Wait for HITAG_T_WAIT_1 carrier periods after the last reader bit,
1090 // not that since the clock counts since the rising edge, but T_Wait1 is
1091 // with respect to the falling edge, we need to wait actually (T_Wait1 - T_Low)
1092 // periods. The gap time T_Low varies (4..10). All timer values are in
1093 // terms of T0 units
1094 while(AT91C_BASE_TC0
->TC_CV
< T0
*(HITAG_T_WAIT_1
-HITAG_T_LOW
));
1096 // Send and store the tag answer (if there is any)
1098 // Transmit the tag frame
1099 hitag_send_frame(tx
,txlen
);
1100 // Store the frame in the trace
1102 if (!LogTraceHitag(tx
,txlen
,0,0,false)) {
1103 DbpString("Trace full");
1104 if (bQuitTraceFull
) {
1113 // Reset the received frame and response timing info
1114 memset(rx
,0x00,sizeof(rx
));
1117 // Enable and reset external trigger in timer for capturing future frames
1118 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKEN
| AT91C_TC_SWTRG
;
1121 // Reset the frame length
1123 // Save the timer overflow, will be 0 when frame was received
1124 overflow
+= (AT91C_BASE_TC1
->TC_CV
/T0
);
1125 // Reset the timer to restart while-loop that receives frames
1126 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_SWTRG
;
1130 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
;
1131 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKDIS
;
1132 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1134 DbpString("Sim Stopped");
1138 void ReaderHitag(hitag_function htf
, hitag_data
* htd
) {
1141 byte_t rx
[HITAG_FRAME_LEN
];
1143 byte_t txbuf
[HITAG_FRAME_LEN
];
1150 int t_wait
= HITAG_T_WAIT_MAX
;
1152 bool bQuitTraceFull
= false;
1154 FpgaDownloadAndGo(FPGA_BITSTREAM_LF
);
1155 // Reset the return status
1156 bSuccessful
= false;
1158 // Clean up trace and prepare it for storing frames
1162 //DbpString("Starting Hitag reader family");
1164 // Check configuration
1166 case RHT2F_PASSWORD
: {
1167 Dbprintf("List identifier in password mode");
1168 memcpy(password
,htd
->pwd
.password
,4);
1170 bQuitTraceFull
= false;
1174 case RHT2F_AUTHENTICATE
: {
1175 DbpString("Authenticating using nr,ar pair:");
1176 memcpy(NrAr
,htd
->auth
.NrAr
,8);
1177 Dbhexdump(8,NrAr
,false);
1180 bAuthenticating
= false;
1181 bQuitTraceFull
= true;
1183 case RHT2F_CRYPTO
: {
1184 DbpString("Authenticating using key:");
1185 memcpy(key
,htd
->crypto
.key
,6); //HACK; 4 or 6?? I read both in the code.
1186 Dbhexdump(6,key
,false);
1190 bAuthenticating
= false;
1191 bQuitTraceFull
= true;
1193 case RHT2F_TEST_AUTH_ATTEMPTS
: {
1194 Dbprintf("Testing %d authentication attempts",(auth_table_len
/8));
1196 memcpy(NrAr
, auth_table
, 8);
1197 bQuitTraceFull
= false;
1201 case RHT2F_UID_ONLY
: {
1205 bAuthenticating
= false;
1206 bQuitTraceFull
= true;
1209 Dbprintf("Error, unknown function: %d",htf
);
1217 // Configure output and enable pin that is connected to the FPGA (for modulating)
1218 AT91C_BASE_PIOA
->PIO_OER
= GPIO_SSC_DOUT
;
1219 AT91C_BASE_PIOA
->PIO_PER
= GPIO_SSC_DOUT
;
1221 // Set fpga in edge detect with reader field, we can modulate as reader now
1222 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT
| FPGA_LF_EDGE_DETECT_READER_FIELD
);
1224 // Set Frequency divisor which will drive the FPGA and analog mux selection
1225 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
1226 SetAdcMuxFor(GPIO_MUXSEL_LOPKD
);
1229 // Disable modulation at default, which means enable the field
1232 // Give it a bit of time for the resonant antenna to settle.
1235 // Enable Peripheral Clock for TIMER_CLOCK0, used to measure exact timing before answering
1236 AT91C_BASE_PMC
->PMC_PCER
= (1 << AT91C_ID_TC0
);
1238 // Enable Peripheral Clock for TIMER_CLOCK1, used to capture edges of the tag frames
1239 AT91C_BASE_PMC
->PMC_PCER
= (1 << AT91C_ID_TC1
);
1240 AT91C_BASE_PIOA
->PIO_BSR
= GPIO_SSC_FRAME
;
1242 // Disable timer during configuration
1243 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
;
1245 // Capture mode, defaul timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger,
1246 // external trigger rising edge, load RA on falling edge of TIOA.
1247 AT91C_BASE_TC1
->TC_CMR
= AT91C_TC_CLKS_TIMER_DIV1_CLOCK
| AT91C_TC_ETRGEDG_FALLING
| AT91C_TC_ABETRG
| AT91C_TC_LDRA_FALLING
;
1249 // Enable and reset counters
1250 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKEN
| AT91C_TC_SWTRG
;
1251 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKEN
| AT91C_TC_SWTRG
;
1253 // Reset the received frame, frame count and timing info
1259 // Tag specific configuration settings (sof, timings, etc.)
1264 //DbpString("Configured for hitagS reader");
1265 } else if (htf
< 20) {
1269 //DbpString("Configured for hitag1 reader");
1270 } else if (htf
< 30) {
1273 t_wait
= HITAG_T_WAIT_2
;
1274 //DbpString("Configured for hitag2 reader");
1276 Dbprintf("Error, unknown hitag reader type: %d",htf
);
1279 uint8_t attempt_count
=0;
1280 while(!bStop
&& !BUTTON_PRESS()) {
1284 // Check if frame was captured and store it
1288 if (!LogTraceHitag(rx
,rxlen
,response
,0,false)) {
1289 DbpString("Trace full");
1290 if (bQuitTraceFull
) {
1299 // By default reset the transmission buffer
1302 case RHT2F_PASSWORD
: {
1303 bStop
= !hitag2_password(rx
,rxlen
,tx
,&txlen
);
1305 case RHT2F_AUTHENTICATE
: {
1306 bStop
= !hitag2_authenticate(rx
,rxlen
,tx
,&txlen
);
1308 case RHT2F_CRYPTO
: {
1309 bStop
= !hitag2_crypto(rx
,rxlen
,tx
,&txlen
);
1311 case RHT2F_TEST_AUTH_ATTEMPTS
: {
1312 bStop
= !hitag2_test_auth_attempts(rx
,rxlen
,tx
,&txlen
);
1314 case RHT2F_UID_ONLY
: {
1315 bStop
= !hitag2_read_uid(rx
, rxlen
, tx
, &txlen
);
1316 attempt_count
++; //attempt 3 times to get uid then quit
1317 if (!bStop
&& attempt_count
== 3) bStop
= true;
1320 Dbprintf("Error, unknown function: %d",htf
);
1325 // Send and store the reader command
1326 // Disable timer 1 with external trigger to avoid triggers during our own modulation
1327 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
;
1329 // Wait for HITAG_T_WAIT_2 carrier periods after the last tag bit before transmitting,
1330 // Since the clock counts since the last falling edge, a 'one' means that the
1331 // falling edge occured halfway the period. with respect to this falling edge,
1332 // we need to wait (T_Wait2 + half_tag_period) when the last was a 'one'.
1333 // All timer values are in terms of T0 units
1334 while(AT91C_BASE_TC0
->TC_CV
< T0
*(t_wait
+(HITAG_T_TAG_HALF_PERIOD
*lastbit
)));
1336 //Dbprintf("DEBUG: Sending reader frame");
1338 // Transmit the reader frame
1339 hitag_reader_send_frame(tx
,txlen
);
1341 // Enable and reset external trigger in timer for capturing future frames
1342 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKEN
| AT91C_TC_SWTRG
;
1344 // Add transmitted frame to total count
1348 // Store the frame in the trace
1349 if (!LogTraceHitag(tx
,txlen
,HITAG_T_WAIT_2
,0,true)) {
1350 if (bQuitTraceFull
) {
1359 // Reset values for receiving frames
1360 memset(rx
,0x00,sizeof(rx
));
1364 tag_sof
= reset_sof
;
1366 //Dbprintf("DEBUG: Waiting to receive frame");
1367 uint32_t errorCount
= 0;
1369 // Receive frame, watch for at most T0*EOF periods
1370 while (AT91C_BASE_TC1
->TC_CV
< T0
*HITAG_T_WAIT_MAX
) {
1371 // Check if falling edge in tag modulation is detected
1372 if(AT91C_BASE_TC1
->TC_SR
& AT91C_TC_LDRAS
) {
1373 // Retrieve the new timing values
1374 int ra
= (AT91C_BASE_TC1
->TC_RA
/T0
);
1376 // Reset timer every frame, we have to capture the last edge for timing
1377 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_SWTRG
;
1381 // Capture tag frame (manchester decoding using only falling edges)
1382 if(ra
>= HITAG_T_EOF
) {
1384 //Dbprintf("DEBUG: Wierd1");
1386 // Capture the T0 periods that have passed since last communication or field drop (reset)
1387 // We always recieve a 'one' first, which has the falling edge after a half period |-_|
1388 response
= ra
-HITAG_T_TAG_HALF_PERIOD
;
1389 } else if(ra
>= HITAG_T_TAG_CAPTURE_FOUR_HALF
) {
1390 // Manchester coding example |-_|_-|-_| (101)
1392 //need to test to verify we don't exceed memory...
1393 //if ( ((rxlen+2) / 8) > HITAG_FRAME_LEN) {
1396 rx
[rxlen
/ 8] |= 0 << (7-(rxlen
%8));
1398 rx
[rxlen
/ 8] |= 1 << (7-(rxlen
%8));
1400 } else if(ra
>= HITAG_T_TAG_CAPTURE_THREE_HALF
) {
1401 // Manchester coding example |_-|...|_-|-_| (0...01)
1403 //need to test to verify we don't exceed memory...
1404 //if ( ((rxlen+2) / 8) > HITAG_FRAME_LEN) {
1407 rx
[rxlen
/ 8] |= 0 << (7-(rxlen
%8));
1409 // We have to skip this half period at start and add the 'one' the second time
1411 rx
[rxlen
/ 8] |= 1 << (7-(rxlen
%8));
1416 } else if(ra
>= HITAG_T_TAG_CAPTURE_TWO_HALF
) {
1417 // Manchester coding example |_-|_-| (00) or |-_|-_| (11)
1419 //need to test to verify we don't exceed memory...
1420 //if ( ((rxlen+2) / 8) > HITAG_FRAME_LEN) {
1424 // Ignore bits that are transmitted during SOF
1427 // bit is same as last bit
1428 rx
[rxlen
/ 8] |= lastbit
<< (7-(rxlen
%8));
1432 //Dbprintf("DEBUG: Wierd2");
1434 // Ignore wierd value, is to small to mean anything
1437 //if we saw over 100 wierd values break it probably isn't hitag...
1438 if (errorCount
>100) break;
1439 // We can break this loop if we received the last bit from a frame
1440 if (AT91C_BASE_TC1
->TC_CV
> T0
*HITAG_T_EOF
) {
1445 //Dbprintf("DEBUG: Done waiting for frame");
1449 AT91C_BASE_TC1
->TC_CCR
= AT91C_TC_CLKDIS
;
1450 AT91C_BASE_TC0
->TC_CCR
= AT91C_TC_CLKDIS
;
1451 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1452 //Dbprintf("frame received: %d",frame_count);
1453 //DbpString("All done");
1454 cmd_send(CMD_ACK
,bSuccessful
,0,0,(byte_t
*)tag
.sectors
,48);