#include "apps.h"
#include "util.h"
#include "string.h"
+#include "printf.h"
#include "common.h"
#include "cmd.h"
#include "iso14443a.h"
+#include "iso15693.h"
// Needed for CRC in emulation mode;
// same construction as in ISO 14443;
// different initial value (CRC_ICLASS)
Demod.shiftReg = 0;
Demod.samples = 0;
if (Demod.posCount) {
- //if (trigger) LED_A_OFF(); // Not useful in this case...
- switch(Demod.syncBit) {
+ switch (Demod.syncBit) {
case 0x08: Demod.samples = 3; break;
case 0x04: Demod.samples = 2; break;
case 0x02: Demod.samples = 1; break;
}
} else {
+ // state is DEMOD is in SYNC from here on.
modulation = bit & Demod.syncBit;
modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
Demod.samples += 4;
- if (Demod.posCount==0) {
+ if (Demod.posCount == 0) {
Demod.posCount = 1;
if (modulation) {
Demod.sub = SUB_FIRST_HALF;
}
} else {
Demod.posCount = 0;
- /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
- if (Demod.state!=DEMOD_ERROR_WAIT) {
- Demod.state = DEMOD_ERROR_WAIT;
- Demod.output[Demod.len] = 0xaa;
- error = 0x01;
- }
- }*/
- //else if (modulation) {
if (modulation) {
if (Demod.sub == SUB_FIRST_HALF) {
Demod.sub = SUB_BOTH;
Demod.output[Demod.len] = 0x0f;
Demod.len++;
Demod.state = DEMOD_UNSYNCD;
-// error = 0x0f;
return true;
} else {
Demod.state = DEMOD_ERROR_WAIT;
error = 0x33;
}
- /*if (Demod.state!=DEMOD_ERROR_WAIT) {
- Demod.state = DEMOD_ERROR_WAIT;
- Demod.output[Demod.len] = 0xaa;
- error = 0x01;
- }*/
}
switch(Demod.state) {
case DEMOD_START_OF_COMMUNICATION:
if (Demod.sub == SUB_BOTH) {
- //Demod.state = DEMOD_MANCHESTER_D;
Demod.state = DEMOD_START_OF_COMMUNICATION2;
Demod.posCount = 1;
Demod.sub = SUB_NONE;
break;
case DEMOD_START_OF_COMMUNICATION3:
if (Demod.sub == SUB_SECOND_HALF) {
-// Demod.state = DEMOD_MANCHESTER_D;
Demod.state = DEMOD_SOF_COMPLETE;
- //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
- //Demod.len++;
} else {
Demod.output[Demod.len] = 0xab;
Demod.state = DEMOD_ERROR_WAIT;
break;
}
- /*if (Demod.bitCount>=9) {
- Demod.output[Demod.len] = Demod.shiftReg & 0xff;
- Demod.len++;
-
- Demod.parityBits <<= 1;
- Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
-
- Demod.bitCount = 0;
- Demod.shiftReg = 0;
- }*/
if (Demod.bitCount >= 8) {
Demod.shiftReg >>= 1;
Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
}
}
-//-----------------------------------------------------------------------------
-// Wait for commands from reader
-// Stop when button is pressed
-// Or return true when command is captured
-//-----------------------------------------------------------------------------
-static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen)
-{
- // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
- // only, since we are receiving, not transmitting).
- // Signal field is off with the appropriate LED
- LED_D_OFF();
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
-
- // Now run a `software UART' on the stream of incoming samples.
- Uart.output = received;
- Uart.byteCntMax = maxLen;
- Uart.state = STATE_UNSYNCD;
-
- for (;;) {
- WDT_HIT();
-
- if (BUTTON_PRESS()) return false;
-
- if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
- AT91C_BASE_SSC->SSC_THR = 0x00;
- }
- if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
- uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-
- if (OutOfNDecoding(b & 0x0f)) {
- *len = Uart.byteCnt;
- return true;
- }
- }
- }
-}
-
-static uint8_t encode4Bits(const uint8_t b) {
- uint8_t c = b & 0xF;
- // OTA, the least significant bits first
- // The columns are
- // 1 - Bit value to send
- // 2 - Reversed (big-endian)
- // 3 - Encoded
- // 4 - Hex values
-
- switch(c){
- // 1 2 3 4
- case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
- case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
- case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
- case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
- case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
- case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
- case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
- case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
- case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
- case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
- case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
- case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
- case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
- case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
- case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
- default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
-
- }
-}
-
-//-----------------------------------------------------------------------------
-// Prepare tag messages
-//-----------------------------------------------------------------------------
-static void CodeIClassTagAnswer(const uint8_t *cmd, int len) {
-
- /*
- * SOF comprises 3 parts;
- * * An unmodulated time of 56.64 us
- * * 24 pulses of 423.75 kHz (fc/32)
- * * A logic 1, which starts with an unmodulated time of 18.88us
- * followed by 8 pulses of 423.75kHz (fc/32)
- *
- *
- * EOF comprises 3 parts:
- * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
- * time of 18.88us.
- * - 24 pulses of fc/32
- * - An unmodulated time of 56.64 us
- *
- *
- * A logic 0 starts with 8 pulses of fc/32
- * followed by an unmodulated time of 256/fc (~18,88us).
- *
- * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
- * 8 pulses of fc/32 (also 18.88us)
- *
- * The mode FPGA_HF_SIMULATOR_MODULATE_424K_8BIT which we use to simulate tag,
- * works like this.
- * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us).
- * - A 0-bit input to the FPGA becomes an unmodulated time of 18.88us
- *
- * In this mode the SOF can be written as 00011101 = 0x1D
- * The EOF can be written as 10111000 = 0xb8
- * A logic 1 is 01
- * A logic 0 is 10
- *
- * */
-
- int i;
-
- ToSendReset();
-
- // Send SOF
- ToSend[++ToSendMax] = 0x1D;
-
- for (i = 0; i < len; i++) {
- uint8_t b = cmd[i];
- ToSend[++ToSendMax] = encode4Bits(b & 0xF); // Least significant half
- ToSend[++ToSendMax] = encode4Bits((b >>4) & 0xF); // Most significant half
- }
-
- // Send EOF
- ToSend[++ToSendMax] = 0xB8;
- //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end
- // Convert from last byte pos to length
- ToSendMax++;
-}
-
-// Only SOF
+// Encode SOF only
static void CodeIClassTagSOF() {
//So far a dummy implementation, not used
//int lastProxToAirDuration =0;
ComputeCrc14443(CRC_ICLASS, data, len, data+len, data+len+1);
}
-static int SendIClassAnswer(uint8_t *resp, int respLen, int delay) {
- int i = 0, d = 0;//, u = 0, d = 0;
- uint8_t b = 0;
-
- //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K_8BIT);
-
- AT91C_BASE_SSC->SSC_THR = 0x00;
- FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
- while (!BUTTON_PRESS()) {
- if ((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
- b = AT91C_BASE_SSC->SSC_RHR; (void) b;
- }
- if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){
- b = 0x00;
- if (d < delay) {
- d++;
- }
- else {
- if (i < respLen) {
- b = resp[i];
- //Hack
- //b = 0xAC;
- }
- i++;
- }
- AT91C_BASE_SSC->SSC_THR = b;
- }
-
-// if (i > respLen +4) break;
- if (i > respLen + 1) break;
- }
-
- return 0;
-}
-
-
-#define MODE_SIM_CSN 0
-#define MODE_EXIT_AFTER_MAC 1
-#define MODE_FULLSIM 2
/**
* @brief Does the actual simulation
- * @param csn - csn to use
- * @param breakAfterMacReceived if true, returns after reader MAC has been received.
*/
int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
+
// free eventually allocated BigBuf memory
BigBuf_free_keep_EM();
State cipher_state;
-// State cipher_state_reserve;
- uint8_t *csn = BigBuf_get_EM_addr();
- uint8_t *emulator = csn;
- uint8_t sof_data[] = { 0x0F} ;
+
+ uint8_t *emulator = BigBuf_get_EM_addr();
+ uint8_t *csn = emulator;
+ uint8_t sof_data[] = { 0x0F } ;
+
// CSN followed by two CRC bytes
uint8_t anticoll_data[10] = { 0 };
uint8_t csn_data[10] = { 0 };
rotateCSN(csn_data, anticoll_data);
// Compute CRC on both CSNs
- ComputeCrc14443(CRC_ICLASS, anticoll_data, 8, &anticoll_data[8], &anticoll_data[9]);
- ComputeCrc14443(CRC_ICLASS, csn_data, 8, &csn_data[8], &csn_data[9]);
+ AppendCrc(anticoll_data, 8);
+ AppendCrc(csn_data, 8);
uint8_t diversified_key[8] = { 0 };
// e-Purse
- uint8_t card_challenge_data[8] = { 0x00 };
- if (simulationMode == MODE_FULLSIM) {
- //The diversified key should be stored on block 3
- //Get the diversified key from emulator memory
- memcpy(diversified_key, emulator + (8*3), 8);
- //Card challenge, a.k.a e-purse is on block 2
+ uint8_t card_challenge_data[8] = { 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+ //uint8_t card_challenge_data[8] = { 0 };
+ if (simulationMode == ICLASS_SIM_MODE_FULL) {
+ // The diversified key should be stored on block 3
+ // Get the diversified key from emulator memory
+ memcpy(diversified_key, emulator + (8 * 3), 8);
+ // Card challenge, a.k.a e-purse is on block 2
memcpy(card_challenge_data, emulator + (8 * 2), 8);
- //Precalculate the cipher state, feeding it the CC
+ // Precalculate the cipher state, feeding it the CC
cipher_state = opt_doTagMAC_1(card_challenge_data, diversified_key);
}
+ // save card challenge for sim2,4 attack
+ if (reader_mac_buf != NULL) {
+ memcpy(reader_mac_buf, card_challenge_data, 8);
+ }
int exitLoop = 0;
// Reader 0a
// Anticollision CSN (rotated CSN)
// 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
- uint8_t *resp_anticoll = BigBuf_malloc(28);
+ uint8_t *resp_anticoll = BigBuf_malloc(22);
int resp_anticoll_len;
- // CSN
+ // CSN (block 0)
// 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
- uint8_t *resp_csn = BigBuf_malloc(30);
+ uint8_t *resp_csn = BigBuf_malloc(22);
int resp_csn_len;
- // e-Purse
+ // configuration (block 1) picopass 2ks
+ uint8_t *resp_conf = BigBuf_malloc(22);
+ int resp_conf_len;
+ uint8_t conf_data[10] = {0x12, 0xFF, 0xFF, 0xFF, 0x7F, 0x1F, 0xFF, 0x3C, 0x00, 0x00};
+ AppendCrc(conf_data, 8);
+
+ // e-Purse (block 2)
// 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
- uint8_t *resp_cc = BigBuf_malloc(20);
+ uint8_t *resp_cc = BigBuf_malloc(18);
int resp_cc_len;
+ // Kd, Kc (blocks 3 and 4). Cannot be read. Always respond with 0xff bytes only
+ uint8_t *resp_ff = BigBuf_malloc(22);
+ int resp_ff_len;
+ uint8_t ff_data[10] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00};
+ AppendCrc(ff_data, 8);
+
+ // Application Issuer Area (block 5)
+ uint8_t *resp_aia = BigBuf_malloc(22);
+ int resp_aia_len;
+ uint8_t aia_data[10] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00};
+ AppendCrc(aia_data, 8);
+
uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
int len;
// Prepare card messages
ToSendMax = 0;
- // First card answer: SOF
+ // First card answer: SOF only
CodeIClassTagSOF();
memcpy(resp_sof, ToSend, ToSendMax);
resp_sof_Len = ToSendMax;
// Anticollision CSN
- CodeIClassTagAnswer(anticoll_data, sizeof(anticoll_data));
+ CodeIso15693AsTag(anticoll_data, sizeof(anticoll_data));
memcpy(resp_anticoll, ToSend, ToSendMax);
resp_anticoll_len = ToSendMax;
- // CSN
- CodeIClassTagAnswer(csn_data, sizeof(csn_data));
+ // CSN (block 0)
+ CodeIso15693AsTag(csn_data, sizeof(csn_data));
memcpy(resp_csn, ToSend, ToSendMax);
resp_csn_len = ToSendMax;
- // e-Purse
- CodeIClassTagAnswer(card_challenge_data, sizeof(card_challenge_data));
- memcpy(resp_cc, ToSend, ToSendMax); resp_cc_len = ToSendMax;
+ // Configuration (block 1)
+ CodeIso15693AsTag(conf_data, sizeof(conf_data));
+ memcpy(resp_conf, ToSend, ToSendMax);
+ resp_conf_len = ToSendMax;
- //This is used for responding to READ-block commands or other data which is dynamically generated
- //First the 'trace'-data, not encoded for FPGA
- uint8_t *data_generic_trace = BigBuf_malloc(8 + 2);//8 bytes data + 2byte CRC is max tag answer
- //Then storage for the modulated data
- //Each bit is doubled when modulated for FPGA, and we also have SOF and EOF (2 bytes)
- uint8_t *data_response = BigBuf_malloc( (8+2) * 2 + 2);
+ // e-Purse (block 2)
+ CodeIso15693AsTag(card_challenge_data, sizeof(card_challenge_data));
+ memcpy(resp_cc, ToSend, ToSendMax);
+ resp_cc_len = ToSendMax;
- // Start from off (no field generated)
- //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- //SpinDelay(200);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
- SpinDelay(100);
- StartCountSspClk();
- // We need to listen to the high-frequency, peak-detected path.
- SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
- FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
+ // Kd, Kc (blocks 3 and 4)
+ CodeIso15693AsTag(ff_data, sizeof(ff_data));
+ memcpy(resp_ff, ToSend, ToSendMax);
+ resp_ff_len = ToSendMax;
- // To control where we are in the protocol
- int cmdsRecvd = 0;
- uint32_t time_0 = GetCountSspClk();
- uint32_t t2r_time =0;
- uint32_t r2t_time =0;
+ // Application Issuer Area (block 5)
+ CodeIso15693AsTag(aia_data, sizeof(aia_data));
+ memcpy(resp_aia, ToSend, ToSendMax);
+ resp_aia_len = ToSendMax;
+
+ //This is used for responding to READ-block commands or other data which is dynamically generated
+ uint8_t *data_generic_trace = BigBuf_malloc(32 + 2); // 32 bytes data + 2byte CRC is max tag answer
+ uint8_t *data_response = BigBuf_malloc( (32 + 2) * 2 + 2);
LED_A_ON();
bool buttonPressed = false;
- uint8_t response_delay = 1;
+ enum { IDLE, ACTIVATED, SELECTED, HALTED } chip_state = IDLE;
+
while (!exitLoop) {
- response_delay = 1;
+ WDT_HIT();
LED_B_OFF();
//Signal tracer
// Can be used to get a trigger for an oscilloscope..
LED_C_OFF();
- if (!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
+ uint32_t reader_eof_time = 0;
+ len = GetIso15693CommandFromReader(receivedCmd, MAX_FRAME_SIZE, &reader_eof_time);
+ if (len < 0) {
buttonPressed = true;
break;
}
- r2t_time = GetCountSspClk();
+
//Signal tracer
LED_C_ON();
- // Okay, look at the command now.
- if (receivedCmd[0] == ICLASS_CMD_ACTALL) {
- // Reader in anticollission phase
- modulated_response = resp_sof;
- modulated_response_size = resp_sof_Len; //order = 1;
- trace_data = sof_data;
- trace_data_size = sizeof(sof_data);
- } else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) {
- // Reader asks for anticollission CSN
- modulated_response = resp_anticoll;
- modulated_response_size = resp_anticoll_len; //order = 2;
- trace_data = anticoll_data;
- trace_data_size = sizeof(anticoll_data);
- //DbpString("Reader requests anticollission CSN:");
- } else if (receivedCmd[0] == ICLASS_CMD_SELECT) {
- // Reader selects anticollission CSN.
+ // Now look at the reader command and provide appropriate responses
+ // default is no response:
+ modulated_response = NULL;
+ modulated_response_size = 0;
+ trace_data = NULL;
+ trace_data_size = 0;
+
+ if (receivedCmd[0] == ICLASS_CMD_ACTALL && len == 1) {
+ // Reader in anticollision phase
+ if (chip_state != HALTED) {
+ modulated_response = resp_sof;
+ modulated_response_size = resp_sof_Len;
+ trace_data = sof_data;
+ trace_data_size = sizeof(sof_data);
+ chip_state = ACTIVATED;
+ }
+
+ } else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) { // identify
+ // Reader asks for anticollision CSN
+ if (chip_state == SELECTED || chip_state == ACTIVATED) {
+ modulated_response = resp_anticoll;
+ modulated_response_size = resp_anticoll_len;
+ trace_data = anticoll_data;
+ trace_data_size = sizeof(anticoll_data);
+ }
+
+ } else if (receivedCmd[0] == ICLASS_CMD_SELECT && len == 9) {
+ // Reader selects anticollision CSN.
// Tag sends the corresponding real CSN
- modulated_response = resp_csn;
- modulated_response_size = resp_csn_len; //order = 3;
- trace_data = csn_data;
- trace_data_size = sizeof(csn_data);
- //DbpString("Reader selects anticollission CSN:");
- } else if (receivedCmd[0] == ICLASS_CMD_READCHECK_KD) {
- // Read e-purse (88 02)
- modulated_response = resp_cc;
- modulated_response_size = resp_cc_len; //order = 4;
- trace_data = card_challenge_data;
- trace_data_size = sizeof(card_challenge_data);
- LED_B_ON();
- } else if (receivedCmd[0] == ICLASS_CMD_CHECK) {
+ if (chip_state == ACTIVATED || chip_state == SELECTED) {
+ if (!memcmp(receivedCmd+1, anticoll_data, 8)) {
+ modulated_response = resp_csn;
+ modulated_response_size = resp_csn_len;
+ trace_data = csn_data;
+ trace_data_size = sizeof(csn_data);
+ chip_state = SELECTED;
+ } else {
+ chip_state = IDLE;
+ }
+ } else if (chip_state == HALTED) {
+ // RESELECT with CSN
+ if (!memcmp(receivedCmd+1, csn_data, 8)) {
+ modulated_response = resp_csn;
+ modulated_response_size = resp_csn_len;
+ trace_data = csn_data;
+ trace_data_size = sizeof(csn_data);
+ chip_state = SELECTED;
+ }
+ }
+
+ } else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4) { // read block
+ uint16_t blockNo = receivedCmd[1];
+ if (chip_state == SELECTED) {
+ if (simulationMode == ICLASS_SIM_MODE_EXIT_AFTER_MAC) {
+ // provide defaults for blocks 0 ... 5
+ switch (blockNo) {
+ case 0: // csn (block 00)
+ modulated_response = resp_csn;
+ modulated_response_size = resp_csn_len;
+ trace_data = csn_data;
+ trace_data_size = sizeof(csn_data);
+ break;
+ case 1: // configuration (block 01)
+ modulated_response = resp_conf;
+ modulated_response_size = resp_conf_len;
+ trace_data = conf_data;
+ trace_data_size = sizeof(conf_data);
+ break;
+ case 2: // e-purse (block 02)
+ modulated_response = resp_cc;
+ modulated_response_size = resp_cc_len;
+ trace_data = card_challenge_data;
+ trace_data_size = sizeof(card_challenge_data);
+ // set epurse of sim2,4 attack
+ if (reader_mac_buf != NULL) {
+ memcpy(reader_mac_buf, card_challenge_data, 8);
+ }
+ break;
+ case 3:
+ case 4: // Kd, Kc, always respond with 0xff bytes
+ modulated_response = resp_ff;
+ modulated_response_size = resp_ff_len;
+ trace_data = ff_data;
+ trace_data_size = sizeof(ff_data);
+ break;
+ case 5: // Application Issuer Area (block 05)
+ modulated_response = resp_aia;
+ modulated_response_size = resp_aia_len;
+ trace_data = aia_data;
+ trace_data_size = sizeof(aia_data);
+ break;
+ // default: don't respond
+ }
+ } else if (simulationMode == ICLASS_SIM_MODE_FULL) {
+ if (blockNo == 3 || blockNo == 4) { // Kd, Kc, always respond with 0xff bytes
+ modulated_response = resp_ff;
+ modulated_response_size = resp_ff_len;
+ trace_data = ff_data;
+ trace_data_size = sizeof(ff_data);
+ } else { // use data from emulator memory
+ memcpy(data_generic_trace, emulator + 8*blockNo, 8);
+ AppendCrc(data_generic_trace, 8);
+ trace_data = data_generic_trace;
+ trace_data_size = 10;
+ CodeIso15693AsTag(trace_data, trace_data_size);
+ memcpy(data_response, ToSend, ToSendMax);
+ modulated_response = data_response;
+ modulated_response_size = ToSendMax;
+ }
+ }
+ }
+
+ } else if ((receivedCmd[0] == ICLASS_CMD_READCHECK_KD
+ || receivedCmd[0] == ICLASS_CMD_READCHECK_KC) && len == 2) {
+ // Read e-purse (88 02 || 18 02)
+ if (chip_state == SELECTED) {
+ modulated_response = resp_cc;
+ modulated_response_size = resp_cc_len;
+ trace_data = card_challenge_data;
+ trace_data_size = sizeof(card_challenge_data);
+ LED_B_ON();
+ }
+
+ } else if (receivedCmd[0] == ICLASS_CMD_CHECK && len == 9) {
// Reader random and reader MAC!!!
- if (simulationMode == MODE_FULLSIM) {
- //NR, from reader, is in receivedCmd +1
- opt_doTagMAC_2(cipher_state, receivedCmd+1, data_generic_trace, diversified_key);
+ if (chip_state == SELECTED) {
+ if (simulationMode == ICLASS_SIM_MODE_FULL) {
+ //NR, from reader, is in receivedCmd+1
+ opt_doTagMAC_2(cipher_state, receivedCmd+1, data_generic_trace, diversified_key);
+ trace_data = data_generic_trace;
+ trace_data_size = 4;
+ CodeIso15693AsTag(trace_data, trace_data_size);
+ memcpy(data_response, ToSend, ToSendMax);
+ modulated_response = data_response;
+ modulated_response_size = ToSendMax;
+ //exitLoop = true;
+ } else { // Not fullsim, we don't respond
+ // We do not know what to answer, so lets keep quiet
+ if (simulationMode == ICLASS_SIM_MODE_EXIT_AFTER_MAC) {
+ if (reader_mac_buf != NULL) {
+ // save NR and MAC for sim 2,4
+ memcpy(reader_mac_buf + 8, receivedCmd + 1, 8);
+ }
+ exitLoop = true;
+ }
+ }
+ }
+
+ } else if (receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
+ if (chip_state == SELECTED) {
+ // Reader ends the session
+ chip_state = HALTED;
+ }
+ } else if (simulationMode == ICLASS_SIM_MODE_FULL && receivedCmd[0] == ICLASS_CMD_READ4 && len == 4) { // 0x06
+ //Read 4 blocks
+ if (chip_state == SELECTED) {
+ memcpy(data_generic_trace, emulator + (receivedCmd[1] << 3), 8 * 4);
+ AppendCrc(data_generic_trace, 8 * 4);
trace_data = data_generic_trace;
- trace_data_size = 4;
- CodeIClassTagAnswer(trace_data, trace_data_size);
+ trace_data_size = 8 * 4 + 2;
+ CodeIso15693AsTag(trace_data, trace_data_size);
memcpy(data_response, ToSend, ToSendMax);
modulated_response = data_response;
modulated_response_size = ToSendMax;
- response_delay = 0; //We need to hurry here... (but maybe not too much... ??)
- //exitLoop = true;
- } else { //Not fullsim, we don't respond
- // We do not know what to answer, so lets keep quiet
- modulated_response = resp_sof;
- modulated_response_size = 0;
- trace_data = NULL;
- trace_data_size = 0;
- if (simulationMode == MODE_EXIT_AFTER_MAC) {
- // dbprintf:ing ...
- Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x"
- ,csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
- Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len,
- receivedCmd[0], receivedCmd[1], receivedCmd[2],
- receivedCmd[3], receivedCmd[4], receivedCmd[5],
- receivedCmd[6], receivedCmd[7], receivedCmd[8]);
- if (reader_mac_buf != NULL) {
- memcpy(reader_mac_buf, receivedCmd+1, 8);
- }
- exitLoop = true;
- }
}
- } else if (receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
- // Reader ends the session
- modulated_response = resp_sof;
- modulated_response_size = 0; //order = 0;
- trace_data = NULL;
- trace_data_size = 0;
- } else if (simulationMode == MODE_FULLSIM && receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4) {
- //Read block
- uint16_t blk = receivedCmd[1];
- //Take the data...
- memcpy(data_generic_trace, emulator + (blk << 3), 8);
- //Add crc
- AppendCrc(data_generic_trace, 8);
- trace_data = data_generic_trace;
- trace_data_size = 10;
- CodeIClassTagAnswer(trace_data, trace_data_size);
- memcpy(data_response, ToSend, ToSendMax);
- modulated_response = data_response;
- modulated_response_size = ToSendMax;
- } else if (receivedCmd[0] == ICLASS_CMD_UPDATE && simulationMode == MODE_FULLSIM) {
- //Probably the reader wants to update the nonce. Let's just ignore that for now.
+ } else if (receivedCmd[0] == ICLASS_CMD_UPDATE && (len == 12 || len == 14)) {
+ // Probably the reader wants to update the nonce. Let's just ignore that for now.
// OBS! If this is implemented, don't forget to regenerate the cipher_state
- //We're expected to respond with the data+crc, exactly what's already in the receivedcmd
- //receivedcmd is now UPDATE 1b | ADDRESS 1b| DATA 8b| Signature 4b or CRC 2b|
-
- //Take the data...
- memcpy(data_generic_trace, receivedCmd+2, 8);
- //Add crc
- AppendCrc(data_generic_trace, 8);
- trace_data = data_generic_trace;
- trace_data_size = 10;
- CodeIClassTagAnswer(trace_data, trace_data_size);
- memcpy(data_response, ToSend, ToSendMax);
- modulated_response = data_response;
- modulated_response_size = ToSendMax;
- } else if (receivedCmd[0] == ICLASS_CMD_PAGESEL) {
- //Pagesel
- //Pagesel enables to select a page in the selected chip memory and return its configuration block
- //Chips with a single page will not answer to this command
- // It appears we're fine ignoring this.
- //Otherwise, we should answer 8bytes (block) + 2bytes CRC
+ // We're expected to respond with the data+crc, exactly what's already in the receivedCmd
+ // receivedCmd is now UPDATE 1b | ADDRESS 1b | DATA 8b | Signature 4b or CRC 2b
+ if (chip_state == SELECTED) {
+ memcpy(data_generic_trace, receivedCmd + 2, 8);
+ AppendCrc(data_generic_trace, 8);
+ trace_data = data_generic_trace;
+ trace_data_size = 10;
+ CodeIso15693AsTag(trace_data, trace_data_size);
+ memcpy(data_response, ToSend, ToSendMax);
+ modulated_response = data_response;
+ modulated_response_size = ToSendMax;
+ }
+
+ } else if (receivedCmd[0] == ICLASS_CMD_PAGESEL && len == 4) {
+ // Pagesel
+ if (chip_state == SELECTED) {
+ // Pagesel enables to select a page in the selected chip memory and return its configuration block
+ // Chips with a single page will not answer to this command
+ // It appears we're fine ignoring this.
+ // Otherwise, we should answer 8bytes (block) + 2bytes CRC
+ }
+
} else {
- //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
- // Never seen this command before
- Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
- len,
- receivedCmd[0], receivedCmd[1], receivedCmd[2],
- receivedCmd[3], receivedCmd[4], receivedCmd[5],
- receivedCmd[6], receivedCmd[7], receivedCmd[8]);
+ // don't know how to handle this command
+ char debug_message[250]; // should be enough
+ sprintf(debug_message, "Unhandled command (len = %d) received from reader:", len);
+ for (int i = 0; i < len && strlen(debug_message) < sizeof(debug_message) - 3 - 1; i++) {
+ sprintf(debug_message + strlen(debug_message), " %02x", receivedCmd[i]);
+ }
+ Dbprintf("%s", debug_message);
// Do not respond
- modulated_response = resp_sof;
- modulated_response_size = 0; //order = 0;
- trace_data = NULL;
- trace_data_size = 0;
}
- if (cmdsRecvd > 100) {
- //DbpString("100 commands later...");
- //break;
- } else {
- cmdsRecvd++;
- }
/**
- A legit tag has about 380us delay between reader EOT and tag SOF.
+ A legit tag has about 311,5us delay between reader EOT and tag SOF.
**/
if (modulated_response_size > 0) {
- SendIClassAnswer(modulated_response, modulated_response_size, response_delay);
- t2r_time = GetCountSspClk();
+ uint32_t response_time = reader_eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM - DELAY_ARM_TO_READER_SIM;
+ TransmitTo15693Reader(modulated_response, modulated_response_size, response_time, false);
+ LogTrace(trace_data, trace_data_size, response_time + DELAY_ARM_TO_READER_SIM, response_time + (modulated_response_size << 6) + DELAY_ARM_TO_READER_SIM, NULL, false);
}
- uint8_t parity[MAX_PARITY_SIZE];
- GetParity(receivedCmd, len, parity);
- LogTrace(receivedCmd, len, (r2t_time-time_0) << 4, (r2t_time-time_0) << 4, parity, true);
-
- if (trace_data != NULL) {
- GetParity(trace_data, trace_data_size, parity);
- LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, false);
- }
- if (!get_tracing()) {
- DbpString("Trace full");
- //break;
- }
}
- //Dbprintf("%x", cmdsRecvd);
LED_A_OFF();
LED_B_OFF();
LED_C_OFF();
void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain) {
uint32_t simType = arg0;
uint32_t numberOfCSNS = arg1;
+
+ // setup hardware for simulation:
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+ SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
+ FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
+ StartCountSspClk();
// Enable and clear the trace
set_tracing(true);
//Use the emulator memory for SIM
uint8_t *emulator = BigBuf_get_EM_addr();
- if (simType == 0) {
+ if (simType == ICLASS_SIM_MODE_CSN) {
// Use the CSN from commandline
memcpy(emulator, datain, 8);
- doIClassSimulation(MODE_SIM_CSN,NULL);
- } else if (simType == 1) {
+ doIClassSimulation(ICLASS_SIM_MODE_CSN, NULL);
+ } else if (simType == ICLASS_SIM_MODE_CSN_DEFAULT) {
//Default CSN
uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
// Use the CSN from commandline
memcpy(emulator, csn_crc, 8);
- doIClassSimulation(MODE_SIM_CSN,NULL);
- } else if (simType == 2) {
+ doIClassSimulation(ICLASS_SIM_MODE_CSN, NULL);
+ } else if (simType == ICLASS_SIM_MODE_READER_ATTACK) {
uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 };
Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS);
// In this mode, a number of csns are within datain. We'll simulate each one, one at a time
- // in order to collect MAC's from the reader. This can later be used in an offlne-attack
+ // in order to collect MAC's from the reader. This can later be used in an offline-attack
// in order to obtain the keys, as in the "dismantling iclass"-paper.
- int i = 0;
- for ( ; i < numberOfCSNS && i*8+8 < USB_CMD_DATA_SIZE; i++) {
- // The usb data is 512 bytes, fitting 65 8-byte CSNs in there.
+ int i;
+ for (i = 0; i < numberOfCSNS && i*16+16 <= USB_CMD_DATA_SIZE; i++) {
+ // The usb data is 512 bytes, fitting 32 responses (8 byte CC + 4 Byte NR + 4 Byte MAC = 16 Byte response).
memcpy(emulator, datain+(i*8), 8);
- if (doIClassSimulation(MODE_EXIT_AFTER_MAC,mac_responses+i*8)) {
- cmd_send(CMD_ACK, CMD_SIMULATE_TAG_ICLASS, i, 0, mac_responses, i*8);
- return; // Button pressed
+ if (doIClassSimulation(ICLASS_SIM_MODE_EXIT_AFTER_MAC, mac_responses+i*16)) {
+ // Button pressed
+ break;
}
+ Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
+ datain[i*8+0], datain[i*8+1], datain[i*8+2], datain[i*8+3],
+ datain[i*8+4], datain[i*8+5], datain[i*8+6], datain[i*8+7]);
+ Dbprintf("NR,MAC: %02x %02x %02x %02x %02x %02x %02x %02x",
+ mac_responses[i*16+ 8], mac_responses[i*16+ 9], mac_responses[i*16+10], mac_responses[i*16+11],
+ mac_responses[i*16+12], mac_responses[i*16+13], mac_responses[i*16+14], mac_responses[i*16+15]);
+ SpinDelay(100); // give the reader some time to prepare for next CSN
}
- cmd_send(CMD_ACK, CMD_SIMULATE_TAG_ICLASS, i, 0, mac_responses, i*8);
- } else if (simType == 3) {
+ cmd_send(CMD_ACK, CMD_SIMULATE_TAG_ICLASS, i, 0, mac_responses, i*16);
+ } else if (simType == ICLASS_SIM_MODE_FULL) {
//This is 'full sim' mode, where we use the emulator storage for data.
- doIClassSimulation(MODE_FULLSIM, NULL);
+ doIClassSimulation(ICLASS_SIM_MODE_FULL, NULL);
} else {
// We may want a mode here where we hardcode the csns to use (from proxclone).
// That will speed things up a little, but not required just yet.
if (elapsed) (*elapsed)++;
}
if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
- if (c < timeout) {
- c++;
- } else {
- return false;
+ if (c < timeout) {
+ c++;
+ } else {
+ return false;
}
b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
skip = !skip;
// 0 : CSN
// 1 : Configuration
// 2 : e-purse
- // (3,4 write-only, kc and kd)
- // 5 Application issuer area
- //
- //Then we can 'ship' back the 8 * 6 bytes of data,
+ // 3 : kd / debit / aa2 (write-only)
+ // 4 : kc / credit / aa1 (write-only)
+ // 5 : AIA, Application issuer area
+ //Then we can 'ship' back the 6 * 8 bytes of data,
// with 0xFF:s in block 3 and 4.
LED_B_ON();
// Jonathan Westhues, split Nov 2006
// Modified by Greg Jones, Jan 2009
// Modified by Adrian Dabrowski "atrox", Mar-Sept 2010,Oct 2011
-// Modified by piwi, Oct 2018
+// Modified by piwi, Oct 2018
//
// This code is licensed to you under the terms of the GNU GPL, version 2 or,
// at your option, any later version. See the LICENSE.txt file for the text of
// transmission modes from tag to reader. As of Oct 2018 this code supports
// both reader modes and the high speed variant with one subcarrier from card to reader.
// As long as the card fully support ISO 15693 this is no problem, since the
-// reader chooses both data rates, but some non-standard tags do not.
+// reader chooses both data rates, but some non-standard tags do not.
// For card simulation, the code supports both high and low speed modes with one subcarrier.
//
// VCD (reader) -> VICC (tag)
// 1 out of 256:
-// data rate: 1,66 kbit/s (fc/8192)
-// used for long range
+// data rate: 1,66 kbit/s (fc/8192)
+// used for long range
// 1 out of 4:
-// data rate: 26,48 kbit/s (fc/512)
-// used for short range, high speed
+// data rate: 26,48 kbit/s (fc/512)
+// used for short range, high speed
//
// VICC (tag) -> VCD (reader)
// Modulation:
-// ASK / one subcarrier (423,75 khz)
-// FSK / two subcarriers (423,75 khz && 484,28 khz)
+// ASK / one subcarrier (423,75 khz)
+// FSK / two subcarriers (423,75 khz && 484,28 khz)
// Data Rates / Modes:
-// low ASK: 6,62 kbit/s
-// low FSK: 6.67 kbit/s
-// high ASK: 26,48 kbit/s
-// high FSK: 26,69 kbit/s
+// low ASK: 6,62 kbit/s
+// low FSK: 6.67 kbit/s
+// high ASK: 26,48 kbit/s
+// high FSK: 26,69 kbit/s
//-----------------------------------------------------------------------------
///////////////////////////////////////////////////////////////////////
// ISO 15693 Part 2 - Air Interface
-// This section basicly contains transmission and receiving of bits
+// This section basically contains transmission and receiving of bits
///////////////////////////////////////////////////////////////////////
-#define Crc(data,datalen) Iso15693Crc(data,datalen)
-#define AddCrc(data,datalen) Iso15693AddCrc(data,datalen)
-#define sprintUID(target,uid) Iso15693sprintUID(target,uid)
-
// buffers
-#define ISO15693_DMA_BUFFER_SIZE 2048 // must be a power of 2
+#define ISO15693_DMA_BUFFER_SIZE 2048 // must be a power of 2
#define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
#define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
-// timing. Delays in SSP_CLK ticks.
-// SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
-#define DELAY_READER_TO_ARM_SIM 8
-#define DELAY_ARM_TO_READER_SIM 1
-#define DELAY_ISO15693_VCD_TO_VICC_SIM 132 // 132/423.75kHz = 311.5us from end of command EOF to start of tag response
-//SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader
-#define DELAY_ISO15693_VCD_TO_VICC_READER 1056 // 1056/3,39MHz = 311.5us from end of command EOF to start of tag response
-#define DELAY_ISO15693_VICC_TO_VCD_READER 1017 // 1017/3.39MHz = 300us between end of tag response and next reader command
-
// ---------------------------
// Signal Processing
// ---------------------------
for(i = 0; i < 4; i++) {
ToSendStuffBit(1);
}
-
+
ToSendMax++;
}
}
-static void CodeIso15693AsTag(uint8_t *cmd, int n)
-{
+// static uint8_t encode4Bits(const uint8_t b) {
+ // uint8_t c = b & 0xF;
+ // // OTA, the least significant bits first
+ // // The columns are
+ // // 1 - Bit value to send
+ // // 2 - Reversed (big-endian)
+ // // 3 - Manchester Encoded
+ // // 4 - Hex values
+
+ // switch(c){
+ // // 1 2 3 4
+ // case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
+ // case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
+ // case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
+ // case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
+ // case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
+ // case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
+ // case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
+ // case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
+ // case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
+ // case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
+ // case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
+ // case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
+ // case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
+ // case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
+ // case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
+ // default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
+
+ // }
+// }
+
+void CodeIso15693AsTag(uint8_t *cmd, size_t len) {
+ /*
+ * SOF comprises 3 parts;
+ * * An unmodulated time of 56.64 us
+ * * 24 pulses of 423.75 kHz (fc/32)
+ * * A logic 1, which starts with an unmodulated time of 18.88us
+ * followed by 8 pulses of 423.75kHz (fc/32)
+ *
+ * EOF comprises 3 parts:
+ * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
+ * time of 18.88us.
+ * - 24 pulses of fc/32
+ * - An unmodulated time of 56.64 us
+ *
+ * A logic 0 starts with 8 pulses of fc/32
+ * followed by an unmodulated time of 256/fc (~18,88us).
+ *
+ * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
+ * 8 pulses of fc/32 (also 18.88us)
+ *
+ * A bit here becomes 8 pulses of fc/32. Therefore:
+ * The SOF can be written as 00011101 = 0x1D
+ * The EOF can be written as 10111000 = 0xb8
+ * A logic 1 is 01
+ * A logic 0 is 10
+ *
+ * */
+
ToSendReset();
// SOF
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(0);
- ToSendStuffBit(1);
+ ToSend[++ToSendMax] = 0x1D; // 00011101
// data
- for(int i = 0; i < n; i++) {
+ for(int i = 0; i < len; i++) {
for(int j = 0; j < 8; j++) {
if ((cmd[i] >> j) & 0x01) {
ToSendStuffBit(0);
}
// EOF
- ToSendStuffBit(1);
- ToSendStuffBit(0);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
+ ToSend[++ToSendMax] = 0xB8; // 10111000
ToSendMax++;
}
//-----------------------------------------------------------------------------
// Transmit the tag response (to the reader) that was placed in cmd[].
//-----------------------------------------------------------------------------
-static void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow)
-{
+void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow) {
// don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
uint8_t shift_delay = start_time & 0x00000007;
- uint8_t bitmask = 0x00;
- for (int i = 0; i < shift_delay; i++) {
- bitmask |= (0x01 << i);
- }
while (GetCountSspClk() < (start_time & 0xfffffff8)) ;
- AT91C_BASE_SSC->SSC_THR = 0x00; // clear TXRDY
-
LED_C_ON();
uint8_t bits_to_shift = 0x00;
- for(size_t c = 0; c <= len; c++) {
- uint8_t bits_to_send = bits_to_shift << (8 - shift_delay) | (c==len?0x00:cmd[c]) >> shift_delay;
- bits_to_shift = cmd[c] & bitmask;
+ uint8_t bits_to_send = 0x00;
+ for(size_t c = 0; c < len; c++) {
for (int i = 7; i >= 0; i--) {
+ uint8_t cmd_bits = ((cmd[c] >> i) & 0x01) ? 0xff : 0x00;
for (int j = 0; j < (slow?4:1); ) {
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
- if (bits_to_send >> i & 0x01) {
- AT91C_BASE_SSC->SSC_THR = 0xff;
- } else {
- AT91C_BASE_SSC->SSC_THR = 0x00;
- }
+ bits_to_send = bits_to_shift << (8 - shift_delay) | cmd_bits >> shift_delay;
+ AT91C_BASE_SSC->SSC_THR = bits_to_send;
+ bits_to_shift = cmd_bits;
j++;
}
- WDT_HIT();
}
- }
- }
+ }
+ WDT_HIT();
+ }
+ // send the remaining bits, padded with 0:
+ bits_to_send = bits_to_shift << (8 - shift_delay);
+ for ( ; ; ) {
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+ AT91C_BASE_SSC->SSC_THR = bits_to_send;
+ break;
+ }
+ }
LED_C_OFF();
+
}
static int inline __attribute__((always_inline)) Handle15693SamplesFromTag(uint16_t amplitude, DecodeTag_t *DecodeTag)
{
switch(DecodeTag->state) {
- case STATE_TAG_SOF_LOW:
+ case STATE_TAG_SOF_LOW:
// waiting for 12 times low (11 times low is accepted as well)
if (amplitude < NOISE_THRESHOLD) {
DecodeTag->posCount++;
}
}
break;
-
+
case STATE_TAG_SOF_HIGH:
// waiting for 10 times high. Take average over the last 8
if (amplitude > NOISE_THRESHOLD) {
bool gotFrame = false;
uint16_t *dmaBuf = (uint16_t*)BigBuf_malloc(ISO15693_DMA_BUFFER_SIZE*sizeof(uint16_t));
-
+
// the Decoder data structure
DecodeTag_t DecodeTag = { 0 };
DecodeTagInit(&DecodeTag, response, max_len);
FpgaDisableSscDma();
BigBuf_free();
-
+
if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
- samples, gotFrame, DecodeTag.state, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
+ samples, gotFrame, DecodeTag.state, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
if (DecodeTag.len > 0) {
LogTrace(DecodeTag.output, DecodeTag.len, 0, 0, NULL, false);
typedef struct DecodeReader {
enum {
STATE_READER_UNSYNCD,
+ STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF,
STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
int byteCount;
int byteCountMax;
int posCount;
- int sum1, sum2;
+ int sum1, sum2;
uint8_t *output;
} DecodeReader_t;
static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uint8_t bit, DecodeReader_t *restrict DecodeReader)
{
- switch(DecodeReader->state) {
+ switch (DecodeReader->state) {
case STATE_READER_UNSYNCD:
- if(!bit) {
+ // wait for unmodulated carrier
+ if (bit) {
+ DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
+ }
+ break;
+
+ case STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF:
+ if (!bit) {
// we went low, so this could be the beginning of a SOF
DecodeReader->posCount = 1;
DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
DecodeReader->posCount++;
- if(bit) { // detected rising edge
- if(DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
- DecodeReaderReset(DecodeReader);
+ if (bit) { // detected rising edge
+ if (DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
+ DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
} else { // SOF
DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
}
} else {
- if(DecodeReader->posCount > 5) { // stayed low for too long
+ if (DecodeReader->posCount > 5) { // stayed low for too long
DecodeReaderReset(DecodeReader);
} else {
// do nothing, keep waiting
case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
DecodeReader->posCount++;
- if(!bit) { // detected a falling edge
+ if (!bit) { // detected a falling edge
if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
DecodeReaderReset(DecodeReader);
} else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
} else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
DecodeReaderReset(DecodeReader);
- } else { // SOF for 1 out of 4 coding
+ } else { // SOF for 1 out of 256 coding
DecodeReader->Coding = CODING_1_OUT_OF_256;
DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
}
} else {
- if(DecodeReader->posCount > 29) { // stayed high for too long
- DecodeReaderReset(DecodeReader);
+ if (DecodeReader->posCount > 29) { // stayed high for too long
+ DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
} else {
// do nothing, keep waiting
}
if (bit) { // detected rising edge
if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
- DecodeReaderReset(DecodeReader);
+ DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
} else {
DecodeReader->posCount = 1;
DecodeReader->bitCount = 0;
}
} else { // CODING_1_OUT_OF_4
if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
- DecodeReaderReset(DecodeReader);
+ DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
} else {
+ DecodeReader->posCount = 1;
DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
}
}
} else {
if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
if (DecodeReader->posCount > 34) { // signal stayed low for too long
- DecodeReaderReset(DecodeReader);
+ DecodeReaderReset(DecodeReader);
} else {
// do nothing, keep waiting
}
} else { // CODING_1_OUT_OF_4
if (DecodeReader->posCount > 26) { // signal stayed low for too long
- DecodeReaderReset(DecodeReader);
+ DecodeReaderReset(DecodeReader);
} else {
// do nothing, keep waiting
}
case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
DecodeReader->posCount++;
if (bit) {
- if (DecodeReader->posCount == 33) {
+ if (DecodeReader->posCount == 9) {
DecodeReader->posCount = 1;
DecodeReader->bitCount = 0;
DecodeReader->byteCount = 0;
// Receive a command (from the reader to us, where we are the simulated tag),
// and store it in the given buffer, up to the given maximum length. Keeps
// spinning, waiting for a well-framed command, until either we get one
-// (returns true) or someone presses the pushbutton on the board (false).
+// (returns len) or someone presses the pushbutton on the board (returns -1).
//
// Assume that we're called with the SSC (to the FPGA) and ADC path set
// correctly.
//-----------------------------------------------------------------------------
-static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time)
-{
+int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time) {
int samples = 0;
bool gotFrame = false;
uint8_t b;
- uint8_t *dmaBuf = BigBuf_malloc(ISO15693_DMA_BUFFER_SIZE);
+ uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
// the decoder data structure
DecodeReader_t DecodeReader = {0};
(void) temp;
while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
- uint32_t bit_time = GetCountSspClk() & 0xfffffff8;
+ uint32_t dma_start_time = GetCountSspClk() & 0xfffffff8;
// Setup and start DMA.
FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
uint8_t *upTo = dmaBuf;
- for(;;) {
+ for (;;) {
uint16_t behindBy = ((uint8_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
if (behindBy == 0) continue;
b = *upTo++;
- if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
+ if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
upTo = dmaBuf; // start reading the circular buffer from the beginning
- if(behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
+ if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
break;
}
for (int i = 7; i >= 0; i--) {
if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
- *eof_time = bit_time + samples - DELAY_READER_TO_ARM_SIM; // end of EOF
+ *eof_time = dma_start_time + samples - DELAY_READER_TO_ARM_SIM; // end of EOF
gotFrame = true;
break;
}
}
if (BUTTON_PRESS()) {
- DecodeReader.byteCount = 0;
+ DecodeReader.byteCount = -1;
break;
}
WDT_HIT();
}
-
FpgaDisableSscDma();
- BigBuf_free_keep_EM();
-
+
if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
- samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
+ samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
if (DecodeReader.byteCount > 0) {
- LogTrace(DecodeReader.output, DecodeReader.byteCount, 0, *eof_time, NULL, true);
+ uint32_t sof_time = *eof_time
+ - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128:2048) // time for byte transfers
+ - 32 // time for SOF transfer
+ - 16; // time for EOF transfer
+ LogTrace(DecodeReader.output, DecodeReader.byteCount, sof_time, *eof_time, NULL, true);
}
return DecodeReader.byteCount;
// no mask
cmd[2] = 0x00;
//Now the CRC
- crc = Crc(cmd, 3);
+ crc = Iso15693Crc(cmd, 3);
cmd[3] = crc & 0xff;
cmd[4] = crc >> 8;
Dbprintf(" DMA: %i bytes", ISO15693_DMA_BUFFER_SIZE * sizeof(uint16_t));
}
Dbprintf("Snoop started. Press PM3 Button to stop.");
-
+
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE);
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
}
}
samples++;
-
+
if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
if (Handle15693SampleFromReader(snoopdata & 0x02, &DecodeReader)) {
FpgaDisableSscDma();
ReaderIsActive = (DecodeReader.state >= STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF);
}
- if (!ReaderIsActive && ExpectTagAnswer) { // no need to try decoding tag data if the reader is currently sending or no answer expected yet
+ if (!ReaderIsActive && ExpectTagAnswer) { // no need to try decoding tag data if the reader is currently sending or no answer expected yet
if (Handle15693SamplesFromTag(snoopdata >> 2, &DecodeTag)) {
FpgaDisableSscDma();
//Use samples as a time measurement
FpgaDisableSscDma();
BigBuf_free();
-
+
LEDsoff();
DbpString("Snoop statistics:");
uint16_t crc;
// If we set the Option_Flag in this request, the VICC will respond with the security status of the block
// followed by the block data
- cmd[0] = ISO15693_REQ_OPTION | ISO15693_REQ_ADDRESS | ISO15693_REQ_DATARATE_HIGH;
+ cmd[0] = ISO15693_REQ_OPTION | ISO15693_REQ_ADDRESS | ISO15693_REQ_DATARATE_HIGH;
// READ BLOCK command code
cmd[1] = ISO15693_READBLOCK;
// UID may be optionally specified here
// Block number to read
cmd[10] = blockNumber;
//Now the CRC
- crc = Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
+ crc = Iso15693Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
cmd[11] = crc & 0xff;
cmd[12] = crc >> 8;
cmd[8] = uid[1]; //0x05;
cmd[9] = uid[0]; //0xe0;
//Now the CRC
- crc = Crc(cmd, 10);
+ crc = Iso15693Crc(cmd, 10);
cmd[10] = crc & 0xff;
cmd[11] = crc >> 8;
}
// Universal Method for sending to and recv bytes from a tag
-// init ... should we initialize the reader?
-// speed ... 0 low speed, 1 hi speed
-// *recv will contain the tag's answer
-// return: lenght of received data
+// init ... should we initialize the reader?
+// speed ... 0 low speed, 1 hi speed
+// *recv will contain the tag's answer
+// return: lenght of received data
int SendDataTag(uint8_t *send, int sendlen, bool init, int speed, uint8_t *recv, uint16_t max_recv_len, uint32_t start_time) {
LED_A_ON();
strncat(status,"NoErr ", DBD15STATLEN);
}
- crc=Crc(d,len-2);
+ crc=Iso15693Crc(d,len-2);
if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
strncat(status,"CrcOK",DBD15STATLEN);
else
LED_A_ON();
set_tracing(true);
-
+
int answerLen = 0;
uint8_t TagUID[8] = {0x00};
FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
// Start from off (no field generated)
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- SpinDelay(200);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ SpinDelay(200);
// Give the tags time to energize
LED_D_ON();
// Now send the IDENTIFY command
BuildIdentifyRequest();
TransmitTo15693Tag(ToSend, ToSendMax, 0);
-
+
// Now wait for a response
answerLen = GetIso15693AnswerFromTag(answer, sizeof(answer), DELAY_ISO15693_VCD_TO_VICC_READER * 2) ;
uint32_t start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER;
// for the time being, switch field off to protect rdv4.0
// note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LED_D_OFF();
LED_A_OFF();
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
StartCountSspClk();
Dbhexdump(cmd_len, cmd, false);
}
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LEDsoff();
}
uint8_t data[6];
uint8_t recv[ISO15693_MAX_RESPONSE_LENGTH];
-
+
int datalen=0, recvlen=0;
Iso15693InitReader();
StartCountSspClk();
-
+
// first without AFI
// Tags should respond without AFI and with AFI=0 even when AFI is active
data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
data[1] = ISO15693_INVENTORY;
data[2] = 0; // mask length
- datalen = AddCrc(data,3);
+ datalen = Iso15693AddCrc(data,3);
recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), 0);
uint32_t start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER;
WDT_HIT();
if (recvlen>=12) {
- Dbprintf("NoAFI UID=%s", sprintUID(NULL, &recv[2]));
+ Dbprintf("NoAFI UID=%s", Iso15693sprintUID(NULL, &recv[2]));
}
// now with AFI
for (int i = 0; i < 256; i++) {
data[2] = i & 0xFF;
- datalen = AddCrc(data,4);
+ datalen = Iso15693AddCrc(data,4);
recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time);
start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER;
WDT_HIT();
if (recvlen >= 12) {
- Dbprintf("AFI=%i UID=%s", i, sprintUID(NULL, &recv[2]));
+ Dbprintf("AFI=%i UID=%s", i, Iso15693sprintUID(NULL, &recv[2]));
}
}
Dbprintf("AFI Bruteforcing done.");
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LEDsoff();
}
// for the time being, switch field off to protect rdv4.0
// note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LED_D_OFF();
LED_A_OFF();
// Set the UID to the tag (based on Iceman work).
void SetTag15693Uid(uint8_t *uid)
{
- uint8_t cmd[4][9] = {0x00};
-
- uint16_t crc;
-
- int recvlen = 0;
- uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
-
- LED_A_ON();
-
- // Command 1 : 02213E00000000
- cmd[0][0] = 0x02;
- cmd[0][1] = 0x21;
- cmd[0][2] = 0x3e;
- cmd[0][3] = 0x00;
- cmd[0][4] = 0x00;
- cmd[0][5] = 0x00;
- cmd[0][6] = 0x00;
-
- // Command 2 : 02213F69960000
- cmd[1][0] = 0x02;
- cmd[1][1] = 0x21;
- cmd[1][2] = 0x3f;
- cmd[1][3] = 0x69;
- cmd[1][4] = 0x96;
- cmd[1][5] = 0x00;
- cmd[1][6] = 0x00;
-
- // Command 3 : 022138u8u7u6u5 (where uX = uid byte X)
- cmd[2][0] = 0x02;
- cmd[2][1] = 0x21;
- cmd[2][2] = 0x38;
- cmd[2][3] = uid[7];
- cmd[2][4] = uid[6];
- cmd[2][5] = uid[5];
- cmd[2][6] = uid[4];
-
- // Command 4 : 022139u4u3u2u1 (where uX = uid byte X)
- cmd[3][0] = 0x02;
- cmd[3][1] = 0x21;
- cmd[3][2] = 0x39;
- cmd[3][3] = uid[3];
- cmd[3][4] = uid[2];
- cmd[3][5] = uid[1];
- cmd[3][6] = uid[0];
-
- for (int i=0; i<4; i++) {
- // Add the CRC
- crc = Crc(cmd[i], 7);
- cmd[i][7] = crc & 0xff;
- cmd[i][8] = crc >> 8;
-
- if (DEBUG) {
- Dbprintf("SEND:");
- Dbhexdump(sizeof(cmd[i]), cmd[i], false);
- }
-
- recvlen = SendDataTag(cmd[i], sizeof(cmd[i]), true, 1, recvbuf, sizeof(recvbuf), 0);
-
- if (DEBUG) {
- Dbprintf("RECV:");
- Dbhexdump(recvlen, recvbuf, false);
- DbdecodeIso15693Answer(recvlen, recvbuf);
- }
-
- cmd_send(CMD_ACK, recvlen>ISO15693_MAX_RESPONSE_LENGTH?ISO15693_MAX_RESPONSE_LENGTH:recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
- }
-
- LED_D_OFF();
-
- LED_A_OFF();
+ uint8_t cmd[4][9] = {0x00};
+
+ uint16_t crc;
+
+ int recvlen = 0;
+ uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
+
+ LED_A_ON();
+
+ // Command 1 : 02213E00000000
+ cmd[0][0] = 0x02;
+ cmd[0][1] = 0x21;
+ cmd[0][2] = 0x3e;
+ cmd[0][3] = 0x00;
+ cmd[0][4] = 0x00;
+ cmd[0][5] = 0x00;
+ cmd[0][6] = 0x00;
+
+ // Command 2 : 02213F69960000
+ cmd[1][0] = 0x02;
+ cmd[1][1] = 0x21;
+ cmd[1][2] = 0x3f;
+ cmd[1][3] = 0x69;
+ cmd[1][4] = 0x96;
+ cmd[1][5] = 0x00;
+ cmd[1][6] = 0x00;
+
+ // Command 3 : 022138u8u7u6u5 (where uX = uid byte X)
+ cmd[2][0] = 0x02;
+ cmd[2][1] = 0x21;
+ cmd[2][2] = 0x38;
+ cmd[2][3] = uid[7];
+ cmd[2][4] = uid[6];
+ cmd[2][5] = uid[5];
+ cmd[2][6] = uid[4];
+
+ // Command 4 : 022139u4u3u2u1 (where uX = uid byte X)
+ cmd[3][0] = 0x02;
+ cmd[3][1] = 0x21;
+ cmd[3][2] = 0x39;
+ cmd[3][3] = uid[3];
+ cmd[3][4] = uid[2];
+ cmd[3][5] = uid[1];
+ cmd[3][6] = uid[0];
+
+ for (int i=0; i<4; i++) {
+ // Add the CRC
+ crc = Iso15693Crc(cmd[i], 7);
+ cmd[i][7] = crc & 0xff;
+ cmd[i][8] = crc >> 8;
+
+ if (DEBUG) {
+ Dbprintf("SEND:");
+ Dbhexdump(sizeof(cmd[i]), cmd[i], false);
+ }
+
+ recvlen = SendDataTag(cmd[i], sizeof(cmd[i]), true, 1, recvbuf, sizeof(recvbuf), 0);
+
+ if (DEBUG) {
+ Dbprintf("RECV:");
+ Dbhexdump(recvlen, recvbuf, false);
+ DbdecodeIso15693Answer(recvlen, recvbuf);
+ }
+
+ cmd_send(CMD_ACK, recvlen>ISO15693_MAX_RESPONSE_LENGTH?ISO15693_MAX_RESPONSE_LENGTH:recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
+ }
+
+ LED_D_OFF();
+
+ LED_A_OFF();
}
cmd[8] = 0x05;
cmd[9]= 0xe0; // always e0 (not exactly unique)
//Now the CRC
- crc = Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
+ crc = Iso15693Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
cmd[10] = crc & 0xff;
cmd[11] = crc >> 8;
// Number of Blocks to read
cmd[11] = 0x2f; // read quite a few
//Now the CRC
- crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
+ crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
cmd[12] = crc & 0xff;
cmd[13] = crc >> 8;
cmd[10] = 0x00;
cmd[11] = 0x0a;
-// cmd[12] = 0x00;
-// cmd[13] = 0x00; //Now the CRC
- crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
+// cmd[12] = 0x00;
+// cmd[13] = 0x00; //Now the CRC
+ crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
cmd[12] = crc & 0xff;
cmd[13] = crc >> 8;
cmd[10] = 0x05; // for custom codes this must be manufacturer code
cmd[11] = 0x00;
-// cmd[12] = 0x00;
-// cmd[13] = 0x00; //Now the CRC
- crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
+// cmd[12] = 0x00;
+// cmd[13] = 0x00; //Now the CRC
+ crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
cmd[12] = crc & 0xff;
cmd[13] = crc >> 8;
// Routines to support ISO 15693.
//-----------------------------------------------------------------------------
-#ifndef __ISO15693_H
-#define __ISO15693_H
+#ifndef ISO15693_H__
+#define ISO15693_H__
#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+// Delays in SSP_CLK ticks.
+// SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
+#define DELAY_READER_TO_ARM_SIM 8
+#define DELAY_ARM_TO_READER_SIM 0
+#define DELAY_ISO15693_VCD_TO_VICC_SIM 132 // 132/423.75kHz = 311.5us from end of command EOF to start of tag response
+//SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader
+#define DELAY_ISO15693_VCD_TO_VICC_READER 1056 // 1056/3,39MHz = 311.5us from end of command EOF to start of tag response
+#define DELAY_ISO15693_VICC_TO_VCD_READER 1017 // 1017/3.39MHz = 300us between end of tag response and next reader command
+
+void CodeIso15693AsTag(uint8_t *cmd, size_t len);
+int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time);
+void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow);
void SnoopIso15693(void);
void AcquireRawAdcSamplesIso15693(void);
void ReaderIso15693(uint32_t parameter);
void SimTagIso15693(uint32_t parameter, uint8_t *uid);
void BruteforceIso15693Afi(uint32_t speed);
-void DirectTag15693Command(uint32_t datalen,uint32_t speed, uint32_t recv, uint8_t data[]);
+void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]);
void SetTag15693Uid(uint8_t *uid);
void SetDebugIso15693(uint32_t flag);
return 0;
}
+// the original malicious IDs from Flavio D. Garcia, Gerhard de Koning Gans, Roel Verdult,
+// and Milosch Meriac. Dismantling iClass and iClass Elite.
#define NUM_CSNS 15
+static uint8_t csns[8 * NUM_CSNS] = {
+ 0x00, 0x0B, 0x0F, 0xFF, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x04, 0x0E, 0x08, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x09, 0x0D, 0x05, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x0A, 0x0C, 0x06, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x0F, 0x0B, 0x03, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x08, 0x0A, 0x0C, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x0D, 0x09, 0x09, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x0E, 0x08, 0x0A, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x03, 0x07, 0x17, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x3C, 0x06, 0xE0, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x01, 0x05, 0x1D, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x02, 0x04, 0x1E, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x07, 0x03, 0x1B, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x00, 0x02, 0x24, 0xF7, 0xFF, 0x12, 0xE0,
+ 0x00, 0x05, 0x01, 0x21, 0xF7, 0xFF, 0x12, 0xE0 };
+
+
+// pre-defined 9 CSNs by iceman.
+// only one csn depend on several others.
+// six depends only on the first csn, (0,1, 0x45)
+
+// #define NUM_CSNS 9
+// static uint8_t csns[8 * NUM_CSNS] = {
+ // 0x01, 0x0A, 0x0F, 0xFF, 0xF7, 0xFF, 0x12, 0xE0,
+ // 0x0C, 0x06, 0x0C, 0xFE, 0xF7, 0xFF, 0x12, 0xE0,
+ // 0x10, 0x97, 0x83, 0x7B, 0xF7, 0xFF, 0x12, 0xE0,
+ // 0x13, 0x97, 0x82, 0x7A, 0xF7, 0xFF, 0x12, 0xE0,
+ // 0x07, 0x0E, 0x0D, 0xF9, 0xF7, 0xFF, 0x12, 0xE0,
+ // 0x14, 0x96, 0x84, 0x76, 0xF7, 0xFF, 0x12, 0xE0,
+ // 0x17, 0x96, 0x85, 0x71, 0xF7, 0xFF, 0x12, 0xE0,
+ // 0xCE, 0xC5, 0x0F, 0x77, 0xF7, 0xFF, 0x12, 0xE0,
+ // 0xD2, 0x5A, 0x82, 0xF8, 0xF7, 0xFF, 0x12, 0xE0
+ // //0x04, 0x08, 0x9F, 0x78, 0x6E, 0xFF, 0x12, 0xE0
+// };
+
+
int CmdHFiClassSim(const char *Cmd) {
uint8_t simType = 0;
uint8_t CSN[8] = {0, 0, 0, 0, 0, 0, 0, 0};
}
simType = param_get8ex(Cmd, 0, 0, 10);
- if(simType == 0)
- {
+ if (simType == ICLASS_SIM_MODE_CSN) {
if (param_gethex(Cmd, 1, CSN, 16)) {
PrintAndLog("A CSN should consist of 16 HEX symbols");
return usage_hf_iclass_sim();
}
-
PrintAndLog("--simtype:%02x csn:%s", simType, sprint_hex(CSN, 8));
}
- if(simType > 3)
- {
- PrintAndLog("Undefined simptype %d", simType);
- return usage_hf_iclass_sim();
- }
- uint8_t numberOfCSNs=0;
- if(simType == 2)
- {
- UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType,NUM_CSNS}};
+ uint8_t numberOfCSNs = 0;
+ if (simType == ICLASS_SIM_MODE_READER_ATTACK) {
+ UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType, NUM_CSNS}};
UsbCommand resp = {0};
- uint8_t csns[8*NUM_CSNS] = {
- 0x00, 0x0B, 0x0F, 0xFF, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x04, 0x0E, 0x08, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x09, 0x0D, 0x05, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x0A, 0x0C, 0x06, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x0F, 0x0B, 0x03, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x08, 0x0A, 0x0C, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x0D, 0x09, 0x09, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x0E, 0x08, 0x0A, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x03, 0x07, 0x17, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x3C, 0x06, 0xE0, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x01, 0x05, 0x1D, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x02, 0x04, 0x1E, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x07, 0x03, 0x1B, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x00, 0x02, 0x24, 0xF7, 0xFF, 0x12, 0xE0,
- 0x00, 0x05, 0x01, 0x21, 0xF7, 0xFF, 0x12, 0xE0 };
-
- memcpy(c.d.asBytes, csns, 8*NUM_CSNS);
+ memcpy(c.d.asBytes, csns, 8 * NUM_CSNS);
SendCommand(&c);
if (!WaitForResponseTimeout(CMD_ACK, &resp, -1)) {
}
uint8_t num_mac_responses = resp.arg[1];
- PrintAndLog("Mac responses: %d MACs obtained (should be %d)", num_mac_responses,NUM_CSNS);
+ PrintAndLog("Mac responses: %d MACs obtained (should be %d)", num_mac_responses, NUM_CSNS);
- size_t datalen = NUM_CSNS*24;
+ size_t datalen = NUM_CSNS * 24;
/*
* Now, time to dump to file. We'll use this format:
* <8-byte CSN><8-byte CC><4 byte NR><4 byte MAC>....
* 8 * 24 bytes.
*
* The returndata from the pm3 is on the following format
- * <4 byte NR><4 byte MAC>
- * CC are all zeroes, CSN is the same as was sent in
+ * <8 byte CC><4 byte NR><4 byte MAC>
+ * CSN is the same as was sent in
**/
void* dump = malloc(datalen);
- memset(dump,0,datalen);//<-- Need zeroes for the CC-field
- uint8_t i = 0;
- for(i = 0 ; i < NUM_CSNS ; i++)
- {
- memcpy(dump+i*24, csns+i*8,8); //CSN
- //8 zero bytes here...
+ for(int i = 0; i < NUM_CSNS; i++) {
+ memcpy(dump + i*24, csns+i*8, 8); //CSN
+ //copy CC from response
+ memcpy(dump + i*24 + 8, resp.d.asBytes + i*16, 8);
//Then comes NR_MAC (eight bytes from the response)
- memcpy(dump+i*24+16,resp.d.asBytes+i*8,8);
-
+ memcpy(dump + i*24 + 16, resp.d.asBytes + i*16 + 8, 8);
}
/** Now, save to dumpfile **/
saveFile("iclass_mac_attack", "bin", dump,datalen);
free(dump);
- }else
- {
- UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType,numberOfCSNs}};
+
+ } else if (simType == ICLASS_SIM_MODE_CSN || simType == ICLASS_SIM_MODE_CSN_DEFAULT) {
+ UsbCommand c = {CMD_SIMULATE_TAG_ICLASS, {simType, numberOfCSNs}};
memcpy(c.d.asBytes, CSN, 8);
SendCommand(&c);
+
+ } else {
+ PrintAndLog("Undefined simtype %d", simType);
+ return usage_hf_iclass_sim();
}
return 0;
return 0;
}
char fileName[255] = {0};
- if(opt == 'f')
- {
- if(param_getstr(Cmd, 1, fileName, sizeof(fileName)) > 0)
- {
+ if(opt == 'f') {
+ if(param_getstr(Cmd, 1, fileName, sizeof(fileName)) > 0) {
return bruteforceFileNoKeys(fileName);
- }else
- {
+ } else {
PrintAndLog("You must specify a filename");
}
- }
- else if(opt == 't')
- {
+ } else if(opt == 't') {
int errors = testCipherUtils();
errors += testMAC();
errors += doKeyTests(0);
errors += testElite();
- if(errors)
- {
+ if(errors) {
prnlog("OBS! There were errors!!!");
}
return errors;
}
-void annotateIclass(char *exp, size_t size, uint8_t* cmd, uint8_t cmdsize)
-{
+void annotateIclass(char *exp, size_t size, uint8_t* cmd, uint8_t cmdsize) {
switch(cmd[0])
{
- case ICLASS_CMD_ACTALL: snprintf(exp,size,"ACTALL"); break;
- case ICLASS_CMD_READ_OR_IDENTIFY:{
- if(cmdsize > 1){
+ case ICLASS_CMD_ACTALL: snprintf(exp, size, "ACTALL"); break;
+ case ICLASS_CMD_READ_OR_IDENTIFY: {
+ if (cmdsize > 1){
snprintf(exp,size,"READ(%d)",cmd[1]);
- }else{
+ } else {
snprintf(exp,size,"IDENTIFY");
}
break;
}
- case ICLASS_CMD_SELECT: snprintf(exp,size,"SELECT"); break;
- case ICLASS_CMD_PAGESEL: snprintf(exp,size,"PAGESEL(%d)", cmd[1]); break;
- case ICLASS_CMD_READCHECK_KC:snprintf(exp,size,"READCHECK[Kc](%d)", cmd[1]); break;
- case ICLASS_CMD_READCHECK_KD:snprintf(exp,size,"READCHECK[Kd](%d)", cmd[1]); break;
- case ICLASS_CMD_CHECK: snprintf(exp,size,"CHECK"); break;
- case ICLASS_CMD_DETECT: snprintf(exp,size,"DETECT"); break;
- case ICLASS_CMD_HALT: snprintf(exp,size,"HALT"); break;
- case ICLASS_CMD_UPDATE: snprintf(exp,size,"UPDATE(%d)",cmd[1]); break;
- case ICLASS_CMD_ACT: snprintf(exp,size,"ACT"); break;
- case ICLASS_CMD_READ4: snprintf(exp,size,"READ4(%d)",cmd[1]); break;
- default: snprintf(exp,size,"?"); break;
+ case ICLASS_CMD_SELECT: snprintf(exp,size, "SELECT"); break;
+ case ICLASS_CMD_PAGESEL: snprintf(exp,size, "PAGESEL(%d)", cmd[1]); break;
+ case ICLASS_CMD_READCHECK_KC:snprintf(exp,size, "READCHECK[Kc](%d)", cmd[1]); break;
+ case ICLASS_CMD_READCHECK_KD:snprintf(exp,size, "READCHECK[Kd](%d)", cmd[1]); break;
+ case ICLASS_CMD_CHECK: snprintf(exp,size, "CHECK"); break;
+ case ICLASS_CMD_DETECT: snprintf(exp,size, "DETECT"); break;
+ case ICLASS_CMD_HALT: snprintf(exp,size, "HALT"); break;
+ case ICLASS_CMD_UPDATE: snprintf(exp,size, "UPDATE(%d)",cmd[1]); break;
+ case ICLASS_CMD_ACT: snprintf(exp,size, "ACT"); break;
+ case ICLASS_CMD_READ4: snprintf(exp,size, "READ4(%d)",cmd[1]); break;
+ default: snprintf(exp,size, "?"); break;
}
return;
}
}
}
+ // adjust for different time scales
+ if (protocol == ICLASS || protocol == ISO_15693) {
+ first_timestamp *= 32;
+ timestamp *= 32;
+ duration *= 32;
+ }
+
//Check the CRC status
uint8_t crcStatus = 2;
uint8_t parityBits = parityBytes[j>>3];
if (protocol != ISO_14443B
&& protocol != ISO_15693
+ && protocol != ICLASS
&& protocol != ISO_7816_4
&& (isResponse || protocol == ISO_14443A)
&& (oddparity8(frame[j]) != ((parityBits >> (7-(j&0x0007))) & 0x01))) {
}
if (markCRCBytes) {
- if(crcStatus == 0 || crcStatus == 1)
- {//CRC-command
+ if (crcStatus == 0 || crcStatus == 1) { //CRC-command
char *pos1 = line[(data_len-2)/16]+(((data_len-2) % 16) * 4);
(*pos1) = '[';
char *pos2 = line[(data_len)/16]+(((data_len) % 16) * 4);
if (protocol == PROTO_MIFARE)
annotateMifare(explanation, sizeof(explanation), frame, data_len, parityBytes, parity_len, isResponse);
- if(!isResponse)
- {
+ if (!isResponse) {
switch(protocol) {
case ICLASS: annotateIclass(explanation,sizeof(explanation),frame,data_len); break;
case ISO_14443A: annotateIso14443a(explanation,sizeof(explanation),frame,data_len); break;
if (showWaitCycles && !isResponse && next_record_is_response(tracepos, trace)) {
uint32_t next_timestamp = *((uint32_t *)(trace + tracepos));
+ // adjust for different time scales
+ if (protocol == ICLASS || protocol == ISO_15693) {
+ next_timestamp *= 32;
+ }
+
PrintAndLog(" %10d | %10d | %s | fdt (Frame Delay Time): %d",
(EndOfTransmissionTimestamp - first_timestamp),
(next_timestamp - first_timestamp),
//free(cc_nr);
return;
}
+
void doMAC_N(uint8_t *address_data_p, uint8_t address_data_size, uint8_t *div_key_p, uint8_t mac[4])
{
uint8_t *address_data;
//Diversify
diversifyKey(item.csn, key_sel_p, div_key);
//Calc mac
- doMAC(item.cc_nr, div_key,calculated_MAC);
+ doMAC(item.cc_nr, div_key, calculated_MAC);
if (memcmp(calculated_MAC, item.mac, 4) == 0) {
for (int i = 0; i < numbytes_to_recover; i++)
break;
}
brute++;
- if((brute & 0xFFFF) == 0)
- {
+ if ((brute & 0xFFFF) == 0) {
printf("%d",(brute >> 16) & 0xFF);
fflush(stdout);
}
keytable[bytes_to_recover[i]] &= ~BEING_CRACKED;
keytable[bytes_to_recover[i]] |= CRACKED;
}
-
}
return errors;
dumpdata* attack = (dumpdata* ) malloc(itemsize);
- for(i = 0 ; i * itemsize < dumpsize ; i++ )
+ for (i = 0 ; i * itemsize < dumpsize ; i++ )
{
memcpy(attack,dump+i*itemsize, itemsize);
errors += bruteforceItem(*attack, keytable);
// ISO15693 commons
// Adrian Dabrowski 2010 and others, GPLv2
-#ifndef ISO15693_H__
-#define ISO15693_H__
+#ifndef ISO15693TOOLS_H__
+#define ISO15693TOOLS_H__
// ISO15693 CRC
#define ISO15693_CRC_PRESET (uint16_t)0xFFFF
uint16_t Iso15693Crc(uint8_t *v, int n);
int Iso15693AddCrc(uint8_t *req, int n);
-char* Iso15693sprintUID(char *target,uint8_t *uid);
+char* Iso15693sprintUID(char *target, uint8_t *uid);
unsigned short iclass_crc16(char *data_p, unsigned short length);
#endif
output dbg;
input [2:0] mod_type;
+assign adc_clk = ck_1356meg;
// The comparator with hysteresis on the output from the peak detector.
reg after_hysteresis;
-assign adc_clk = ck_1356meg;
+reg [11:0] has_been_low_for;
always @(negedge adc_clk)
begin
- if(& adc_d[7:5]) after_hysteresis = 1'b1; // if (adc_d >= 224)
- else if(~(| adc_d[7:5])) after_hysteresis = 1'b0; // if (adc_d <= 31)
+ if (& adc_d[7:5]) after_hysteresis <= 1'b1; // if (adc_d >= 224)
+ else if (~(| adc_d[7:5])) after_hysteresis <= 1'b0; // if (adc_d <= 31)
+
+ if (adc_d >= 224)
+ begin
+ has_been_low_for <= 12'd0;
+ end
+ else
+ begin
+ if (has_been_low_for == 12'd4095)
+ begin
+ has_been_low_for <= 12'd0;
+ after_hysteresis <= 1'b1;
+ end
+ else
+ begin
+ has_been_low_for <= has_been_low_for + 1;
+ end
+ end
end
// Divide 13.56 MHz to produce various frequencies for SSP_CLK
// and modulation.
-reg [7:0] ssp_clk_divider;
+reg [8:0] ssp_clk_divider;
-always @(posedge adc_clk)
+always @(negedge adc_clk)
ssp_clk_divider <= (ssp_clk_divider + 1);
reg ssp_clk;
always @(negedge adc_clk)
begin
- if(mod_type == `FPGA_HF_SIMULATOR_MODULATE_424K_8BIT)
+ if (mod_type == `FPGA_HF_SIMULATOR_MODULATE_424K_8BIT)
// Get bit every at 53KHz (every 8th carrier bit of 424kHz)
- ssp_clk <= ssp_clk_divider[7];
- else if(mod_type == `FPGA_HF_SIMULATOR_MODULATE_212K)
+ ssp_clk <= ~ssp_clk_divider[7];
+ else if (mod_type == `FPGA_HF_SIMULATOR_MODULATE_212K)
// Get next bit at 212kHz
- ssp_clk <= ssp_clk_divider[5];
+ ssp_clk <= ~ssp_clk_divider[5];
else
// Get next bit at 424Khz
- ssp_clk <= ssp_clk_divider[4];
+ ssp_clk <= ~ssp_clk_divider[4];
end
-// Divide SSP_CLK by 8 to produce the byte framing signal; the phase of
-// this is arbitrary, because it's just a bitstream.
-// One nasty issue, though: I can't make it work with both rx and tx at
-// once. The phase wrt ssp_clk must be changed. TODO to find out why
-// that is and make a better fix.
-reg [2:0] ssp_frame_divider_to_arm;
-always @(posedge ssp_clk)
- ssp_frame_divider_to_arm <= (ssp_frame_divider_to_arm + 1);
-reg [2:0] ssp_frame_divider_from_arm;
-always @(negedge ssp_clk)
- ssp_frame_divider_from_arm <= (ssp_frame_divider_from_arm + 1);
-
-
+// Produce the byte framing signal; the phase of this signal
+// is arbitrary, because it's just a bit stream in this module.
reg ssp_frame;
-always @(ssp_frame_divider_to_arm or ssp_frame_divider_from_arm or mod_type)
- if(mod_type == `FPGA_HF_SIMULATOR_NO_MODULATION) // not modulating, so listening, to ARM
- ssp_frame = (ssp_frame_divider_to_arm == 3'b000);
- else
- ssp_frame = (ssp_frame_divider_from_arm == 3'b000);
+always @(negedge adc_clk)
+begin
+ if (mod_type == `FPGA_HF_SIMULATOR_MODULATE_212K)
+ begin
+ if (ssp_clk_divider[8:5] == 4'd1)
+ ssp_frame <= 1'b1;
+ if (ssp_clk_divider[8:5] == 4'd5)
+ ssp_frame <= 1'b0;
+ end
+ else
+ begin
+ if (ssp_clk_divider[7:4] == 4'd1)
+ ssp_frame <= 1'b1;
+ if (ssp_clk_divider[7:4] == 4'd5)
+ ssp_frame <= 1'b0;
+ end
+end
+
// Synchronize up the after-hysteresis signal, to produce DIN.
reg ssp_din;
assign pwr_oe2 = 1'b0;
-assign dbg = ssp_din;
+assign dbg = ssp_frame;
endmodule
#define CMD_UNKNOWN 0xFFFF
-//Mifare simulation flags
+// Mifare simulation flags
#define FLAG_INTERACTIVE (1<<0)
#define FLAG_4B_UID_IN_DATA (1<<1)
#define FLAG_7B_UID_IN_DATA (1<<2)
#define FLAG_RANDOM_NONCE (1<<5)
-//Iclass reader flags
+// iCLASS reader flags
#define FLAG_ICLASS_READER_ONLY_ONCE 0x01
#define FLAG_ICLASS_READER_CC 0x02
#define FLAG_ICLASS_READER_CSN 0x04
#define FLAG_ICLASS_READER_ONE_TRY 0x20
#define FLAG_ICLASS_READER_CEDITKEY 0x40
+// iCLASS simulation modes
+#define ICLASS_SIM_MODE_CSN 0
+#define ICLASS_SIM_MODE_CSN_DEFAULT 1
+#define ICLASS_SIM_MODE_READER_ATTACK 2
+#define ICLASS_SIM_MODE_FULL 3
+#define ICLASS_SIM_MODE_READER_ATTACK_KEYROLL 4
+#define ICLASS_SIM_MODE_EXIT_AFTER_MAC 5 // note: device internal only
-//hw tune args
+
+// hw tune args
#define FLAG_TUNE_LF 1
#define FLAG_TUNE_HF 2
#define FLAG_TUNE_ALL 3
projects / proxmark3-svn / commitdiff