Merge pull request #216 from marshmellow42/master

EM4x05/EM4x69 command rewrite and improvements

diff --git a/client/lualibs/hf_reader.lua b/client/lualibs/hf_reader.lua
index e75c0ff79eefa801a8d19f1a321eb7bbcc674460..cce6d5bb5119fcee6552d6a425faf89c096e8bb9 100644 (file)
--- a/client/lualibs/hf_reader.lua
+++ b/client/lualibs/hf_reader.lua
@@ -150,7 +150,7 @@ local function read15693()
        end
 
        local count,cmd,recvLen,arg1,arg2 = bin.unpack('LLLL',result)
-       data = string.sub(result,recvlen)
+       data = string.sub(result,recvLen)
        info, err = parse15693(data)
        
        if err then 
@@ -189,4 +189,4 @@ end
 
 return {
        waitForTag = waitForTag,
-}
\ No newline at end of file
+}

diff --git a/tools/at91sam7s512-buspirate.cfg b/tools/at91sam7s512-buspirate.cfg
new file mode 100644 (file)
index 0000000..6447366
--- /dev/null
+++ b/tools/at91sam7s512-buspirate.cfg
@@ -0,0 +1,52 @@
+# Ports
+telnet_port 4444
+gdb_port 3333
+
+# Interface
+interface buspirate
+buspirate_port /dev/ttyUSB0
+adapter_khz 1000
+
+# Communication speed
+buspirate_speed normal # or fast
+
+# Voltage regulator: enabled = 1 or disabled = 0
+buspirate_vreg 1
+
+# Pin mode: normal or open-drain
+buspirate_mode normal
+
+# Pull-up state: enabled = 1 or disabled = 0
+buspirate_pullup 1
+
+# use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config srst_only srst_pulls_trst
+
+jtag newtap sam7x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3f0f0f0f 
+
+target create sam7x.cpu arm7tdmi -endian little -chain-position sam7x.cpu 
+
+sam7x.cpu configure -event reset-init { 
+    soft_reset_halt
+    mww 0xfffffd00 0xa5000004   # RSTC_CR: Reset peripherals
+    mww 0xfffffd44 0x00008000   # WDT_MR: disable watchdog
+    mww 0xfffffd08 0xa5000001   # RSTC_MR enable user reset
+    mww 0xfffffc20 0x00005001   # CKGR_MOR : enable the main oscillator
+    sleep 10
+    mww 0xfffffc2c 0x000b1c02   # CKGR_PLLR: 16MHz * 12/2 = 96MHz
+    sleep 10
+    mww 0xfffffc30 0x00000007   # PMC_MCKR : MCK = PLL / 2 = 48 MHz
+    sleep 10
+    mww 0xffffff60 0x00480100   # MC_FMR: flash mode (FWS=1,FMCN=72)
+    sleep 100
+
+}
+
+gdb_memory_map enable
+#gdb_breakpoint_override hard
+#armv4_5 core_state arm
+
+sam7x.cpu configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x10000 -work-area-backup 0
+flash bank sam7x512.flash.0 at91sam7 0 0 0 0 sam7x.cpu 0 0 0 0 0 0 0 18432
+flash bank sam7x512.flash.1 at91sam7 0 0 0 0 sam7x.cpu 1 0 0 0 0 0 0 18432
+