AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
AT91C_BASE_ADC->ADC_MR =
- ADC_MODE_PRESCALE(32) |
- ADC_MODE_STARTUP_TIME(16) |
- ADC_MODE_SAMPLE_HOLD_TIME(8);
+ ADC_MODE_PRESCALE(63 /* was 32 */) | // ADC_CLK = MCK / ((63+1) * 2) = 48MHz / 128 = 375kHz
+ ADC_MODE_STARTUP_TIME(1 /* was 16 */) | // Startup Time = (1+1) * 8 / ADC_CLK = 16 / 375kHz = 42,7us Note: must be > 20us
+ ADC_MODE_SAMPLE_HOLD_TIME(15 /* was 8 */); // Sample & Hold Time SHTIM = 15 / ADC_CLK = 15 / 375kHz = 40us
+
+ // Note: ADC_MODE_PRESCALE and ADC_MODE_SAMPLE_HOLD_TIME are set to the maximum allowed value.
+ // Both AMPL_LO and AMPL_HI are very high impedance (10MOhm) outputs, the input capacitance of the ADC is 12pF (typical). This results in a time constant
+ // of RC = 10MOhm * 12pF = 120us. Even after the maximum configurable sample&hold time of 40us the input capacitor will not be fully charged.
+ //
+ // The maths are:
+ // If there is a voltage v_in at the input, the voltage v_cap at the capacitor (this is what we are measuring) will be
+ //
+ // v_cap = v_in * (1 - exp(-RC/SHTIM)) = v_in * (1 - exp(-3)) = v_in * 0,95 (i.e. an error of 5%)
+ //
+ // Note: with the "historic" values in the comments above, the error was 34% !!!
+
AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ch);
AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
+
while(!(AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ch)))
;
d = AT91C_BASE_ADC->ADC_CDR[ch];
WDT_HIT();
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i);
SpinDelay(20);
- // Vref = 3.3V, and a 10000:240 voltage divider on the input
- // can measure voltages up to 137500 mV
- adcval = ((137500 * AvgAdc(ADC_CHAN_LF)) >> 10);
+ adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
if (i==95) vLf125 = adcval; // voltage at 125Khz
if (i==89) vLf134 = adcval; // voltage at 134Khz
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
SpinDelay(20);
- // Vref = 3300mV, and an 10:1 voltage divider on the input
- // can measure voltages up to 33000 mV
- vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
+ vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
- cmd_send(CMD_MEASURED_ANTENNA_TUNING,vLf125|(vLf134<<16),vHf,peakf|(peakv<<16),LF_Results,256);
+ cmd_send(CMD_MEASURED_ANTENNA_TUNING, vLf125 | (vLf134<<16), vHf, peakf | (peakv<<16), LF_Results, 256);
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LED_A_OFF();
LED_B_OFF();
DbpString("Measuring HF antenna, press button to exit");
+ // Let the FPGA drive the high-frequency antenna around 13.56 MHz.
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
+
for (;;) {
- // Let the FPGA drive the high-frequency antenna around 13.56 MHz.
- FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
SpinDelay(20);
- // Vref = 3300mV, and an 10:1 voltage divider on the input
- // can measure voltages up to 33000 mV
- vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
+ vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
Dbprintf("%d mV",vHf);
if (BUTTON_PRESS()) break;
}
DbpString("cancelled");
+
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+
}
void ListenReaderField(int limit)
{
- int lf_av, lf_av_new, lf_baseline= 0, lf_count= 0, lf_max;
- int hf_av, hf_av_new, hf_baseline= 0, hf_count= 0, hf_max;
+ int lf_av, lf_av_new, lf_baseline= 0, lf_max;
+ int hf_av, hf_av_new, hf_baseline= 0, hf_max;
int mode=1, display_val, display_max, i;
-#define LF_ONLY 1
-#define HF_ONLY 2
+#define LF_ONLY 1
+#define HF_ONLY 2
+#define REPORT_CHANGE 10 // report new values only if they have changed at least by REPORT_CHANGE
+
+
+ // switch off FPGA - we don't want to measure our own signal
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LEDsoff();
- lf_av=lf_max=ReadAdc(ADC_CHAN_LF);
+ lf_av = lf_max = AvgAdc(ADC_CHAN_LF);
if(limit != HF_ONLY) {
- Dbprintf("LF 125/134 Baseline: %d", lf_av);
+ Dbprintf("LF 125/134kHz Baseline: %dmV", (MAX_ADC_LF_VOLTAGE * lf_av) >> 10);
lf_baseline = lf_av;
}
- hf_av=hf_max=ReadAdc(ADC_CHAN_HF);
+ hf_av = hf_max = AvgAdc(ADC_CHAN_HF);
if (limit != LF_ONLY) {
- Dbprintf("HF 13.56 Baseline: %d", hf_av);
+ Dbprintf("HF 13.56MHz Baseline: %dmV", (MAX_ADC_HF_VOLTAGE * hf_av) >> 10);
hf_baseline = hf_av;
}
WDT_HIT();
if (limit != HF_ONLY) {
- if(mode==1) {
- if (abs(lf_av - lf_baseline) > 10) LED_D_ON();
- else LED_D_OFF();
+ if(mode == 1) {
+ if (abs(lf_av - lf_baseline) > REPORT_CHANGE)
+ LED_D_ON();
+ else
+ LED_D_OFF();
}
- ++lf_count;
- lf_av_new= ReadAdc(ADC_CHAN_LF);
+ lf_av_new = AvgAdc(ADC_CHAN_LF);
// see if there's a significant change
- if(abs(lf_av - lf_av_new) > 10) {
- Dbprintf("LF 125/134 Field Change: %x %x %x", lf_av, lf_av_new, lf_count);
+ if(abs(lf_av - lf_av_new) > REPORT_CHANGE) {
+ Dbprintf("LF 125/134kHz Field Change: %5dmV", (MAX_ADC_LF_VOLTAGE * lf_av_new) >> 10);
lf_av = lf_av_new;
if (lf_av > lf_max)
lf_max = lf_av;
- lf_count= 0;
}
}
if (limit != LF_ONLY) {
if (mode == 1){
- if (abs(hf_av - hf_baseline) > 10) LED_B_ON();
- else LED_B_OFF();
+ if (abs(hf_av - hf_baseline) > REPORT_CHANGE)
+ LED_B_ON();
+ else
+ LED_B_OFF();
}
- ++hf_count;
- hf_av_new= ReadAdc(ADC_CHAN_HF);
+ hf_av_new = AvgAdc(ADC_CHAN_HF);
// see if there's a significant change
- if(abs(hf_av - hf_av_new) > 10) {
- Dbprintf("HF 13.56 Field Change: %x %x %x", hf_av, hf_av_new, hf_count);
+ if(abs(hf_av - hf_av_new) > REPORT_CHANGE) {
+ Dbprintf("HF 13.56MHz Field Change: %5dmV", (MAX_ADC_HF_VOLTAGE * hf_av_new) >> 10);
hf_av = hf_av_new;
if (hf_av > hf_max)
hf_max = hf_av;
- hf_count= 0;
}
}
void Dbprintf(const char *fmt, ...);
void Dbhexdump(int len, uint8_t *d, bool bAsci);
+// ADC Vref = 3300mV, and an (10M+1M):1M voltage divider on the HF input can measure voltages up to 36300 mV
+#define MAX_ADC_HF_VOLTAGE 36300
+// ADC Vref = 3300mV, and an (10000k+240k):240k voltage divider on the LF input can measure voltages up to 140800 mV
+#define MAX_ADC_LF_VOLTAGE 140800
int AvgAdc(int ch);
void ToSendStuffBit(int b);
Uart.twoBits = (Uart.twoBits << 8) | bit;
- if (Uart.state == STATE_UNSYNCD) { // not yet synced
+ if (Uart.state == STATE_UNSYNCD) { // not yet synced
- if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
+ if (Uart.highCnt < 2) { // wait for a stable unmodulated signal
if (Uart.twoBits == 0xffff) {
Uart.highCnt++;
} else {
Uart.highCnt = 0;
}
} else {
- Uart.syncBit = 0xFFFF; // not set
- // look for 00xx1111 (the start bit)
- if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
- else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
- else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
- else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
- else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
- else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
- else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
- else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
- if (Uart.syncBit != 0xFFFF) {
+ Uart.syncBit = 0xFFFF; // not set
+ // we look for a ...1111111100x11111xxxxxx pattern (the start bit)
+ if ((Uart.twoBits & 0xDF00) == 0x1F00) Uart.syncBit = 8; // mask is 11x11111 xxxxxxxx,
+ // check for 00x11111 xxxxxxxx
+ else if ((Uart.twoBits & 0xEF80) == 0x8F80) Uart.syncBit = 7; // both masks shifted right one bit, left padded with '1'
+ else if ((Uart.twoBits & 0xF7C0) == 0xC7C0) Uart.syncBit = 6; // ...
+ else if ((Uart.twoBits & 0xFBE0) == 0xE3E0) Uart.syncBit = 5;
+ else if ((Uart.twoBits & 0xFDF0) == 0xF1F0) Uart.syncBit = 4;
+ else if ((Uart.twoBits & 0xFEF8) == 0xF8F8) Uart.syncBit = 3;
+ else if ((Uart.twoBits & 0xFF7C) == 0xFC7C) Uart.syncBit = 2;
+ else if ((Uart.twoBits & 0xFFBE) == 0xFE3E) Uart.syncBit = 1;
+ if (Uart.syncBit != 0xFFFF) { // found a sync bit
Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
Uart.startTime -= Uart.syncBit;
Uart.endTime = Uart.startTime;
if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) {
if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error
UartReset();
- Uart.highCnt = 6;
} else { // Modulation in first half = Sequence Z = logic "0"
if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
UartReset();
- Uart.highCnt = 6;
} else {
Uart.bitCount++;
Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
if (Uart.len) {
return TRUE; // we are finished with decoding the raw data sequence
} else {
- UartReset(); // Nothing receiver - start over
+ UartReset(); // Nothing received - start over
+ Uart.highCnt = 1;
}
}
if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
UartReset();
- Uart.highCnt = 6;
+ Uart.highCnt = 1;
} else { // a logic "0"
Uart.bitCount++;
Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
}
+
//-----------------------------------------------------------------------------
// Wait for commands from reader
// Stop when button is pressed (return 1) or field was gone (return 2)
// Set ADC to read field strength
AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
AT91C_BASE_ADC->ADC_MR =
- ADC_MODE_PRESCALE(32) |
- ADC_MODE_STARTUP_TIME(16) |
- ADC_MODE_SAMPLE_HOLD_TIME(8);
+ ADC_MODE_PRESCALE(63) |
+ ADC_MODE_STARTUP_TIME(1) |
+ ADC_MODE_SAMPLE_HOLD_TIME(15);
AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
// start ADC
AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
// Clear RXRDY:
uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-
+
for(;;) {
WDT_HIT();
analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
if (analogCnt >= 32) {
- if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
+ if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
vtime = GetTickCount();
if (!timer) timer = vtime;
// 50ms no field --> card to idle state
}
// Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
- for (i = 0; i < 2 ; ) {
+ uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3;
+ for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
AT91C_BASE_SSC->SSC_THR = SEC_F;
FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
i++;
}
}
-
+
LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
return 0;
// clear RXRDY:
uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-
+
c = 0;
for(;;) {
WDT_HIT();
// free eventually allocated BigBuf memory but keep Emulator Memory
BigBuf_free_keep_EM();
+
// clear trace
iso14a_clear_trace();
iso14a_set_tracing(TRUE);
WDT_HIT();
// find reader field
- // Vref = 3300mV, and an 10:1 voltage divider on the input
- // can measure voltages up to 33000 mV
if (cardSTATE == MFEMUL_NOFIELD) {
- vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
+ vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
if (vHf > MF_MINFIELDV) {
cardSTATE_TO_IDLE();
LED_A_ON();
LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
break;
}
+
uint32_t ar = bytes_to_num(receivedCmd, 4);
uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
num_to_bytes(ans, 4, rAUTH_AT);
}
+
EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
//Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
cardSTATE = MFEMUL_AUTH1;
if(ar_nr_collected > 1) {
Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
- ar_nr_responses[0], // UID
+ ar_nr_responses[0], // UID
ar_nr_responses[1], //NT
ar_nr_responses[2], //AR1
ar_nr_responses[3], //NR1
}
}
if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
+
}