Merged with head

diff --git a/armsrc/apps.h b/armsrc/apps.h
index 087abd0a6bf16f6da06568fc15557f9e870b7e31..59be5f11832a7cc3aadf74acccad15a2d23df0f1 100644 (file)
--- a/armsrc/apps.h
+++ b/armsrc/apps.h
@@ -100,6 +100,7 @@ void SetAdcMuxFor(uint32_t whichGpio);
 #define FPGA_HF_SIMULATOR_NO_MODULATION                                (0<<0)
 #define FPGA_HF_SIMULATOR_MODULATE_BPSK                                (1<<0)
 #define FPGA_HF_SIMULATOR_MODULATE_212K                                (2<<0)
+#define FPGA_HF_SIMULATOR_MODULATE_424K                                (4<<0)
 // Options for ISO14443A
 #define FPGA_HF_ISO14443A_SNIFFER                                      (0<<0)
 #define FPGA_HF_ISO14443A_TAGSIM_LISTEN                                (1<<0)

diff --git a/armsrc/iclass.c b/armsrc/iclass.c
index 7474598b6168a7fd78203c3c3c2265e8ea7f4ba9..7289abbc2a465250a222cb3f07a6e111a4f1fe9a 100644 (file)
--- a/armsrc/iclass.c
+++ b/armsrc/iclass.c
@@ -1090,6 +1090,12 @@ int doIClassSimulation(uint8_t csn[], int breakAfterMacReceived)
        CodeIClassTagAnswer(response4, sizeof(response4));
        memcpy(resp4, ToSend, ToSendMax); resp4Len = ToSendMax;
 
+
+       // Start from off (no field generated)
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+       SpinDelay(200);
+
+
        // We need to listen to the high-frequency, peak-detected path.
        SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
        FpgaSetupSsc();
@@ -1107,11 +1113,17 @@ int doIClassSimulation(uint8_t csn[], int breakAfterMacReceived)
                displayDebug = true;
 
                LED_B_OFF();
+               //Signal tracer
+               // Can be used to get a trigger for an oscilloscope..
+               LED_C_OFF();
+
                if(!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
                        buttonPressed = true;
                        break;
                }
                r2t_time = GetCountSspClk();
+               //Signal tracer
+               LED_C_ON();
 
                // Okay, look at the command now.
                if(receivedCmd[0] == 0x0a ) {
@@ -1236,41 +1248,34 @@ int doIClassSimulation(uint8_t csn[], int breakAfterMacReceived)
 
 static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
 {
-       int i = 0, u = 0, d = 0;
+       int i = 0, d=0;//, u = 0, d = 0;
        uint8_t b = 0;
-       // return 0;
-       // Modulate Manchester
-       // FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD424);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
+
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
+
        AT91C_BASE_SSC->SSC_THR = 0x00;
        FpgaSetupSsc();
-       
-       // send cycle
-       for(;;) {
-               if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
-                       volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                       (void)b;
+       while(!BUTTON_PRESS()) {
+               if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
+                       b = AT91C_BASE_SSC->SSC_RHR; (void) b;
                }
-               if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
+               if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){
+                       b = 0x00;
                        if(d < delay) {
-                               b = 0x00;
                                d++;
                        }
-                       else if(i >= respLen) {
-                               b = 0x00;
-                               u++;
-                       } else {
-                               b = resp[i];
-                               u++;
-                               if(u > 1) { i++; u = 0; }
+                       else {
+                               if( i < respLen){
+                                       b = resp[i];
+                                       //Hack
+                                       //b = 0xAC;
+                               }
+                               i++;
                        }
                        AT91C_BASE_SSC->SSC_THR = b;
-
-                       if(u > 4) break;
-               }
-               if(BUTTON_PRESS()) {
-                       break;
                }
+
+               if (i > respLen +4) break;
        }
 
        return 0;
@@ -1284,7 +1289,6 @@ static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
 static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait)
 {
   int c;
-
   FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
   AT91C_BASE_SSC->SSC_THR = 0x00;
   FpgaSetupSsc();
@@ -1360,12 +1364,12 @@ void CodeIClassCommand(const uint8_t * cmd, int len)
     b = cmd[i];
     for(j = 0; j < 4; j++) {
       for(k = 0; k < 4; k++) {
-       if(k == (b & 3)) {
-           ToSend[++ToSendMax] = 0x0f;
-       }
-       else {
-           ToSend[++ToSendMax] = 0x00;
-       }
+                       if(k == (b & 3)) {
+                               ToSend[++ToSendMax] = 0x0f;
+                       }
+                       else {
+                               ToSend[++ToSendMax] = 0x00;
+                       }
       }
       b >>= 2;
     }

diff --git a/fpga/fpga.bit b/fpga/fpga.bit
index e773ef9326d66be61c29bc6c169be07d9703a364..e5ea4fcd33b41a65cf776e06d388ebfcad02bff9 100644 (file)
Binary files a/fpga/fpga.bit and b/fpga/fpga.bit differ

diff --git a/fpga/hi_simulate.v b/fpga/hi_simulate.v
index efaf452fabf91e599813dcf004dd0e5e657a65ac..c04ade80b098a474218fa8693c537ebe17729a14 100644 (file)
--- a/fpga/hi_simulate.v
+++ b/fpga/hi_simulate.v
@@ -89,7 +89,9 @@ always @(mod_type or ssp_clk or ssp_dout)
     else if(mod_type == 3'b001)
         modulating_carrier <= ssp_dout ^ ssp_clk_divider[3]; // XOR means BPSK
     else if(mod_type == 3'b010)
-        modulating_carrier <= ssp_dout & ssp_clk_divider[5]; // switch 212kHz subcarrier on/off
+       modulating_carrier <= ssp_dout & ssp_clk_divider[5]; // switch 212kHz subcarrier on/off
+    else if(mod_type == 3'b100)
+       modulating_carrier <= ssp_dout & ssp_clk_divider[4]; // switch 424kHz modulation on/off
     else
         modulating_carrier <= 1'b0;                           // yet unused
 
@@ -105,5 +107,8 @@ assign pwr_oe4 = modulating_carrier;
 assign pwr_oe3 = 1'b0;
 
 assign dbg = after_hysteresis;
+//reg dbg;
+//always @(ssp_dout)
+//    dbg <= ssp_dout;
 
 endmodule