*/
void DoAcquisition125k_internal(int trigger_threshold,bool silent)
{
- uint8_t *dest = (uint8_t *)BigBuf;
- int n = sizeof(BigBuf);
- int i;
-
- memset(dest, 0, n);
- i = 0;
- for(;;) {
- if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
- AT91C_BASE_SSC->SSC_THR = 0x43;
- LED_D_ON();
- }
- if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
- dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
- LED_D_OFF();
- if (trigger_threshold != -1 && dest[i] < trigger_threshold)
- continue;
- else
- trigger_threshold = -1;
- if (++i >= n) break;
- }
- }
- if(!silent)
- {
- Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
- dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
-
- }
+ uint8_t *dest = (uint8_t *)BigBuf;
+ int n = sizeof(BigBuf);
+ int i;
+
+ memset(dest, 0, n);
+ i = 0;
+ for(;;) {
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+ AT91C_BASE_SSC->SSC_THR = 0x43;
+ LED_D_ON();
+ }
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
+ dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
+ LED_D_OFF();
+ if (trigger_threshold != -1 && dest[i] < trigger_threshold)
+ continue;
+ else
+ trigger_threshold = -1;
+ if (++i >= n) break;
+ }
+ }
+ if(!silent)
+ {
+ Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
+ dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
+
+ }
}
/**
* Perform sample aquisition.
*/
void DoAcquisition125k(int trigger_threshold)
{
- DoAcquisition125k_internal(trigger_threshold, false);
+ DoAcquisition125k_internal(trigger_threshold, false);
}
/**
**/
void LFSetupFPGAForADC(int divisor, bool lf_field)
{
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- if ( (divisor == 1) || (divisor < 0) || (divisor > 255) )
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
- else if (divisor == 0)
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- else
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor);
-
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | (lf_field ? FPGA_LF_ADC_READER_FIELD : 0));
-
- // Connect the A/D to the peak-detected low-frequency path.
- SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
- // Give it a bit of time for the resonant antenna to settle.
- SpinDelay(50);
- // Now set up the SSC to get the ADC samples that are now streaming at us.
- FpgaSetupSsc();
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ if ( (divisor == 1) || (divisor < 0) || (divisor > 255) )
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
+ else if (divisor == 0)
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ else
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor);
+
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | (lf_field ? FPGA_LF_ADC_READER_FIELD : 0));
+
+ // Connect the A/D to the peak-detected low-frequency path.
+ SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+ // Give it a bit of time for the resonant antenna to settle.
+ SpinDelay(50);
+ // Now set up the SSC to get the ADC samples that are now streaming at us.
+ FpgaSetupSsc();
}
/**
* Initializes the FPGA, and acquires the samples.
**/
void AcquireRawAdcSamples125k(int divisor)
{
- LFSetupFPGAForADC(divisor, true);
- // Now call the acquisition routine
- DoAcquisition125k_internal(-1,false);
+ LFSetupFPGAForADC(divisor, true);
+ // Now call the acquisition routine
+ DoAcquisition125k_internal(-1,false);
}
/**
* Initializes the FPGA for snoop-mode, and acquires the samples.
void SnoopLFRawAdcSamples(int divisor, int trigger_threshold)
{
- LFSetupFPGAForADC(divisor, false);
- DoAcquisition125k(trigger_threshold);
+ LFSetupFPGAForADC(divisor, false);
+ DoAcquisition125k(trigger_threshold);
}
void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, uint8_t *command)
{
- /* Make sure the tag is reset */
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- SpinDelay(2500);
+ /* Make sure the tag is reset */
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ SpinDelay(2500);
- int divisor_used = 95; // 125 KHz
- // see if 'h' was specified
+ int divisor_used = 95; // 125 KHz
+ // see if 'h' was specified
- if (command[strlen((char *) command) - 1] == 'h')
- divisor_used = 88; // 134.8 KHz
+ if (command[strlen((char *) command) - 1] == 'h')
+ divisor_used = 88; // 134.8 KHz
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
- // Give it a bit of time for the resonant antenna to settle.
- SpinDelay(50);
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+ // Give it a bit of time for the resonant antenna to settle.
+ SpinDelay(50);
- // And a little more time for the tag to fully power up
- SpinDelay(2000);
+ // And a little more time for the tag to fully power up
+ SpinDelay(2000);
- // Now set up the SSC to get the ADC samples that are now streaming at us.
- FpgaSetupSsc();
+ // Now set up the SSC to get the ADC samples that are now streaming at us.
+ FpgaSetupSsc();
- // now modulate the reader field
- while(*command != '\0' && *command != ' ') {
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- LED_D_OFF();
- SpinDelayUs(delay_off);
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
+ // now modulate the reader field
+ while(*command != '\0' && *command != ' ') {
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ LED_D_OFF();
+ SpinDelayUs(delay_off);
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
- LED_D_ON();
- if(*(command++) == '0')
- SpinDelayUs(period_0);
- else
- SpinDelayUs(period_1);
- }
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- LED_D_OFF();
- SpinDelayUs(delay_off);
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+ LED_D_ON();
+ if(*(command++) == '0')
+ SpinDelayUs(period_0);
+ else
+ SpinDelayUs(period_1);
+ }
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ LED_D_OFF();
+ SpinDelayUs(delay_off);
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
- // now do the read
- DoAcquisition125k(-1);
+ // now do the read
+ DoAcquisition125k(-1);
}
/* blank r/w tag data stream
*/
void ReadTItag(void)
{
- // some hardcoded initial params
- // when we read a TI tag we sample the zerocross line at 2Mhz
- // TI tags modulate a 1 as 16 cycles of 123.2Khz
- // TI tags modulate a 0 as 16 cycles of 134.2Khz
- #define FSAMPLE 2000000
- #define FREQLO 123200
- #define FREQHI 134200
-
- signed char *dest = (signed char *)BigBuf;
- int n = sizeof(BigBuf);
-// int *dest = GraphBuffer;
-// int n = GraphTraceLen;
-
- // 128 bit shift register [shift3:shift2:shift1:shift0]
- uint32_t shift3 = 0, shift2 = 0, shift1 = 0, shift0 = 0;
-
- int i, cycles=0, samples=0;
- // how many sample points fit in 16 cycles of each frequency
- uint32_t sampleslo = (FSAMPLE<<4)/FREQLO, sampleshi = (FSAMPLE<<4)/FREQHI;
- // when to tell if we're close enough to one freq or another
- uint32_t threshold = (sampleslo - sampleshi + 1)>>1;
-
- // TI tags charge at 134.2Khz
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-
- // Place FPGA in passthrough mode, in this mode the CROSS_LO line
- // connects to SSP_DIN and the SSP_DOUT logic level controls
- // whether we're modulating the antenna (high)
- // or listening to the antenna (low)
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);
-
- // get TI tag data into the buffer
- AcquireTiType();
-
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-
- for (i=0; i<n-1; i++) {
- // count cycles by looking for lo to hi zero crossings
- if ( (dest[i]<0) && (dest[i+1]>0) ) {
- cycles++;
- // after 16 cycles, measure the frequency
- if (cycles>15) {
- cycles=0;
- samples=i-samples; // number of samples in these 16 cycles
-
- // TI bits are coming to us lsb first so shift them
- // right through our 128 bit right shift register
- shift0 = (shift0>>1) | (shift1 << 31);
- shift1 = (shift1>>1) | (shift2 << 31);
- shift2 = (shift2>>1) | (shift3 << 31);
- shift3 >>= 1;
-
- // check if the cycles fall close to the number
- // expected for either the low or high frequency
- if ( (samples>(sampleslo-threshold)) && (samples<(sampleslo+threshold)) ) {
- // low frequency represents a 1
- shift3 |= (1<<31);
- } else if ( (samples>(sampleshi-threshold)) && (samples<(sampleshi+threshold)) ) {
- // high frequency represents a 0
- } else {
- // probably detected a gay waveform or noise
- // use this as gaydar or discard shift register and start again
- shift3 = shift2 = shift1 = shift0 = 0;
- }
- samples = i;
-
- // for each bit we receive, test if we've detected a valid tag
-
- // if we see 17 zeroes followed by 6 ones, we might have a tag
- // remember the bits are backwards
- if ( ((shift0 & 0x7fffff) == 0x7e0000) ) {
- // if start and end bytes match, we have a tag so break out of the loop
- if ( ((shift0>>16)&0xff) == ((shift3>>8)&0xff) ) {
- cycles = 0xF0B; //use this as a flag (ugly but whatever)
- break;
- }
- }
- }
- }
- }
-
- // if flag is set we have a tag
- if (cycles!=0xF0B) {
- DbpString("Info: No valid tag detected.");
- } else {
- // put 64 bit data into shift1 and shift0
- shift0 = (shift0>>24) | (shift1 << 8);
- shift1 = (shift1>>24) | (shift2 << 8);
-
- // align 16 bit crc into lower half of shift2
- shift2 = ((shift2>>24) | (shift3 << 8)) & 0x0ffff;
-
- // if r/w tag, check ident match
- if ( shift3&(1<<15) ) {
- DbpString("Info: TI tag is rewriteable");
- // only 15 bits compare, last bit of ident is not valid
- if ( ((shift3>>16)^shift0)&0x7fff ) {
- DbpString("Error: Ident mismatch!");
- } else {
- DbpString("Info: TI tag ident is valid");
- }
- } else {
- DbpString("Info: TI tag is readonly");
- }
-
- // WARNING the order of the bytes in which we calc crc below needs checking
- // i'm 99% sure the crc algorithm is correct, but it may need to eat the
- // bytes in reverse or something
- // calculate CRC
- uint32_t crc=0;
-
- crc = update_crc16(crc, (shift0)&0xff);
- crc = update_crc16(crc, (shift0>>8)&0xff);
- crc = update_crc16(crc, (shift0>>16)&0xff);
- crc = update_crc16(crc, (shift0>>24)&0xff);
- crc = update_crc16(crc, (shift1)&0xff);
- crc = update_crc16(crc, (shift1>>8)&0xff);
- crc = update_crc16(crc, (shift1>>16)&0xff);
- crc = update_crc16(crc, (shift1>>24)&0xff);
-
- Dbprintf("Info: Tag data: %x%08x, crc=%x",
- (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
- if (crc != (shift2&0xffff)) {
- Dbprintf("Error: CRC mismatch, expected %x", (unsigned int)crc);
- } else {
- DbpString("Info: CRC is good");
- }
- }
+ // some hardcoded initial params
+ // when we read a TI tag we sample the zerocross line at 2Mhz
+ // TI tags modulate a 1 as 16 cycles of 123.2Khz
+ // TI tags modulate a 0 as 16 cycles of 134.2Khz
+#define FSAMPLE 2000000
+#define FREQLO 123200
+#define FREQHI 134200
+
+ signed char *dest = (signed char *)BigBuf;
+ int n = sizeof(BigBuf);
+ // int *dest = GraphBuffer;
+ // int n = GraphTraceLen;
+
+ // 128 bit shift register [shift3:shift2:shift1:shift0]
+ uint32_t shift3 = 0, shift2 = 0, shift1 = 0, shift0 = 0;
+
+ int i, cycles=0, samples=0;
+ // how many sample points fit in 16 cycles of each frequency
+ uint32_t sampleslo = (FSAMPLE<<4)/FREQLO, sampleshi = (FSAMPLE<<4)/FREQHI;
+ // when to tell if we're close enough to one freq or another
+ uint32_t threshold = (sampleslo - sampleshi + 1)>>1;
+
+ // TI tags charge at 134.2Khz
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
+
+ // Place FPGA in passthrough mode, in this mode the CROSS_LO line
+ // connects to SSP_DIN and the SSP_DOUT logic level controls
+ // whether we're modulating the antenna (high)
+ // or listening to the antenna (low)
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);
+
+ // get TI tag data into the buffer
+ AcquireTiType();
+
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+
+ for (i=0; i<n-1; i++) {
+ // count cycles by looking for lo to hi zero crossings
+ if ( (dest[i]<0) && (dest[i+1]>0) ) {
+ cycles++;
+ // after 16 cycles, measure the frequency
+ if (cycles>15) {
+ cycles=0;
+ samples=i-samples; // number of samples in these 16 cycles
+
+ // TI bits are coming to us lsb first so shift them
+ // right through our 128 bit right shift register
+ shift0 = (shift0>>1) | (shift1 << 31);
+ shift1 = (shift1>>1) | (shift2 << 31);
+ shift2 = (shift2>>1) | (shift3 << 31);
+ shift3 >>= 1;
+
+ // check if the cycles fall close to the number
+ // expected for either the low or high frequency
+ if ( (samples>(sampleslo-threshold)) && (samples<(sampleslo+threshold)) ) {
+ // low frequency represents a 1
+ shift3 |= (1<<31);
+ } else if ( (samples>(sampleshi-threshold)) && (samples<(sampleshi+threshold)) ) {
+ // high frequency represents a 0
+ } else {
+ // probably detected a gay waveform or noise
+ // use this as gaydar or discard shift register and start again
+ shift3 = shift2 = shift1 = shift0 = 0;
+ }
+ samples = i;
+
+ // for each bit we receive, test if we've detected a valid tag
+
+ // if we see 17 zeroes followed by 6 ones, we might have a tag
+ // remember the bits are backwards
+ if ( ((shift0 & 0x7fffff) == 0x7e0000) ) {
+ // if start and end bytes match, we have a tag so break out of the loop
+ if ( ((shift0>>16)&0xff) == ((shift3>>8)&0xff) ) {
+ cycles = 0xF0B; //use this as a flag (ugly but whatever)
+ break;
+ }
+ }
+ }
+ }
+ }
+
+ // if flag is set we have a tag
+ if (cycles!=0xF0B) {
+ DbpString("Info: No valid tag detected.");
+ } else {
+ // put 64 bit data into shift1 and shift0
+ shift0 = (shift0>>24) | (shift1 << 8);
+ shift1 = (shift1>>24) | (shift2 << 8);
+
+ // align 16 bit crc into lower half of shift2
+ shift2 = ((shift2>>24) | (shift3 << 8)) & 0x0ffff;
+
+ // if r/w tag, check ident match
+ if ( shift3&(1<<15) ) {
+ DbpString("Info: TI tag is rewriteable");
+ // only 15 bits compare, last bit of ident is not valid
+ if ( ((shift3>>16)^shift0)&0x7fff ) {
+ DbpString("Error: Ident mismatch!");
+ } else {
+ DbpString("Info: TI tag ident is valid");
+ }
+ } else {
+ DbpString("Info: TI tag is readonly");
+ }
+
+ // WARNING the order of the bytes in which we calc crc below needs checking
+ // i'm 99% sure the crc algorithm is correct, but it may need to eat the
+ // bytes in reverse or something
+ // calculate CRC
+ uint32_t crc=0;
+
+ crc = update_crc16(crc, (shift0)&0xff);
+ crc = update_crc16(crc, (shift0>>8)&0xff);
+ crc = update_crc16(crc, (shift0>>16)&0xff);
+ crc = update_crc16(crc, (shift0>>24)&0xff);
+ crc = update_crc16(crc, (shift1)&0xff);
+ crc = update_crc16(crc, (shift1>>8)&0xff);
+ crc = update_crc16(crc, (shift1>>16)&0xff);
+ crc = update_crc16(crc, (shift1>>24)&0xff);
+
+ Dbprintf("Info: Tag data: %x%08x, crc=%x",
+ (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
+ if (crc != (shift2&0xffff)) {
+ Dbprintf("Error: CRC mismatch, expected %x", (unsigned int)crc);
+ } else {
+ DbpString("Info: CRC is good");
+ }
+ }
}
void WriteTIbyte(uint8_t b)
{
- int i = 0;
-
- // modulate 8 bits out to the antenna
- for (i=0; i<8; i++)
- {
- if (b&(1<<i)) {
- // stop modulating antenna
- LOW(GPIO_SSC_DOUT);
- SpinDelayUs(1000);
- // modulate antenna
- HIGH(GPIO_SSC_DOUT);
- SpinDelayUs(1000);
- } else {
- // stop modulating antenna
- LOW(GPIO_SSC_DOUT);
- SpinDelayUs(300);
- // modulate antenna
- HIGH(GPIO_SSC_DOUT);
- SpinDelayUs(1700);
- }
- }
+ int i = 0;
+
+ // modulate 8 bits out to the antenna
+ for (i=0; i<8; i++)
+ {
+ if (b&(1<<i)) {
+ // stop modulating antenna
+ LOW(GPIO_SSC_DOUT);
+ SpinDelayUs(1000);
+ // modulate antenna
+ HIGH(GPIO_SSC_DOUT);
+ SpinDelayUs(1000);
+ } else {
+ // stop modulating antenna
+ LOW(GPIO_SSC_DOUT);
+ SpinDelayUs(300);
+ // modulate antenna
+ HIGH(GPIO_SSC_DOUT);
+ SpinDelayUs(1700);
+ }
+ }
}
void AcquireTiType(void)
{
- int i, j, n;
- // tag transmission is <20ms, sampling at 2M gives us 40K samples max
- // each sample is 1 bit stuffed into a uint32_t so we need 1250 uint32_t
- #define TIBUFLEN 1250
-
- // clear buffer
- memset(BigBuf,0,sizeof(BigBuf));
-
- // Set up the synchronous serial port
- AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DIN;
- AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN;
-
- // steal this pin from the SSP and use it to control the modulation
- AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
- AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
-
- AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
- AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN;
-
- // Sample at 2 Mbit/s, so TI tags are 16.2 vs. 14.9 clocks long
- // 48/2 = 24 MHz clock must be divided by 12
- AT91C_BASE_SSC->SSC_CMR = 12;
-
- AT91C_BASE_SSC->SSC_RCMR = SSC_CLOCK_MODE_SELECT(0);
- AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(32) | AT91C_SSC_MSBF;
- AT91C_BASE_SSC->SSC_TCMR = 0;
- AT91C_BASE_SSC->SSC_TFMR = 0;
-
- LED_D_ON();
-
- // modulate antenna
- HIGH(GPIO_SSC_DOUT);
-
- // Charge TI tag for 50ms.
- SpinDelay(50);
-
- // stop modulating antenna and listen
- LOW(GPIO_SSC_DOUT);
-
- LED_D_OFF();
-
- i = 0;
- for(;;) {
- if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
- BigBuf[i] = AT91C_BASE_SSC->SSC_RHR; // store 32 bit values in buffer
- i++; if(i >= TIBUFLEN) break;
- }
- WDT_HIT();
- }
-
- // return stolen pin to SSP
- AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT;
- AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN | GPIO_SSC_DOUT;
-
- char *dest = (char *)BigBuf;
- n = TIBUFLEN*32;
- // unpack buffer
- for (i=TIBUFLEN-1; i>=0; i--) {
- for (j=0; j<32; j++) {
- if(BigBuf[i] & (1 << j)) {
- dest[--n] = 1;
- } else {
- dest[--n] = -1;
- }
- }
- }
+ int i, j, n;
+ // tag transmission is <20ms, sampling at 2M gives us 40K samples max
+ // each sample is 1 bit stuffed into a uint32_t so we need 1250 uint32_t
+#define TIBUFLEN 1250
+
+ // clear buffer
+ memset(BigBuf,0,sizeof(BigBuf));
+
+ // Set up the synchronous serial port
+ AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DIN;
+ AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN;
+
+ // steal this pin from the SSP and use it to control the modulation
+ AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
+ AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
+
+ AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
+ AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN;
+
+ // Sample at 2 Mbit/s, so TI tags are 16.2 vs. 14.9 clocks long
+ // 48/2 = 24 MHz clock must be divided by 12
+ AT91C_BASE_SSC->SSC_CMR = 12;
+
+ AT91C_BASE_SSC->SSC_RCMR = SSC_CLOCK_MODE_SELECT(0);
+ AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(32) | AT91C_SSC_MSBF;
+ AT91C_BASE_SSC->SSC_TCMR = 0;
+ AT91C_BASE_SSC->SSC_TFMR = 0;
+
+ LED_D_ON();
+
+ // modulate antenna
+ HIGH(GPIO_SSC_DOUT);
+
+ // Charge TI tag for 50ms.
+ SpinDelay(50);
+
+ // stop modulating antenna and listen
+ LOW(GPIO_SSC_DOUT);
+
+ LED_D_OFF();
+
+ i = 0;
+ for(;;) {
+ if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
+ BigBuf[i] = AT91C_BASE_SSC->SSC_RHR; // store 32 bit values in buffer
+ i++; if(i >= TIBUFLEN) break;
+ }
+ WDT_HIT();
+ }
+
+ // return stolen pin to SSP
+ AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT;
+ AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN | GPIO_SSC_DOUT;
+
+ char *dest = (char *)BigBuf;
+ n = TIBUFLEN*32;
+ // unpack buffer
+ for (i=TIBUFLEN-1; i>=0; i--) {
+ for (j=0; j<32; j++) {
+ if(BigBuf[i] & (1 << j)) {
+ dest[--n] = 1;
+ } else {
+ dest[--n] = -1;
+ }
+ }
+ }
}
// arguments: 64bit data split into 32bit idhi:idlo and optional 16bit crc
// if not provided a valid crc will be computed from the data and written.
void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
{
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- if(crc == 0) {
- crc = update_crc16(crc, (idlo)&0xff);
- crc = update_crc16(crc, (idlo>>8)&0xff);
- crc = update_crc16(crc, (idlo>>16)&0xff);
- crc = update_crc16(crc, (idlo>>24)&0xff);
- crc = update_crc16(crc, (idhi)&0xff);
- crc = update_crc16(crc, (idhi>>8)&0xff);
- crc = update_crc16(crc, (idhi>>16)&0xff);
- crc = update_crc16(crc, (idhi>>24)&0xff);
- }
- Dbprintf("Writing to tag: %x%08x, crc=%x",
- (unsigned int) idhi, (unsigned int) idlo, crc);
-
- // TI tags charge at 134.2Khz
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
- // Place FPGA in passthrough mode, in this mode the CROSS_LO line
- // connects to SSP_DIN and the SSP_DOUT logic level controls
- // whether we're modulating the antenna (high)
- // or listening to the antenna (low)
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);
- LED_A_ON();
-
- // steal this pin from the SSP and use it to control the modulation
- AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
- AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
-
- // writing algorithm:
- // a high bit consists of a field off for 1ms and field on for 1ms
- // a low bit consists of a field off for 0.3ms and field on for 1.7ms
- // initiate a charge time of 50ms (field on) then immediately start writing bits
- // start by writing 0xBB (keyword) and 0xEB (password)
- // then write 80 bits of data (or 64 bit data + 16 bit crc if you prefer)
- // finally end with 0x0300 (write frame)
- // all data is sent lsb firts
- // finish with 15ms programming time
-
- // modulate antenna
- HIGH(GPIO_SSC_DOUT);
- SpinDelay(50); // charge time
-
- WriteTIbyte(0xbb); // keyword
- WriteTIbyte(0xeb); // password
- WriteTIbyte( (idlo )&0xff );
- WriteTIbyte( (idlo>>8 )&0xff );
- WriteTIbyte( (idlo>>16)&0xff );
- WriteTIbyte( (idlo>>24)&0xff );
- WriteTIbyte( (idhi )&0xff );
- WriteTIbyte( (idhi>>8 )&0xff );
- WriteTIbyte( (idhi>>16)&0xff );
- WriteTIbyte( (idhi>>24)&0xff ); // data hi to lo
- WriteTIbyte( (crc )&0xff ); // crc lo
- WriteTIbyte( (crc>>8 )&0xff ); // crc hi
- WriteTIbyte(0x00); // write frame lo
- WriteTIbyte(0x03); // write frame hi
- HIGH(GPIO_SSC_DOUT);
- SpinDelay(50); // programming time
-
- LED_A_OFF();
-
- // get TI tag data into the buffer
- AcquireTiType();
-
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- DbpString("Now use tiread to check");
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ if(crc == 0) {
+ crc = update_crc16(crc, (idlo)&0xff);
+ crc = update_crc16(crc, (idlo>>8)&0xff);
+ crc = update_crc16(crc, (idlo>>16)&0xff);
+ crc = update_crc16(crc, (idlo>>24)&0xff);
+ crc = update_crc16(crc, (idhi)&0xff);
+ crc = update_crc16(crc, (idhi>>8)&0xff);
+ crc = update_crc16(crc, (idhi>>16)&0xff);
+ crc = update_crc16(crc, (idhi>>24)&0xff);
+ }
+ Dbprintf("Writing to tag: %x%08x, crc=%x",
+ (unsigned int) idhi, (unsigned int) idlo, crc);
+
+ // TI tags charge at 134.2Khz
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
+ // Place FPGA in passthrough mode, in this mode the CROSS_LO line
+ // connects to SSP_DIN and the SSP_DOUT logic level controls
+ // whether we're modulating the antenna (high)
+ // or listening to the antenna (low)
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);
+ LED_A_ON();
+
+ // steal this pin from the SSP and use it to control the modulation
+ AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
+ AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
+
+ // writing algorithm:
+ // a high bit consists of a field off for 1ms and field on for 1ms
+ // a low bit consists of a field off for 0.3ms and field on for 1.7ms
+ // initiate a charge time of 50ms (field on) then immediately start writing bits
+ // start by writing 0xBB (keyword) and 0xEB (password)
+ // then write 80 bits of data (or 64 bit data + 16 bit crc if you prefer)
+ // finally end with 0x0300 (write frame)
+ // all data is sent lsb firts
+ // finish with 15ms programming time
+
+ // modulate antenna
+ HIGH(GPIO_SSC_DOUT);
+ SpinDelay(50); // charge time
+
+ WriteTIbyte(0xbb); // keyword
+ WriteTIbyte(0xeb); // password
+ WriteTIbyte( (idlo )&0xff );
+ WriteTIbyte( (idlo>>8 )&0xff );
+ WriteTIbyte( (idlo>>16)&0xff );
+ WriteTIbyte( (idlo>>24)&0xff );
+ WriteTIbyte( (idhi )&0xff );
+ WriteTIbyte( (idhi>>8 )&0xff );
+ WriteTIbyte( (idhi>>16)&0xff );
+ WriteTIbyte( (idhi>>24)&0xff ); // data hi to lo
+ WriteTIbyte( (crc )&0xff ); // crc lo
+ WriteTIbyte( (crc>>8 )&0xff ); // crc hi
+ WriteTIbyte(0x00); // write frame lo
+ WriteTIbyte(0x03); // write frame hi
+ HIGH(GPIO_SSC_DOUT);
+ SpinDelay(50); // programming time
+
+ LED_A_OFF();
+
+ // get TI tag data into the buffer
+ AcquireTiType();
+
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ DbpString("Now use tiread to check");
}
void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
{
- int i;
- uint8_t *tab = (uint8_t *)BigBuf;
+ int i;
+ uint8_t *tab = (uint8_t *)BigBuf;
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
- AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
+ AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
- AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
- AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
+ AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
+ AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
#define SHORT_COIL() LOW(GPIO_SSC_DOUT)
#define OPEN_COIL() HIGH(GPIO_SSC_DOUT)
- i = 0;
- for(;;) {
- while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
- if(BUTTON_PRESS()) {
- DbpString("Stopped");
- return;
- }
- WDT_HIT();
- }
+ i = 0;
+ for(;;) {
+ while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
+ if(BUTTON_PRESS()) {
+ DbpString("Stopped");
+ return;
+ }
+ WDT_HIT();
+ }
- if (ledcontrol)
- LED_D_ON();
+ if (ledcontrol)
+ LED_D_ON();
- if(tab[i])
- OPEN_COIL();
- else
- SHORT_COIL();
+ if(tab[i])
+ OPEN_COIL();
+ else
+ SHORT_COIL();
- if (ledcontrol)
- LED_D_OFF();
+ if (ledcontrol)
+ LED_D_OFF();
- while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
- if(BUTTON_PRESS()) {
- DbpString("Stopped");
- return;
- }
- WDT_HIT();
- }
+ while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
+ if(BUTTON_PRESS()) {
+ DbpString("Stopped");
+ return;
+ }
+ WDT_HIT();
+ }
- i++;
- if(i == period) {
- i = 0;
- if (gap) {
- SHORT_COIL();
- SpinDelayUs(gap);
- }
- }
- }
+ i++;
+ if(i == period) {
+ i = 0;
+ if (gap) {
+ SHORT_COIL();
+ SpinDelayUs(gap);
+ }
+ }
+ }
}
#define DEBUG_FRAME_CONTENTS 1
// compose fc/8 fc/10 waveform
static void fc(int c, int *n) {
- uint8_t *dest = (uint8_t *)BigBuf;
- int idx;
-
- // for when we want an fc8 pattern every 4 logical bits
- if(c==0) {
- dest[((*n)++)]=1;
- dest[((*n)++)]=1;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- }
- // an fc/8 encoded bit is a bit pattern of 11000000 x6 = 48 samples
- if(c==8) {
- for (idx=0; idx<6; idx++) {
- dest[((*n)++)]=1;
- dest[((*n)++)]=1;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- }
- }
-
- // an fc/10 encoded bit is a bit pattern of 1110000000 x5 = 50 samples
- if(c==10) {
- for (idx=0; idx<5; idx++) {
- dest[((*n)++)]=1;
- dest[((*n)++)]=1;
- dest[((*n)++)]=1;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- dest[((*n)++)]=0;
- }
- }
+ uint8_t *dest = (uint8_t *)BigBuf;
+ int idx;
+
+ // for when we want an fc8 pattern every 4 logical bits
+ if(c==0) {
+ dest[((*n)++)]=1;
+ dest[((*n)++)]=1;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ }
+ // an fc/8 encoded bit is a bit pattern of 11000000 x6 = 48 samples
+ if(c==8) {
+ for (idx=0; idx<6; idx++) {
+ dest[((*n)++)]=1;
+ dest[((*n)++)]=1;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ }
+ }
+
+ // an fc/10 encoded bit is a bit pattern of 1110000000 x5 = 50 samples
+ if(c==10) {
+ for (idx=0; idx<5; idx++) {
+ dest[((*n)++)]=1;
+ dest[((*n)++)]=1;
+ dest[((*n)++)]=1;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ dest[((*n)++)]=0;
+ }
+ }
}
// prepare a waveform pattern in the buffer based on the ID given then
// simulate a HID tag until the button is pressed
void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
{
- int n=0, i=0;
- /*
- HID tag bitstream format
- The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits
- A 1 bit is represented as 6 fc8 and 5 fc10 patterns
- A 0 bit is represented as 5 fc10 and 6 fc8 patterns
- A fc8 is inserted before every 4 bits
- A special start of frame pattern is used consisting a0b0 where a and b are neither 0
- nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10)
- */
-
- if (hi>0xFFF) {
- DbpString("Tags can only have 44 bits.");
- return;
- }
- fc(0,&n);
- // special start of frame marker containing invalid bit sequences
- fc(8, &n); fc(8, &n); // invalid
- fc(8, &n); fc(10, &n); // logical 0
- fc(10, &n); fc(10, &n); // invalid
- fc(8, &n); fc(10, &n); // logical 0
-
- WDT_HIT();
- // manchester encode bits 43 to 32
- for (i=11; i>=0; i--) {
- if ((i%4)==3) fc(0,&n);
- if ((hi>>i)&1) {
- fc(10, &n); fc(8, &n); // low-high transition
- } else {
- fc(8, &n); fc(10, &n); // high-low transition
- }
- }
-
- WDT_HIT();
- // manchester encode bits 31 to 0
- for (i=31; i>=0; i--) {
- if ((i%4)==3) fc(0,&n);
- if ((lo>>i)&1) {
- fc(10, &n); fc(8, &n); // low-high transition
- } else {
- fc(8, &n); fc(10, &n); // high-low transition
- }
- }
-
- if (ledcontrol)
- LED_A_ON();
- SimulateTagLowFrequency(n, 0, ledcontrol);
-
- if (ledcontrol)
- LED_A_OFF();
+ int n=0, i=0;
+ /*
+ HID tag bitstream format
+ The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits
+ A 1 bit is represented as 6 fc8 and 5 fc10 patterns
+ A 0 bit is represented as 5 fc10 and 6 fc8 patterns
+ A fc8 is inserted before every 4 bits
+ A special start of frame pattern is used consisting a0b0 where a and b are neither 0
+ nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10)
+ */
+
+ if (hi>0xFFF) {
+ DbpString("Tags can only have 44 bits.");
+ return;
+ }
+ fc(0,&n);
+ // special start of frame marker containing invalid bit sequences
+ fc(8, &n); fc(8, &n); // invalid
+ fc(8, &n); fc(10, &n); // logical 0
+ fc(10, &n); fc(10, &n); // invalid
+ fc(8, &n); fc(10, &n); // logical 0
+
+ WDT_HIT();
+ // manchester encode bits 43 to 32
+ for (i=11; i>=0; i--) {
+ if ((i%4)==3) fc(0,&n);
+ if ((hi>>i)&1) {
+ fc(10, &n); fc(8, &n); // low-high transition
+ } else {
+ fc(8, &n); fc(10, &n); // high-low transition
+ }
+ }
+
+ WDT_HIT();
+ // manchester encode bits 31 to 0
+ for (i=31; i>=0; i--) {
+ if ((i%4)==3) fc(0,&n);
+ if ((lo>>i)&1) {
+ fc(10, &n); fc(8, &n); // low-high transition
+ } else {
+ fc(8, &n); fc(10, &n); // high-low transition
+ }
+ }
+
+ if (ledcontrol)
+ LED_A_ON();
+ SimulateTagLowFrequency(n, 0, ledcontrol);
+
+ if (ledcontrol)
+ LED_A_OFF();
}
// loop to get raw HID waveform then FSK demodulate the TAG ID from it
void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
{
- uint8_t *dest = (uint8_t *)BigBuf;
-
- size_t size=0; //, found=0;
- uint32_t hi2=0, hi=0, lo=0;
-
- // Configure to go in 125Khz listen mode
- LFSetupFPGAForADC(95, true);
-
- while(!BUTTON_PRESS()) {
-
- WDT_HIT();
- if (ledcontrol) LED_A_ON();
-
- DoAcquisition125k_internal(-1,true);
- size = sizeof(BigBuf);
- if (size < 2000) continue;
- // FSK demodulator
-
- int bitLen = HIDdemodFSK(dest,size,&hi2,&hi,&lo);
-
- WDT_HIT();
-
- if (bitLen>0 && lo>0){
- // final loop, go over previously decoded manchester data and decode into usable tag ID
- // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
- if (hi2 != 0){ //extra large HID tags
- Dbprintf("TAG ID: %x%08x%08x (%d)",
- (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
- }else { //standard HID tags <38 bits
- //Dbprintf("TAG ID: %x%08x (%d)",(unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF); //old print cmd
- uint8_t bitlen = 0;
- uint32_t fc = 0;
- uint32_t cardnum = 0;
- if (((hi>>5)&1)==1){//if bit 38 is set then < 37 bit format is used
- uint32_t lo2=0;
- lo2=(((hi & 31) << 12) | (lo>>20)); //get bits 21-37 to check for format len bit
- uint8_t idx3 = 1;
- while(lo2>1){ //find last bit set to 1 (format len bit)
- lo2=lo2>>1;
- idx3++;
- }
- bitlen =idx3+19;
- fc =0;
- cardnum=0;
- if(bitlen==26){
- cardnum = (lo>>1)&0xFFFF;
- fc = (lo>>17)&0xFF;
- }
- if(bitlen==37){
- cardnum = (lo>>1)&0x7FFFF;
- fc = ((hi&0xF)<<12)|(lo>>20);
- }
- if(bitlen==34){
- cardnum = (lo>>1)&0xFFFF;
- fc= ((hi&1)<<15)|(lo>>17);
- }
- if(bitlen==35){
- cardnum = (lo>>1)&0xFFFFF;
- fc = ((hi&1)<<11)|(lo>>21);
- }
- }
- else { //if bit 38 is not set then 37 bit format is used
- bitlen= 37;
- fc =0;
- cardnum=0;
- if(bitlen==37){
- cardnum = (lo>>1)&0x7FFFF;
- fc = ((hi&0xF)<<12)|(lo>>20);
- }
- }
- //Dbprintf("TAG ID: %x%08x (%d)",
- // (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
- Dbprintf("TAG ID: %x%08x (%d) - Format Len: %dbit - FC: %d - Card: %d",
- (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF,
- (unsigned int) bitlen, (unsigned int) fc, (unsigned int) cardnum);
- }
- if (findone){
- if (ledcontrol) LED_A_OFF();
- return;
- }
- // reset
- hi2 = hi = lo = 0;
- }
- WDT_HIT();
- //SpinDelay(50);
- }
- DbpString("Stopped");
- if (ledcontrol) LED_A_OFF();
+ uint8_t *dest = (uint8_t *)BigBuf;
+
+ size_t size=0; //, found=0;
+ uint32_t hi2=0, hi=0, lo=0;
+
+ // Configure to go in 125Khz listen mode
+ LFSetupFPGAForADC(95, true);
+
+ while(!BUTTON_PRESS()) {
+
+ WDT_HIT();
+ if (ledcontrol) LED_A_ON();
+
+ DoAcquisition125k_internal(-1,true);
+ size = sizeof(BigBuf);
+ if (size < 2000) continue;
+ // FSK demodulator
+
+ int bitLen = HIDdemodFSK(dest,size,&hi2,&hi,&lo);
+
+ WDT_HIT();
+
+ if (bitLen>0 && lo>0){
+ // final loop, go over previously decoded manchester data and decode into usable tag ID
+ // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
+ if (hi2 != 0){ //extra large HID tags
+ Dbprintf("TAG ID: %x%08x%08x (%d)",
+ (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
+ }else { //standard HID tags <38 bits
+ //Dbprintf("TAG ID: %x%08x (%d)",(unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF); //old print cmd
+ uint8_t bitlen = 0;
+ uint32_t fc = 0;
+ uint32_t cardnum = 0;
+ if (((hi>>5)&1)==1){//if bit 38 is set then < 37 bit format is used
+ uint32_t lo2=0;
+ lo2=(((hi & 31) << 12) | (lo>>20)); //get bits 21-37 to check for format len bit
+ uint8_t idx3 = 1;
+ while(lo2>1){ //find last bit set to 1 (format len bit)
+ lo2=lo2>>1;
+ idx3++;
+ }
+ bitlen =idx3+19;
+ fc =0;
+ cardnum=0;
+ if(bitlen==26){
+ cardnum = (lo>>1)&0xFFFF;
+ fc = (lo>>17)&0xFF;
+ }
+ if(bitlen==37){
+ cardnum = (lo>>1)&0x7FFFF;
+ fc = ((hi&0xF)<<12)|(lo>>20);
+ }
+ if(bitlen==34){
+ cardnum = (lo>>1)&0xFFFF;
+ fc= ((hi&1)<<15)|(lo>>17);
+ }
+ if(bitlen==35){
+ cardnum = (lo>>1)&0xFFFFF;
+ fc = ((hi&1)<<11)|(lo>>21);
+ }
+ }
+ else { //if bit 38 is not set then 37 bit format is used
+ bitlen= 37;
+ fc =0;
+ cardnum=0;
+ if(bitlen==37){
+ cardnum = (lo>>1)&0x7FFFF;
+ fc = ((hi&0xF)<<12)|(lo>>20);
+ }
+ }
+ //Dbprintf("TAG ID: %x%08x (%d)",
+ // (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
+ Dbprintf("TAG ID: %x%08x (%d) - Format Len: %dbit - FC: %d - Card: %d",
+ (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF,
+ (unsigned int) bitlen, (unsigned int) fc, (unsigned int) cardnum);
+ }
+ if (findone){
+ if (ledcontrol) LED_A_OFF();
+ return;
+ }
+ // reset
+ hi2 = hi = lo = 0;
+ }
+ WDT_HIT();
+ //SpinDelay(50);
+ }
+ DbpString("Stopped");
+ if (ledcontrol) LED_A_OFF();
}
void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
{
- uint8_t *dest = (uint8_t *)BigBuf;
-
- size_t size=0; //, found=0;
- int bitLen=0;
- int clk=0, invert=0, errCnt=0;
- uint64_t lo=0;
- // Configure to go in 125Khz listen mode
- LFSetupFPGAForADC(95, true);
-
- while(!BUTTON_PRESS()) {
-
- WDT_HIT();
- if (ledcontrol) LED_A_ON();
-
- DoAcquisition125k_internal(-1,true);
- size = sizeof(BigBuf);
- if (size < 2000) continue;
- // FSK demodulator
- //int askmandemod(uint8_t *BinStream,uint32_t *BitLen,int *clk, int *invert);
- bitLen=size;
- //Dbprintf("DEBUG: Buffer got");
- errCnt = askmandemod(dest,&bitLen,&clk,&invert); //HIDdemodFSK(dest,size,&hi2,&hi,&lo);
- //Dbprintf("DEBUG: ASK Got");
- WDT_HIT();
-
- if (errCnt>=0){
- lo = Em410xDecode(dest,bitLen);
- //Dbprintf("DEBUG: EM GOT");
- //printEM410x(lo);
- if (lo>0){
- Dbprintf("EM TAG ID: %02x%08x - (%05d_%03d_%08d)",(uint32_t)(lo>>32),(uint32_t)lo,(uint32_t)(lo&0xFFFF),(uint32_t)((lo>>16LL) & 0xFF),(uint32_t)(lo & 0xFFFFFF));
- }
- if (findone){
- if (ledcontrol) LED_A_OFF();
- return;
- }
- } else{
- //Dbprintf("DEBUG: No Tag");
- }
- WDT_HIT();
- lo = 0;
- clk=0;
- invert=0;
- errCnt=0;
- size=0;
- //SpinDelay(50);
- }
- DbpString("Stopped");
- if (ledcontrol) LED_A_OFF();
+ uint8_t *dest = (uint8_t *)BigBuf;
+
+ size_t size=0; //, found=0;
+ uint32_t bitLen=0;
+ int clk=0, invert=0, errCnt=0;
+ uint64_t lo=0;
+ // Configure to go in 125Khz listen mode
+ LFSetupFPGAForADC(95, true);
+
+ while(!BUTTON_PRESS()) {
+
+ WDT_HIT();
+ if (ledcontrol) LED_A_ON();
+
+ DoAcquisition125k_internal(-1,true);
+ size = sizeof(BigBuf);
+ if (size < 2000) continue;
+ // FSK demodulator
+ //int askmandemod(uint8_t *BinStream,uint32_t *BitLen,int *clk, int *invert);
+ bitLen=size;
+ //Dbprintf("DEBUG: Buffer got");
+ errCnt = askmandemod(dest,&bitLen,&clk,&invert); //HIDdemodFSK(dest,size,&hi2,&hi,&lo);
+ //Dbprintf("DEBUG: ASK Got");
+ WDT_HIT();
+
+ if (errCnt>=0){
+ lo = Em410xDecode(dest,bitLen);
+ //Dbprintf("DEBUG: EM GOT");
+ //printEM410x(lo);
+ if (lo>0){
+ Dbprintf("EM TAG ID: %02x%08x - (%05d_%03d_%08d)",(uint32_t)(lo>>32),(uint32_t)lo,(uint32_t)(lo&0xFFFF),(uint32_t)((lo>>16LL) & 0xFF),(uint32_t)(lo & 0xFFFFFF));
+ }
+ if (findone){
+ if (ledcontrol) LED_A_OFF();
+ return;
+ }
+ } else{
+ //Dbprintf("DEBUG: No Tag");
+ }
+ WDT_HIT();
+ lo = 0;
+ clk=0;
+ invert=0;
+ errCnt=0;
+ size=0;
+ //SpinDelay(50);
+ }
+ DbpString("Stopped");
+ if (ledcontrol) LED_A_OFF();
}
void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
{
- uint8_t *dest = (uint8_t *)BigBuf;
- size_t size=0;
- int idx=0;
- uint32_t code=0, code2=0;
- uint8_t version=0;
- uint8_t facilitycode=0;
- uint16_t number=0;
- // Configure to go in 125Khz listen mode
- LFSetupFPGAForADC(95, true);
-
- while(!BUTTON_PRESS()) {
- WDT_HIT();
- if (ledcontrol) LED_A_ON();
- DoAcquisition125k_internal(-1,true);
- size = sizeof(BigBuf);
- //make sure buffer has data
- if (size < 2000) continue;
- //fskdemod and get start index
- WDT_HIT();
- idx = IOdemodFSK(dest,size);
- if (idx>0){
- //valid tag found
-
- //Index map
- //0 10 20 30 40 50 60
- //| | | | | | |
- //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23
- //-----------------------------------------------------------------------------
- //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 ???????? 11
- //
- //XSF(version)facility:codeone+codetwo
- //Handle the data
- if(findone){ //only print binary if we are doing one
- Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx], dest[idx+1], dest[idx+2],dest[idx+3],dest[idx+4],dest[idx+5],dest[idx+6],dest[idx+7],dest[idx+8]);
- Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+9], dest[idx+10],dest[idx+11],dest[idx+12],dest[idx+13],dest[idx+14],dest[idx+15],dest[idx+16],dest[idx+17]);
- Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+18],dest[idx+19],dest[idx+20],dest[idx+21],dest[idx+22],dest[idx+23],dest[idx+24],dest[idx+25],dest[idx+26]);
- Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+27],dest[idx+28],dest[idx+29],dest[idx+30],dest[idx+31],dest[idx+32],dest[idx+33],dest[idx+34],dest[idx+35]);
- Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+36],dest[idx+37],dest[idx+38],dest[idx+39],dest[idx+40],dest[idx+41],dest[idx+42],dest[idx+43],dest[idx+44]);
- Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+45],dest[idx+46],dest[idx+47],dest[idx+48],dest[idx+49],dest[idx+50],dest[idx+51],dest[idx+52],dest[idx+53]);
- Dbprintf("%d%d%d%d%d%d%d%d %d%d",dest[idx+54],dest[idx+55],dest[idx+56],dest[idx+57],dest[idx+58],dest[idx+59],dest[idx+60],dest[idx+61],dest[idx+62],dest[idx+63]);
- }
- code = bytebits_to_byte(dest+idx,32);
- code2 = bytebits_to_byte(dest+idx+32,32);
- version = bytebits_to_byte(dest+idx+27,8); //14,4
- facilitycode = bytebits_to_byte(dest+idx+18,8) ;
- number = (bytebits_to_byte(dest+idx+36,8)<<8)|(bytebits_to_byte(dest+idx+45,8)); //36,9
-
- Dbprintf("XSF(%02d)%02x:%05d (%08x%08x)",version,facilitycode,number,code,code2);
- // if we're only looking for one tag
- if (findone){
- if (ledcontrol) LED_A_OFF();
- //LED_A_OFF();
- return;
- }
- code=code2=0;
- version=facilitycode=0;
- number=0;
- idx=0;
- }
- WDT_HIT();
- }
- DbpString("Stopped");
- if (ledcontrol) LED_A_OFF();
+ uint8_t *dest = (uint8_t *)BigBuf;
+ int idx=0;
+ uint32_t code=0, code2=0;
+ uint8_t version=0;
+ uint8_t facilitycode=0;
+ uint16_t number=0;
+ // Configure to go in 125Khz listen mode
+ LFSetupFPGAForADC(95, true);
+
+ while(!BUTTON_PRESS()) {
+ WDT_HIT();
+ if (ledcontrol) LED_A_ON();
+ DoAcquisition125k_internal(-1,true);
+ //fskdemod and get start index
+ WDT_HIT();
+ idx = IOdemodFSK(dest,sizeof(BigBuf));
+ if (idx>0){
+ //valid tag found
+
+ //Index map
+ //0 10 20 30 40 50 60
+ //| | | | | | |
+ //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23
+ //-----------------------------------------------------------------------------
+ //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 ???????? 11
+ //
+ //XSF(version)facility:codeone+codetwo
+ //Handle the data
+ if(findone){ //only print binary if we are doing one
+ Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx], dest[idx+1], dest[idx+2],dest[idx+3],dest[idx+4],dest[idx+5],dest[idx+6],dest[idx+7],dest[idx+8]);
+ Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+9], dest[idx+10],dest[idx+11],dest[idx+12],dest[idx+13],dest[idx+14],dest[idx+15],dest[idx+16],dest[idx+17]);
+ Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+18],dest[idx+19],dest[idx+20],dest[idx+21],dest[idx+22],dest[idx+23],dest[idx+24],dest[idx+25],dest[idx+26]);
+ Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+27],dest[idx+28],dest[idx+29],dest[idx+30],dest[idx+31],dest[idx+32],dest[idx+33],dest[idx+34],dest[idx+35]);
+ Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+36],dest[idx+37],dest[idx+38],dest[idx+39],dest[idx+40],dest[idx+41],dest[idx+42],dest[idx+43],dest[idx+44]);
+ Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+45],dest[idx+46],dest[idx+47],dest[idx+48],dest[idx+49],dest[idx+50],dest[idx+51],dest[idx+52],dest[idx+53]);
+ Dbprintf("%d%d%d%d%d%d%d%d %d%d",dest[idx+54],dest[idx+55],dest[idx+56],dest[idx+57],dest[idx+58],dest[idx+59],dest[idx+60],dest[idx+61],dest[idx+62],dest[idx+63]);
+ }
+ code = bytebits_to_byte(dest+idx,32);
+ code2 = bytebits_to_byte(dest+idx+32,32);
+ version = bytebits_to_byte(dest+idx+27,8); //14,4
+ facilitycode = bytebits_to_byte(dest+idx+18,8) ;
+ number = (bytebits_to_byte(dest+idx+36,8)<<8)|(bytebits_to_byte(dest+idx+45,8)); //36,9
+
+ Dbprintf("XSF(%02d)%02x:%05d (%08x%08x)",version,facilitycode,number,code,code2);
+ // if we're only looking for one tag
+ if (findone){
+ if (ledcontrol) LED_A_OFF();
+ //LED_A_OFF();
+ return;
+ }
+ code=code2=0;
+ version=facilitycode=0;
+ number=0;
+ idx=0;
+ }
+ WDT_HIT();
+ }
+ DbpString("Stopped");
+ if (ledcontrol) LED_A_OFF();
}
/*------------------------------
// Write one bit to card
void T55xxWriteBit(int bit)
{
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
- if (bit == 0)
- SpinDelayUs(WRITE_0);
- else
- SpinDelayUs(WRITE_1);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- SpinDelayUs(WRITE_GAP);
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+ if (bit == 0)
+ SpinDelayUs(WRITE_0);
+ else
+ SpinDelayUs(WRITE_1);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ SpinDelayUs(WRITE_GAP);
}
// Write one card block in page 0, no lock
void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
{
- //unsigned int i; //enio adjustment 12/10/14
- uint32_t i;
-
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
- // Give it a bit of time for the resonant antenna to settle.
- // And for the tag to fully power up
- SpinDelay(150);
-
- // Now start writting
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- SpinDelayUs(START_GAP);
-
- // Opcode
- T55xxWriteBit(1);
- T55xxWriteBit(0); //Page 0
- if (PwdMode == 1){
- // Pwd
+ //unsigned int i; //enio adjustment 12/10/14
+ uint32_t i;
+
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+ // Give it a bit of time for the resonant antenna to settle.
+ // And for the tag to fully power up
+ SpinDelay(150);
+
+ // Now start writting
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ SpinDelayUs(START_GAP);
+
+ // Opcode
+ T55xxWriteBit(1);
+ T55xxWriteBit(0); //Page 0
+ if (PwdMode == 1){
+ // Pwd
+ for (i = 0x80000000; i != 0; i >>= 1)
+ T55xxWriteBit(Pwd & i);
+ }
+ // Lock bit
+ T55xxWriteBit(0);
+
+ // Data
for (i = 0x80000000; i != 0; i >>= 1)
- T55xxWriteBit(Pwd & i);
- }
- // Lock bit
- T55xxWriteBit(0);
-
- // Data
- for (i = 0x80000000; i != 0; i >>= 1)
- T55xxWriteBit(Data & i);
-
- // Block
- for (i = 0x04; i != 0; i >>= 1)
- T55xxWriteBit(Block & i);
-
- // Now perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
- // so wait a little more)
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
- SpinDelay(20);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ T55xxWriteBit(Data & i);
+
+ // Block
+ for (i = 0x04; i != 0; i >>= 1)
+ T55xxWriteBit(Block & i);
+
+ // Now perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
+ // so wait a little more)
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+ SpinDelay(20);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
}
// Read one card block in page 0
void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
{
- uint8_t *dest = (uint8_t *)BigBuf;
- //int m=0, i=0; //enio adjustment 12/10/14
- uint32_t m=0, i=0;
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- m = sizeof(BigBuf);
- // Clear destination buffer before sending the command
- memset(dest, 128, m);
- // Connect the A/D to the peak-detected low-frequency path.
- SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
- // Now set up the SSC to get the ADC samples that are now streaming at us.
- FpgaSetupSsc();
-
- LED_D_ON();
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
- // Give it a bit of time for the resonant antenna to settle.
- // And for the tag to fully power up
- SpinDelay(150);
-
- // Now start writting
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- SpinDelayUs(START_GAP);
-
- // Opcode
- T55xxWriteBit(1);
- T55xxWriteBit(0); //Page 0
- if (PwdMode == 1){
- // Pwd
- for (i = 0x80000000; i != 0; i >>= 1)
- T55xxWriteBit(Pwd & i);
- }
- // Lock bit
- T55xxWriteBit(0);
- // Block
- for (i = 0x04; i != 0; i >>= 1)
- T55xxWriteBit(Block & i);
-
- // Turn field on to read the response
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
- // Now do the acquisition
- i = 0;
- for(;;) {
- if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
- AT91C_BASE_SSC->SSC_THR = 0x43;
- }
- if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
- dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
- // we don't care about actual value, only if it's more or less than a
- // threshold essentially we capture zero crossings for later analysis
- // if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
- i++;
- if (i >= m) break;
- }
- }
-
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
- LED_D_OFF();
- DbpString("DONE!");
+ uint8_t *dest = (uint8_t *)BigBuf;
+ //int m=0, i=0; //enio adjustment 12/10/14
+ uint32_t m=0, i=0;
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ m = sizeof(BigBuf);
+ // Clear destination buffer before sending the command
+ memset(dest, 128, m);
+ // Connect the A/D to the peak-detected low-frequency path.
+ SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+ // Now set up the SSC to get the ADC samples that are now streaming at us.
+ FpgaSetupSsc();
+
+ LED_D_ON();
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+ // Give it a bit of time for the resonant antenna to settle.
+ // And for the tag to fully power up
+ SpinDelay(150);
+
+ // Now start writting
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ SpinDelayUs(START_GAP);
+
+ // Opcode
+ T55xxWriteBit(1);
+ T55xxWriteBit(0); //Page 0
+ if (PwdMode == 1){
+ // Pwd
+ for (i = 0x80000000; i != 0; i >>= 1)
+ T55xxWriteBit(Pwd & i);
+ }
+ // Lock bit
+ T55xxWriteBit(0);
+ // Block
+ for (i = 0x04; i != 0; i >>= 1)
+ T55xxWriteBit(Block & i);
+
+ // Turn field on to read the response
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+ // Now do the acquisition
+ i = 0;
+ for(;;) {
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+ AT91C_BASE_SSC->SSC_THR = 0x43;
+ }
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
+ dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
+ // we don't care about actual value, only if it's more or less than a
+ // threshold essentially we capture zero crossings for later analysis
+ // if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
+ i++;
+ if (i >= m) break;
+ }
+ }
+
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+ LED_D_OFF();
+ DbpString("DONE!");
}
// Read card traceability data (page 1)
void T55xxReadTrace(void){
- uint8_t *dest = (uint8_t *)BigBuf;
- int m=0, i=0;
-
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- m = sizeof(BigBuf);
- // Clear destination buffer before sending the command
- memset(dest, 128, m);
- // Connect the A/D to the peak-detected low-frequency path.
- SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
- // Now set up the SSC to get the ADC samples that are now streaming at us.
- FpgaSetupSsc();
-
- LED_D_ON();
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
- // Give it a bit of time for the resonant antenna to settle.
- // And for the tag to fully power up
- SpinDelay(150);
-
- // Now start writting
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- SpinDelayUs(START_GAP);
-
- // Opcode
- T55xxWriteBit(1);
- T55xxWriteBit(1); //Page 1
-
- // Turn field on to read the response
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
- // Now do the acquisition
- i = 0;
- for(;;) {
- if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
- AT91C_BASE_SSC->SSC_THR = 0x43;
- }
- if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
- dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
- i++;
- if (i >= m) break;
- }
- }
-
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
- LED_D_OFF();
- DbpString("DONE!");
+ uint8_t *dest = (uint8_t *)BigBuf;
+ int m=0, i=0;
+
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ m = sizeof(BigBuf);
+ // Clear destination buffer before sending the command
+ memset(dest, 128, m);
+ // Connect the A/D to the peak-detected low-frequency path.
+ SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+ // Now set up the SSC to get the ADC samples that are now streaming at us.
+ FpgaSetupSsc();
+
+ LED_D_ON();
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+ // Give it a bit of time for the resonant antenna to settle.
+ // And for the tag to fully power up
+ SpinDelay(150);
+
+ // Now start writting
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ SpinDelayUs(START_GAP);
+
+ // Opcode
+ T55xxWriteBit(1);
+ T55xxWriteBit(1); //Page 1
+
+ // Turn field on to read the response
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+ // Now do the acquisition
+ i = 0;
+ for(;;) {
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+ AT91C_BASE_SSC->SSC_THR = 0x43;
+ }
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
+ dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
+ i++;
+ if (i >= m) break;
+ }
+ }
+
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+ LED_D_OFF();
+ DbpString("DONE!");
}
/*-------------- Cloning routines -----------*/
// Copy HID id to card and setup block 0 config
void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
{
- int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format
- int last_block = 0;
-
- if (longFMT){
- // Ensure no more than 84 bits supplied
- if (hi2>0xFFFFF) {
- DbpString("Tags can only have 84 bits.");
- return;
- }
- // Build the 6 data blocks for supplied 84bit ID
- last_block = 6;
- data1 = 0x1D96A900; // load preamble (1D) & long format identifier (9E manchester encoded)
- for (int i=0;i<4;i++) {
- if (hi2 & (1<<(19-i)))
- data1 |= (1<<(((3-i)*2)+1)); // 1 -> 10
- else
- data1 |= (1<<((3-i)*2)); // 0 -> 01
- }
-
- data2 = 0;
- for (int i=0;i<16;i++) {
- if (hi2 & (1<<(15-i)))
- data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
- else
- data2 |= (1<<((15-i)*2)); // 0 -> 01
- }
-
- data3 = 0;
- for (int i=0;i<16;i++) {
- if (hi & (1<<(31-i)))
- data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
- else
- data3 |= (1<<((15-i)*2)); // 0 -> 01
- }
-
- data4 = 0;
- for (int i=0;i<16;i++) {
- if (hi & (1<<(15-i)))
- data4 |= (1<<(((15-i)*2)+1)); // 1 -> 10
- else
- data4 |= (1<<((15-i)*2)); // 0 -> 01
+ int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format
+ int last_block = 0;
+
+ if (longFMT){
+ // Ensure no more than 84 bits supplied
+ if (hi2>0xFFFFF) {
+ DbpString("Tags can only have 84 bits.");
+ return;
+ }
+ // Build the 6 data blocks for supplied 84bit ID
+ last_block = 6;
+ data1 = 0x1D96A900; // load preamble (1D) & long format identifier (9E manchester encoded)
+ for (int i=0;i<4;i++) {
+ if (hi2 & (1<<(19-i)))
+ data1 |= (1<<(((3-i)*2)+1)); // 1 -> 10
+ else
+ data1 |= (1<<((3-i)*2)); // 0 -> 01
+ }
+
+ data2 = 0;
+ for (int i=0;i<16;i++) {
+ if (hi2 & (1<<(15-i)))
+ data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+ else
+ data2 |= (1<<((15-i)*2)); // 0 -> 01
+ }
+
+ data3 = 0;
+ for (int i=0;i<16;i++) {
+ if (hi & (1<<(31-i)))
+ data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+ else
+ data3 |= (1<<((15-i)*2)); // 0 -> 01
+ }
+
+ data4 = 0;
+ for (int i=0;i<16;i++) {
+ if (hi & (1<<(15-i)))
+ data4 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+ else
+ data4 |= (1<<((15-i)*2)); // 0 -> 01
+ }
+
+ data5 = 0;
+ for (int i=0;i<16;i++) {
+ if (lo & (1<<(31-i)))
+ data5 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+ else
+ data5 |= (1<<((15-i)*2)); // 0 -> 01
+ }
+
+ data6 = 0;
+ for (int i=0;i<16;i++) {
+ if (lo & (1<<(15-i)))
+ data6 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+ else
+ data6 |= (1<<((15-i)*2)); // 0 -> 01
+ }
}
-
- data5 = 0;
- for (int i=0;i<16;i++) {
- if (lo & (1<<(31-i)))
- data5 |= (1<<(((15-i)*2)+1)); // 1 -> 10
- else
- data5 |= (1<<((15-i)*2)); // 0 -> 01
- }
-
- data6 = 0;
- for (int i=0;i<16;i++) {
- if (lo & (1<<(15-i)))
- data6 |= (1<<(((15-i)*2)+1)); // 1 -> 10
- else
- data6 |= (1<<((15-i)*2)); // 0 -> 01
+ else {
+ // Ensure no more than 44 bits supplied
+ if (hi>0xFFF) {
+ DbpString("Tags can only have 44 bits.");
+ return;
+ }
+
+ // Build the 3 data blocks for supplied 44bit ID
+ last_block = 3;
+
+ data1 = 0x1D000000; // load preamble
+
+ for (int i=0;i<12;i++) {
+ if (hi & (1<<(11-i)))
+ data1 |= (1<<(((11-i)*2)+1)); // 1 -> 10
+ else
+ data1 |= (1<<((11-i)*2)); // 0 -> 01
+ }
+
+ data2 = 0;
+ for (int i=0;i<16;i++) {
+ if (lo & (1<<(31-i)))
+ data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+ else
+ data2 |= (1<<((15-i)*2)); // 0 -> 01
+ }
+
+ data3 = 0;
+ for (int i=0;i<16;i++) {
+ if (lo & (1<<(15-i)))
+ data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+ else
+ data3 |= (1<<((15-i)*2)); // 0 -> 01
+ }
}
- }
- else {
- // Ensure no more than 44 bits supplied
- if (hi>0xFFF) {
- DbpString("Tags can only have 44 bits.");
- return;
- }
-
- // Build the 3 data blocks for supplied 44bit ID
- last_block = 3;
-
- data1 = 0x1D000000; // load preamble
-
- for (int i=0;i<12;i++) {
- if (hi & (1<<(11-i)))
- data1 |= (1<<(((11-i)*2)+1)); // 1 -> 10
- else
- data1 |= (1<<((11-i)*2)); // 0 -> 01
+
+ LED_D_ON();
+ // Program the data blocks for supplied ID
+ // and the block 0 for HID format
+ T55xxWriteBlock(data1,1,0,0);
+ T55xxWriteBlock(data2,2,0,0);
+ T55xxWriteBlock(data3,3,0,0);
+
+ if (longFMT) { // if long format there are 6 blocks
+ T55xxWriteBlock(data4,4,0,0);
+ T55xxWriteBlock(data5,5,0,0);
+ T55xxWriteBlock(data6,6,0,0);
}
-
- data2 = 0;
- for (int i=0;i<16;i++) {
- if (lo & (1<<(31-i)))
- data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
- else
- data2 |= (1<<((15-i)*2)); // 0 -> 01
- }
-
- data3 = 0;
- for (int i=0;i<16;i++) {
- if (lo & (1<<(15-i)))
- data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
- else
- data3 |= (1<<((15-i)*2)); // 0 -> 01
- }
- }
-
- LED_D_ON();
- // Program the data blocks for supplied ID
- // and the block 0 for HID format
- T55xxWriteBlock(data1,1,0,0);
- T55xxWriteBlock(data2,2,0,0);
- T55xxWriteBlock(data3,3,0,0);
-
- if (longFMT) { // if long format there are 6 blocks
- T55xxWriteBlock(data4,4,0,0);
- T55xxWriteBlock(data5,5,0,0);
- T55xxWriteBlock(data6,6,0,0);
- }
-
- // Config for HID (RF/50, FSK2a, Maxblock=3 for short/6 for long)
- T55xxWriteBlock(T55x7_BITRATE_RF_50 |
- T55x7_MODULATION_FSK2a |
- last_block << T55x7_MAXBLOCK_SHIFT,
- 0,0,0);
-
- LED_D_OFF();
-
- DbpString("DONE!");
+
+ // Config for HID (RF/50, FSK2a, Maxblock=3 for short/6 for long)
+ T55xxWriteBlock(T55x7_BITRATE_RF_50 |
+ T55x7_MODULATION_FSK2a |
+ last_block << T55x7_MAXBLOCK_SHIFT,
+ 0,0,0);
+
+ LED_D_OFF();
+
+ DbpString("DONE!");
}
void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT)
{
- int data1=0, data2=0; //up to six blocks for long format
-
+ int data1=0, data2=0; //up to six blocks for long format
+
data1 = hi; // load preamble
data2 = lo;
// and the block 0 for HID format
T55xxWriteBlock(data1,1,0,0);
T55xxWriteBlock(data2,2,0,0);
-
+
//Config Block
T55xxWriteBlock(0x00147040,0,0,0);
LED_D_OFF();
-
+
DbpString("DONE!");
}
void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
{
- int i, id_bit;
- uint64_t id = EM410X_HEADER;
- uint64_t rev_id = 0; // reversed ID
- int c_parity[4]; // column parity
- int r_parity = 0; // row parity
- uint32_t clock = 0;
-
- // Reverse ID bits given as parameter (for simpler operations)
- for (i = 0; i < EM410X_ID_LENGTH; ++i) {
- if (i < 32) {
- rev_id = (rev_id << 1) | (id_lo & 1);
- id_lo >>= 1;
- } else {
- rev_id = (rev_id << 1) | (id_hi & 1);
- id_hi >>= 1;
- }
- }
-
- for (i = 0; i < EM410X_ID_LENGTH; ++i) {
- id_bit = rev_id & 1;
-
- if (i % 4 == 0) {
- // Don't write row parity bit at start of parsing
- if (i)
- id = (id << 1) | r_parity;
- // Start counting parity for new row
- r_parity = id_bit;
- } else {
- // Count row parity
- r_parity ^= id_bit;
- }
-
- // First elements in column?
- if (i < 4)
- // Fill out first elements
- c_parity[i] = id_bit;
- else
- // Count column parity
- c_parity[i % 4] ^= id_bit;
-
- // Insert ID bit
- id = (id << 1) | id_bit;
- rev_id >>= 1;
- }
-
- // Insert parity bit of last row
- id = (id << 1) | r_parity;
-
- // Fill out column parity at the end of tag
- for (i = 0; i < 4; ++i)
- id = (id << 1) | c_parity[i];
-
- // Add stop bit
- id <<= 1;
-
- Dbprintf("Started writing %s tag ...", card ? "T55x7":"T5555");
- LED_D_ON();
-
- // Write EM410x ID
- T55xxWriteBlock((uint32_t)(id >> 32), 1, 0, 0);
- T55xxWriteBlock((uint32_t)id, 2, 0, 0);
-
- // Config for EM410x (RF/64, Manchester, Maxblock=2)
- if (card) {
- // Clock rate is stored in bits 8-15 of the card value
- clock = (card & 0xFF00) >> 8;
- Dbprintf("Clock rate: %d", clock);
- switch (clock)
- {
- case 32:
- clock = T55x7_BITRATE_RF_32;
- break;
- case 16:
- clock = T55x7_BITRATE_RF_16;
- break;
- case 0:
- // A value of 0 is assumed to be 64 for backwards-compatibility
- // Fall through...
- case 64:
- clock = T55x7_BITRATE_RF_64;
- break;
- default:
- Dbprintf("Invalid clock rate: %d", clock);
- return;
- }
-
- // Writing configuration for T55x7 tag
- T55xxWriteBlock(clock |
- T55x7_MODULATION_MANCHESTER |
- 2 << T55x7_MAXBLOCK_SHIFT,
- 0, 0, 0);
- }
- else
- // Writing configuration for T5555(Q5) tag
- T55xxWriteBlock(0x1F << T5555_BITRATE_SHIFT |
- T5555_MODULATION_MANCHESTER |
- 2 << T5555_MAXBLOCK_SHIFT,
- 0, 0, 0);
-
- LED_D_OFF();
- Dbprintf("Tag %s written with 0x%08x%08x\n", card ? "T55x7":"T5555",
- (uint32_t)(id >> 32), (uint32_t)id);
+ int i, id_bit;
+ uint64_t id = EM410X_HEADER;
+ uint64_t rev_id = 0; // reversed ID
+ int c_parity[4]; // column parity
+ int r_parity = 0; // row parity
+ uint32_t clock = 0;
+
+ // Reverse ID bits given as parameter (for simpler operations)
+ for (i = 0; i < EM410X_ID_LENGTH; ++i) {
+ if (i < 32) {
+ rev_id = (rev_id << 1) | (id_lo & 1);
+ id_lo >>= 1;
+ } else {
+ rev_id = (rev_id << 1) | (id_hi & 1);
+ id_hi >>= 1;
+ }
+ }
+
+ for (i = 0; i < EM410X_ID_LENGTH; ++i) {
+ id_bit = rev_id & 1;
+
+ if (i % 4 == 0) {
+ // Don't write row parity bit at start of parsing
+ if (i)
+ id = (id << 1) | r_parity;
+ // Start counting parity for new row
+ r_parity = id_bit;
+ } else {
+ // Count row parity
+ r_parity ^= id_bit;
+ }
+
+ // First elements in column?
+ if (i < 4)
+ // Fill out first elements
+ c_parity[i] = id_bit;
+ else
+ // Count column parity
+ c_parity[i % 4] ^= id_bit;
+
+ // Insert ID bit
+ id = (id << 1) | id_bit;
+ rev_id >>= 1;
+ }
+
+ // Insert parity bit of last row
+ id = (id << 1) | r_parity;
+
+ // Fill out column parity at the end of tag
+ for (i = 0; i < 4; ++i)
+ id = (id << 1) | c_parity[i];
+
+ // Add stop bit
+ id <<= 1;
+
+ Dbprintf("Started writing %s tag ...", card ? "T55x7":"T5555");
+ LED_D_ON();
+
+ // Write EM410x ID
+ T55xxWriteBlock((uint32_t)(id >> 32), 1, 0, 0);
+ T55xxWriteBlock((uint32_t)id, 2, 0, 0);
+
+ // Config for EM410x (RF/64, Manchester, Maxblock=2)
+ if (card) {
+ // Clock rate is stored in bits 8-15 of the card value
+ clock = (card & 0xFF00) >> 8;
+ Dbprintf("Clock rate: %d", clock);
+ switch (clock)
+ {
+ case 32:
+ clock = T55x7_BITRATE_RF_32;
+ break;
+ case 16:
+ clock = T55x7_BITRATE_RF_16;
+ break;
+ case 0:
+ // A value of 0 is assumed to be 64 for backwards-compatibility
+ // Fall through...
+ case 64:
+ clock = T55x7_BITRATE_RF_64;
+ break;
+ default:
+ Dbprintf("Invalid clock rate: %d", clock);
+ return;
+ }
+
+ // Writing configuration for T55x7 tag
+ T55xxWriteBlock(clock |
+ T55x7_MODULATION_MANCHESTER |
+ 2 << T55x7_MAXBLOCK_SHIFT,
+ 0, 0, 0);
+ }
+ else
+ // Writing configuration for T5555(Q5) tag
+ T55xxWriteBlock(0x1F << T5555_BITRATE_SHIFT |
+ T5555_MODULATION_MANCHESTER |
+ 2 << T5555_MAXBLOCK_SHIFT,
+ 0, 0, 0);
+
+ LED_D_OFF();
+ Dbprintf("Tag %s written with 0x%08x%08x\n", card ? "T55x7":"T5555",
+ (uint32_t)(id >> 32), (uint32_t)id);
}
// Clone Indala 64-bit tag by UID to T55x7
void CopyIndala64toT55x7(int hi, int lo)
{
- //Program the 2 data blocks for supplied 64bit UID
- // and the block 0 for Indala64 format
- T55xxWriteBlock(hi,1,0,0);
- T55xxWriteBlock(lo,2,0,0);
- //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=2)
- T55xxWriteBlock(T55x7_BITRATE_RF_32 |
- T55x7_MODULATION_PSK1 |
- 2 << T55x7_MAXBLOCK_SHIFT,
- 0, 0, 0);
- //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
-// T5567WriteBlock(0x603E1042,0);
+ //Program the 2 data blocks for supplied 64bit UID
+ // and the block 0 for Indala64 format
+ T55xxWriteBlock(hi,1,0,0);
+ T55xxWriteBlock(lo,2,0,0);
+ //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=2)
+ T55xxWriteBlock(T55x7_BITRATE_RF_32 |
+ T55x7_MODULATION_PSK1 |
+ 2 << T55x7_MAXBLOCK_SHIFT,
+ 0, 0, 0);
+ //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
+ // T5567WriteBlock(0x603E1042,0);
- DbpString("DONE!");
+ DbpString("DONE!");
}
void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int uid6, int uid7)
{
- //Program the 7 data blocks for supplied 224bit UID
- // and the block 0 for Indala224 format
- T55xxWriteBlock(uid1,1,0,0);
- T55xxWriteBlock(uid2,2,0,0);
- T55xxWriteBlock(uid3,3,0,0);
- T55xxWriteBlock(uid4,4,0,0);
- T55xxWriteBlock(uid5,5,0,0);
- T55xxWriteBlock(uid6,6,0,0);
- T55xxWriteBlock(uid7,7,0,0);
- //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
- T55xxWriteBlock(T55x7_BITRATE_RF_32 |
- T55x7_MODULATION_PSK1 |
- 7 << T55x7_MAXBLOCK_SHIFT,
- 0,0,0);
- //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
-// T5567WriteBlock(0x603E10E2,0);
-
- DbpString("DONE!");
+ //Program the 7 data blocks for supplied 224bit UID
+ // and the block 0 for Indala224 format
+ T55xxWriteBlock(uid1,1,0,0);
+ T55xxWriteBlock(uid2,2,0,0);
+ T55xxWriteBlock(uid3,3,0,0);
+ T55xxWriteBlock(uid4,4,0,0);
+ T55xxWriteBlock(uid5,5,0,0);
+ T55xxWriteBlock(uid6,6,0,0);
+ T55xxWriteBlock(uid7,7,0,0);
+ //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
+ T55xxWriteBlock(T55x7_BITRATE_RF_32 |
+ T55x7_MODULATION_PSK1 |
+ 7 << T55x7_MAXBLOCK_SHIFT,
+ 0,0,0);
+ //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
+ // T5567WriteBlock(0x603E10E2,0);
+
+ DbpString("DONE!");
}
#define max(x,y) ( x<y ? y:x)
int DemodPCF7931(uint8_t **outBlocks) {
- uint8_t BitStream[256];
- uint8_t Blocks[8][16];
- uint8_t *GraphBuffer = (uint8_t *)BigBuf;
- int GraphTraceLen = sizeof(BigBuf);
- int i, j, lastval, bitidx, half_switch;
- int clock = 64;
- int tolerance = clock / 8;
- int pmc, block_done;
- int lc, warnings = 0;
- int num_blocks = 0;
- int lmin=128, lmax=128;
- uint8_t dir;
-
- AcquireRawAdcSamples125k(0);
-
- lmin = 64;
- lmax = 192;
-
- i = 2;
-
- /* Find first local max/min */
- if(GraphBuffer[1] > GraphBuffer[0]) {
- while(i < GraphTraceLen) {
- if( !(GraphBuffer[i] > GraphBuffer[i-1]) && GraphBuffer[i] > lmax)
- break;
- i++;
+ uint8_t BitStream[256];
+ uint8_t Blocks[8][16];
+ uint8_t *GraphBuffer = (uint8_t *)BigBuf;
+ int GraphTraceLen = sizeof(BigBuf);
+ int i, j, lastval, bitidx, half_switch;
+ int clock = 64;
+ int tolerance = clock / 8;
+ int pmc, block_done;
+ int lc, warnings = 0;
+ int num_blocks = 0;
+ int lmin=128, lmax=128;
+ uint8_t dir;
+
+ AcquireRawAdcSamples125k(0);
+
+ lmin = 64;
+ lmax = 192;
+
+ i = 2;
+
+ /* Find first local max/min */
+ if(GraphBuffer[1] > GraphBuffer[0]) {
+ while(i < GraphTraceLen) {
+ if( !(GraphBuffer[i] > GraphBuffer[i-1]) && GraphBuffer[i] > lmax)
+ break;
+ i++;
+ }
+ dir = 0;
}
- dir = 0;
- }
- else {
- while(i < GraphTraceLen) {
- if( !(GraphBuffer[i] < GraphBuffer[i-1]) && GraphBuffer[i] < lmin)
- break;
- i++;
+ else {
+ while(i < GraphTraceLen) {
+ if( !(GraphBuffer[i] < GraphBuffer[i-1]) && GraphBuffer[i] < lmin)
+ break;
+ i++;
+ }
+ dir = 1;
}
- dir = 1;
- }
-
- lastval = i++;
- half_switch = 0;
- pmc = 0;
- block_done = 0;
-
- for (bitidx = 0; i < GraphTraceLen; i++)
- {
- if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
- {
- lc = i - lastval;
- lastval = i;
-
- // Switch depending on lc length:
- // Tolerance is 1/8 of clock rate (arbitrary)
- if (abs(lc-clock/4) < tolerance) {
- // 16T0
- if((i - pmc) == lc) { /* 16T0 was previous one */
- /* It's a PMC ! */
- i += (128+127+16+32+33+16)-1;
- lastval = i;
- pmc = 0;
- block_done = 1;
- }
- else {
- pmc = i;
- }
- } else if (abs(lc-clock/2) < tolerance) {
- // 32TO
- if((i - pmc) == lc) { /* 16T0 was previous one */
- /* It's a PMC ! */
- i += (128+127+16+32+33)-1;
- lastval = i;
- pmc = 0;
- block_done = 1;
- }
- else if(half_switch == 1) {
- BitStream[bitidx++] = 0;
- half_switch = 0;
- }
- else
- half_switch++;
- } else if (abs(lc-clock) < tolerance) {
- // 64TO
- BitStream[bitidx++] = 1;
- } else {
- // Error
- warnings++;
- if (warnings > 10)
- {
- Dbprintf("Error: too many detection errors, aborting.");
- return 0;
- }
- }
-
- if(block_done == 1) {
- if(bitidx == 128) {
- for(j=0; j<16; j++) {
- Blocks[num_blocks][j] = 128*BitStream[j*8+7]+
- 64*BitStream[j*8+6]+
- 32*BitStream[j*8+5]+
- 16*BitStream[j*8+4]+
- 8*BitStream[j*8+3]+
- 4*BitStream[j*8+2]+
- 2*BitStream[j*8+1]+
- BitStream[j*8];
- }
- num_blocks++;
- }
- bitidx = 0;
- block_done = 0;
- half_switch = 0;
- }
- if(i < GraphTraceLen)
- {
- if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
- else dir = 1;
- }
- }
- if(bitidx==255)
- bitidx=0;
- warnings = 0;
- if(num_blocks == 4) break;
- }
- memcpy(outBlocks, Blocks, 16*num_blocks);
- return num_blocks;
+
+ lastval = i++;
+ half_switch = 0;
+ pmc = 0;
+ block_done = 0;
+
+ for (bitidx = 0; i < GraphTraceLen; i++)
+ {
+ if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
+ {
+ lc = i - lastval;
+ lastval = i;
+
+ // Switch depending on lc length:
+ // Tolerance is 1/8 of clock rate (arbitrary)
+ if (abs(lc-clock/4) < tolerance) {
+ // 16T0
+ if((i - pmc) == lc) { /* 16T0 was previous one */
+ /* It's a PMC ! */
+ i += (128+127+16+32+33+16)-1;
+ lastval = i;
+ pmc = 0;
+ block_done = 1;
+ }
+ else {
+ pmc = i;
+ }
+ } else if (abs(lc-clock/2) < tolerance) {
+ // 32TO
+ if((i - pmc) == lc) { /* 16T0 was previous one */
+ /* It's a PMC ! */
+ i += (128+127+16+32+33)-1;
+ lastval = i;
+ pmc = 0;
+ block_done = 1;
+ }
+ else if(half_switch == 1) {
+ BitStream[bitidx++] = 0;
+ half_switch = 0;
+ }
+ else
+ half_switch++;
+ } else if (abs(lc-clock) < tolerance) {
+ // 64TO
+ BitStream[bitidx++] = 1;
+ } else {
+ // Error
+ warnings++;
+ if (warnings > 10)
+ {
+ Dbprintf("Error: too many detection errors, aborting.");
+ return 0;
+ }
+ }
+
+ if(block_done == 1) {
+ if(bitidx == 128) {
+ for(j=0; j<16; j++) {
+ Blocks[num_blocks][j] = 128*BitStream[j*8+7]+
+ 64*BitStream[j*8+6]+
+ 32*BitStream[j*8+5]+
+ 16*BitStream[j*8+4]+
+ 8*BitStream[j*8+3]+
+ 4*BitStream[j*8+2]+
+ 2*BitStream[j*8+1]+
+ BitStream[j*8];
+ }
+ num_blocks++;
+ }
+ bitidx = 0;
+ block_done = 0;
+ half_switch = 0;
+ }
+ if(i < GraphTraceLen)
+ {
+ if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
+ else dir = 1;
+ }
+ }
+ if(bitidx==255)
+ bitidx=0;
+ warnings = 0;
+ if(num_blocks == 4) break;
+ }
+ memcpy(outBlocks, Blocks, 16*num_blocks);
+ return num_blocks;
}
int IsBlock0PCF7931(uint8_t *Block) {
- // Assume RFU means 0 :)
- if((memcmp(Block, "\x00\x00\x00\x00\x00\x00\x00\x01", 8) == 0) && memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) // PAC enabled
- return 1;
- if((memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) && Block[7] == 0) // PAC disabled, can it *really* happen ?
- return 1;
- return 0;
+ // Assume RFU means 0 :)
+ if((memcmp(Block, "\x00\x00\x00\x00\x00\x00\x00\x01", 8) == 0) && memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) // PAC enabled
+ return 1;
+ if((memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) && Block[7] == 0) // PAC disabled, can it *really* happen ?
+ return 1;
+ return 0;
}
int IsBlock1PCF7931(uint8_t *Block) {
- // Assume RFU means 0 :)
- if(Block[10] == 0 && Block[11] == 0 && Block[12] == 0 && Block[13] == 0)
- if((Block[14] & 0x7f) <= 9 && Block[15] <= 9)
- return 1;
-
- return 0;
+ // Assume RFU means 0 :)
+ if(Block[10] == 0 && Block[11] == 0 && Block[12] == 0 && Block[13] == 0)
+ if((Block[14] & 0x7f) <= 9 && Block[15] <= 9)
+ return 1;
+
+ return 0;
}
#define ALLOC 16
void ReadPCF7931() {
- uint8_t Blocks[8][17];
- uint8_t tmpBlocks[4][16];
- int i, j, ind, ind2, n;
- int num_blocks = 0;
- int max_blocks = 8;
- int ident = 0;
- int error = 0;
- int tries = 0;
-
- memset(Blocks, 0, 8*17*sizeof(uint8_t));
-
- do {
- memset(tmpBlocks, 0, 4*16*sizeof(uint8_t));
- n = DemodPCF7931((uint8_t**)tmpBlocks);
- if(!n)
- error++;
- if(error==10 && num_blocks == 0) {
- Dbprintf("Error, no tag or bad tag");
- return;
- }
- else if (tries==20 || error==10) {
- Dbprintf("Error reading the tag");
- Dbprintf("Here is the partial content");
- goto end;
- }
-
- for(i=0; i<n; i++)
- Dbprintf("(dbg) %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
- tmpBlocks[i][0], tmpBlocks[i][1], tmpBlocks[i][2], tmpBlocks[i][3], tmpBlocks[i][4], tmpBlocks[i][5], tmpBlocks[i][6], tmpBlocks[i][7],
- tmpBlocks[i][8], tmpBlocks[i][9], tmpBlocks[i][10], tmpBlocks[i][11], tmpBlocks[i][12], tmpBlocks[i][13], tmpBlocks[i][14], tmpBlocks[i][15]);
- if(!ident) {
- for(i=0; i<n; i++) {
- if(IsBlock0PCF7931(tmpBlocks[i])) {
- // Found block 0 ?
- if(i < n-1 && IsBlock1PCF7931(tmpBlocks[i+1])) {
- // Found block 1!
- // \o/
- ident = 1;
- memcpy(Blocks[0], tmpBlocks[i], 16);
- Blocks[0][ALLOC] = 1;
- memcpy(Blocks[1], tmpBlocks[i+1], 16);
- Blocks[1][ALLOC] = 1;
- max_blocks = max((Blocks[1][14] & 0x7f), Blocks[1][15]) + 1;
- // Debug print
- Dbprintf("(dbg) Max blocks: %d", max_blocks);
- num_blocks = 2;
- // Handle following blocks
- for(j=i+2, ind2=2; j!=i; j++, ind2++, num_blocks++) {
- if(j==n) j=0;
- if(j==i) break;
- memcpy(Blocks[ind2], tmpBlocks[j], 16);
- Blocks[ind2][ALLOC] = 1;
- }
- break;
- }
+ uint8_t Blocks[8][17];
+ uint8_t tmpBlocks[4][16];
+ int i, j, ind, ind2, n;
+ int num_blocks = 0;
+ int max_blocks = 8;
+ int ident = 0;
+ int error = 0;
+ int tries = 0;
+
+ memset(Blocks, 0, 8*17*sizeof(uint8_t));
+
+ do {
+ memset(tmpBlocks, 0, 4*16*sizeof(uint8_t));
+ n = DemodPCF7931((uint8_t**)tmpBlocks);
+ if(!n)
+ error++;
+ if(error==10 && num_blocks == 0) {
+ Dbprintf("Error, no tag or bad tag");
+ return;
}
- }
- }
- else {
- for(i=0; i<n; i++) { // Look for identical block in known blocks
- if(memcmp(tmpBlocks[i], "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 16)) { // Block is not full of 00
- for(j=0; j<max_blocks; j++) {
- if(Blocks[j][ALLOC] == 1 && !memcmp(tmpBlocks[i], Blocks[j], 16)) {
- // Found an identical block
- for(ind=i-1,ind2=j-1; ind >= 0; ind--,ind2--) {
- if(ind2 < 0)
- ind2 = max_blocks;
- if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
- // Dbprintf("Tmp %d -> Block %d", ind, ind2);
- memcpy(Blocks[ind2], tmpBlocks[ind], 16);
- Blocks[ind2][ALLOC] = 1;
- num_blocks++;
- if(num_blocks == max_blocks) goto end;
+ else if (tries==20 || error==10) {
+ Dbprintf("Error reading the tag");
+ Dbprintf("Here is the partial content");
+ goto end;
+ }
+
+ for(i=0; i<n; i++)
+ Dbprintf("(dbg) %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+ tmpBlocks[i][0], tmpBlocks[i][1], tmpBlocks[i][2], tmpBlocks[i][3], tmpBlocks[i][4], tmpBlocks[i][5], tmpBlocks[i][6], tmpBlocks[i][7],
+ tmpBlocks[i][8], tmpBlocks[i][9], tmpBlocks[i][10], tmpBlocks[i][11], tmpBlocks[i][12], tmpBlocks[i][13], tmpBlocks[i][14], tmpBlocks[i][15]);
+ if(!ident) {
+ for(i=0; i<n; i++) {
+ if(IsBlock0PCF7931(tmpBlocks[i])) {
+ // Found block 0 ?
+ if(i < n-1 && IsBlock1PCF7931(tmpBlocks[i+1])) {
+ // Found block 1!
+ // \o/
+ ident = 1;
+ memcpy(Blocks[0], tmpBlocks[i], 16);
+ Blocks[0][ALLOC] = 1;
+ memcpy(Blocks[1], tmpBlocks[i+1], 16);
+ Blocks[1][ALLOC] = 1;
+ max_blocks = max((Blocks[1][14] & 0x7f), Blocks[1][15]) + 1;
+ // Debug print
+ Dbprintf("(dbg) Max blocks: %d", max_blocks);
+ num_blocks = 2;
+ // Handle following blocks
+ for(j=i+2, ind2=2; j!=i; j++, ind2++, num_blocks++) {
+ if(j==n) j=0;
+ if(j==i) break;
+ memcpy(Blocks[ind2], tmpBlocks[j], 16);
+ Blocks[ind2][ALLOC] = 1;
+ }
+ break;
+ }
}
- }
- for(ind=i+1,ind2=j+1; ind < n; ind++,ind2++) {
- if(ind2 > max_blocks)
- ind2 = 0;
- if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
- // Dbprintf("Tmp %d -> Block %d", ind, ind2);
- memcpy(Blocks[ind2], tmpBlocks[ind], 16);
- Blocks[ind2][ALLOC] = 1;
- num_blocks++;
- if(num_blocks == max_blocks) goto end;
+ }
+ }
+ else {
+ for(i=0; i<n; i++) { // Look for identical block in known blocks
+ if(memcmp(tmpBlocks[i], "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 16)) { // Block is not full of 00
+ for(j=0; j<max_blocks; j++) {
+ if(Blocks[j][ALLOC] == 1 && !memcmp(tmpBlocks[i], Blocks[j], 16)) {
+ // Found an identical block
+ for(ind=i-1,ind2=j-1; ind >= 0; ind--,ind2--) {
+ if(ind2 < 0)
+ ind2 = max_blocks;
+ if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
+ // Dbprintf("Tmp %d -> Block %d", ind, ind2);
+ memcpy(Blocks[ind2], tmpBlocks[ind], 16);
+ Blocks[ind2][ALLOC] = 1;
+ num_blocks++;
+ if(num_blocks == max_blocks) goto end;
+ }
+ }
+ for(ind=i+1,ind2=j+1; ind < n; ind++,ind2++) {
+ if(ind2 > max_blocks)
+ ind2 = 0;
+ if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
+ // Dbprintf("Tmp %d -> Block %d", ind, ind2);
+ memcpy(Blocks[ind2], tmpBlocks[ind], 16);
+ Blocks[ind2][ALLOC] = 1;
+ num_blocks++;
+ if(num_blocks == max_blocks) goto end;
+ }
+ }
+ }
+ }
}
- }
}
- }
}
- }
- }
- tries++;
- if (BUTTON_PRESS()) return;
- } while (num_blocks != max_blocks);
+ tries++;
+ if (BUTTON_PRESS()) return;
+ } while (num_blocks != max_blocks);
end:
- Dbprintf("-----------------------------------------");
- Dbprintf("Memory content:");
- Dbprintf("-----------------------------------------");
- for(i=0; i<max_blocks; i++) {
- if(Blocks[i][ALLOC]==1)
- Dbprintf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
- Blocks[i][0], Blocks[i][1], Blocks[i][2], Blocks[i][3], Blocks[i][4], Blocks[i][5], Blocks[i][6], Blocks[i][7],
- Blocks[i][8], Blocks[i][9], Blocks[i][10], Blocks[i][11], Blocks[i][12], Blocks[i][13], Blocks[i][14], Blocks[i][15]);
- else
- Dbprintf("<missing block %d>", i);
- }
- Dbprintf("-----------------------------------------");
-
- return ;
+ Dbprintf("-----------------------------------------");
+ Dbprintf("Memory content:");
+ Dbprintf("-----------------------------------------");
+ for(i=0; i<max_blocks; i++) {
+ if(Blocks[i][ALLOC]==1)
+ Dbprintf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+ Blocks[i][0], Blocks[i][1], Blocks[i][2], Blocks[i][3], Blocks[i][4], Blocks[i][5], Blocks[i][6], Blocks[i][7],
+ Blocks[i][8], Blocks[i][9], Blocks[i][10], Blocks[i][11], Blocks[i][12], Blocks[i][13], Blocks[i][14], Blocks[i][15]);
+ else
+ Dbprintf("<missing block %d>", i);
+ }
+ Dbprintf("-----------------------------------------");
+
+ return ;
}
//====================================================================
//--------------------------------------------------------------------
uint8_t Prepare_Cmd( uint8_t cmd ) {
- //--------------------------------------------------------------------
-
- *forward_ptr++ = 0; //start bit
- *forward_ptr++ = 0; //second pause for 4050 code
-
- *forward_ptr++ = cmd;
- cmd >>= 1;
- *forward_ptr++ = cmd;
- cmd >>= 1;
- *forward_ptr++ = cmd;
- cmd >>= 1;
- *forward_ptr++ = cmd;
-
- return 6; //return number of emited bits
+ //--------------------------------------------------------------------
+
+ *forward_ptr++ = 0; //start bit
+ *forward_ptr++ = 0; //second pause for 4050 code
+
+ *forward_ptr++ = cmd;
+ cmd >>= 1;
+ *forward_ptr++ = cmd;
+ cmd >>= 1;
+ *forward_ptr++ = cmd;
+ cmd >>= 1;
+ *forward_ptr++ = cmd;
+
+ return 6; //return number of emited bits
}
//====================================================================
//--------------------------------------------------------------------
uint8_t Prepare_Addr( uint8_t addr ) {
- //--------------------------------------------------------------------
-
- register uint8_t line_parity;
-
- uint8_t i;
- line_parity = 0;
- for(i=0;i<6;i++) {
- *forward_ptr++ = addr;
- line_parity ^= addr;
- addr >>= 1;
- }
-
- *forward_ptr++ = (line_parity & 1);
-
- return 7; //return number of emited bits
+ //--------------------------------------------------------------------
+
+ register uint8_t line_parity;
+
+ uint8_t i;
+ line_parity = 0;
+ for(i=0;i<6;i++) {
+ *forward_ptr++ = addr;
+ line_parity ^= addr;
+ addr >>= 1;
+ }
+
+ *forward_ptr++ = (line_parity & 1);
+
+ return 7; //return number of emited bits
}
//====================================================================
//--------------------------------------------------------------------
uint8_t Prepare_Data( uint16_t data_low, uint16_t data_hi) {
- //--------------------------------------------------------------------
-
- register uint8_t line_parity;
- register uint8_t column_parity;
- register uint8_t i, j;
- register uint16_t data;
-
- data = data_low;
- column_parity = 0;
-
- for(i=0; i<4; i++) {
- line_parity = 0;
+ //--------------------------------------------------------------------
+
+ register uint8_t line_parity;
+ register uint8_t column_parity;
+ register uint8_t i, j;
+ register uint16_t data;
+
+ data = data_low;
+ column_parity = 0;
+
+ for(i=0; i<4; i++) {
+ line_parity = 0;
+ for(j=0; j<8; j++) {
+ line_parity ^= data;
+ column_parity ^= (data & 1) << j;
+ *forward_ptr++ = data;
+ data >>= 1;
+ }
+ *forward_ptr++ = line_parity;
+ if(i == 1)
+ data = data_hi;
+ }
+
for(j=0; j<8; j++) {
- line_parity ^= data;
- column_parity ^= (data & 1) << j;
- *forward_ptr++ = data;
- data >>= 1;
+ *forward_ptr++ = column_parity;
+ column_parity >>= 1;
}
- *forward_ptr++ = line_parity;
- if(i == 1)
- data = data_hi;
- }
-
- for(j=0; j<8; j++) {
- *forward_ptr++ = column_parity;
- column_parity >>= 1;
- }
- *forward_ptr = 0;
-
- return 45; //return number of emited bits
+ *forward_ptr = 0;
+
+ return 45; //return number of emited bits
}
//====================================================================
// fwd_bit_count set with number of bits to be sent
//====================================================================
void SendForward(uint8_t fwd_bit_count) {
-
- fwd_write_ptr = forwardLink_data;
- fwd_bit_sz = fwd_bit_count;
-
- LED_D_ON();
-
- //Field on
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
- // Give it a bit of time for the resonant antenna to settle.
- // And for the tag to fully power up
- SpinDelay(150);
-
- // force 1st mod pulse (start gap must be longer for 4305)
- fwd_bit_sz--; //prepare next bit modulation
- fwd_write_ptr++;
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
- SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
- SpinDelayUs(16*8); //16 cycles on (8us each)
-
- // now start writting
- while(fwd_bit_sz-- > 0) { //prepare next bit modulation
- if(((*fwd_write_ptr++) & 1) == 1)
- SpinDelayUs(32*8); //32 cycles at 125Khz (8us each)
- else {
- //These timings work for 4469/4269/4305 (with the 55*8 above)
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
- SpinDelayUs(23*8); //16-4 cycles off (8us each)
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
- SpinDelayUs(9*8); //16 cycles on (8us each)
+
+ fwd_write_ptr = forwardLink_data;
+ fwd_bit_sz = fwd_bit_count;
+
+ LED_D_ON();
+
+ //Field on
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+ // Give it a bit of time for the resonant antenna to settle.
+ // And for the tag to fully power up
+ SpinDelay(150);
+
+ // force 1st mod pulse (start gap must be longer for 4305)
+ fwd_bit_sz--; //prepare next bit modulation
+ fwd_write_ptr++;
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+ SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
+ SpinDelayUs(16*8); //16 cycles on (8us each)
+
+ // now start writting
+ while(fwd_bit_sz-- > 0) { //prepare next bit modulation
+ if(((*fwd_write_ptr++) & 1) == 1)
+ SpinDelayUs(32*8); //32 cycles at 125Khz (8us each)
+ else {
+ //These timings work for 4469/4269/4305 (with the 55*8 above)
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+ SpinDelayUs(23*8); //16-4 cycles off (8us each)
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
+ SpinDelayUs(9*8); //16 cycles on (8us each)
+ }
}
- }
}
void EM4xLogin(uint32_t Password) {
-
- uint8_t fwd_bit_count;
-
- forward_ptr = forwardLink_data;
- fwd_bit_count = Prepare_Cmd( FWD_CMD_LOGIN );
- fwd_bit_count += Prepare_Data( Password&0xFFFF, Password>>16 );
-
- SendForward(fwd_bit_count);
-
- //Wait for command to complete
- SpinDelay(20);
-
+
+ uint8_t fwd_bit_count;
+
+ forward_ptr = forwardLink_data;
+ fwd_bit_count = Prepare_Cmd( FWD_CMD_LOGIN );
+ fwd_bit_count += Prepare_Data( Password&0xFFFF, Password>>16 );
+
+ SendForward(fwd_bit_count);
+
+ //Wait for command to complete
+ SpinDelay(20);
+
}
void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
-
- uint8_t fwd_bit_count;
- uint8_t *dest = (uint8_t *)BigBuf;
- int m=0, i=0;
-
- //If password mode do login
- if (PwdMode == 1) EM4xLogin(Pwd);
-
- forward_ptr = forwardLink_data;
- fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
- fwd_bit_count += Prepare_Addr( Address );
-
- m = sizeof(BigBuf);
- // Clear destination buffer before sending the command
- memset(dest, 128, m);
- // Connect the A/D to the peak-detected low-frequency path.
- SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
- // Now set up the SSC to get the ADC samples that are now streaming at us.
- FpgaSetupSsc();
-
- SendForward(fwd_bit_count);
-
- // Now do the acquisition
- i = 0;
- for(;;) {
- if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
- AT91C_BASE_SSC->SSC_THR = 0x43;
- }
- if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
- dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
- i++;
- if (i >= m) break;
+
+ uint8_t fwd_bit_count;
+ uint8_t *dest = (uint8_t *)BigBuf;
+ int m=0, i=0;
+
+ //If password mode do login
+ if (PwdMode == 1) EM4xLogin(Pwd);
+
+ forward_ptr = forwardLink_data;
+ fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
+ fwd_bit_count += Prepare_Addr( Address );
+
+ m = sizeof(BigBuf);
+ // Clear destination buffer before sending the command
+ memset(dest, 128, m);
+ // Connect the A/D to the peak-detected low-frequency path.
+ SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+ // Now set up the SSC to get the ADC samples that are now streaming at us.
+ FpgaSetupSsc();
+
+ SendForward(fwd_bit_count);
+
+ // Now do the acquisition
+ i = 0;
+ for(;;) {
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+ AT91C_BASE_SSC->SSC_THR = 0x43;
+ }
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
+ dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
+ i++;
+ if (i >= m) break;
+ }
}
- }
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
- LED_D_OFF();
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+ LED_D_OFF();
}
void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
-
- uint8_t fwd_bit_count;
-
- //If password mode do login
- if (PwdMode == 1) EM4xLogin(Pwd);
-
- forward_ptr = forwardLink_data;
- fwd_bit_count = Prepare_Cmd( FWD_CMD_WRITE );
- fwd_bit_count += Prepare_Addr( Address );
- fwd_bit_count += Prepare_Data( Data&0xFFFF, Data>>16 );
-
- SendForward(fwd_bit_count);
-
- //Wait for write to complete
- SpinDelay(20);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
- LED_D_OFF();
+
+ uint8_t fwd_bit_count;
+
+ //If password mode do login
+ if (PwdMode == 1) EM4xLogin(Pwd);
+
+ forward_ptr = forwardLink_data;
+ fwd_bit_count = Prepare_Cmd( FWD_CMD_WRITE );
+ fwd_bit_count += Prepare_Addr( Address );
+ fwd_bit_count += Prepare_Data( Data&0xFFFF, Data>>16 );
+
+ SendForward(fwd_bit_count);
+
+ //Wait for write to complete
+ SpinDelay(20);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+ LED_D_OFF();
}
//by marshmellow
//takes 1s and 0s and searches for EM410x format - output EM ID
-uint64_t Em410xDecode(uint8_t *BitStream, int BitLen)
+uint64_t Em410xDecode(uint8_t *BitStream,uint32_t BitLen)
{
- //no arguments needed - built this way in case we want this to be a direct call from "data " cmds in the future
- // otherwise could be a void with no arguments
- //set defaults
- int high=0, low=128;
- uint64_t lo=0; //hi=0,
-
- uint32_t i = 0;
- uint32_t initLoopMax = 65;
- if (initLoopMax>BitLen) initLoopMax=BitLen;
-
- for (;i < initLoopMax; ++i) //65 samples should be plenty to find high and low values
- {
- if (BitStream[i] > high)
- high = BitStream[i];
- else if (BitStream[i] < low)
- low = BitStream[i];
- }
- if (((high !=1)||(low !=0))){ //allow only 1s and 0s
- // PrintAndLog("no data found");
- return 0;
- }
- uint8_t parityTest=0;
- // 111111111 bit pattern represent start of frame
- uint8_t frame_marker_mask[] = {1,1,1,1,1,1,1,1,1};
- uint32_t idx = 0;
- uint32_t ii=0;
- uint8_t resetCnt = 0;
- while( (idx + 64) < BitLen) {
- restart:
- // search for a start of frame marker
- if ( memcmp(BitStream+idx, frame_marker_mask, sizeof(frame_marker_mask)) == 0)
- { // frame marker found
- idx+=9;//sizeof(frame_marker_mask);
- for (i=0; i<10;i++){
- for(ii=0; ii<5; ++ii){
- parityTest += BitStream[(i*5)+ii+idx];
- }
- if (parityTest== ((parityTest>>1)<<1)){
- parityTest=0;
- for (ii=0; ii<4;++ii){
- //hi = (hi<<1)|(lo>>31);
- lo=(lo<<1LL)|(BitStream[(i*5)+ii+idx]);
- }
- //PrintAndLog("DEBUG: EM parity passed parity val: %d, i:%d, ii:%d,idx:%d, Buffer: %d%d%d%d%d,lo: %d",parityTest,i,ii,idx,BitStream[idx+ii+(i*5)-5],BitStream[idx+ii+(i*5)-4],BitStream[idx+ii+(i*5)-3],BitStream[idx+ii+(i*5)-2],BitStream[idx+ii+(i*5)-1],lo);
- }else {//parity failed
- //PrintAndLog("DEBUG: EM parity failed parity val: %d, i:%d, ii:%d,idx:%d, Buffer: %d%d%d%d%d",parityTest,i,ii,idx,BitStream[idx+ii+(i*5)-5],BitStream[idx+ii+(i*5)-4],BitStream[idx+ii+(i*5)-3],BitStream[idx+ii+(i*5)-2],BitStream[idx+ii+(i*5)-1]);
- parityTest=0;
- idx-=8;
- if (resetCnt>5)return 0;
- resetCnt++;
- goto restart;//continue;
+ //no arguments needed - built this way in case we want this to be a direct call from "data " cmds in the future
+ // otherwise could be a void with no arguments
+ //set defaults
+ int high=0, low=128;
+ uint64_t lo=0; //hi=0,
+
+ uint32_t i = 0;
+ uint32_t initLoopMax = 65;
+ if (initLoopMax>BitLen) initLoopMax=BitLen;
+
+ for (;i < initLoopMax; ++i) //65 samples should be plenty to find high and low values
+ {
+ if (BitStream[i] > high)
+ high = BitStream[i];
+ else if (BitStream[i] < low)
+ low = BitStream[i];
+ }
+ if (((high !=1)||(low !=0))){ //allow only 1s and 0s
+ // PrintAndLog("no data found");
+ return 0;
+ }
+ uint8_t parityTest=0;
+ // 111111111 bit pattern represent start of frame
+ uint8_t frame_marker_mask[] = {1,1,1,1,1,1,1,1,1};
+ uint32_t idx = 0;
+ uint32_t ii=0;
+ uint8_t resetCnt = 0;
+ while( (idx + 64) < BitLen) {
+restart:
+ // search for a start of frame marker
+ if ( memcmp(BitStream+idx, frame_marker_mask, sizeof(frame_marker_mask)) == 0)
+ { // frame marker found
+ idx+=9;//sizeof(frame_marker_mask);
+ for (i=0; i<10;i++){
+ for(ii=0; ii<5; ++ii){
+ parityTest += BitStream[(i*5)+ii+idx];
+ }
+ if (parityTest== ((parityTest>>1)<<1)){
+ parityTest=0;
+ for (ii=0; ii<4;++ii){
+ //hi = (hi<<1)|(lo>>31);
+ lo=(lo<<1LL)|(BitStream[(i*5)+ii+idx]);
+ }
+ //PrintAndLog("DEBUG: EM parity passed parity val: %d, i:%d, ii:%d,idx:%d, Buffer: %d%d%d%d%d,lo: %d",parityTest,i,ii,idx,BitStream[idx+ii+(i*5)-5],BitStream[idx+ii+(i*5)-4],BitStream[idx+ii+(i*5)-3],BitStream[idx+ii+(i*5)-2],BitStream[idx+ii+(i*5)-1],lo);
+ }else {//parity failed
+ //PrintAndLog("DEBUG: EM parity failed parity val: %d, i:%d, ii:%d,idx:%d, Buffer: %d%d%d%d%d",parityTest,i,ii,idx,BitStream[idx+ii+(i*5)-5],BitStream[idx+ii+(i*5)-4],BitStream[idx+ii+(i*5)-3],BitStream[idx+ii+(i*5)-2],BitStream[idx+ii+(i*5)-1]);
+ parityTest=0;
+ idx-=8;
+ if (resetCnt>5)return 0;
+ resetCnt++;
+ goto restart;//continue;
+ }
+ }
+ //skip last 5 bit parity test for simplicity.
+ return lo;
+ }else{
+ idx++;
}
- }
- //skip last 5 bit parity test for simplicity.
- return lo;
- }else{
- idx++;
}
- }
- return 0;
+ return 0;
}
//by marshmellow
//takes 2 arguments - clock and invert both as integers
//attempts to demodulate ask while decoding manchester
//prints binary found and saves in graphbuffer for further commands
-int askmandemod(uint8_t * BinStream, int *BitLen,int *clk, int *invert)
+int askmandemod(uint8_t * BinStream,uint32_t *BitLen,int *clk, int *invert)
{
- int i;
- int high = 0, low = 128;
- *clk=DetectASKClock(BinStream,(size_t)*BitLen,*clk); //clock default
-
- if (*clk<8) *clk =64;
- if (*clk<32) *clk=32;
- if (*invert != 0 && *invert != 1) *invert=0;
- uint32_t initLoopMax = 200;
- if (initLoopMax>*BitLen) initLoopMax=*BitLen;
- // Detect high and lows
- for (i = 0; i < initLoopMax; ++i) //200 samples should be enough to find high and low values
- {
- if (BinStream[i] > high)
- high = BinStream[i];
- else if (BinStream[i] < low)
- low = BinStream[i];
- }
- if ((high < 158) ){ //throw away static
- //PrintAndLog("no data found");
- return -2;
- }
- //25% fuzz in case highs and lows aren't clipped [marshmellow]
- high=(int)((high-128)*.75)+128;
- low= (int)((low-128)*.75)+128;
-
- //PrintAndLog("DEBUG - valid high: %d - valid low: %d",high,low);
- int lastBit = 0; //set first clock check
- uint32_t bitnum = 0; //output counter
- int tol = 0; //clock tolerance adjust - waves will be accepted as within the clock if they fall + or - this value + clock from last valid wave
- if (*clk==32)tol=1; //clock tolerance may not be needed anymore currently set to + or - 1 but could be increased for poor waves or removed entirely
- int iii = 0;
- uint32_t gLen = *BitLen;
- if (gLen > 3000) gLen=3000;
- uint8_t errCnt =0;
- uint32_t bestStart = *BitLen;
- uint32_t bestErrCnt = (*BitLen/1000);
- uint32_t maxErr = (*BitLen/1000);
- //PrintAndLog("DEBUG - lastbit - %d",lastBit);
- //loop to find first wave that works
- for (iii=0; iii < gLen; ++iii){
- if ((BinStream[iii]>=high)||(BinStream[iii]<=low)){
- lastBit=iii-*clk;
- errCnt=0;
- //loop through to see if this start location works
- for (i = iii; i < *BitLen; ++i) {
- if ((BinStream[i] >= high) && ((i-lastBit)>(*clk-tol))){
- lastBit+=*clk;
- } else if ((BinStream[i] <= low) && ((i-lastBit)>(*clk-tol))){
- //low found and we are expecting a bar
- lastBit+=*clk;
- } else {
- //mid value found or no bar supposed to be here
- if ((i-lastBit)>(*clk+tol)){
- //should have hit a high or low based on clock!!
-
- //debug
- //PrintAndLog("DEBUG - no wave in expected area - location: %d, expected: %d-%d, lastBit: %d - resetting search",i,(lastBit+(clk-((int)(tol)))),(lastBit+(clk+((int)(tol)))),lastBit);
-
- errCnt++;
- lastBit+=*clk;//skip over until hit too many errors
- if (errCnt>(maxErr)) break; //allow 1 error for every 1000 samples else start over
- }
- }
- if ((i-iii) >(400 * *clk)) break; //got plenty of bits
- }
- //we got more than 64 good bits and not all errors
- if ((((i-iii)/ *clk) > (64+errCnt)) && (errCnt<maxErr)) {
- //possible good read
- if (errCnt==0){
- bestStart=iii;
- bestErrCnt=errCnt;
- break; //great read - finish
- }
- if (errCnt<bestErrCnt){ //set this as new best run
- bestErrCnt=errCnt;
- bestStart = iii;
+ int i;
+ int high = 0, low = 128;
+ *clk=DetectASKClock(BinStream,(size_t)*BitLen,*clk); //clock default
+
+ if (*clk<8) *clk =64;
+ if (*clk<32) *clk=32;
+ if (*invert != 0 && *invert != 1) *invert=0;
+ uint32_t initLoopMax = 200;
+ if (initLoopMax>*BitLen) initLoopMax=*BitLen;
+ // Detect high and lows
+ for (i = 0; i < initLoopMax; ++i) //200 samples should be enough to find high and low values
+ {
+ if (BinStream[i] > high)
+ high = BinStream[i];
+ else if (BinStream[i] < low)
+ low = BinStream[i];
+ }
+ if ((high < 158) ){ //throw away static
+ //PrintAndLog("no data found");
+ return -2;
+ }
+ //25% fuzz in case highs and lows aren't clipped [marshmellow]
+ high=(int)((high-128)*.75)+128;
+ low= (int)((low-128)*.75)+128;
+
+ //PrintAndLog("DEBUG - valid high: %d - valid low: %d",high,low);
+ int lastBit = 0; //set first clock check
+ uint32_t bitnum = 0; //output counter
+ int tol = 0; //clock tolerance adjust - waves will be accepted as within the clock if they fall + or - this value + clock from last valid wave
+ if (*clk==32)tol=1; //clock tolerance may not be needed anymore currently set to + or - 1 but could be increased for poor waves or removed entirely
+ int iii = 0;
+ uint32_t gLen = *BitLen;
+ if (gLen > 3000) gLen=3000;
+ uint8_t errCnt =0;
+ uint32_t bestStart = *BitLen;
+ uint32_t bestErrCnt = (*BitLen/1000);
+ uint32_t maxErr = (*BitLen/1000);
+ //PrintAndLog("DEBUG - lastbit - %d",lastBit);
+ //loop to find first wave that works
+ for (iii=0; iii < gLen; ++iii){
+ if ((BinStream[iii]>=high)||(BinStream[iii]<=low)){
+ lastBit=iii-*clk;
+ errCnt=0;
+ //loop through to see if this start location works
+ for (i = iii; i < *BitLen; ++i) {
+ if ((BinStream[i] >= high) && ((i-lastBit)>(*clk-tol))){
+ lastBit+=*clk;
+ } else if ((BinStream[i] <= low) && ((i-lastBit)>(*clk-tol))){
+ //low found and we are expecting a bar
+ lastBit+=*clk;
+ } else {
+ //mid value found or no bar supposed to be here
+ if ((i-lastBit)>(*clk+tol)){
+ //should have hit a high or low based on clock!!
+
+ //debug
+ //PrintAndLog("DEBUG - no wave in expected area - location: %d, expected: %d-%d, lastBit: %d - resetting search",i,(lastBit+(clk-((int)(tol)))),(lastBit+(clk+((int)(tol)))),lastBit);
+
+ errCnt++;
+ lastBit+=*clk;//skip over until hit too many errors
+ if (errCnt>(maxErr)) break; //allow 1 error for every 1000 samples else start over
+ }
+ }
+ if ((i-iii) >(400 * *clk)) break; //got plenty of bits
+ }
+ //we got more than 64 good bits and not all errors
+ if ((((i-iii)/ *clk) > (64+errCnt)) && (errCnt<maxErr)) {
+ //possible good read
+ if (errCnt==0){
+ bestStart=iii;
+ bestErrCnt=errCnt;
+ break; //great read - finish
+ }
+ if (errCnt<bestErrCnt){ //set this as new best run
+ bestErrCnt=errCnt;
+ bestStart = iii;
+ }
+ }
}
- }
}
- }
- if (bestErrCnt<maxErr){
- //best run is good enough set to best run and set overwrite BinStream
- iii=bestStart;
- lastBit=bestStart-*clk;
- bitnum=0;
- for (i = iii; i < *BitLen; ++i) {
- if ((BinStream[i] >= high) && ((i-lastBit)>(*clk-tol))){
- lastBit+=*clk;
- BinStream[bitnum] = *invert;
- bitnum++;
- } else if ((BinStream[i] <= low) && ((i-lastBit)>(*clk-tol))){
- //low found and we are expecting a bar
- lastBit+=*clk;
- BinStream[bitnum] = 1-*invert;
- bitnum++;
- } else {
- //mid value found or no bar supposed to be here
- if ((i-lastBit)>(*clk+tol)){
- //should have hit a high or low based on clock!!
-
- //debug
- //PrintAndLog("DEBUG - no wave in expected area - location: %d, expected: %d-%d, lastBit: %d - resetting search",i,(lastBit+(clk-((int)(tol)))),(lastBit+(clk+((int)(tol)))),lastBit);
- if (bitnum > 0){
- BinStream[bitnum]=77;
- bitnum++;
- }
-
- lastBit+=*clk;//skip over error
+ if (bestErrCnt<maxErr){
+ //best run is good enough set to best run and set overwrite BinStream
+ iii=bestStart;
+ lastBit=bestStart-*clk;
+ bitnum=0;
+ for (i = iii; i < *BitLen; ++i) {
+ if ((BinStream[i] >= high) && ((i-lastBit)>(*clk-tol))){
+ lastBit+=*clk;
+ BinStream[bitnum] = *invert;
+ bitnum++;
+ } else if ((BinStream[i] <= low) && ((i-lastBit)>(*clk-tol))){
+ //low found and we are expecting a bar
+ lastBit+=*clk;
+ BinStream[bitnum] = 1-*invert;
+ bitnum++;
+ } else {
+ //mid value found or no bar supposed to be here
+ if ((i-lastBit)>(*clk+tol)){
+ //should have hit a high or low based on clock!!
+
+ //debug
+ //PrintAndLog("DEBUG - no wave in expected area - location: %d, expected: %d-%d, lastBit: %d - resetting search",i,(lastBit+(clk-((int)(tol)))),(lastBit+(clk+((int)(tol)))),lastBit);
+ if (bitnum > 0){
+ BinStream[bitnum]=77;
+ bitnum++;
+ }
+
+ lastBit+=*clk;//skip over error
+ }
+ }
+ if (bitnum >=400) break;
}
- }
- if (bitnum >=400) break;
+ *BitLen=bitnum;
+ } else{
+ *invert=bestStart;
+ *clk=iii;
+ return -1;
}
- *BitLen=bitnum;
- } else{
- *invert=bestStart;
- *clk=iii;
- return -1;
- }
- return bestErrCnt;
+ return bestErrCnt;
}
//by marshmellow
//run through 2 times and take least errCnt
int manrawdecode(uint8_t * BitStream, int *bitLen)
{
- int bitnum=0;
- int errCnt =0;
- int i=1;
- int bestErr = 1000;
- int bestRun = 0;
- int ii=1;
- for (ii=1;ii<3;++ii){
- i=1;
- for (i=i+ii;i<*bitLen-2;i+=2){
- if(BitStream[i]==1 && (BitStream[i+1]==0)){
- } else if((BitStream[i]==0)&& BitStream[i+1]==1){
- } else {
- errCnt++;
- }
- if(bitnum>300) break;
- }
- if (bestErr>errCnt){
- bestErr=errCnt;
- bestRun=ii;
- }
- errCnt=0;
- }
- errCnt=bestErr;
- if (errCnt<20){
- ii=bestRun;
- i=1;
- for (i=i+ii;i<*bitLen-2;i+=2){
- if(BitStream[i]==1 && (BitStream[i+1]==0)){
- BitStream[bitnum++]=0;
- } else if((BitStream[i]==0)&& BitStream[i+1]==1){
- BitStream[bitnum++]=1;
- } else {
- BitStream[bitnum++]=77;
- //errCnt++;
- }
- if(bitnum>300) break;
- }
- *bitLen=bitnum;
- }
- return errCnt;
+ int bitnum=0;
+ int errCnt =0;
+ int i=1;
+ int bestErr = 1000;
+ int bestRun = 0;
+ int ii=1;
+ for (ii=1;ii<3;++ii){
+ i=1;
+ for (i=i+ii;i<*bitLen-2;i+=2){
+ if(BitStream[i]==1 && (BitStream[i+1]==0)){
+ } else if((BitStream[i]==0)&& BitStream[i+1]==1){
+ } else {
+ errCnt++;
+ }
+ if(bitnum>300) break;
+ }
+ if (bestErr>errCnt){
+ bestErr=errCnt;
+ bestRun=ii;
+ }
+ errCnt=0;
+ }
+ errCnt=bestErr;
+ if (errCnt<20){
+ ii=bestRun;
+ i=1;
+ for (i=i+ii;i<*bitLen-2;i+=2){
+ if(BitStream[i]==1 && (BitStream[i+1]==0)){
+ BitStream[bitnum++]=0;
+ } else if((BitStream[i]==0)&& BitStream[i+1]==1){
+ BitStream[bitnum++]=1;
+ } else {
+ BitStream[bitnum++]=77;
+ //errCnt++;
+ }
+ if(bitnum>300) break;
+ }
+ *bitLen=bitnum;
+ }
+ return errCnt;
}
//take 01 or 10 = 0 and 11 or 00 = 1
int BiphaseRawDecode(uint8_t * BitStream, int *bitLen, int offset)
{
- uint8_t bitnum=0;
- uint32_t errCnt =0;
- uint32_t i=1;
- i=offset;
- for (;i<*bitLen-2;i+=2){
- if((BitStream[i]==1 && BitStream[i+1]==0)||(BitStream[i]==0 && BitStream[i+1]==1)){
- BitStream[bitnum++]=1;
- } else if((BitStream[i]==0 && BitStream[i+1]==0)||(BitStream[i]==1 && BitStream[i+1]==1)){
- BitStream[bitnum++]=0;
- } else {
- BitStream[bitnum++]=77;
- errCnt++;
+ uint8_t bitnum=0;
+ uint32_t errCnt =0;
+ uint32_t i=1;
+ i=offset;
+ for (;i<*bitLen-2;i+=2){
+ if((BitStream[i]==1 && BitStream[i+1]==0)||(BitStream[i]==0 && BitStream[i+1]==1)){
+ BitStream[bitnum++]=1;
+ } else if((BitStream[i]==0 && BitStream[i+1]==0)||(BitStream[i]==1 && BitStream[i+1]==1)){
+ BitStream[bitnum++]=0;
+ } else {
+ BitStream[bitnum++]=77;
+ errCnt++;
+ }
+ if(bitnum>250) break;
}
- if(bitnum>250) break;
- }
- *bitLen=bitnum;
- return errCnt;
+ *bitLen=bitnum;
+ return errCnt;
}
//by marshmellow
//prints binary found and saves in graphbuffer for further commands
int askrawdemod(uint8_t *BinStream, int *bitLen,int *clk, int *invert)
{
- uint32_t i;
- // int invert=0; //invert default
- int high = 0, low = 128;
- *clk=DetectASKClock(BinStream,*bitLen,*clk); //clock default
- uint8_t BitStream[502] = {0};
-
- if (*clk<8) *clk =64;
- if (*clk<32) *clk=32;
- if (*invert != 0 && *invert != 1) *invert =0;
- uint32_t initLoopMax = 200;
- if (initLoopMax>*bitLen) initLoopMax=*bitLen;
- // Detect high and lows
- for (i = 0; i < initLoopMax; ++i) //200 samples should be plenty to find high and low values
- {
- if (BinStream[i] > high)
- high = BinStream[i];
- else if (BinStream[i] < low)
- low = BinStream[i];
- }
- if ((high < 158)){ //throw away static
- // PrintAndLog("no data found");
- return -2;
- }
- //25% fuzz in case highs and lows aren't clipped [marshmellow]
- high=(int)((high-128)*.75)+128;
- low= (int)((low-128)*.75)+128;
-
- //PrintAndLog("DEBUG - valid high: %d - valid low: %d",high,low);
- int lastBit = 0; //set first clock check
- uint32_t bitnum = 0; //output counter
- uint8_t tol = 0; //clock tolerance adjust - waves will be accepted as within the clock if they fall + or - this value + clock from last valid wave
- if (*clk==32)tol=1; //clock tolerance may not be needed anymore currently set to + or - 1 but could be increased for poor waves or removed entirely
- uint32_t iii = 0;
- uint32_t gLen = *bitLen;
- if (gLen > 500) gLen=500;
- uint8_t errCnt =0;
- uint32_t bestStart = *bitLen;
- uint32_t bestErrCnt = (*bitLen/1000);
- uint8_t midBit=0;
- //PrintAndLog("DEBUG - lastbit - %d",lastBit);
- //loop to find first wave that works
- for (iii=0; iii < gLen; ++iii){
- if ((BinStream[iii]>=high)||(BinStream[iii]<=low)){
- lastBit=iii-*clk;
- //loop through to see if this start location works
- for (i = iii; i < *bitLen; ++i) {
- if ((BinStream[i] >= high) && ((i-lastBit)>(*clk-tol))){
- lastBit+=*clk;
- BitStream[bitnum] = *invert;
- bitnum++;
- midBit=0;
- } else if ((BinStream[i] <= low) && ((i-lastBit)>(*clk-tol))){
- //low found and we are expecting a bar
- lastBit+=*clk;
- BitStream[bitnum] = 1-*invert;
- bitnum++;
- midBit=0;
- } else if ((BinStream[i]<=low) && (midBit==0) && ((i-lastBit)>((*clk/2)-tol))){
- //mid bar?
- midBit=1;
- BitStream[bitnum]= 1-*invert;
- bitnum++;
- } else if ((BinStream[i]>=high)&&(midBit==0) && ((i-lastBit)>((*clk/2)-tol))){
- //mid bar?
- midBit=1;
- BitStream[bitnum]= *invert;
- bitnum++;
- } else if ((i-lastBit)>((*clk/2)+tol)&&(midBit==0)){
- //no mid bar found
- midBit=1;
- BitStream[bitnum]= BitStream[bitnum-1];
- bitnum++;
- } else {
- //mid value found or no bar supposed to be here
-
- if ((i-lastBit)>(*clk+tol)){
- //should have hit a high or low based on clock!!
- //debug
- //PrintAndLog("DEBUG - no wave in expected area - location: %d, expected: %d-%d, lastBit: %d - resetting search",i,(lastBit+(clk-((int)(tol)))),(lastBit+(clk+((int)(tol)))),lastBit);
- if (bitnum > 0){
- BitStream[bitnum]=77;
- bitnum++;
+ uint32_t i;
+ // int invert=0; //invert default
+ int high = 0, low = 128;
+ *clk=DetectASKClock(BinStream,*bitLen,*clk); //clock default
+ uint8_t BitStream[502] = {0};
+
+ if (*clk<8) *clk =64;
+ if (*clk<32) *clk=32;
+ if (*invert != 0 && *invert != 1) *invert =0;
+ uint32_t initLoopMax = 200;
+ if (initLoopMax>*bitLen) initLoopMax=*bitLen;
+ // Detect high and lows
+ for (i = 0; i < initLoopMax; ++i) //200 samples should be plenty to find high and low values
+ {
+ if (BinStream[i] > high)
+ high = BinStream[i];
+ else if (BinStream[i] < low)
+ low = BinStream[i];
+ }
+ if ((high < 158)){ //throw away static
+ // PrintAndLog("no data found");
+ return -2;
+ }
+ //25% fuzz in case highs and lows aren't clipped [marshmellow]
+ high=(int)((high-128)*.75)+128;
+ low= (int)((low-128)*.75)+128;
+
+ //PrintAndLog("DEBUG - valid high: %d - valid low: %d",high,low);
+ int lastBit = 0; //set first clock check
+ uint32_t bitnum = 0; //output counter
+ uint8_t tol = 0; //clock tolerance adjust - waves will be accepted as within the clock if they fall + or - this value + clock from last valid wave
+ if (*clk==32)tol=1; //clock tolerance may not be needed anymore currently set to + or - 1 but could be increased for poor waves or removed entirely
+ uint32_t iii = 0;
+ uint32_t gLen = *bitLen;
+ if (gLen > 500) gLen=500;
+ uint8_t errCnt =0;
+ uint32_t bestStart = *bitLen;
+ uint32_t bestErrCnt = (*bitLen/1000);
+ uint8_t midBit=0;
+ //PrintAndLog("DEBUG - lastbit - %d",lastBit);
+ //loop to find first wave that works
+ for (iii=0; iii < gLen; ++iii){
+ if ((BinStream[iii]>=high)||(BinStream[iii]<=low)){
+ lastBit=iii-*clk;
+ //loop through to see if this start location works
+ for (i = iii; i < *bitLen; ++i) {
+ if ((BinStream[i] >= high) && ((i-lastBit)>(*clk-tol))){
+ lastBit+=*clk;
+ BitStream[bitnum] = *invert;
+ bitnum++;
+ midBit=0;
+ } else if ((BinStream[i] <= low) && ((i-lastBit)>(*clk-tol))){
+ //low found and we are expecting a bar
+ lastBit+=*clk;
+ BitStream[bitnum] = 1-*invert;
+ bitnum++;
+ midBit=0;
+ } else if ((BinStream[i]<=low) && (midBit==0) && ((i-lastBit)>((*clk/2)-tol))){
+ //mid bar?
+ midBit=1;
+ BitStream[bitnum]= 1-*invert;
+ bitnum++;
+ } else if ((BinStream[i]>=high)&&(midBit==0) && ((i-lastBit)>((*clk/2)-tol))){
+ //mid bar?
+ midBit=1;
+ BitStream[bitnum]= *invert;
+ bitnum++;
+ } else if ((i-lastBit)>((*clk/2)+tol)&&(midBit==0)){
+ //no mid bar found
+ midBit=1;
+ BitStream[bitnum]= BitStream[bitnum-1];
+ bitnum++;
+ } else {
+ //mid value found or no bar supposed to be here
+
+ if ((i-lastBit)>(*clk+tol)){
+ //should have hit a high or low based on clock!!
+ //debug
+ //PrintAndLog("DEBUG - no wave in expected area - location: %d, expected: %d-%d, lastBit: %d - resetting search",i,(lastBit+(clk-((int)(tol)))),(lastBit+(clk+((int)(tol)))),lastBit);
+ if (bitnum > 0){
+ BitStream[bitnum]=77;
+ bitnum++;
+ }
+
+
+ errCnt++;
+ lastBit+=*clk;//skip over until hit too many errors
+ if (errCnt>((*bitLen/1000))){ //allow 1 error for every 1000 samples else start over
+ errCnt=0;
+ bitnum=0;//start over
+ break;
+ }
+ }
+ }
+ if (bitnum>500) break;
}
-
-
- errCnt++;
- lastBit+=*clk;//skip over until hit too many errors
- if (errCnt>((*bitLen/1000))){ //allow 1 error for every 1000 samples else start over
- errCnt=0;
- bitnum=0;//start over
- break;
+ //we got more than 64 good bits and not all errors
+ if ((bitnum > (64+errCnt)) && (errCnt<(*bitLen/1000))) {
+ //possible good read
+ if (errCnt==0) break; //great read - finish
+ if (bestStart == iii) break; //if current run == bestErrCnt run (after exhausted testing) then finish
+ if (errCnt<bestErrCnt){ //set this as new best run
+ bestErrCnt=errCnt;
+ bestStart = iii;
+ }
}
- }
}
- if (bitnum>500) break;
- }
- //we got more than 64 good bits and not all errors
- if ((bitnum > (64+errCnt)) && (errCnt<(*bitLen/1000))) {
- //possible good read
- if (errCnt==0) break; //great read - finish
- if (bestStart == iii) break; //if current run == bestErrCnt run (after exhausted testing) then finish
- if (errCnt<bestErrCnt){ //set this as new best run
- bestErrCnt=errCnt;
- bestStart = iii;
+ if (iii>=gLen){ //exhausted test
+ //if there was a ok test go back to that one and re-run the best run (then dump after that run)
+ if (bestErrCnt < (*bitLen/1000)) iii=bestStart;
}
- }
- }
- if (iii>=gLen){ //exhausted test
- //if there was a ok test go back to that one and re-run the best run (then dump after that run)
- if (bestErrCnt < (*bitLen/1000)) iii=bestStart;
}
- }
- if (bitnum>16){
-
- // PrintAndLog("Data start pos:%d, lastBit:%d, stop pos:%d, numBits:%d",iii,lastBit,i,bitnum);
- //move BitStream back to BinStream
- // ClearGraph(0);
- for (i=0; i < bitnum; ++i){
- BinStream[i]=BitStream[i];
- }
- *bitLen=bitnum;
- // RepaintGraphWindow();
- //output
- // if (errCnt>0){
- // PrintAndLog("# Errors during Demoding (shown as 77 in bit stream): %d",errCnt);
- // }
- // PrintAndLog("ASK decoded bitstream:");
- // Now output the bitstream to the scrollback by line of 16 bits
- // printBitStream2(BitStream,bitnum);
- //int errCnt=0;
- //errCnt=manrawdemod(BitStream,bitnum);
+ if (bitnum>16){
- // Em410xDecode(Cmd);
- } else return -1;
- return errCnt;
+ // PrintAndLog("Data start pos:%d, lastBit:%d, stop pos:%d, numBits:%d",iii,lastBit,i,bitnum);
+ //move BitStream back to BinStream
+ // ClearGraph(0);
+ for (i=0; i < bitnum; ++i){
+ BinStream[i]=BitStream[i];
+ }
+ *bitLen=bitnum;
+ // RepaintGraphWindow();
+ //output
+ // if (errCnt>0){
+ // PrintAndLog("# Errors during Demoding (shown as 77 in bit stream): %d",errCnt);
+ // }
+ // PrintAndLog("ASK decoded bitstream:");
+ // Now output the bitstream to the scrollback by line of 16 bits
+ // printBitStream2(BitStream,bitnum);
+ //int errCnt=0;
+ //errCnt=manrawdemod(BitStream,bitnum);
+
+ // Em410xDecode(Cmd);
+ } else return -1;
+ return errCnt;
}
//translate wave to 11111100000 (1 for each short wave 0 for each long wave)
size_t fsk_wave_demod(uint8_t * dest, size_t size, uint8_t fchigh, uint8_t fclow)
{
- uint32_t last_transition = 0;
- uint32_t idx = 1;
- uint32_t maxVal=0;
- if (fchigh==0) fchigh=10;
- if (fclow==0) fclow=8;
- // we do care about the actual theshold value as sometimes near the center of the
- // wave we may get static that changes direction of wave for one value
- // if our value is too low it might affect the read. and if our tag or
- // antenna is weak a setting too high might not see anything. [marshmellow]
- if (size<100) return 0;
- for(idx=1; idx<100; idx++){
- if(maxVal<dest[idx]) maxVal = dest[idx];
- }
+ uint32_t last_transition = 0;
+ uint32_t idx = 1;
+ uint32_t maxVal=0;
+ if (fchigh==0) fchigh=10;
+ if (fclow==0) fclow=8;
+ // we do care about the actual theshold value as sometimes near the center of the
+ // wave we may get static that changes direction of wave for one value
+ // if our value is too low it might affect the read. and if our tag or
+ // antenna is weak a setting too high might not see anything. [marshmellow]
+ if (size<100) return 0;
+ for(idx=1; idx<100; idx++){
+ if(maxVal<dest[idx]) maxVal = dest[idx];
+ }
// set close to the top of the wave threshold with 25% margin for error
- // less likely to get a false transition up there.
+ // less likely to get a false transition up there.
// (but have to be careful not to go too high and miss some short waves)
- uint8_t threshold_value = (uint8_t)(((maxVal-128)*.75)+128);
- // idx=1;
- //uint8_t threshold_value = 127;
-
- // sync to first lo-hi transition, and threshold
-
- // Need to threshold first sample
-
- if(dest[0] < threshold_value) dest[0] = 0;
- else dest[0] = 1;
-
- size_t numBits = 0;
- // count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)
- // or 10 (fc/10) cycles but in practice due to noise etc we may end up with with anywhere
- // between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10
- for(idx = 1; idx < size; idx++) {
- // threshold current value
-
- if (dest[idx] < threshold_value) dest[idx] = 0;
- else dest[idx] = 1;
-
- // Check for 0->1 transition
- if (dest[idx-1] < dest[idx]) { // 0 -> 1 transition
- if ((idx-last_transition)<(fclow-2)){ //0-5 = garbage noise
- //do nothing with extra garbage
- } else if ((idx-last_transition) < (fchigh-1)) { //6-8 = 8 waves
- dest[numBits]=1;
- } else { //9+ = 10 waves
- dest[numBits]=0;
- }
- last_transition = idx;
- numBits++;
- }
- }
- return numBits; //Actually, it returns the number of bytes, but each byte represents a bit: 1 or 0
+ uint8_t threshold_value = (uint8_t)(((maxVal-128)*.75)+128);
+ // idx=1;
+ //uint8_t threshold_value = 127;
+
+ // sync to first lo-hi transition, and threshold
+
+ // Need to threshold first sample
+
+ if(dest[0] < threshold_value) dest[0] = 0;
+ else dest[0] = 1;
+
+ size_t numBits = 0;
+ // count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)
+ // or 10 (fc/10) cycles but in practice due to noise etc we may end up with with anywhere
+ // between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10
+ for(idx = 1; idx < size; idx++) {
+ // threshold current value
+
+ if (dest[idx] < threshold_value) dest[idx] = 0;
+ else dest[idx] = 1;
+
+ // Check for 0->1 transition
+ if (dest[idx-1] < dest[idx]) { // 0 -> 1 transition
+ if ((idx-last_transition)<(fclow-2)){ //0-5 = garbage noise
+ //do nothing with extra garbage
+ } else if ((idx-last_transition) < (fchigh-1)) { //6-8 = 8 waves
+ dest[numBits]=1;
+ } else { //9+ = 10 waves
+ dest[numBits]=0;
+ }
+ last_transition = idx;
+ numBits++;
+ }
+ }
+ return numBits; //Actually, it returns the number of bytes, but each byte represents a bit: 1 or 0
}
uint32_t myround2(float f)
{
- if (f >= 2000) return 2000;//something bad happened
- return (uint32_t) (f + (float)0.5);
+ if (f >= 2000) return 2000;//something bad happened
+ return (uint32_t) (f + (float)0.5);
}
//translate 11111100000 to 10
size_t aggregate_bits(uint8_t *dest,size_t size, uint8_t rfLen, uint8_t maxConsequtiveBits, uint8_t invert,uint8_t fchigh,uint8_t fclow )// uint8_t h2l_crossing_value,uint8_t l2h_crossing_value,
{
- uint8_t lastval=dest[0];
- uint32_t idx=0;
- size_t numBits=0;
- uint32_t n=1;
+ uint8_t lastval=dest[0];
+ uint32_t idx=0;
+ size_t numBits=0;
+ uint32_t n=1;
- for( idx=1; idx < size; idx++) {
+ for( idx=1; idx < size; idx++) {
- if (dest[idx]==lastval) {
- n++;
- continue;
- }
- //if lastval was 1, we have a 1->0 crossing
- if ( dest[idx-1]==1 ) {
- n=myround2((float)(n+1)/((float)(rfLen)/(float)fclow));
- //n=(n+1) / h2l_crossing_value;
- } else {// 0->1 crossing
- n=myround2((float)(n+1)/((float)(rfLen-2)/(float)fchigh)); //-2 for fudge factor
- //n=(n+1) / l2h_crossing_value;
- }
- if (n == 0) n = 1;
-
- if(n < maxConsequtiveBits) //Consecutive
- {
- if(invert==0){ //invert bits
- memset(dest+numBits, dest[idx-1] , n);
- }else{
- memset(dest+numBits, dest[idx-1]^1 , n);
- }
- numBits += n;
- }
- n=0;
- lastval=dest[idx];
- }//end for
- return numBits;
+ if (dest[idx]==lastval) {
+ n++;
+ continue;
+ }
+ //if lastval was 1, we have a 1->0 crossing
+ if ( dest[idx-1]==1 ) {
+ n=myround2((float)(n+1)/((float)(rfLen)/(float)fclow));
+ //n=(n+1) / h2l_crossing_value;
+ } else {// 0->1 crossing
+ n=myround2((float)(n+1)/((float)(rfLen-2)/(float)fchigh)); //-2 for fudge factor
+ //n=(n+1) / l2h_crossing_value;
+ }
+ if (n == 0) n = 1;
+
+ if(n < maxConsequtiveBits) //Consecutive
+ {
+ if(invert==0){ //invert bits
+ memset(dest+numBits, dest[idx-1] , n);
+ }else{
+ memset(dest+numBits, dest[idx-1]^1 , n);
+ }
+ numBits += n;
+ }
+ n=0;
+ lastval=dest[idx];
+ }//end for
+ return numBits;
}
//by marshmellow (from holiman's base)
// full fsk demod from GraphBuffer wave to decoded 1s and 0s (no mandemod)
int fskdemod(uint8_t *dest, size_t size, uint8_t rfLen, uint8_t invert, uint8_t fchigh, uint8_t fclow)
{
- // FSK demodulator
- size = fsk_wave_demod(dest, size, fchigh, fclow);
- size = aggregate_bits(dest, size,rfLen,192,invert,fchigh,fclow);
- return size;
+ // FSK demodulator
+ size = fsk_wave_demod(dest, size, fchigh, fclow);
+ size = aggregate_bits(dest, size,rfLen,192,invert,fchigh,fclow);
+ return size;
}
// loop to get raw HID waveform then FSK demodulate the TAG ID from it
int HIDdemodFSK(uint8_t *dest, size_t size, uint32_t *hi2, uint32_t *hi, uint32_t *lo)
{
-
- size_t idx=0; //, found=0; //size=0,
- // FSK demodulator
- size = fskdemod(dest, size,50,0,10,8);
- // final loop, go over previously decoded manchester data and decode into usable tag ID
- // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
- uint8_t frame_marker_mask[] = {1,1,1,0,0,0};
- int numshifts = 0;
- idx = 0;
- //one scan
- while( idx + sizeof(frame_marker_mask) < size) {
- // search for a start of frame marker
- if ( memcmp(dest+idx, frame_marker_mask, sizeof(frame_marker_mask)) == 0)
- { // frame marker found
- idx+=sizeof(frame_marker_mask);
- while(dest[idx] != dest[idx+1] && idx < size-2)
- {
- // Keep going until next frame marker (or error)
- // Shift in a bit. Start by shifting high registers
- *hi2 = (*hi2<<1)|(*hi>>31);
- *hi = (*hi<<1)|(*lo>>31);
- //Then, shift in a 0 or one into low
- if (dest[idx] && !dest[idx+1]) // 1 0
- *lo=(*lo<<1)|0;
- else // 0 1
- *lo=(*lo<<1)|1;
- numshifts++;
- idx += 2;
- }
- // Hopefully, we read a tag and hit upon the next frame marker
- if(idx + sizeof(frame_marker_mask) < size)
- {
- if ( memcmp(dest+idx, frame_marker_mask, sizeof(frame_marker_mask)) == 0)
- {
- //good return
- return idx;
- }
- }
- // reset
- *hi2 = *hi = *lo = 0;
- numshifts = 0;
- }else {
- idx++;
- }
- }
- return -1;
+ size_t idx=0; //, found=0; //size=0,
+ // FSK demodulator
+ size = fskdemod(dest, size,50,0,10,8);
+
+ // final loop, go over previously decoded manchester data and decode into usable tag ID
+ // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
+ uint8_t frame_marker_mask[] = {1,1,1,0,0,0};
+ int numshifts = 0;
+ idx = 0;
+ //one scan
+ while( idx + sizeof(frame_marker_mask) < size) {
+ // search for a start of frame marker
+ if ( memcmp(dest+idx, frame_marker_mask, sizeof(frame_marker_mask)) == 0)
+ { // frame marker found
+ idx+=sizeof(frame_marker_mask);
+ while(dest[idx] != dest[idx+1] && idx < size-2)
+ {
+ // Keep going until next frame marker (or error)
+ // Shift in a bit. Start by shifting high registers
+ *hi2 = (*hi2<<1)|(*hi>>31);
+ *hi = (*hi<<1)|(*lo>>31);
+ //Then, shift in a 0 or one into low
+ if (dest[idx] && !dest[idx+1]) // 1 0
+ *lo=(*lo<<1)|0;
+ else // 0 1
+ *lo=(*lo<<1)|1;
+ numshifts++;
+ idx += 2;
+ }
+ // Hopefully, we read a tag and hit upon the next frame marker
+ if(idx + sizeof(frame_marker_mask) < size)
+ {
+ if ( memcmp(dest+idx, frame_marker_mask, sizeof(frame_marker_mask)) == 0)
+ {
+ //good return
+ return idx;
+ }
+ }
+ // reset
+ *hi2 = *hi = *lo = 0;
+ numshifts = 0;
+ }else {
+ idx++;
+ }
+ }
+ return -1;
}
uint32_t bytebits_to_byte(uint8_t* src, int numbits)
{
- uint32_t num = 0;
- for(int i = 0 ; i < numbits ; i++)
- {
- num = (num << 1) | (*src);
- src++;
- }
- return num;
+ uint32_t num = 0;
+ for(int i = 0 ; i < numbits ; i++)
+ {
+ num = (num << 1) | (*src);
+ src++;
+ }
+ return num;
}
int IOdemodFSK(uint8_t *dest, size_t size)
{
- uint32_t idx=0;
- //make sure buffer has data
- if (size < 66) return -1;
- //test samples are not just noise
- uint8_t testMax=0;
- for(idx=0;idx<65;idx++){
- if (testMax<dest[idx]) testMax=dest[idx];
- }
- idx=0;
- //if not just noise
- if (testMax>170){
- // FSK demodulator
- size = fskdemod(dest, size,64,1,10,8); // RF/64 and invert
- if (size < 65) return -1; //did we get a good demod?
- //Index map
- //0 10 20 30 40 50 60
- //| | | | | | |
- //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23
- //-----------------------------------------------------------------------------
- //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 ???????? 11
- //
- //XSF(version)facility:codeone+codetwo
- //Handle the data
- uint8_t mask[] = {0,0,0,0,0,0,0,0,0,1};
- for( idx=0; idx < (size - 65); idx++) {
- if ( memcmp(dest + idx, mask, sizeof(mask))==0) {
- //frame marker found
- if (!dest[idx+8] && dest[idx+17]==1 && dest[idx+26]==1 && dest[idx+35]==1 && dest[idx+44]==1 && dest[idx+53]==1){
- //confirmed proper separator bits found
- //return start position
- return (int) idx;
- }
- }
- }
- }
- return 0;
+ uint32_t idx=0;
+ //make sure buffer has data
+ if (size < 66) return -1;
+ //test samples are not just noise
+ uint8_t testMax=0;
+ for(idx=0;idx<65;idx++){
+ if (testMax<dest[idx]) testMax=dest[idx];
+ }
+ idx=0;
+ //if not just noise
+ if (testMax>20){
+ // FSK demodulator
+ size = fskdemod(dest, size,64,1,10,8); // RF/64 and invert
+ if (size < 65) return -1; //did we get a good demod?
+ //Index map
+ //0 10 20 30 40 50 60
+ //| | | | | | |
+ //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23
+ //-----------------------------------------------------------------------------
+ //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 ???????? 11
+ //
+ //XSF(version)facility:codeone+codetwo
+ //Handle the data
+ uint8_t mask[] = {0,0,0,0,0,0,0,0,0,1};
+ for( idx=0; idx < (size - 65); idx++) {
+ if ( memcmp(dest + idx, mask, sizeof(mask))==0) {
+ //frame marker found
+ if (!dest[idx+8] && dest[idx+17]==1 && dest[idx+26]==1 && dest[idx+35]==1 && dest[idx+44]==1 && dest[idx+53]==1){
+ //confirmed proper separator bits found
+ //return start position
+ return (int) idx;
+ }
+ }
+ }
+ }
+ return 0;
}
// by marshmellow
// maybe somehow adjust peak trimming value based on samples to fix?
int DetectASKClock(uint8_t dest[], size_t size, int clock)
{
- int i=0;
- int peak=0;
- int low=128;
- int clk[]={16,32,40,50,64,100,128,256};
- int loopCnt = 256; //don't need to loop through entire array...
- if (size<loopCnt) loopCnt = size;
-
- //if we already have a valid clock quit
- for (;i<8;++i)
- if (clk[i]==clock) return clock;
-
- //get high and low peak
- for (i=0;i<loopCnt;++i){
- if(dest[i]>peak){
- peak = dest[i];
- }
- if(dest[i]<low){
- low = dest[i];
- }
- }
- peak=(int)(((peak-128)*.75)+128);
- low= (int)(((low-128)*.75)+128);
- int ii;
- int clkCnt;
- int tol = 0;
- int bestErr[]={1000,1000,1000,1000,1000,1000,1000,1000};
- int errCnt=0;
- //test each valid clock from smallest to greatest to see which lines up
- for(clkCnt=0; clkCnt<6;++clkCnt){
- if (clk[clkCnt]==32){
- tol=1;
- }else{
- tol=0;
- }
- bestErr[clkCnt]=1000;
- //try lining up the peaks by moving starting point (try first 256)
- for (ii=0; ii<loopCnt; ++ii){
- if ((dest[ii]>=peak) || (dest[ii]<=low)){
- errCnt=0;
- // now that we have the first one lined up test rest of wave array
- for (i=0; i<((int)(size/clk[clkCnt])-1); ++i){
- if (dest[ii+(i*clk[clkCnt])]>=peak || dest[ii+(i*clk[clkCnt])]<=low){
- }else if(dest[ii+(i*clk[clkCnt])-tol]>=peak || dest[ii+(i*clk[clkCnt])-tol]<=low){
- }else if(dest[ii+(i*clk[clkCnt])+tol]>=peak || dest[ii+(i*clk[clkCnt])+tol]<=low){
- }else{ //error no peak detected
- errCnt++;
- }
+ int i=0;
+ int peak=0;
+ int low=128;
+ int clk[]={16,32,40,50,64,100,128,256};
+ int loopCnt = 256; //don't need to loop through entire array...
+ if (size<loopCnt) loopCnt = size;
+
+ //if we already have a valid clock quit
+ for (;i<8;++i)
+ if (clk[i]==clock) return clock;
+
+ //get high and low peak
+ for (i=0;i<loopCnt;++i){
+ if(dest[i]>peak){
+ peak = dest[i];
}
- //if we found no errors this is correct one - return this clock
- if(errCnt==0) return clk[clkCnt];
- //if we found errors see if it is lowest so far and save it as best run
- if(errCnt<bestErr[clkCnt]) bestErr[clkCnt]=errCnt;
- }
- }
- }
- int iii=0;
- int best=0;
- for (iii=0; iii<7;++iii){
- if (bestErr[iii]<bestErr[best]){
- // current best bit to error ratio vs new bit to error ratio
- if (((size/clk[best])/bestErr[best]<(size/clk[iii])/bestErr[iii]) ){
- best = iii;
- }
- }
- }
- return clk[best];
-}
-int DetectpskNRZClock(uint8_t dest[], size_t size, int clock)
-{
- int i=0;
- int peak=0;
- int low=128;
- int clk[]={16,32,40,50,64,100,128,256};
- int loopCnt = 2048; //don't need to loop through entire array...
- if (size<loopCnt) loopCnt = size;
-
- //if we already have a valid clock quit
- for (;i<8;++i)
- if (clk[i]==clock) return clock;
-
- //get high and low peak
- for (i=0;i<loopCnt;++i){
- if(dest[i]>peak){
- peak = dest[i];
- }
- if(dest[i]<low){
- low = dest[i];
- }
- }
- peak=(int)(((peak-128)*.90)+128);
- low= (int)(((low-128)*.90)+128);
- //PrintAndLog("DEBUG: peak: %d, low: %d",peak,low);
- int ii;
- int clkCnt;
- int tol = 0;
- int peakcnt=0;
- int errCnt=0;
- int bestErr[]={1000,1000,1000,1000,1000,1000,1000,1000,1000};
- int peaksdet[]={0,0,0,0,0,0,0,0,0};
- //test each valid clock from smallest to greatest to see which lines up
- for(clkCnt=0; clkCnt<6;++clkCnt){
- if (clk[clkCnt]==32){
- tol=0;
- }else{
- tol=0;
- }
- //try lining up the peaks by moving starting point (try first 256)
- for (ii=0; ii<loopCnt; ++ii){
- if ((dest[ii]>=peak) || (dest[ii]<=low)){
- errCnt=0;
- peakcnt=0;
- // now that we have the first one lined up test rest of wave array
- for (i=0; i<((int)(size/clk[clkCnt])-1); ++i){
- if (dest[ii+(i*clk[clkCnt])]>=peak || dest[ii+(i*clk[clkCnt])]<=low){
- peakcnt++;
- }else if(dest[ii+(i*clk[clkCnt])-tol]>=peak || dest[ii+(i*clk[clkCnt])-tol]<=low){
- peakcnt++;
- }else if(dest[ii+(i*clk[clkCnt])+tol]>=peak || dest[ii+(i*clk[clkCnt])+tol]<=low){
- peakcnt++;
- }else{ //error no peak detected
- errCnt++;
- }
+ if(dest[i]<low){
+ low = dest[i];
}
- if(peakcnt>peaksdet[clkCnt]) {
- peaksdet[clkCnt]=peakcnt;
- bestErr[clkCnt]=errCnt;
- }
- }
- }
- }
- int iii=0;
- int best=0;
- //int ratio2; //debug
- int ratio;
- //int bits;
- for (iii=0; iii<7;++iii){
- ratio=1000;
- //ratio2=1000; //debug
- //bits=size/clk[iii]; //debug
- if (peaksdet[iii]>0){
- ratio=bestErr[iii]/peaksdet[iii];
- if (((bestErr[best]/peaksdet[best])>(ratio)+1)){
- best = iii;
- }
- //ratio2=bits/peaksdet[iii]; //debug
- }
- //PrintAndLog("DEBUG: Clk: %d, peaks: %d, errs: %d, bestClk: %d, ratio: %d, bits: %d, peakbitr: %d",clk[iii],peaksdet[iii],bestErr[iii],clk[best],ratio, bits,ratio2);
- }
- return clk[best];
-}
-
-/*
-int DetectNRZpskClock(uint8_t dest[], size_t size, int clock)
-{
- int i=0;
- int peak=0;
- int low=128;
- int clk[]={16,32,40,50,64,100,128,256};
- int loopCnt = 1500; //don't need to loop through entire array...
- if (size<loopCnt) loopCnt = size;
-
- //if we already have a valid clock quit
- for (;i<8;++i)
- if (clk[i]==clock) return clock;
-
- //get high and low peak
- for (i=0;i<loopCnt;++i){
- if(dest[i]>peak){
- peak = dest[i];
- }
- if(dest[i]<low){
- low = dest[i];
- }
- }
- peak=(int)((peak-128)*.75)+128;
- low= (int)((low-128)*.75)+128;
- int ii;
- int clkCnt;
- int tol = 0;
- int bestErr=1000;
- int errCnt[]={0,0,0,0,0,0,0,0};
- int lastClk = 0;
- uint8_t bitHigh=0;
- uint8_t ignorewin;
- int lowBitCnt[]={0,0,0,0,0,0,0,0};
- int BestLowBit=0;
- //test each valid clock from smallest to greatest to see which lines up
- for(clkCnt=0; clkCnt<6;++clkCnt){
- if (clk[clkCnt]==32){
- tol=1;
- }else{
- tol=0;
}
- ignorewin = clk[clkCnt]/8;
- bestErr=1000;
- //try lining up the peaks by moving starting point (try first 256)
- for (ii=1; ii<loopCnt; ++ii){
- if ((dest[ii]>=peak) || (dest[ii]<=low)){
- lastClk = ii-*clk;
- errCnt[clkCnt]=0;
- // now that we have the first one lined up test rest of wave array
- for (i=ii; i<size; ++i){
- if ((dest[i]>=peak || dest[i]<=low) && (i>=lastClk+*clk-tol && i<=lastClk+*clk+tol)){
- bitHigh=1;
- lastClk=lastClk+*clk;
- ignorewin=clk[clkCnt]/8;
- }else if(dest[i]<peak && dest[i]>low) {
- if (ignorewin==0){
- bitHigh=0;
- }else ignorewin--;
- if (i>=lastClk+*clk+tol){ //past possible bar
- lowBitCnt[clkCnt]++;
+ peak=(int)((peak-128)*.75)+128;
+ low= (int)((low-128)*.75)+128;
+ int ii;
+ int clkCnt;
+ int tol = 0;
+ int bestErr=1000;
+ int errCnt[]={0,0,0,0,0,0,0,0};
+ //test each valid clock from smallest to greatest to see which lines up
+ for(clkCnt=0; clkCnt<6;++clkCnt){
+ if (clk[clkCnt]==32){
+ tol=1;
+ }else{
+ tol=0;
+ }
+ bestErr=1000;
+ //try lining up the peaks by moving starting point (try first 256)
+ for (ii=0; ii<loopCnt; ++ii){
+ if ((dest[ii]>=peak) || (dest[ii]<=low)){
+ errCnt[clkCnt]=0;
+ // now that we have the first one lined up test rest of wave array
+ for (i=0; i<((int)(size/clk[clkCnt])-1); ++i){
+ if (dest[ii+(i*clk[clkCnt])]>=peak || dest[ii+(i*clk[clkCnt])]<=low){
+ }else if(dest[ii+(i*clk[clkCnt])-tol]>=peak || dest[ii+(i*clk[clkCnt])-tol]<=low){
+ }else if(dest[ii+(i*clk[clkCnt])+tol]>=peak || dest[ii+(i*clk[clkCnt])+tol]<=low){
+ }else{ //error no peak detected
+ errCnt[clkCnt]++;
+ }
+ }
+ //if we found no errors this is correct one - return this clock
+ if(errCnt[clkCnt]==0) return clk[clkCnt];
+ //if we found errors see if it is lowest so far and save it as best run
+ if(errCnt[clkCnt]<bestErr) bestErr=errCnt[clkCnt];
}
- }else if ((dest[i]>=peak || dest[i]<=low) && (i<lastClk+*clk-tol || i>=lastClk+*clk+tol) && (bitHigh==0)){
- //error bar found no clock...
- errCnt[clkCnt]++;
- }
}
- //if we found no errors this is correct one - return this clock
- if(errCnt[clkCnt]==0 && lowBitCnt[clkCnt]==0) return clk[clkCnt];
- //if we found errors see if it is lowest so far and save it as best run
- if(errCnt[clkCnt]<bestErr) bestErr=errCnt[clkCnt];
- if(lowBitCnt[clkCnt]<BestLowBit && errCnt[clkCnt]==bestErr) BestLowBit=lowBitCnt[clkCnt];
- }
- }
- }
- int iii=0;
- int best=0;
- int best2=0;
- //get best run
- for (iii=0; iii<7;++iii){
- if (errCnt[iii]<errCnt[best]){
- best = iii;
- }
- if (lowBitCnt[iii]<lowBitCnt[best2]){
- best2=iii;
- }
- }
- //adjust best to one with least low bit counts (as long as no errors)
- if (best!=best2){
- if (errCnt[best]==errCnt[best2]) best = best2;
- }
- return clk[best];
-}
-*/
-
-//by marshmellow (attempt to get rid of high immediately after a low)
-void pskCleanWave(uint8_t *bitStream, int bitLen)
-{
- int i;
- int low=128;
- int high=0;
- int gap = 4;
- // int loopMax = 2048;
- int newLow=0;
- int newHigh=0;
- for (i=0; i<bitLen; ++i){
- if (bitStream[i]<low) low=bitStream[i];
- if (bitStream[i]>high) high=bitStream[i];
- }
- high = (int)(((high-128)*.80)+128);
- low = (int)(((low-128)*.90)+128);
- //low = (uint8_t)(((int)(low)-128)*.80)+128;
- for (i=0; i<bitLen; ++i){
- if (newLow==1){
- bitStream[i]=low+8;
- gap--;
- if (gap==0){
- newLow=0;
- gap=4;
- }
- }else if (newHigh==1){
- bitStream[i]=high-8;
- gap--;
- if (gap==0){
- newHigh=0;
- gap=4;
- }
- }
- if (bitStream[i]<=low) newLow=1;
- if (bitStream[i]>=high) newHigh=1;
- }
- return;
-}
-
-int indala26decode(uint8_t *bitStream, int *bitLen, uint8_t *invert)
-{
- //26 bit 40134 format (don't know other formats)
- // Finding the start of a UID
- int i;
- int long_wait;
- //uidlen = 64;
- long_wait = 29;//29 leading zeros in format
- int start;
- int first = 0;
- int first2 = 0;
- int bitCnt = 0;
- int ii;
- for (start = 0; start <= *bitLen - 250; start++) {
- first = bitStream[start];
- for (i = start; i < start + long_wait; i++) {
- if (bitStream[i] != first) {
- break;
- }
- }
- if (i == (start + long_wait)) {
- break;
- }
- }
- if (start == *bitLen - 250 + 1) {
- // did not find start sequence
- return -1;
- }
- //found start once now test length by finding next one
- // Inverting signal if needed
- if (first == 1) {
- for (i = start; i < *bitLen; i++) {
- bitStream[i] = !bitStream[i];
- }
- *invert = 1;
- }else *invert=0;
-
- int iii;
- for (ii=start+29; ii <= *bitLen - 250; ii++) {
- first2 = bitStream[ii];
- for (iii = ii; iii < ii + long_wait; iii++) {
- if (bitStream[iii] != first2) {
- break;
- }
- }
- if (iii == (ii + long_wait)) {
- break;
}
- }
- if (ii== *bitLen - 250 + 1){
- // did not find second start sequence
- return -2;
- }
- bitCnt=ii-start;
-
- // Dumping UID
- i = start;
- for (ii = 0; ii < bitCnt; ii++) {
- bitStream[ii] = bitStream[i++];
- //showbits[bit] = '0' + bits[bit];
- }
- *bitLen=bitCnt;
- return 1;
-}
-
-int pskNRZrawDemod(uint8_t *dest, int *bitLen, int *clk, int *invert)
-{
- pskCleanWave(dest,*bitLen);
- int clk2 = DetectpskNRZClock(dest, *bitLen, *clk);
- *clk=clk2;
- uint32_t i;
- uint8_t high=0, low=128;
- uint32_t gLen = *bitLen;
- if (gLen > 1280) gLen=1280;
- // get high
- for (i=0; i<gLen; ++i){
- if (dest[i]>high) high = dest[i];
- if (dest[i]<low) low=dest[i];
- }
- //fudge high/low bars by 25%
- high = (uint8_t)((((int)(high)-128)*.75)+128);
- low = (uint8_t)((((int)(low)-128)*.80)+128);
-
- //PrintAndLog("DEBUG - valid high: %d - valid low: %d",high,low);
- int lastBit = 0; //set first clock check
- uint32_t bitnum = 0; //output counter
- uint8_t tol = 0; //clock tolerance adjust - waves will be accepted as within the clock if they fall + or - this value + clock from last valid wave
- if (*clk==32)tol=2; //clock tolerance may not be needed anymore currently set to + or - 1 but could be increased for poor waves or removed entirely
- uint32_t iii = 0;
- uint8_t errCnt =0;
- uint32_t bestStart = *bitLen;
- uint32_t maxErr = (*bitLen/1000);
- uint32_t bestErrCnt = maxErr;
- //uint8_t midBit=0;
- uint8_t curBit=0;
- uint8_t bitHigh=0;
- uint8_t ignorewin=*clk/8;
- //PrintAndLog("DEBUG - lastbit - %d",lastBit);
- //loop to find first wave that works - align to clock
- for (iii=0; iii < gLen; ++iii){
- if ((dest[iii]>=high)||(dest[iii]<=low)){
- lastBit=iii-*clk;
- //loop through to see if this start location works
- for (i = iii; i < *bitLen; ++i) {
- //if we found a high bar and we are at a clock bit
- if ((dest[i]>=high ) && (i>=lastBit+*clk-tol && i<=lastBit+*clk+tol)){
- bitHigh=1;
- lastBit+=*clk;
- //curBit=1-*invert;
- //dest[bitnum]=curBit;
- ignorewin=*clk/8;
- bitnum++;
- //else if low bar found and we are at a clock point
- }else if ((dest[i]<=low ) && (i>=lastBit+*clk-tol && i<=lastBit+*clk+tol)){
- bitHigh=1;
- lastBit+=*clk;
- ignorewin=*clk/8;
- //curBit=*invert;
- //dest[bitnum]=curBit;
- bitnum++;
- //else if no bars found
- }else if(dest[i]<high && dest[i]>low) {
- if (ignorewin==0){
- bitHigh=0;
- }else ignorewin--;
- //if we are past a clock point
- if (i>=lastBit+*clk+tol){ //clock val
- //dest[bitnum]=curBit;
- lastBit+=*clk;
- bitnum++;
- }
- //else if bar found but we are not at a clock bit and we did not just have a clock bit
- }else if ((dest[i]>=high || dest[i]<=low) && (i<lastBit+*clk-tol || i>lastBit+*clk+tol) && (bitHigh==0)){
- //error bar found no clock...
- errCnt++;
- }
- if (bitnum>=1000) break;
- }
- //we got more than 64 good bits and not all errors
- if ((bitnum > (64+errCnt)) && (errCnt<(maxErr))) {
- //possible good read
- if (errCnt==0){
- bestStart = iii;
- bestErrCnt=errCnt;
- break; //great read - finish
- }
- if (bestStart == iii) break; //if current run == bestErrCnt run (after exhausted testing) then finish
- if (errCnt<bestErrCnt){ //set this as new best run
- bestErrCnt=errCnt;
- bestStart = iii;
+ int iii=0;
+ int best=0;
+ for (iii=0; iii<6;++iii){
+ if (errCnt[iii]<errCnt[best]){
+ best = iii;
}
- }
- }
- }
- if (bestErrCnt<maxErr){
- //best run is good enough set to best run and set overwrite BinStream
- iii=bestStart;
- lastBit=bestStart-*clk;
- bitnum=0;
- for (i = iii; i < *bitLen; ++i) {
- //if we found a high bar and we are at a clock bit
- if ((dest[i]>=high ) && (i>=lastBit+*clk-tol && i<=lastBit+*clk+tol)){
- bitHigh=1;
- lastBit+=*clk;
- curBit=1-*invert;
- dest[bitnum]=curBit;
- ignorewin=*clk/8;
- bitnum++;
- //else if low bar found and we are at a clock point
- }else if ((dest[i]<=low ) && (i>=lastBit+*clk-tol && i<=lastBit+*clk+tol)){
- bitHigh=1;
- lastBit+=*clk;
- curBit=*invert;
- dest[bitnum]=curBit;
- ignorewin=*clk/8;
- bitnum++;
- //else if no bars found
- }else if(dest[i]<high && dest[i]>low) {
- if (ignorewin==0){
- bitHigh=0;
- }else ignorewin--;
- //if we are past a clock point
- if (i>=lastBit+*clk+tol){ //clock val
- lastBit+=*clk;
- dest[bitnum]=curBit;
- bitnum++;
- }
- //else if bar found but we are not at a clock bit and we did not just have a clock bit
- }else if ((dest[i]>=high || dest[i]<=low) && ((i<lastBit+*clk-tol) || (i>lastBit+*clk+tol)) && (bitHigh==0)){
- //error bar found no clock...
- bitHigh=1;
- dest[bitnum]=77;
- bitnum++;
- errCnt++;
- }
- if (bitnum >=1000) break;
}
- *bitLen=bitnum;
- } else{
- *bitLen=bitnum;
- *clk=bestStart;
- return -1;
- }
-
- if (bitnum>16){
- *bitLen=bitnum;
- } else return -1;
- return errCnt;
+ return clk[best];
}
-
-
- /*not needed?
- uint32_t i;
- uint8_t high=0, low=128;
- uint32_t loopMax = 1280; //20 raw bits
-
- // get high
- if (size<loopMax) return -1;
- for (i=0; i<loopMax; ++i){
- if (dest[i]>high) high = dest[i];
- if (dest[i]<low) low=dest[i];
- }
- //fudge high/low bars by 25%
- high = (uint8_t)(((int)(high)-128)*.75)+128;
- low = (uint8_t)(((int)(low)-128)*.75)+128;
-
- //clean waves
- for (i=0;i<size; ++i){
- if (dest[i]>=high) dest[i]=high;
- else if(dest[i]<=low) dest[i]=low;
- else dest[i]=0;
- }
- */
projects / proxmark3-svn / commitdiff