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1-- J.STELZNER
2-- INFORMATIK-3 LABOR
3-- 23.08.2006
4-- File: CONFIG_10H.VHD
5
6library IEEE;
7use IEEE.std_logic_1164.all;
8
9entity CONFIG_10H is
10 port
11 (
12 PCI_CLOCK :in std_logic;
13 PCI_RSTn :in std_logic;
14 AD_REG :in std_logic_vector(31 downto 0);
15 CBE_REGn :in std_logic_vector( 3 downto 0);
16 CONF_WR_10H :in std_logic;
17 CONF_DATA_10H :out std_logic_vector(31 downto 0)
18 );
19end entity CONFIG_10H;
20
21architecture CONFIG_10H_DESIGN of CONFIG_10H is
22
23 signal CONF_BAS_ADDR_REG :std_logic_vector(31 downto 0);
24
25begin
26
27 --*******************************************************************
28 --***** PCI Configuration Space Header "BASE ADDRESS REGISTER" ******
29 --*******************************************************************
30
31 CONF_BAS_ADDR_REG(1 downto 0) <= "01";-- Base Address Register for "I/O"
32 CONF_BAS_ADDR_REG(3 downto 2) <= "00";-- IO Bereich = 16 BYTE
33
34 process (PCI_CLOCK,PCI_RSTn)
35 begin
36
37 -- if PCI_RSTn = '0' then CONF_BAS_ADDR_REG(31 downto 2) <= (others =>'0');
38 if PCI_RSTn = '0' then
39 CONF_BAS_ADDR_REG(31 downto 4) <= (others =>'0');
40
41 elsif (rising_edge(PCI_CLOCK)) then
42
43 if CONF_WR_10H = '1'and CBE_REGn(3) = '0' then
44 CONF_BAS_ADDR_REG(31 downto 24) <= AD_REG(31 downto 24);
45 else
46 CONF_BAS_ADDR_REG(31 downto 24) <= CONF_BAS_ADDR_REG(31 downto 24);
47 end if;
48
49 if CONF_WR_10H = '1'and CBE_REGn(2) = '0' then
50 CONF_BAS_ADDR_REG(23 downto 16) <= AD_REG(23 downto 16);
51 else
52 CONF_BAS_ADDR_REG(23 downto 16) <= CONF_BAS_ADDR_REG(23 downto 16);
53 end if;
54
55 if CONF_WR_10H = '1'and CBE_REGn(1) = '0' then
56 CONF_BAS_ADDR_REG(15 downto 8) <= AD_REG(15 downto 8);
57 else
58 CONF_BAS_ADDR_REG(15 downto 8) <= CONF_BAS_ADDR_REG(15 downto 8);
59 end if;
60
61 -- if CONF_WR_10H = '1'and CBE_REGn(0) = '0' then
62 -- CONF_BAS_ADDR_REG( 7 downto 2) <= AD_REG( 7 downto 2);
63 -- else
64 -- CONF_BAS_ADDR_REG( 7 downto 2) <= CONF_BAS_ADDR_REG( 7 downto 2);
65 -- end if;
66
67 if CONF_WR_10H = '1'and CBE_REGn(0) = '0' then
68 CONF_BAS_ADDR_REG( 7 downto 4) <= AD_REG( 7 downto 4);
69 else
70 CONF_BAS_ADDR_REG( 7 downto 4) <= CONF_BAS_ADDR_REG( 7 downto 4);
71 end if;
72 end if;
73end process;
74
75CONF_DATA_10H <= CONF_BAS_ADDR_REG;
76
77end architecture CONFIG_10H_DESIGN;
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