move config space header into pci core directory
[raggedstone] / dhwk / source / ven_rev_id.vhd
1 -- J.STELZNER
2 -- INFORMATIK-3 LABOR
3 -- 23.08.2006
4 -- File: VEN_REV_ID.VHD
5
6 library IEEE;
7 use IEEE.std_logic_1164.all;
8
9 entity VEN_REV_ID is
10 port
11 (
12 VEN_ID :out std_logic_vector(15 downto 0);
13 REV_ID :out std_logic_vector( 7 downto 0)
14 );
15 end entity VEN_REV_ID;
16
17 architecture VEN_REV_ID_DESIGN of VEN_REV_ID is
18
19 begin
20
21 VEN_ID <= X"2222";
22 REV_ID <= X"01";
23
24 end architecture VEN_REV_ID_DESIGN;
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