480f48407ef75ac98422cc9fe05ef220f05379f6
[raggedstone] / dhwk / source / FLAG_BUS.vhd
1 -- J.STELZNER
2 -- INFORMATIK-3 LABOR
3 -- 23.08.2006
4 -- File: FLAG_BUS.VHD
5
6 library IEEE;
7 use IEEE.std_logic_1164.all;
8
9 entity FLAG_BUS is
10 port
11 (
12 PCI_CLOCK :in std_logic;
13 KONS_1 :in std_logic;
14 FLAG_IN_0 :in std_logic;
15 R_EFn :in std_logic;
16 R_HFn :in std_logic;
17 R_FFn :in std_logic;
18 FLAG_IN_4 :in std_logic;
19 S_EFn :in std_logic;
20 S_HFn :in std_logic;
21 S_FFn :in std_logic;
22 HOLD :in std_logic;
23 SYNC_FLAG :out std_logic_vector (7 downto 0)
24 );
25 end entity FLAG_BUS;
26
27 architecture FLAG_BUS_DESIGN of FLAG_BUS is
28
29
30 signal FF1_S_EFn :std_logic;
31 signal FF1_S_HFn :std_logic;
32 signal FF1_S_FFn :std_logic;
33 signal FF1_R_EFn :std_logic;
34 signal FF1_R_HFn :std_logic;
35 signal FF1_R_FFn :std_logic;
36
37 signal FF2_S_EFn :std_logic;
38 signal FF2_S_HFn :std_logic;
39 signal FF2_S_FFn :std_logic;
40 signal FF2_R_EFn :std_logic;
41 signal FF2_R_HFn :std_logic;
42 signal FF2_R_FFn :std_logic;
43
44 begin
45
46
47 process (PCI_CLOCK)
48 begin
49 if (PCI_CLOCK'event and PCI_CLOCK = '1') then
50
51 FF1_S_EFn <= not S_EFn;
52 FF1_S_HFn <= not S_HFn;
53 FF1_S_FFn <= not S_FFn;
54 FF1_R_EFn <= not R_EFn;
55 FF1_R_HFn <= not R_HFn;
56 FF1_R_FFn <= not R_FFn;
57
58 end if;
59 end process;
60
61
62 process (PCI_CLOCK)
63 begin
64 if (PCI_CLOCK'event and PCI_CLOCK = '1') then
65
66 if HOLD = '0' then
67
68 FF2_S_EFn <= FF1_S_EFn;
69 FF2_S_HFn <= FF1_S_HFn;
70 FF2_S_FFn <= FF1_S_FFn;
71 FF2_R_EFn <= FF1_R_EFn;
72 FF2_R_HFn <= FF1_R_HFn;
73 FF2_R_FFn <= FF1_R_FFn;
74
75 elsif HOLD = '1' then
76
77 FF2_S_EFn <= FF2_S_EFn;
78 FF2_S_HFn <= FF2_S_HFn;
79 FF2_S_FFn <= FF2_S_FFn;
80 FF2_R_EFn <= FF2_R_EFn;
81 FF2_R_HFn <= FF2_R_HFn;
82 FF2_R_FFn <= FF2_R_FFn;
83
84 end if;
85 end if;
86 end process;
87
88 SYNC_FLAG(0) <= FLAG_IN_0;
89 SYNC_FLAG(1) <= FF2_R_EFn;
90 SYNC_FLAG(2) <= FF2_R_HFn;
91 SYNC_FLAG(3) <= FF2_R_FFn;
92 SYNC_FLAG(4) <= FLAG_IN_4;
93 SYNC_FLAG(5) <= FF2_S_EFn;
94 SYNC_FLAG(6) <= FF2_S_HFn;
95 SYNC_FLAG(7) <= FF2_S_FFn;
96
97 end architecture FLAG_BUS_DESIGN;
98
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