move address register
[raggedstone] / dhwk / dhwk.prj
1 vhdl work "source/verg_8.vhd"
2 vhdl work "source/synplify.vhd"
3 vhdl work "source/parity_out.vhd"
4 vhdl work "source/config_wr_0.vhd"
5 vhdl work "source/config_rd_0.vhd"
6 vhdl work "source/config_mux_0.vhd"
7 vhdl work "source/config_3Ch.vhd"
8 vhdl work "source/config_10h.vhd"
9 vhdl work "source/config_08h.vhd"
10 vhdl work "source/config_04h.vhd"
11 vhdl work "source/config_00h.vhd"
12 vhdl work "source/Verg_4.vhd"
13 vhdl work "source/Verg_2.vhd"
14 vhdl work "source/REG.vhd"
15 vhdl work "source/Parity_4.vhd"
16 vhdl work "source/Io_reg.vhd"
17 vhdl work "source/Io_mux.vhd"
18 vhdl work "source/CONT_FSM.vhd"
19 vhdl work "source/COMM_FSM.vhd"
20 vhdl work "source/COMM_DEC.vhd"
21 vhdl work "source/vergleich.vhd"
22 vhdl work "source/steuerung.vhd"
23 vhdl work "source/reg_io.vhd"
24 vhdl work "source/parity.vhd"
25 vhdl work "source/io_mux_reg.vhd"
26 vhdl work "source/config_space_header.vhd"
27 vhdl work "source/IO_RW_SEL.vhd"
28 vhdl work "source/DATA_MUX.vhd"
29 vhdl work "source/user_io.vhd"
30 vhdl work "source/pci_interface.vhd"
31 vhdl work "source/fifo_io_control.vhd"
32 vhdl work "source/connecting_fsm.vhd"
33 vhdl work "source/SER_PAR_CON.vhd"
34 vhdl work "source/PAR_SER_CON.vhd"
35 vhdl work "source/FLAG_BUS.vhd"
36 vhdl work "source/pci_top.vhd"
37 vhdl work "source/fifo_control.vhd"
38 vhdl work "source/MESS_1_TB.vhd"
39 vhdl work "source/INTERRUPT.vhd"
40 vhdl work "source/top.vhd"
41 vhdl work "source/ven_rev_id.vhd"
42 vhdl work "source/pci/address_register.vhd"
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