Adding a test bench back that isn't a test bench. I shouldn't have deleted in

[raggedstone] / heartbeat / source / top_raggedstone.vhd

diff --git a/heartbeat/source/top_raggedstone.vhd b/heartbeat/source/top_raggedstone.vhd
index c7982941f1283337f185315ab2d796ae4ec64273..3d369cf5dae28104afb9dd4d3cf51a7dc1c2cd01 100644 (file)
--- a/heartbeat/source/top_raggedstone.vhd
+++ b/heartbeat/source/top_raggedstone.vhd
@@ -44,6 +44,7 @@ port (
     -- General \r
     PCI_CLK     : in std_logic;\r
     PCI_nRES    : in std_logic;\r
+    PCI_nREQ    : out std_logic;\r
     \r
     -- PCI target 32bits\r
     PCI_AD      : inout std_logic_vector(31 downto 0);\r
@@ -161,6 +162,8 @@ end component;
 \r
 begin\r
 \r
+       PCI_nREQ <= '1';\r
+\r
 --+-----------------------------------------+\r
 --|  PCI Target                                                        |\r
 --+-----------------------------------------+\r