--- /dev/null
+-- J.STELZNER\r
+-- INFORMATIK-3 LABOR\r
+-- 23.08.2006\r
+-- File: CONFIG_MUX_0.VHD\r
+\r
+library IEEE;\r
+use IEEE.std_logic_1164.all;\r
+\r
+entity CONFIG_MUX_0 is\r
+ port\r
+ (\r
+ READ_SEL :in std_logic_vector( 2 downto 0);\r
+ CONF_DATA_00H :in std_logic_vector(31 downto 0);\r
+ CONF_DATA_04H :in std_logic_vector(31 downto 0);\r
+ CONF_DATA_08H :in std_logic_vector(31 downto 0);\r
+ CONF_DATA_10H :in std_logic_vector(31 downto 0);\r
+ CONF_DATA_3CH :in std_logic_vector(31 downto 0);\r
+--CONF_DATA_40H :in std_logic_vector(31 downto 0);\r
+ CONF_DATA :out std_logic_vector(31 downto 0)\r
+ );\r
+end entity CONFIG_MUX_0;\r
+\r
+architecture CONFIG_MUX_0_DESIGN of CONFIG_MUX_0 is\r
+\r
+ signal MUX :std_logic_vector (31 downto 0); \r
+\r
+begin\r
+\r
+--*******************************************************************\r
+--******************* PCI Read Config-MUX **************************\r
+--*******************************************************************\r
+\r
+ MUX <= CONF_DATA_00H when READ_SEL <= "000" else \r
+ CONF_DATA_04H when READ_SEL <= "001" else\r
+ CONF_DATA_08H when READ_SEL <= "010" else\r
+ CONF_DATA_10H when READ_SEL <= "011" else\r
+ CONF_DATA_3CH when READ_SEL <= "100" else\r
+-- CONF_DATA_40H when READ_SEL <= "101" else\r
+ X"00000000" ;\r
+\r
+ CONF_DATA <= MUX ;\r
+\r
+\r
+end architecture CONFIG_MUX_0_DESIGN;\r