identing

[raggedstone] / dhwk / source / config_08h.vhd

diff --git a/dhwk/source/config_08h.vhd b/dhwk/source/config_08h.vhd
index fe9e6c456a3d14d94bb39a5429159ef732e4cb34..7b19df631cba78eec8cf757feb6ad68abe6be998 100644 (file)
--- a/dhwk/source/config_08h.vhd
+++ b/dhwk/source/config_08h.vhd
@@ -7,22 +7,22 @@ library IEEE;
 use IEEE.std_logic_1164.all;
 
 entity CONFIG_08H is
-       port
-       (
-       REVISION_ID             :in             std_logic_vector ( 7 downto 0);
-       CONF_DATA_08H   :out    std_logic_vector (31 downto 0)
-       );
+        port
+        (
+                REVISION_ID :in std_logic_vector ( 7 downto 0);
+                CONF_DATA_08H :out std_logic_vector (31 downto 0)
+        );
 end entity CONFIG_08H;
 
 architecture CONFIG_08H_DESIGN of CONFIG_08H is
 
--- PCI Configuration Space Header Addr : HEX 08 --
+ -- PCI Configuration Space Header Addr : HEX 08 --
 
-       constant        CONF_CLASS_CODE         :std_logic_vector (31 downto  8) := X"078000";--other comm. device              
---constant     CONF_REVISION_ID        :std_logic_vector ( 7 downto  0) := X"00";                      
+        constant CONF_CLASS_CODE :std_logic_vector (31 downto 8) := X"078000";--other comm. device
+        --constant CONF_REVISION_ID :std_logic_vector ( 7 downto 0) := X"00";
 
 begin
 
-       CONF_DATA_08H <= CONF_CLASS_CODE & REVISION_ID;
+        CONF_DATA_08H <= CONF_CLASS_CODE & REVISION_ID;
 
 end architecture CONFIG_08H_DESIGN;