larger ila

[raggedstone] / dhwk / source / fifo_control.vhd

diff --git a/dhwk/source/fifo_control.vhd b/dhwk/source/fifo_control.vhd
index 1c2d52ea88c3bf00fc17e17e78b10958c20862b2..1baa801b7199d5695ff8a884c4313e7aff210e99 100644 (file)
--- a/dhwk/source/fifo_control.vhd
+++ b/dhwk/source/fifo_control.vhd
@@ -43,8 +43,7 @@ entity FIFO_CONTROL is
              SERIAL_OUT : Out   std_logic;\r
              SPC_RDY_OUT : Out   std_logic;\r
              SR_ERROR : Out   std_logic;\r
-             SYNC_FLAG : Out   std_logic_vector (7 downto 0);\r
-            PAR_SER_IN : Out std_logic_vector (7 downto 0));\r
+             SYNC_FLAG : Out   std_logic_vector (7 downto 0));\r
 end FIFO_CONTROL;\r
 \r
 architecture SCHEMATIC of FIFO_CONTROL is\r
@@ -128,8 +127,6 @@ architecture SCHEMATIC of FIFO_CONTROL is
 begin\r
 \r
    SYNC_FLAG <= SYNC_FLAG_DUMMY;\r
-   PAR_SER_IN <= S_FIFO_Q_OUT;\r
-\r
 \r
    RESERVE <= gnd;\r
    I23 : SER_PAR_CON\r