fifos

diff --git a/dhwk_old/source/top_dhwk.vhd b/dhwk_old/source/top_dhwk.vhd
index accd1a382677ce6d91bcf022783c6b4c6f212d41..97294bec7b45f28e03595b4d0a70e073d84824f1 100644 (file)
--- a/dhwk_old/source/top_dhwk.vhd
+++ b/dhwk_old/source/top_dhwk.vhd
@@ -109,7 +109,7 @@ port (
 );\r
 end component;\r
 \r
 );\r
 end component;\r
 \r

-component wb_7seg_new\r
+component wb_fifo\r

 port (\r
        clk_i           : in std_logic;\r
        nrst_i          : in std_logic;\r
 port (\r
        clk_i           : in std_logic;\r
        nrst_i          : in std_logic;\r


@@ -125,8 +125,11 @@ port (
        wb_err_o        : out std_logic;\r
        wb_int_o        : out std_logic;\r
        \r
        wb_err_o        : out std_logic;\r
        wb_int_o        : out std_logic;\r
        \r

-       DISP_SEL        : inout std_logic_vector(3 downto 0);\r
-       DISP_LED        : out std_logic_vector(6 downto 0)\r
+       fifo_data_i     : in std_logic_vector(7 downto 0);\r
+       fifo_data_o     : out std_logic_vector(7 downto 0)\r
+\r
+       fifo_we_out     : out std_logic;\r
+       fifo_re_out     : out std_logic;\r

 );\r
 end component;\r
 \r
 );\r
 end component;\r
 \r

diff --git a/dhwk_old/source/wb_fifo.v b/dhwk_old/source/wb_fifo.v
index f6a8587412ce77fb5889129f05de91fcba96acf8..95ccad4305cddcfe08d93fbb378e2909e57b89de 100644 (file)
--- a/dhwk_old/source/wb_fifo.v
+++ b/dhwk_old/source/wb_fifo.v
@@ -1,4 +1,4 @@
-module wb_7seg_new (clk_i, nrst_i, wb_adr_i, wb_dat_o, wb_dat_i, wb_sel_i, wb_we_i, \r
+module wb_fifo (clk_i, nrst_i, wb_adr_i, wb_dat_o, wb_dat_i, wb_sel_i, wb_we_i, \r

        wb_stb_i, wb_cyc_i, wb_ack_o, wb_err_o, wb_int_o, fifo_data_i, fifo_data_o, fifo_we_o, fifo_re_o);\r
 \r
        input clk_i;\r
        wb_stb_i, wb_cyc_i, wb_ack_o, wb_err_o, wb_int_o, fifo_data_i, fifo_data_o, fifo_we_o, fifo_re_o);\r
 \r
        input clk_i;\r