galaxians
[fpga-games] / galaxian / src / altera / alt_rom_6l.v
1 // megafunction wizard: %ROM: 1-PORT%
2 // GENERATION: STANDARD
3 // VERSION: WM1.0
4 // MODULE: altsyncram
5
6 // ============================================================
7 // File Name: alt_rom_6l.v
8 // Megafunction Name(s):
9 // altsyncram
10 // ============================================================
11 // ************************************************************
12 // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
13 // ************************************************************
14
15
16 //Copyright (C) 1991-2003 Altera Corporation
17 //Any megafunction design, and related netlist (encrypted or decrypted),
18 //support information, device programming or simulation file, and any other
19 //associated documentation or information provided by Altera or a partner
20 //under Altera's Megafunction Partnership Program may be used only
21 //to program PLD devices (but not masked PLD devices) from Altera. Any
22 //other use of such megafunction design, netlist, support information,
23 //device programming or simulation file, or any other related documentation
24 //or information is prohibited for any other purpose, including, but not
25 //limited to modification, reverse engineering, de-compiling, or use with
26 //any other silicon devices, unless such use is explicitly licensed under
27 //a separate agreement with Altera or a megafunction partner. Title to the
28 //intellectual property, including patents, copyrights, trademarks, trade
29 //secrets, or maskworks, embodied in any such megafunction design, netlist,
30 //support information, device programming or simulation file, or any other
31 //related documentation or information provided by Altera or a megafunction
32 //partner, remains with Altera, the megafunction partner, or their respective
33 //licensors. No other licenses, including any licenses needed under any third
34 //party's intellectual property, are provided herein.
35
36
37 module alt_rom_6l (
38 address,
39 clock,
40 q);
41
42 input [4:0] address;
43 input clock;
44 output [7:0] q;
45
46 wire [7:0] sub_wire0;
47 wire [7:0] q = sub_wire0[7:0];
48
49 altsyncram altsyncram_component (
50 .clock0 (clock),
51 .address_a (address),
52 .q_a (sub_wire0));
53 defparam
54 altsyncram_component.intended_device_family = "Cyclone",
55 altsyncram_component.width_a = 8,
56 altsyncram_component.widthad_a = 5,
57 altsyncram_component.numwords_a = 32,
58 altsyncram_component.operation_mode = "ROM",
59 altsyncram_component.outdata_reg_a = "UNREGISTERED",
60 altsyncram_component.address_aclr_a = "NONE",
61 altsyncram_component.outdata_aclr_a = "NONE",
62 altsyncram_component.width_byteena_a = 1,
63 altsyncram_component.init_file = "6l.hex",
64 altsyncram_component.lpm_type = "altsyncram";
65
66
67 endmodule
68
69 // ============================================================
70 // CNX file retrieval info
71 // ============================================================
72 // Retrieval info: PRIVATE: WidthData NUMERIC "8"
73 // Retrieval info: PRIVATE: WidthAddr NUMERIC "5"
74 // Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone"
75 // Retrieval info: PRIVATE: SingleClock NUMERIC "1"
76 // Retrieval info: PRIVATE: UseDQRAM NUMERIC "0"
77 // Retrieval info: PRIVATE: RegAddr NUMERIC "1"
78 // Retrieval info: PRIVATE: RegOutput NUMERIC "0"
79 // Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC "0"
80 // Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8"
81 // Retrieval info: PRIVATE: AclrByte NUMERIC "0"
82 // Retrieval info: PRIVATE: AclrAddr NUMERIC "0"
83 // Retrieval info: PRIVATE: AclrOutput NUMERIC "0"
84 // Retrieval info: PRIVATE: Clken NUMERIC "0"
85 // Retrieval info: PRIVATE: MIFfilename STRING "6l.hex"
86 // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"
87 // Retrieval info: CONSTANT: WIDTH_A NUMERIC "8"
88 // Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "5"
89 // Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "32"
90 // Retrieval info: CONSTANT: OPERATION_MODE STRING "ROM"
91 // Retrieval info: CONSTANT: OUTDATA_REG_A STRING "UNREGISTERED"
92 // Retrieval info: CONSTANT: ADDRESS_ACLR_A STRING "NONE"
93 // Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE"
94 // Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1"
95 // Retrieval info: CONSTANT: INIT_FILE STRING "6l.hex"
96 // Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
97 // Retrieval info: USED_PORT: address 0 0 5 0 INPUT NODEFVAL address[4..0]
98 // Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL q[7..0]
99 // Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock
100 // Retrieval info: CONNECT: @address_a 0 0 5 0 address 0 0 5 0
101 // Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0
102 // Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0
103 // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
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