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[proxmark3-svn] / armsrc / iclass.c
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cee5a30d 1//-----------------------------------------------------------------------------
2// Gerhard de Koning Gans - May 2008
3// Hagen Fritsch - June 2010
4// Gerhard de Koning Gans - May 2011
1e262141 5// Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
cee5a30d 6//
7// This code is licensed to you under the terms of the GNU GPL, version 2 or,
8// at your option, any later version. See the LICENSE.txt file for the text of
9// the license.
10//-----------------------------------------------------------------------------
11// Routines to support iClass.
12//-----------------------------------------------------------------------------
13// Based on ISO14443a implementation. Still in experimental phase.
14// Contribution made during a security research at Radboud University Nijmegen
15//
16// Please feel free to contribute and extend iClass support!!
17//-----------------------------------------------------------------------------
18//
cee5a30d 19// FIX:
20// ====
21// We still have sometimes a demodulation error when snooping iClass communication.
22// The resulting trace of a read-block-03 command may look something like this:
23//
24// + 22279: : 0c 03 e8 01
25//
26// ...with an incorrect answer...
27//
28// + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29//
30// We still left the error signalling bytes in the traces like 0xbb
31//
32// A correct trace should look like this:
33//
34// + 21112: : 0c 03 e8 01
35// + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36//
37//-----------------------------------------------------------------------------
38
f38a1528 39#include "../include/proxmark3.h"
cee5a30d 40#include "apps.h"
41#include "util.h"
42#include "string.h"
7e67e42f 43#include "common.h"
f38a1528 44#include "cmd.h"
1e262141 45// Needed for CRC in emulation mode;
46// same construction as in ISO 14443;
47// different initial value (CRC_ICLASS)
f38a1528 48#include "../common/iso14443crc.h"
49#include "../common/iso15693tools.h"
10403a6a 50//#include "iso15693tools.h"
b67f7ec3 51#include "protocols.h"
10a8875c 52#include "optimized_cipher.h"
cee5a30d 53
1e262141 54static int timeout = 4096;
cee5a30d 55
cee5a30d 56
1e262141 57static int SendIClassAnswer(uint8_t *resp, int respLen, int delay);
cee5a30d 58
59//-----------------------------------------------------------------------------
60// The software UART that receives commands from the reader, and its state
61// variables.
62//-----------------------------------------------------------------------------
63static struct {
64 enum {
65 STATE_UNSYNCD,
66 STATE_START_OF_COMMUNICATION,
67 STATE_RECEIVING
68 } state;
69 uint16_t shiftReg;
70 int bitCnt;
71 int byteCnt;
72 int byteCntMax;
73 int posCnt;
74 int nOutOfCnt;
75 int OutOfCnt;
76 int syncBit;
1e262141 77 int samples;
cee5a30d 78 int highCnt;
79 int swapper;
80 int counter;
81 int bitBuffer;
82 int dropPosition;
a501c82b 83 uint8_t *output;
cee5a30d 84} Uart;
85
1e262141 86static RAMFUNC int OutOfNDecoding(int bit)
cee5a30d 87{
9f693930 88 //int error = 0;
cee5a30d 89 int bitright;
90
91 if(!Uart.bitBuffer) {
92 Uart.bitBuffer = bit ^ 0xFF0;
93 return FALSE;
94 }
95 else {
96 Uart.bitBuffer <<= 4;
97 Uart.bitBuffer ^= bit;
98 }
99
100 /*if(Uart.swapper) {
101 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
102 Uart.byteCnt++;
103 Uart.swapper = 0;
104 if(Uart.byteCnt > 15) { return TRUE; }
105 }
106 else {
107 Uart.swapper = 1;
108 }*/
109
110 if(Uart.state != STATE_UNSYNCD) {
111 Uart.posCnt++;
112
113 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
114 bit = 0x00;
115 }
116 else {
117 bit = 0x01;
118 }
119 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
120 bitright = 0x00;
121 }
122 else {
123 bitright = 0x01;
124 }
125 if(bit != bitright) { bit = bitright; }
126
127
128 // So, now we only have to deal with *bit*, lets see...
129 if(Uart.posCnt == 1) {
130 // measurement first half bitperiod
131 if(!bit) {
132 // Drop in first half means that we are either seeing
133 // an SOF or an EOF.
134
135 if(Uart.nOutOfCnt == 1) {
136 // End of Communication
137 Uart.state = STATE_UNSYNCD;
138 Uart.highCnt = 0;
139 if(Uart.byteCnt == 0) {
140 // Its not straightforward to show single EOFs
141 // So just leave it and do not return TRUE
a501c82b 142 Uart.output[0] = 0xf0;
cee5a30d 143 Uart.byteCnt++;
cee5a30d 144 }
145 else {
146 return TRUE;
147 }
148 }
149 else if(Uart.state != STATE_START_OF_COMMUNICATION) {
150 // When not part of SOF or EOF, it is an error
151 Uart.state = STATE_UNSYNCD;
152 Uart.highCnt = 0;
9f693930 153 //error = 4;
cee5a30d 154 }
155 }
156 }
157 else {
158 // measurement second half bitperiod
159 // Count the bitslot we are in... (ISO 15693)
160 Uart.nOutOfCnt++;
161
162 if(!bit) {
163 if(Uart.dropPosition) {
164 if(Uart.state == STATE_START_OF_COMMUNICATION) {
9f693930 165 //error = 1;
cee5a30d 166 }
167 else {
9f693930 168 //error = 7;
cee5a30d 169 }
170 // It is an error if we already have seen a drop in current frame
171 Uart.state = STATE_UNSYNCD;
172 Uart.highCnt = 0;
173 }
174 else {
175 Uart.dropPosition = Uart.nOutOfCnt;
176 }
177 }
178
179 Uart.posCnt = 0;
180
181
182 if(Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
183 Uart.nOutOfCnt = 0;
184
185 if(Uart.state == STATE_START_OF_COMMUNICATION) {
186 if(Uart.dropPosition == 4) {
187 Uart.state = STATE_RECEIVING;
188 Uart.OutOfCnt = 256;
189 }
190 else if(Uart.dropPosition == 3) {
191 Uart.state = STATE_RECEIVING;
192 Uart.OutOfCnt = 4;
193 //Uart.output[Uart.byteCnt] = 0xdd;
194 //Uart.byteCnt++;
195 }
196 else {
197 Uart.state = STATE_UNSYNCD;
198 Uart.highCnt = 0;
199 }
200 Uart.dropPosition = 0;
201 }
202 else {
203 // RECEIVING DATA
204 // 1 out of 4
205 if(!Uart.dropPosition) {
206 Uart.state = STATE_UNSYNCD;
207 Uart.highCnt = 0;
9f693930 208 //error = 9;
cee5a30d 209 }
210 else {
211 Uart.shiftReg >>= 2;
212
213 // Swap bit order
214 Uart.dropPosition--;
215 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
216 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
217
218 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
219 Uart.bitCnt += 2;
220 Uart.dropPosition = 0;
221
222 if(Uart.bitCnt == 8) {
223 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
224 Uart.byteCnt++;
cee5a30d 225 Uart.bitCnt = 0;
226 Uart.shiftReg = 0;
227 }
228 }
229 }
230 }
231 else if(Uart.nOutOfCnt == Uart.OutOfCnt) {
232 // RECEIVING DATA
233 // 1 out of 256
234 if(!Uart.dropPosition) {
235 Uart.state = STATE_UNSYNCD;
236 Uart.highCnt = 0;
9f693930 237 //error = 3;
cee5a30d 238 }
239 else {
240 Uart.dropPosition--;
241 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
242 Uart.byteCnt++;
cee5a30d 243 Uart.bitCnt = 0;
244 Uart.shiftReg = 0;
245 Uart.nOutOfCnt = 0;
246 Uart.dropPosition = 0;
247 }
248 }
249
250 /*if(error) {
251 Uart.output[Uart.byteCnt] = 0xAA;
252 Uart.byteCnt++;
253 Uart.output[Uart.byteCnt] = error & 0xFF;
254 Uart.byteCnt++;
255 Uart.output[Uart.byteCnt] = 0xAA;
256 Uart.byteCnt++;
257 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
258 Uart.byteCnt++;
259 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
260 Uart.byteCnt++;
261 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
262 Uart.byteCnt++;
263 Uart.output[Uart.byteCnt] = 0xAA;
264 Uart.byteCnt++;
265 return TRUE;
266 }*/
267 }
268
269 }
270 else {
271 bit = Uart.bitBuffer & 0xf0;
272 bit >>= 4;
273 bit ^= 0x0F; // drops become 1s ;-)
274 if(bit) {
275 // should have been high or at least (4 * 128) / fc
276 // according to ISO this should be at least (9 * 128 + 20) / fc
277 if(Uart.highCnt == 8) {
278 // we went low, so this could be start of communication
279 // it turns out to be safer to choose a less significant
280 // syncbit... so we check whether the neighbour also represents the drop
281 Uart.posCnt = 1; // apparently we are busy with our first half bit period
282 Uart.syncBit = bit & 8;
283 Uart.samples = 3;
284 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
285 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
286 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
287 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
288 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
289 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
290 Uart.syncBit = 8;
291
292 // the first half bit period is expected in next sample
293 Uart.posCnt = 0;
294 Uart.samples = 3;
295 }
296 }
297 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
298
299 Uart.syncBit <<= 4;
300 Uart.state = STATE_START_OF_COMMUNICATION;
301 Uart.bitCnt = 0;
302 Uart.byteCnt = 0;
cee5a30d 303 Uart.nOutOfCnt = 0;
304 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
305 Uart.dropPosition = 0;
306 Uart.shiftReg = 0;
9f693930 307 //error = 0;
cee5a30d 308 }
309 else {
310 Uart.highCnt = 0;
311 }
312 }
313 else {
314 if(Uart.highCnt < 8) {
315 Uart.highCnt++;
316 }
317 }
318 }
319
320 return FALSE;
321}
322
323//=============================================================================
1e262141 324// Manchester
cee5a30d 325//=============================================================================
326
327static struct {
328 enum {
329 DEMOD_UNSYNCD,
330 DEMOD_START_OF_COMMUNICATION,
331 DEMOD_START_OF_COMMUNICATION2,
332 DEMOD_START_OF_COMMUNICATION3,
333 DEMOD_SOF_COMPLETE,
334 DEMOD_MANCHESTER_D,
335 DEMOD_MANCHESTER_E,
336 DEMOD_END_OF_COMMUNICATION,
337 DEMOD_END_OF_COMMUNICATION2,
338 DEMOD_MANCHESTER_F,
339 DEMOD_ERROR_WAIT
340 } state;
341 int bitCount;
342 int posCount;
343 int syncBit;
cee5a30d 344 uint16_t shiftReg;
345 int buffer;
346 int buffer2;
347 int buffer3;
348 int buff;
349 int samples;
350 int len;
351 enum {
352 SUB_NONE,
353 SUB_FIRST_HALF,
354 SUB_SECOND_HALF,
355 SUB_BOTH
356 } sub;
357 uint8_t *output;
358} Demod;
359
360static RAMFUNC int ManchesterDecoding(int v)
361{
362 int bit;
363 int modulation;
364 int error = 0;
365
366 bit = Demod.buffer;
367 Demod.buffer = Demod.buffer2;
368 Demod.buffer2 = Demod.buffer3;
369 Demod.buffer3 = v;
370
371 if(Demod.buff < 3) {
372 Demod.buff++;
373 return FALSE;
374 }
375
376 if(Demod.state==DEMOD_UNSYNCD) {
377 Demod.output[Demod.len] = 0xfa;
378 Demod.syncBit = 0;
379 //Demod.samples = 0;
380 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
cee5a30d 381
382 if(bit & 0x08) {
383 Demod.syncBit = 0x08;
384 }
385
386 if(bit & 0x04) {
387 if(Demod.syncBit) {
388 bit <<= 4;
389 }
390 Demod.syncBit = 0x04;
391 }
392
393 if(bit & 0x02) {
394 if(Demod.syncBit) {
395 bit <<= 2;
396 }
397 Demod.syncBit = 0x02;
398 }
399
400 if(bit & 0x01 && Demod.syncBit) {
401 Demod.syncBit = 0x01;
402 }
403
404 if(Demod.syncBit) {
405 Demod.len = 0;
406 Demod.state = DEMOD_START_OF_COMMUNICATION;
407 Demod.sub = SUB_FIRST_HALF;
408 Demod.bitCount = 0;
409 Demod.shiftReg = 0;
cee5a30d 410 Demod.samples = 0;
411 if(Demod.posCount) {
412 //if(trigger) LED_A_OFF(); // Not useful in this case...
413 switch(Demod.syncBit) {
414 case 0x08: Demod.samples = 3; break;
415 case 0x04: Demod.samples = 2; break;
416 case 0x02: Demod.samples = 1; break;
417 case 0x01: Demod.samples = 0; break;
418 }
419 // SOF must be long burst... otherwise stay unsynced!!!
420 if(!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
421 Demod.state = DEMOD_UNSYNCD;
422 }
423 }
424 else {
425 // SOF must be long burst... otherwise stay unsynced!!!
426 if(!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
427 Demod.state = DEMOD_UNSYNCD;
428 error = 0x88;
429 }
430
431 }
432 error = 0;
433
434 }
435 }
436 else {
437 modulation = bit & Demod.syncBit;
438 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
cee5a30d 439
440 Demod.samples += 4;
441
442 if(Demod.posCount==0) {
443 Demod.posCount = 1;
444 if(modulation) {
445 Demod.sub = SUB_FIRST_HALF;
446 }
447 else {
448 Demod.sub = SUB_NONE;
449 }
450 }
451 else {
452 Demod.posCount = 0;
453 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
454 if(Demod.state!=DEMOD_ERROR_WAIT) {
455 Demod.state = DEMOD_ERROR_WAIT;
456 Demod.output[Demod.len] = 0xaa;
457 error = 0x01;
458 }
459 }*/
460 //else if(modulation) {
461 if(modulation) {
462 if(Demod.sub == SUB_FIRST_HALF) {
463 Demod.sub = SUB_BOTH;
464 }
465 else {
466 Demod.sub = SUB_SECOND_HALF;
467 }
468 }
469 else if(Demod.sub == SUB_NONE) {
470 if(Demod.state == DEMOD_SOF_COMPLETE) {
471 Demod.output[Demod.len] = 0x0f;
472 Demod.len++;
cee5a30d 473 Demod.state = DEMOD_UNSYNCD;
474// error = 0x0f;
475 return TRUE;
476 }
477 else {
478 Demod.state = DEMOD_ERROR_WAIT;
479 error = 0x33;
480 }
481 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
482 Demod.state = DEMOD_ERROR_WAIT;
483 Demod.output[Demod.len] = 0xaa;
484 error = 0x01;
485 }*/
486 }
487
488 switch(Demod.state) {
489 case DEMOD_START_OF_COMMUNICATION:
490 if(Demod.sub == SUB_BOTH) {
491 //Demod.state = DEMOD_MANCHESTER_D;
492 Demod.state = DEMOD_START_OF_COMMUNICATION2;
493 Demod.posCount = 1;
494 Demod.sub = SUB_NONE;
495 }
496 else {
497 Demod.output[Demod.len] = 0xab;
498 Demod.state = DEMOD_ERROR_WAIT;
499 error = 0xd2;
500 }
501 break;
502 case DEMOD_START_OF_COMMUNICATION2:
503 if(Demod.sub == SUB_SECOND_HALF) {
504 Demod.state = DEMOD_START_OF_COMMUNICATION3;
505 }
506 else {
507 Demod.output[Demod.len] = 0xab;
508 Demod.state = DEMOD_ERROR_WAIT;
509 error = 0xd3;
510 }
511 break;
512 case DEMOD_START_OF_COMMUNICATION3:
513 if(Demod.sub == SUB_SECOND_HALF) {
514// Demod.state = DEMOD_MANCHESTER_D;
515 Demod.state = DEMOD_SOF_COMPLETE;
516 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
517 //Demod.len++;
518 }
519 else {
520 Demod.output[Demod.len] = 0xab;
521 Demod.state = DEMOD_ERROR_WAIT;
522 error = 0xd4;
523 }
524 break;
525 case DEMOD_SOF_COMPLETE:
526 case DEMOD_MANCHESTER_D:
527 case DEMOD_MANCHESTER_E:
528 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
529 // 00001111 = 1 (0 in 14443)
530 if(Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
531 Demod.bitCount++;
532 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
533 Demod.state = DEMOD_MANCHESTER_D;
534 }
535 else if(Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
536 Demod.bitCount++;
537 Demod.shiftReg >>= 1;
538 Demod.state = DEMOD_MANCHESTER_E;
539 }
540 else if(Demod.sub == SUB_BOTH) {
541 Demod.state = DEMOD_MANCHESTER_F;
542 }
543 else {
544 Demod.state = DEMOD_ERROR_WAIT;
545 error = 0x55;
546 }
547 break;
548
549 case DEMOD_MANCHESTER_F:
550 // Tag response does not need to be a complete byte!
551 if(Demod.len > 0 || Demod.bitCount > 0) {
552 if(Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
f5ed4d12 553 Demod.shiftReg >>= (9 - Demod.bitCount); // right align data
cee5a30d 554 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
555 Demod.len++;
cee5a30d 556 }
557
558 Demod.state = DEMOD_UNSYNCD;
559 return TRUE;
560 }
561 else {
562 Demod.output[Demod.len] = 0xad;
563 Demod.state = DEMOD_ERROR_WAIT;
564 error = 0x03;
565 }
566 break;
567
568 case DEMOD_ERROR_WAIT:
569 Demod.state = DEMOD_UNSYNCD;
570 break;
571
572 default:
573 Demod.output[Demod.len] = 0xdd;
574 Demod.state = DEMOD_UNSYNCD;
575 break;
576 }
577
578 /*if(Demod.bitCount>=9) {
579 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
580 Demod.len++;
581
582 Demod.parityBits <<= 1;
583 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
584
585 Demod.bitCount = 0;
586 Demod.shiftReg = 0;
587 }*/
588 if(Demod.bitCount>=8) {
589 Demod.shiftReg >>= 1;
590 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
591 Demod.len++;
cee5a30d 592 Demod.bitCount = 0;
593 Demod.shiftReg = 0;
594 }
595
596 if(error) {
597 Demod.output[Demod.len] = 0xBB;
598 Demod.len++;
599 Demod.output[Demod.len] = error & 0xFF;
600 Demod.len++;
601 Demod.output[Demod.len] = 0xBB;
602 Demod.len++;
603 Demod.output[Demod.len] = bit & 0xFF;
604 Demod.len++;
605 Demod.output[Demod.len] = Demod.buffer & 0xFF;
606 Demod.len++;
607 // Look harder ;-)
608 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
609 Demod.len++;
610 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
611 Demod.len++;
612 Demod.output[Demod.len] = 0xBB;
613 Demod.len++;
614 return TRUE;
615 }
616
617 }
618
619 } // end (state != UNSYNCED)
620
621 return FALSE;
622}
623
624//=============================================================================
1e262141 625// Finally, a `sniffer' for iClass communication
cee5a30d 626// Both sides of communication!
627//=============================================================================
628
629//-----------------------------------------------------------------------------
630// Record the sequence of commands sent by the reader to the tag, with
631// triggering so that we start recording at the point that the tag is moved
632// near the reader.
633//-----------------------------------------------------------------------------
634void RAMFUNC SnoopIClass(void)
635{
cee5a30d 636 // We won't start recording the frames that we acquire until we trigger;
637 // a good trigger condition to get started is probably when we see a
638 // response from the tag.
9f693930 639 //int triggered = FALSE; // FALSE to wait first for card
cee5a30d 640
641 // The command (reader -> tag) that we're receiving.
642 // The length of a received command will in most cases be no more than 18 bytes.
643 // So 32 should be enough!
f71f4deb 644 #define ICLASS_BUFFER_SIZE 32
645 uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE];
cee5a30d 646 // The response (tag -> reader) that we're receiving.
f71f4deb 647 uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE];
6a1f2d82 648
7cc204bf 649 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
650
f71f4deb 651 // free all BigBuf memory
652 BigBuf_free();
653 // The DMA buffer, used to stream samples from the FPGA
654 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
655
3000dc4e
MHS		 656 set_tracing(TRUE);
657 clear_trace();
1e262141 658 iso14a_set_trigger(FALSE);
cee5a30d 659
cee5a30d 660 int lastRxCounter;
117d9ec2 661 uint8_t *upTo;
cee5a30d 662 int smpl;
663 int maxBehindBy = 0;
664
665 // Count of samples received so far, so that we can include timing
666 // information in the trace buffer.
667 int samples = 0;
668 rsamples = 0;
669
cee5a30d 670 // Set up the demodulator for tag -> reader responses.
17cba269 671 Demod.output = tagToReaderResponse;
cee5a30d 672 Demod.len = 0;
673 Demod.state = DEMOD_UNSYNCD;
674
675 // Setup for the DMA.
676 FpgaSetupSsc();
677 upTo = dmaBuf;
678 lastRxCounter = DMA_BUFFER_SIZE;
679 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
680
681 // And the reader -> tag commands
682 memset(&Uart, 0, sizeof(Uart));
17cba269 683 Uart.output = readerToTagCmd;
cee5a30d 684 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
685 Uart.state = STATE_UNSYNCD;
686
687 // And put the FPGA in the appropriate mode
688 // Signal field is off with the appropriate LED
689 LED_D_OFF();
690 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
691 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
692
81012e67 693 uint32_t time_0 = GetCountSspClk();
55eaed8f
MHS		 694 uint32_t time_start = 0;
695 uint32_t time_stop = 0;
81012e67 696
cee5a30d 697 int div = 0;
698 //int div2 = 0;
699 int decbyte = 0;
700 int decbyter = 0;
701
702 // And now we loop, receiving samples.
703 for(;;) {
704 LED_A_ON();
705 WDT_HIT();
706 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
707 (DMA_BUFFER_SIZE-1);
708 if(behindBy > maxBehindBy) {
709 maxBehindBy = behindBy;
f71f4deb 710 if(behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
cee5a30d 711 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
712 goto done;
713 }
714 }
715 if(behindBy < 1) continue;
716
717 LED_A_OFF();
718 smpl = upTo[0];
719 upTo++;
720 lastRxCounter -= 1;
721 if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
722 upTo -= DMA_BUFFER_SIZE;
723 lastRxCounter += DMA_BUFFER_SIZE;
724 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
725 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
726 }
727
728 //samples += 4;
729 samples += 1;
cee5a30d 730
cee5a30d 731 if(smpl & 0xF) {
732 decbyte ^= (1 << (3 - div));
733 }
cee5a30d 734
735 // FOR READER SIDE COMMUMICATION...
17cba269 736
cee5a30d 737 decbyter <<= 2;
738 decbyter ^= (smpl & 0x30);
739
740 div++;
741
742 if((div + 1) % 2 == 0) {
743 smpl = decbyter;
1e262141 744 if(OutOfNDecoding((smpl & 0xF0) >> 4)) {
cee5a30d 745 rsamples = samples - Uart.samples;
55eaed8f 746 time_stop = (GetCountSspClk()-time_0) << 4;
cee5a30d 747 LED_C_ON();
17cba269 748
81012e67 749 //if(!LogTrace(Uart.output,Uart.byteCnt, rsamples, Uart.parityBits,TRUE)) break;
17cba269 750 //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
6a1f2d82 751 if(tracing) {
a501c82b 752 uint8_t parity[MAX_PARITY_SIZE];
753 GetParity(Uart.output, Uart.byteCnt, parity);
55eaed8f 754 LogTrace(Uart.output,Uart.byteCnt, time_start, time_stop, parity, TRUE);
81012e67
MHS		 755 }
756
17cba269
MHS		 757
758 /* And ready to receive another command. */
cee5a30d 759 Uart.state = STATE_UNSYNCD;
760 /* And also reset the demod code, which might have been */
761 /* false-triggered by the commands from the reader. */
762 Demod.state = DEMOD_UNSYNCD;
763 LED_B_OFF();
764 Uart.byteCnt = 0;
55eaed8f
MHS		 765 }else{
766 time_start = (GetCountSspClk()-time_0) << 4;
cee5a30d 767 }
768 decbyter = 0;
769 }
770
771 if(div > 3) {
772 smpl = decbyte;
773 if(ManchesterDecoding(smpl & 0x0F)) {
55eaed8f
MHS		 774 time_stop = (GetCountSspClk()-time_0) << 4;
775
cee5a30d 776 rsamples = samples - Demod.samples;
777 LED_B_ON();
778
6a1f2d82 779 if(tracing) {
a501c82b 780 uint8_t parity[MAX_PARITY_SIZE];
781 GetParity(Demod.output, Demod.len, parity);
55eaed8f 782 LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, FALSE);
81012e67 783 }
17cba269 784
cee5a30d 785 // And ready to receive another response.
786 memset(&Demod, 0, sizeof(Demod));
17cba269 787 Demod.output = tagToReaderResponse;
cee5a30d 788 Demod.state = DEMOD_UNSYNCD;
789 LED_C_OFF();
55eaed8f
MHS		 790 }else{
791 time_start = (GetCountSspClk()-time_0) << 4;
cee5a30d 792 }
793
794 div = 0;
795 decbyte = 0x00;
796 }
797 //}
798
799 if(BUTTON_PRESS()) {
800 DbpString("cancelled_a");
801 goto done;
802 }
803 }
804
805 DbpString("COMMAND FINISHED");
806
807 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
3000dc4e 808 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
cee5a30d 809
810done:
811 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
812 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
3000dc4e 813 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
cee5a30d 814 LED_A_OFF();
815 LED_B_OFF();
1e262141 816 LED_C_OFF();
817 LED_D_OFF();
818}
819
912a3e94 820void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
821 int i;
822 for(i = 0; i < 8; i++) {
823 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
1e262141 824 }
825}
826
827//-----------------------------------------------------------------------------
828// Wait for commands from reader
829// Stop when button is pressed
830// Or return TRUE when command is captured
831//-----------------------------------------------------------------------------
832static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen)
833{
912a3e94 834 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1e262141 835 // only, since we are receiving, not transmitting).
836 // Signal field is off with the appropriate LED
837 LED_D_OFF();
838 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
839
840 // Now run a `software UART' on the stream of incoming samples.
841 Uart.output = received;
842 Uart.byteCntMax = maxLen;
843 Uart.state = STATE_UNSYNCD;
844
845 for(;;) {
846 WDT_HIT();
847
848 if(BUTTON_PRESS()) return FALSE;
849
850 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
851 AT91C_BASE_SSC->SSC_THR = 0x00;
852 }
853 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
854 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
95e63594 855
1e262141 856 if(OutOfNDecoding(b & 0x0f)) {
857 *len = Uart.byteCnt;
858 return TRUE;
859 }
860 }
861 }
862}
863
645c960f
MHS		 864static uint8_t encode4Bits(const uint8_t b)
865{
866 uint8_t c = b & 0xF;
867 // OTA, the least significant bits first
868 // The columns are
869 // 1 - Bit value to send
870 // 2 - Reversed (big-endian)
871 // 3 - Encoded
872 // 4 - Hex values
873
874 switch(c){
875 // 1 2 3 4
876 case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
877 case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
878 case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
879 case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
880 case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
881 case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
882 case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
883 case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
884 case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
885 case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
886 case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
887 case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
888 case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
889 case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
890 case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
891 default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
892
893 }
894}
1e262141 895
896//-----------------------------------------------------------------------------
897// Prepare tag messages
898//-----------------------------------------------------------------------------
899static void CodeIClassTagAnswer(const uint8_t *cmd, int len)
900{
645c960f
MHS		 901
902 /*
903 * SOF comprises 3 parts;
904 * * An unmodulated time of 56.64 us
905 * * 24 pulses of 423.75 KHz (fc/32)
906 * * A logic 1, which starts with an unmodulated time of 18.88us
907 * followed by 8 pulses of 423.75kHz (fc/32)
908 *
909 *
910 * EOF comprises 3 parts:
911 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
912 * time of 18.88us.
913 * - 24 pulses of fc/32
914 * - An unmodulated time of 56.64 us
915 *
916 *
917 * A logic 0 starts with 8 pulses of fc/32
918 * followed by an unmodulated time of 256/fc (~18,88us).
919 *
920 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
921 * 8 pulses of fc/32 (also 18.88us)
922 *
923 * The mode FPGA_HF_SIMULATOR_MODULATE_424K_8BIT which we use to simulate tag,
924 * works like this.
925 * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us).
926 * - A 0-bit inptu to the FPGA becomes an unmodulated time of 18.88us
927 *
6b038d19 928 * In this mode the SOF can be written as 00011101 = 0x1D
645c960f
MHS		 929 * The EOF can be written as 10111000 = 0xb8
930 * A logic 1 is 01
931 * A logic 0 is 10
932 *
933 * */
934
1e262141 935 int i;
936
937 ToSendReset();
938
939 // Send SOF
645c960f 940 ToSend[++ToSendMax] = 0x1D;
1e262141 941
942 for(i = 0; i < len; i++) {
1e262141 943 uint8_t b = cmd[i];
645c960f
MHS		 944 ToSend[++ToSendMax] = encode4Bits(b & 0xF); //Least significant half
945 ToSend[++ToSendMax] = encode4Bits((b >>4) & 0xF);//Most significant half
1e262141 946 }
1e262141 947
948 // Send EOF
645c960f 949 ToSend[++ToSendMax] = 0xB8;
81012e67 950 //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end
1e262141 951 // Convert from last byte pos to length
952 ToSendMax++;
953}
954
955// Only SOF
956static void CodeIClassTagSOF()
957{
81012e67
MHS		 958 //So far a dummy implementation, not used
959 //int lastProxToAirDuration =0;
1e262141 960
81012e67 961 ToSendReset();
1e262141 962 // Send SOF
645c960f 963 ToSend[++ToSendMax] = 0x1D;
81012e67
MHS		 964// lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning
965
1e262141 966 // Convert from last byte pos to length
967 ToSendMax++;
968}
b67f7ec3
MHS		 969#define MODE_SIM_CSN 0
970#define MODE_EXIT_AFTER_MAC 1
971#define MODE_FULLSIM 2
55eaed8f 972
b67f7ec3 973int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf);
ff7bb4ef
MHS		 974/**
975 * @brief SimulateIClass simulates an iClass card.
976 * @param arg0 type of simulation
977 * - 0 uses the first 8 bytes in usb data as CSN
978 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
979 * in the usb data. This mode collects MAC from the reader, in order to do an offline
980 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
981 * - Other : Uses the default CSN (031fec8af7ff12e0)
982 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
983 * @param arg2
984 * @param datain
985 */
986void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain)
1e262141 987{
ff7bb4ef
MHS		 988 uint32_t simType = arg0;
989 uint32_t numberOfCSNS = arg1;
7cc204bf 990 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1e262141 991
ff7bb4ef 992 // Enable and clear the trace
3000dc4e
MHS		 993 set_tracing(TRUE);
994 clear_trace();
b67f7ec3
MHS		 995 //Use the emulator memory for SIM
996 uint8_t *emulator = BigBuf_get_EM_addr();
81cd0474 997
ff7bb4ef
MHS		 998 if(simType == 0) {
999 // Use the CSN from commandline
b67f7ec3
MHS		 1000 memcpy(emulator, datain, 8);
1001 doIClassSimulation(MODE_SIM_CSN,NULL);
ff7bb4ef
MHS		 1002 }else if(simType == 1)
1003 {
b67f7ec3
MHS		 1004 //Default CSN
1005 uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1006 // Use the CSN from commandline
1007 memcpy(emulator, csn_crc, 8);
1008 doIClassSimulation(MODE_SIM_CSN,NULL);
ff7bb4ef
MHS		 1009 }
1010 else if(simType == 2)
1011 {
9f6e9d15 1012
7b941c8d 1013 uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 };
a501c82b 1014 Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS);
ff7bb4ef
MHS		 1015 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1016 // in order to collect MAC's from the reader. This can later be used in an offlne-attack
1017 // in order to obtain the keys, as in the "dismantling iclass"-paper.
9f6e9d15
MHS		 1018 int i = 0;
1019 for( ; i < numberOfCSNS && i*8+8 < USB_CMD_DATA_SIZE; i++)
ff7bb4ef
MHS		 1020 {
1021 // The usb data is 512 bytes, fitting 65 8-byte CSNs in there.
1022
b67f7ec3
MHS		 1023 memcpy(emulator, datain+(i*8), 8);
1024 if(doIClassSimulation(MODE_EXIT_AFTER_MAC,mac_responses+i*8))
f83cc126 1025 {
645c960f 1026 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
f83cc126
MHS		 1027 return; // Button pressed
1028 }
ff7bb4ef 1029 }
9f6e9d15
MHS		 1030 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
1031
b67f7ec3
MHS		 1032 }else if(simType == 3){
1033 //This is 'full sim' mode, where we use the emulator storage for data.
1034 doIClassSimulation(MODE_FULLSIM, NULL);
81012e67
MHS		 1035 }
1036 else{
ff7bb4ef
MHS		 1037 // We may want a mode here where we hardcode the csns to use (from proxclone).
1038 // That will speed things up a little, but not required just yet.
1039 Dbprintf("The mode is not implemented, reserved for future use");
1040 }
9f6e9d15 1041 Dbprintf("Done...");
ff7bb4ef
MHS		 1042
1043}
c8387e85
MHS		 1044void AppendCrc(uint8_t* data, int len)
1045{
1046 ComputeCrc14443(CRC_ICLASS,data,len,data+len,data+len+1);
1047}
b67f7ec3 1048
ff7bb4ef
MHS		 1049/**
1050 * @brief Does the actual simulation
1051 * @param csn - csn to use
1052 * @param breakAfterMacReceived if true, returns after reader MAC has been received.
1053 */
b67f7ec3 1054int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
ff7bb4ef 1055{
b67f7ec3
MHS		 1056 // free eventually allocated BigBuf memory
1057 BigBuf_free_keep_EM();
55eaed8f 1058
61fe9073
MHS		 1059 State cipher_state;
1060// State cipher_state_reserve;
b67f7ec3
MHS		 1061 uint8_t *csn = BigBuf_get_EM_addr();
1062 uint8_t *emulator = csn;
1063 uint8_t sof_data[] = { 0x0F} ;
1e262141 1064 // CSN followed by two CRC bytes
b67f7ec3
MHS		 1065 uint8_t anticoll_data[10] = { 0 };
1066 uint8_t csn_data[10] = { 0 };
1067 memcpy(csn_data,csn,sizeof(csn_data));
f83cc126 1068 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x",csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1e262141 1069
1e262141 1070 // Construct anticollision-CSN
b67f7ec3 1071 rotateCSN(csn_data,anticoll_data);
1e262141 1072
1073 // Compute CRC on both CSNs
b67f7ec3
MHS		 1074 ComputeCrc14443(CRC_ICLASS, anticoll_data, 8, &anticoll_data[8], &anticoll_data[9]);
1075 ComputeCrc14443(CRC_ICLASS, csn_data, 8, &csn_data[8], &csn_data[9]);
1076
61fe9073 1077 uint8_t diversified_key[8] = { 0 };
b67f7ec3
MHS		 1078 // e-Purse
1079 uint8_t card_challenge_data[8] = { 0x00 };
1080 if(simulationMode == MODE_FULLSIM)
1081 {
e5cd4ee4
MHS		 1082 //The diversified key should be stored on block 3
1083 //Get the diversified key from emulator memory
1084 memcpy(diversified_key, emulator+(8*3),8);
1085
b67f7ec3
MHS		 1086 //Card challenge, a.k.a e-purse is on block 2
1087 memcpy(card_challenge_data,emulator + (8 * 2) , 8);
61fe9073 1088 //Precalculate the cipher state, feeding it the CC
e5cd4ee4
MHS		 1089 cipher_state = opt_doTagMAC_1(card_challenge_data,diversified_key);
1090
b67f7ec3 1091 }
1e262141 1092
ff7bb4ef 1093 int exitLoop = 0;
1e262141 1094 // Reader 0a
1095 // Tag 0f
1096 // Reader 0c
1097 // Tag anticoll. CSN
1098 // Reader 81 anticoll. CSN
1099 // Tag CSN
1100
55eaed8f 1101 uint8_t *modulated_response;
b19caaef 1102 int modulated_response_size = 0;
55eaed8f
MHS		 1103 uint8_t* trace_data = NULL;
1104 int trace_data_size = 0;
1e262141 1105
b67f7ec3 1106
645c960f 1107 // Respond SOF -- takes 1 bytes
b67f7ec3
MHS		 1108 uint8_t *resp_sof = BigBuf_malloc(2);
1109 int resp_sof_Len;
1e262141 1110
1111 // Anticollision CSN (rotated CSN)
645c960f 1112 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
b67f7ec3
MHS		 1113 uint8_t *resp_anticoll = BigBuf_malloc(28);
1114 int resp_anticoll_len;
1e262141 1115
1116 // CSN
645c960f 1117 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
b67f7ec3
MHS		 1118 uint8_t *resp_csn = BigBuf_malloc(30);
1119 int resp_csn_len;
1e262141 1120
1121 // e-Purse
b3cc5f29 1122 // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
b67f7ec3
MHS		 1123 uint8_t *resp_cc = BigBuf_malloc(20);
1124 int resp_cc_len;
1e262141 1125
f71f4deb 1126 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
a501c82b 1127 memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
1e262141 1128 int len;
1129
1e262141 1130 // Prepare card messages
1131 ToSendMax = 0;
1132
1133 // First card answer: SOF
1134 CodeIClassTagSOF();
b67f7ec3 1135 memcpy(resp_sof, ToSend, ToSendMax); resp_sof_Len = ToSendMax;
1e262141 1136
1137 // Anticollision CSN
b67f7ec3
MHS		 1138 CodeIClassTagAnswer(anticoll_data, sizeof(anticoll_data));
1139 memcpy(resp_anticoll, ToSend, ToSendMax); resp_anticoll_len = ToSendMax;
1e262141 1140
1141 // CSN
b67f7ec3
MHS		 1142 CodeIClassTagAnswer(csn_data, sizeof(csn_data));
1143 memcpy(resp_csn, ToSend, ToSendMax); resp_csn_len = ToSendMax;
1e262141 1144
1145 // e-Purse
b67f7ec3
MHS		 1146 CodeIClassTagAnswer(card_challenge_data, sizeof(card_challenge_data));
1147 memcpy(resp_cc, ToSend, ToSendMax); resp_cc_len = ToSendMax;
1e262141 1148
b19caaef 1149 //This is used for responding to READ-block commands or other data which is dynamically generated
c8387e85
MHS		 1150 //First the 'trace'-data, not encoded for FPGA
1151 uint8_t *data_generic_trace = BigBuf_malloc(8 + 2);//8 bytes data + 2byte CRC is max tag answer
1152 //Then storage for the modulated data
1153 //Each bit is doubled when modulated for FPGA, and we also have SOF and EOF (2 bytes)
1154 uint8_t *data_response = BigBuf_malloc( (8+2) * 2 + 2);
e3dc1e4c
MHS		 1155
1156 // Start from off (no field generated)
fa541aca
MHS		 1157 //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1158 //SpinDelay(200);
1159 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1160 SpinDelay(100);
1161 StartCountSspClk();
1e262141 1162 // We need to listen to the high-frequency, peak-detected path.
1163 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1164 FpgaSetupSsc();
1165
1166 // To control where we are in the protocol
1e262141 1167 int cmdsRecvd = 0;
81012e67
MHS		 1168 uint32_t time_0 = GetCountSspClk();
1169 uint32_t t2r_time =0;
1170 uint32_t r2t_time =0;
912a3e94 1171
1e262141 1172 LED_A_ON();
f83cc126 1173 bool buttonPressed = false;
e5cd4ee4 1174 uint8_t response_delay = 1;
ff7bb4ef 1175 while(!exitLoop) {
e5cd4ee4 1176 response_delay = 1;
1e262141 1177 LED_B_OFF();
e3dc1e4c
MHS		 1178 //Signal tracer
1179 // Can be used to get a trigger for an oscilloscope..
1180 LED_C_OFF();
1181
1e262141 1182 if(!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
f83cc126 1183 buttonPressed = true;
1e262141 1184 break;
81cd0474 1185 }
81012e67 1186 r2t_time = GetCountSspClk();
e3dc1e4c
MHS		 1187 //Signal tracer
1188 LED_C_ON();
1e262141 1189
81cd0474 1190 // Okay, look at the command now.
b67f7ec3 1191 if(receivedCmd[0] == ICLASS_CMD_ACTALL ) {
1e262141 1192 // Reader in anticollission phase
b67f7ec3
MHS		 1193 modulated_response = resp_sof; modulated_response_size = resp_sof_Len; //order = 1;
1194 trace_data = sof_data;
1195 trace_data_size = sizeof(sof_data);
1196 } else if(receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) {
1e262141 1197 // Reader asks for anticollission CSN
b67f7ec3
MHS		 1198 modulated_response = resp_anticoll; modulated_response_size = resp_anticoll_len; //order = 2;
1199 trace_data = anticoll_data;
1200 trace_data_size = sizeof(anticoll_data);
1e262141 1201 //DbpString("Reader requests anticollission CSN:");
b67f7ec3 1202 } else if(receivedCmd[0] == ICLASS_CMD_SELECT) {
1e262141 1203 // Reader selects anticollission CSN.
1204 // Tag sends the corresponding real CSN
b67f7ec3
MHS		 1205 modulated_response = resp_csn; modulated_response_size = resp_csn_len; //order = 3;
1206 trace_data = csn_data;
1207 trace_data_size = sizeof(csn_data);
1e262141 1208 //DbpString("Reader selects anticollission CSN:");
b67f7ec3 1209 } else if(receivedCmd[0] == ICLASS_CMD_READCHECK_KD) {
1e262141 1210 // Read e-purse (88 02)
b67f7ec3
MHS		 1211 modulated_response = resp_cc; modulated_response_size = resp_cc_len; //order = 4;
1212 trace_data = card_challenge_data;
1213 trace_data_size = sizeof(card_challenge_data);
1e262141 1214 LED_B_ON();
b67f7ec3 1215 } else if(receivedCmd[0] == ICLASS_CMD_CHECK) {
1e262141 1216 // Reader random and reader MAC!!!
b67f7ec3 1217 if(simulationMode == MODE_FULLSIM)
61fe9073
MHS		 1218 {
1219 //NR, from reader, is in receivedCmd +1
1220 opt_doTagMAC_2(cipher_state,receivedCmd+1,data_generic_trace,diversified_key);
1221
b19caaef 1222 trace_data = data_generic_trace;
b67f7ec3
MHS		 1223 trace_data_size = 4;
1224 CodeIClassTagAnswer(trace_data , trace_data_size);
1225 memcpy(data_response, ToSend, ToSendMax);
1226 modulated_response = data_response;
1227 modulated_response_size = ToSendMax;
e5cd4ee4 1228 response_delay = 0;//We need to hurry here...
10a8875c 1229 //exitLoop = true;
b67f7ec3
MHS		 1230 }else
1231 { //Not fullsim, we don't respond
f38a1528 1232 // We do not know what to answer, so lets keep quiet
b67f7ec3 1233 modulated_response = resp_sof; modulated_response_size = 0;
55eaed8f
MHS		 1234 trace_data = NULL;
1235 trace_data_size = 0;
b67f7ec3 1236 if (simulationMode == MODE_EXIT_AFTER_MAC){
ff7bb4ef 1237 // dbprintf:ing ...
f5ed4d12 1238 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x"
1239 ,csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
ff7bb4ef 1240 Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len,
a501c82b 1241 receivedCmd[0], receivedCmd[1], receivedCmd[2],
ff7bb4ef
MHS		 1242 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1243 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
9f6e9d15
MHS		 1244 if (reader_mac_buf != NULL)
1245 {
1246 memcpy(reader_mac_buf,receivedCmd+1,8);
1247 }
ff7bb4ef
MHS		 1248 exitLoop = true;
1249 }
ff7bb4ef 1250 }
b67f7ec3
MHS		 1251
1252 } else if(receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
1e262141 1253 // Reader ends the session
b67f7ec3 1254 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
55eaed8f
MHS		 1255 trace_data = NULL;
1256 trace_data_size = 0;
b67f7ec3
MHS		 1257 } else if(simulationMode == MODE_FULLSIM && receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4){
1258 //Read block
1259 uint16_t blk = receivedCmd[1];
c8387e85
MHS		 1260 //Take the data...
1261 memcpy(data_generic_trace, emulator+(blk << 3),8);
1262 //Add crc
1263 AppendCrc(data_generic_trace, 8);
1264 trace_data = data_generic_trace;
1265 trace_data_size = 10;
1266 CodeIClassTagAnswer(trace_data , trace_data_size);
1267 memcpy(data_response, ToSend, ToSendMax);
1268 modulated_response = data_response;
1269 modulated_response_size = ToSendMax;
1270 }else if(receivedCmd[0] == ICLASS_CMD_UPDATE && simulationMode == MODE_FULLSIM)
1271 {//Probably the reader wants to update the nonce. Let's just ignore that for now.
1272 // OBS! If this is implemented, don't forget to regenerate the cipher_state
1273 //We're expected to respond with the data+crc, exactly what's already in the receivedcmd
1274 //receivedcmd is now UPDATE 1b | ADDRESS 1b| DATA 8b| Signature 4b or CRC 2b|
1275
1276 //Take the data...
1277 memcpy(data_generic_trace, receivedCmd+2,8);
1278 //Add crc
1279 AppendCrc(data_generic_trace, 8);
1280 trace_data = data_generic_trace;
1281 trace_data_size = 10;
b67f7ec3
MHS		 1282 CodeIClassTagAnswer(trace_data , trace_data_size);
1283 memcpy(data_response, ToSend, ToSendMax);
1284 modulated_response = data_response;
1285 modulated_response_size = ToSendMax;
1286 }
b19caaef
MHS		 1287 else if(receivedCmd[0] == ICLASS_CMD_PAGESEL)
1288 {//Pagesel
1289 //Pagesel enables to select a page in the selected chip memory and return its configuration block
1290 //Chips with a single page will not answer to this command
1291 // It appears we're fine ignoring this.
1292 //Otherwise, we should answer 8bytes (block) + 2bytes CRC
1293 }
b67f7ec3 1294 else {
17cba269 1295 //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
1e262141 1296 // Never seen this command before
1297 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1298 len,
1299 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1300 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1301 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1302 // Do not respond
b67f7ec3 1303 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
55eaed8f
MHS		 1304 trace_data = NULL;
1305 trace_data_size = 0;
1e262141 1306 }
1307
81012e67
MHS		 1308 if(cmdsRecvd > 100) {
1309 //DbpString("100 commands later...");
9f6e9d15 1310 //break;
1e262141 1311 }
1312 else {
1313 cmdsRecvd++;
1314 }
55eaed8f 1315 /**
6b038d19 1316 A legit tag has about 380us delay between reader EOT and tag SOF.
55eaed8f
MHS		 1317 **/
1318 if(modulated_response_size > 0) {
e5cd4ee4 1319 SendIClassAnswer(modulated_response, modulated_response_size, response_delay);
81012e67 1320 t2r_time = GetCountSspClk();
81cd0474 1321 }
f83cc126 1322
81cd0474 1323 if (tracing) {
a501c82b 1324 uint8_t parity[MAX_PARITY_SIZE];
1325 GetParity(receivedCmd, len, parity);
1326 LogTrace(receivedCmd,len, (r2t_time-time_0)<< 4, (r2t_time-time_0) << 4, parity, TRUE);
17cba269 1327
55eaed8f
MHS		 1328 if (trace_data != NULL) {
1329 GetParity(trace_data, trace_data_size, parity);
1330 LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, FALSE);
17cba269 1331 }
81012e67
MHS		 1332 if(!tracing) {
1333 DbpString("Trace full");
1334 //break;
1335 }
1336
81cd0474 1337 }
a501c82b 1338 memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
81cd0474 1339 }
1e262141 1340
9f6e9d15 1341 //Dbprintf("%x", cmdsRecvd);
1e262141 1342 LED_A_OFF();
1343 LED_B_OFF();
7b941c8d
MHS		 1344 LED_C_OFF();
1345
f83cc126
MHS		 1346 if(buttonPressed)
1347 {
1348 DbpString("Button pressed");
1349 }
f83cc126 1350 return buttonPressed;
1e262141 1351}
1352
1353static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
1354{
e3dc1e4c 1355 int i = 0, d=0;//, u = 0, d = 0;
1e262141 1356 uint8_t b = 0;
e3dc1e4c 1357
645c960f
MHS		 1358 //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
1359 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K_8BIT);
e3dc1e4c 1360
1e262141 1361 AT91C_BASE_SSC->SSC_THR = 0x00;
1362 FpgaSetupSsc();
e3dc1e4c
MHS		 1363 while(!BUTTON_PRESS()) {
1364 if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
1365 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1e262141 1366 }
e3dc1e4c
MHS		 1367 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){
1368 b = 0x00;
1e262141 1369 if(d < delay) {
1e262141 1370 d++;
1371 }
e3dc1e4c
MHS		 1372 else {
1373 if( i < respLen){
1374 b = resp[i];
1375 //Hack
1376 //b = 0xAC;
1377 }
1378 i++;
1e262141 1379 }
1380 AT91C_BASE_SSC->SSC_THR = b;
1e262141 1381 }
e3dc1e4c 1382
645c960f
MHS		 1383// if (i > respLen +4) break;
1384 if (i > respLen +1) break;
1e262141 1385 }
1386
1387 return 0;
1388}
1389
1390/// THE READER CODE
1391
1392//-----------------------------------------------------------------------------
1393// Transmit the command (to the tag) that was placed in ToSend[].
1394//-----------------------------------------------------------------------------
1395static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait)
1396{
1397 int c;
1e262141 1398 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1399 AT91C_BASE_SSC->SSC_THR = 0x00;
1400 FpgaSetupSsc();
1401
1402 if (wait)
f5ed4d12 1403 {
1404 if(*wait < 10) *wait = 10;
2ed270a8 1405
1e262141 1406 for(c = 0; c < *wait;) {
1407 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1408 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1409 c++;
1410 }
1411 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1412 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1413 (void)r;
1414 }
1415 WDT_HIT();
1416 }
1417
f5ed4d12 1418 }
1419
1420
1e262141 1421 uint8_t sendbyte;
1422 bool firstpart = TRUE;
1423 c = 0;
1424 for(;;) {
1425 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1426
1427 // DOUBLE THE SAMPLES!
1428 if(firstpart) {
1429 sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4);
1430 }
1431 else {
1432 sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4);
1433 c++;
1434 }
1435 if(sendbyte == 0xff) {
1436 sendbyte = 0xfe;
1437 }
1438 AT91C_BASE_SSC->SSC_THR = sendbyte;
1439 firstpart = !firstpart;
1440
1441 if(c >= len) {
1442 break;
1443 }
1444 }
1445 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1446 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1447 (void)r;
1448 }
1449 WDT_HIT();
1450 }
1451 if (samples) *samples = (c + *wait) << 3;
1452}
1453
1454
1455//-----------------------------------------------------------------------------
1456// Prepare iClass reader command to send to FPGA
1457//-----------------------------------------------------------------------------
1458void CodeIClassCommand(const uint8_t * cmd, int len)
1459{
1460 int i, j, k;
1461 uint8_t b;
1462
1463 ToSendReset();
1464
1465 // Start of Communication: 1 out of 4
1466 ToSend[++ToSendMax] = 0xf0;
1467 ToSend[++ToSendMax] = 0x00;
1468 ToSend[++ToSendMax] = 0x0f;
1469 ToSend[++ToSendMax] = 0x00;
1470
1471 // Modulate the bytes
1472 for (i = 0; i < len; i++) {
1473 b = cmd[i];
1474 for(j = 0; j < 4; j++) {
1475 for(k = 0; k < 4; k++) {
e3dc1e4c
MHS		 1476 if(k == (b & 3)) {
1477 ToSend[++ToSendMax] = 0x0f;
1478 }
1479 else {
1480 ToSend[++ToSendMax] = 0x00;
1481 }
1e262141 1482 }
1483 b >>= 2;
1484 }
1485 }
1486
1487 // End of Communication
1488 ToSend[++ToSendMax] = 0x00;
1489 ToSend[++ToSendMax] = 0x00;
1490 ToSend[++ToSendMax] = 0xf0;
1491 ToSend[++ToSendMax] = 0x00;
1492
1493 // Convert from last character reference to length
1494 ToSendMax++;
1495}
1496
1497void ReaderTransmitIClass(uint8_t* frame, int len)
1498{
1499 int wait = 0;
1500 int samples = 0;
1e262141 1501
1502 // This is tied to other size changes
1e262141 1503 CodeIClassCommand(frame,len);
1504
1505 // Select the card
1506 TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait);
1507 if(trigger)
1508 LED_A_ON();
1509
1510 // Store reader command in buffer
6a1f2d82 1511 if (tracing) {
a501c82b 1512 uint8_t par[MAX_PARITY_SIZE];
1513 GetParity(frame, len, par);
1514 LogTrace(frame, len, rsamples, rsamples, par, TRUE);
1515 }
1e262141 1516}
1517
1518//-----------------------------------------------------------------------------
1519// Wait a certain time for tag response
1520// If a response is captured return TRUE
1521// If it takes too long return FALSE
1522//-----------------------------------------------------------------------------
1523static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
1524{
1525 // buffer needs to be 512 bytes
1526 int c;
1527
1528 // Set FPGA mode to "reader listen mode", no modulation (listen
1529 // only, since we are receiving, not transmitting).
1530 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1531
1532 // Now get the answer from the card
1533 Demod.output = receivedResponse;
1534 Demod.len = 0;
1535 Demod.state = DEMOD_UNSYNCD;
1536
1537 uint8_t b;
1538 if (elapsed) *elapsed = 0;
1539
1540 bool skip = FALSE;
1541
1542 c = 0;
1543 for(;;) {
1544 WDT_HIT();
1545
95e63594 1546 if(BUTTON_PRESS()) return FALSE;
1e262141 1547
1548 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1549 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1550 if (elapsed) (*elapsed)++;
1551 }
1552 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1553 if(c < timeout) { c++; } else { return FALSE; }
1554 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1555 skip = !skip;
1556 if(skip) continue;
95e63594 1557
1e262141 1558 if(ManchesterDecoding(b & 0x0f)) {
1559 *samples = c << 3;
1560 return TRUE;
1561 }
1562 }
1563 }
1564}
1565
1566int ReaderReceiveIClass(uint8_t* receivedAnswer)
1567{
1568 int samples = 0;
1569 if (!GetIClassAnswer(receivedAnswer,160,&samples,0)) return FALSE;
7bc95e2e 1570 rsamples += samples;
6a1f2d82 1571 if (tracing) {
1572 uint8_t parity[MAX_PARITY_SIZE];
1573 GetParity(receivedAnswer, Demod.len, parity);
1574 LogTrace(receivedAnswer,Demod.len,rsamples,rsamples,parity,FALSE);
a501c82b 1575 }
1e262141 1576 if(samples == 0) return FALSE;
1577 return Demod.len;
1578}
1579
f38a1528 1580void setupIclassReader()
1581{
1582 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1583 // Reset trace buffer
3000dc4e
MHS		 1584 set_tracing(TRUE);
1585 clear_trace();
f38a1528 1586
1587 // Setup SSC
1588 FpgaSetupSsc();
1589 // Start from off (no field generated)
1590 // Signal field is off with the appropriate LED
1591 LED_D_OFF();
1592 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1593 SpinDelay(200);
1594
1595 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1596
1597 // Now give it time to spin up.
1598 // Signal field is on with the appropriate LED
1599 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1600 SpinDelay(200);
1601 LED_A_ON();
1602
1603}
1604
d3a22c7d 1605size_t sendCmdGetResponseWithRetries(uint8_t* command, size_t cmdsize, uint8_t* resp, uint8_t expected_size, uint8_t retries)
1606{
1607 while(retries-- > 0)
1608 {
1609 ReaderTransmitIClass(command, cmdsize);
1610 if(expected_size == ReaderReceiveIClass(resp)){
1611 return 0;
1612 }
1613 }
1614 return 1;//Error
1615}
1616
1617/**
1618 * @brief Talks to an iclass tag, sends the commands to get CSN and CC.
1619 * @param card_data where the CSN and CC are stored for return
1620 * @return 0 = fail
1621 * 1 = Got CSN
1622 * 2 = Got CSN and CC
1623 */
1624uint8_t handshakeIclassTag(uint8_t *card_data)
1625{
1626 static uint8_t act_all[] = { 0x0a };
1627 static uint8_t identify[] = { 0x0c };
1628 static uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
caaf9618
MHS		 1629
1630
1631 static uint8_t readcheck_cc[]= { 0x88, 0x02,};
1632
f71f4deb 1633 uint8_t resp[ICLASS_BUFFER_SIZE];
d3a22c7d 1634
1635 uint8_t read_status = 0;
1636
1637 // Send act_all
1638 ReaderTransmitIClass(act_all, 1);
1639 // Card present?
1640 if(!ReaderReceiveIClass(resp)) return read_status;//Fail
1641 //Send Identify
1642 ReaderTransmitIClass(identify, 1);
1643 //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC
1644 uint8_t len = ReaderReceiveIClass(resp);
1645 if(len != 10) return read_status;//Fail
1646
1647 //Copy the Anti-collision CSN to our select-packet
1648 memcpy(&select[1],resp,8);
1649 //Select the card
1650 ReaderTransmitIClass(select, sizeof(select));
1651 //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC
1652 len = ReaderReceiveIClass(resp);
1653 if(len != 10) return read_status;//Fail
1654
1655 //Success - level 1, we got CSN
1656 //Save CSN in response data
1657 memcpy(card_data,resp,8);
1658
1659 //Flag that we got to at least stage 1, read CSN
1660 read_status = 1;
1661
1662 // Card selected, now read e-purse (cc)
1663 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1664 if(ReaderReceiveIClass(resp) == 8) {
1665 //Save CC (e-purse) in response data
1666 memcpy(card_data+8,resp,8);
caaf9618 1667 read_status++;
d3a22c7d 1668 }
1669
1670 return read_status;
1671}
1672
caaf9618 1673
1e262141 1674// Reader iClass Anticollission
1675void ReaderIClass(uint8_t arg0) {
f38a1528 1676
83602aff
MHS		 1677 uint8_t card_data[6 * 8]={0};
1678 memset(card_data, 0xFF, sizeof(card_data));
f38a1528 1679 uint8_t last_csn[8]={0};
6a1f2d82 1680
caaf9618
MHS		 1681 //Read conf block CRC(0x01) => 0xfa 0x22
1682 uint8_t readConf[] = { ICLASS_CMD_READ_OR_IDENTIFY,0x01, 0xfa, 0x22};
1683 //Read conf block CRC(0x05) => 0xde 0x64
1684 uint8_t readAA[] = { ICLASS_CMD_READ_OR_IDENTIFY,0x05, 0xde, 0x64};
1685
1686
f38a1528 1687 int read_status= 0;
caaf9618 1688 uint8_t result_status = 0;
f38a1528 1689 bool abort_after_read = arg0 & FLAG_ICLASS_READER_ONLY_ONCE;
8949bb5d 1690 bool try_once = arg0 & FLAG_ICLASS_READER_ONE_TRY;
3000dc4e 1691 set_tracing(TRUE);
f38a1528 1692 setupIclassReader();
1693
8949bb5d 1694 uint16_t tryCnt=0;
f38a1528 1695 while(!BUTTON_PRESS())
1696 {
8949bb5d 1697 if (try_once && tryCnt > 5) break;
1698 tryCnt++;
3000dc4e 1699 if(!tracing) {
d3a22c7d 1700 DbpString("Trace full");
1701 break;
1702 }
c8dd9b09 1703 WDT_HIT();
f38a1528 1704
d3a22c7d 1705 read_status = handshakeIclassTag(card_data);
1706
1707 if(read_status == 0) continue;
caaf9618
MHS		 1708 if(read_status == 1) result_status = FLAG_ICLASS_READER_CSN;
1709 if(read_status == 2) result_status = FLAG_ICLASS_READER_CSN|FLAG_ICLASS_READER_CC;
1710
1711 // handshakeIclass returns CSN|CC, but the actual block
1712 // layout is CSN|CONFIG|CC, so here we reorder the data,
1713 // moving CC forward 8 bytes
1714 memcpy(card_data+16,card_data+8, 8);
1715 //Read block 1, config
1716 if(arg0 & FLAG_ICLASS_READER_CONF)
1717 {
1718 if(sendCmdGetResponseWithRetries(readConf, sizeof(readConf),card_data+8, 10, 10))
1719 {
1720 Dbprintf("Failed to dump config block");
1721 }else
1722 {
1723 result_status |= FLAG_ICLASS_READER_CONF;
1724 }
1725 }
f38a1528 1726
caaf9618
MHS		 1727 //Read block 5, AA
1728 if(arg0 & FLAG_ICLASS_READER_AA){
1729 if(sendCmdGetResponseWithRetries(readAA, sizeof(readAA),card_data+(8*4), 10, 10))
1730 {
1731// Dbprintf("Failed to dump AA block");
1732 }else
1733 {
1734 result_status |= FLAG_ICLASS_READER_AA;
1735 }
1736 }
1737
1738 // 0 : CSN
b67f7ec3 1739 // 1 : Configuration
caaf9618
MHS		 1740 // 2 : e-purse
1741 // (3,4 write-only, kc and kd)
b67f7ec3
MHS		 1742 // 5 Application issuer area
1743 //
1744 //Then we can 'ship' back the 8 * 5 bytes of data,
1745 // with 0xFF:s in block 3 and 4.
1746
f38a1528 1747 LED_B_ON();
1748 //Send back to client, but don't bother if we already sent this
1749 if(memcmp(last_csn, card_data, 8) != 0)
d3a22c7d 1750 {
caaf9618
MHS		 1751 // If caller requires that we get CC, continue until we got it
1752 if( (arg0 & read_status & FLAG_ICLASS_READER_CC) || !(arg0 & FLAG_ICLASS_READER_CC))
d3a22c7d 1753 {
caaf9618 1754 cmd_send(CMD_ACK,result_status,0,0,card_data,sizeof(card_data));
d3a22c7d 1755 if(abort_after_read) {
1756 LED_A_OFF();
1757 return;
1758 }
f38a1528 1759 //Save that we already sent this....
f38a1528 1760 memcpy(last_csn, card_data, 8);
d3a22c7d 1761 }
caaf9618 1762
d3a22c7d 1763 }
c8dd9b09 1764 LED_B_OFF();
f38a1528 1765 }
d3a22c7d 1766 cmd_send(CMD_ACK,0,0,0,card_data, 0);
aa41c605 1767 LED_A_OFF();
f38a1528 1768}
1769
1770void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
d3a22c7d 1771
14edfd09 1772 uint8_t card_data[USB_CMD_DATA_SIZE]={0};
d3a22c7d 1773 uint16_t block_crc_LUT[255] = {0};
1774
1775 {//Generate a lookup table for block crc
1776 for(int block = 0; block < 255; block++){
1777 char bl = block;
1778 block_crc_LUT[block] = iclass_crc16(&bl ,1);
1779 }
1780 }
1781 //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]);
1782
f38a1528 1783 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1784 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1785
fecd8202 1786 uint16_t crc = 0;
f38a1528 1787 uint8_t cardsize=0;
f38a1528 1788 uint8_t mem=0;
1789
1790 static struct memory_t{
1791 int k16;
1792 int book;
1793 int k2;
1794 int lockauth;
1795 int keyaccess;
1796 } memory;
1797
f71f4deb 1798 uint8_t resp[ICLASS_BUFFER_SIZE];
6a1f2d82 1799
f38a1528 1800 setupIclassReader();
3000dc4e 1801 set_tracing(TRUE);
f38a1528 1802
d3a22c7d 1803 while(!BUTTON_PRESS()) {
1804
1805 WDT_HIT();
39d3ce5d 1806
3000dc4e 1807 if(!tracing) {
f38a1528 1808 DbpString("Trace full");
1809 break;
1810 }
1811
d3a22c7d 1812 uint8_t read_status = handshakeIclassTag(card_data);
1813 if(read_status < 2) continue;
1814
f38a1528 1815 //for now replay captured auth (as cc not updated)
1816 memcpy(check+5,MAC,4);
d3a22c7d 1817
1818 if(sendCmdGetResponseWithRetries(check, sizeof(check),resp, 4, 5))
1819 {
f38a1528 1820 Dbprintf("Error: Authentication Fail!");
d3a22c7d 1821 continue;
f38a1528 1822 }
d3a22c7d 1823
1824 //first get configuration block (block 1)
1825 crc = block_crc_LUT[1];
f38a1528 1826 read[1]=1;
f38a1528 1827 read[2] = crc >> 8;
1828 read[3] = crc & 0xff;
d3a22c7d 1829
1830 if(sendCmdGetResponseWithRetries(read, sizeof(read),resp, 10, 10))
1831 {
1832 Dbprintf("Dump config (block 1) failed");
1833 continue;
1834 }
1835
f38a1528 1836 mem=resp[5];
1837 memory.k16= (mem & 0x80);
1838 memory.book= (mem & 0x20);
1839 memory.k2= (mem & 0x8);
1840 memory.lockauth= (mem & 0x2);
1841 memory.keyaccess= (mem & 0x1);
1842
d3a22c7d 1843 cardsize = memory.k16 ? 255 : 32;
1844 WDT_HIT();
14edfd09 1845 //Set card_data to all zeroes, we'll fill it with data
1846 memset(card_data,0x0,USB_CMD_DATA_SIZE);
1847 uint8_t failedRead =0;
428d6221 1848 uint32_t stored_data_length =0;
f38a1528 1849 //then loop around remaining blocks
d3a22c7d 1850 for(int block=0; block < cardsize; block++){
1851
1852 read[1]= block;
1853 crc = block_crc_LUT[block];
f38a1528 1854 read[2] = crc >> 8;
1855 read[3] = crc & 0xff;
d3a22c7d 1856
1857 if(!sendCmdGetResponseWithRetries(read, sizeof(read), resp, 10, 10))
1858 {
f38a1528 1859 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
d3a22c7d 1860 block, resp[0], resp[1], resp[2],
f38a1528 1861 resp[3], resp[4], resp[5],
1862 resp[6], resp[7]);
d3a22c7d 1863
14edfd09 1864 //Fill up the buffer
1865 memcpy(card_data+stored_data_length,resp,8);
1866 stored_data_length += 8;
14edfd09 1867 if(stored_data_length +8 > USB_CMD_DATA_SIZE)
1868 {//Time to send this off and start afresh
1869 cmd_send(CMD_ACK,
1870 stored_data_length,//data length
1871 failedRead,//Failed blocks?
1872 0,//Not used ATM
1873 card_data, stored_data_length);
1874 //reset
1875 stored_data_length = 0;
1876 failedRead = 0;
1877 }
1878
d3a22c7d 1879 }else{
14edfd09 1880 failedRead = 1;
1881 stored_data_length +=8;//Otherwise, data becomes misaligned
d3a22c7d 1882 Dbprintf("Failed to dump block %d", block);
f38a1528 1883 }
1884 }
428d6221 1885
14edfd09 1886 //Send off any remaining data
1887 if(stored_data_length > 0)
1888 {
1889 cmd_send(CMD_ACK,
1890 stored_data_length,//data length
1891 failedRead,//Failed blocks?
1892 0,//Not used ATM
1893 card_data, stored_data_length);
1894 }
d3a22c7d 1895 //If we got here, let's break
1896 break;
f38a1528 1897 }
14edfd09 1898 //Signal end of transmission
1899 cmd_send(CMD_ACK,
1900 0,//data length
1901 0,//Failed blocks?
1902 0,//Not used ATM
1903 card_data, 0);
1904
f38a1528 1905 LED_A_OFF();
1906}
1907
1908//2. Create Read method (cut-down from above) based off responses from 1.
1909// Since we have the MAC could continue to use replay function.
1910//3. Create Write method
1911/*
1912void IClass_iso14443A_write(uint8_t arg0, uint8_t blockNo, uint8_t *data, uint8_t *MAC) {
1913 uint8_t act_all[] = { 0x0a };
1914 uint8_t identify[] = { 0x0c };
1915 uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1916 uint8_t readcheck_cc[]= { 0x88, 0x02 };
1917 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1918 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1919 uint8_t write[] = { 0x87, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1920
1921 uint16_t crc = 0;
1922
14edfd09 1923 uint8_t* resp = (((uint8_t *)BigBuf) + 3560);
7cc204bf 1924
1e262141 1925 // Reset trace buffer
ff7bb4ef 1926 memset(trace, 0x44, RECV_CMD_OFFSET);
1e262141 1927 traceLen = 0;
1928
1929 // Setup SSC
1930 FpgaSetupSsc();
1931 // Start from off (no field generated)
1932 // Signal field is off with the appropriate LED
cee5a30d 1933 LED_D_OFF();
1e262141 1934 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1935 SpinDelay(200);
1936
1937 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1938
1939 // Now give it time to spin up.
1940 // Signal field is on with the appropriate LED
1941 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1942 SpinDelay(200);
1943
1944 LED_A_ON();
1945
f38a1528 1946 for(int i=0;i<1;i++) {
4ab4336a 1947
1948 if(traceLen > TRACE_SIZE) {
1949 DbpString("Trace full");
1950 break;
1951 }
1952
1953 if (BUTTON_PRESS()) break;
1e262141 1954
1955 // Send act_all
1956 ReaderTransmitIClass(act_all, 1);
1957 // Card present?
1958 if(ReaderReceiveIClass(resp)) {
1959 ReaderTransmitIClass(identify, 1);
4ab4336a 1960 if(ReaderReceiveIClass(resp) == 10) {
1961 // Select card
1962 memcpy(&select[1],resp,8);
1963 ReaderTransmitIClass(select, sizeof(select));
1964
1965 if(ReaderReceiveIClass(resp) == 10) {
1966 Dbprintf(" Selected CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1967 resp[0], resp[1], resp[2],
1968 resp[3], resp[4], resp[5],
1969 resp[6], resp[7]);
1970 }
f38a1528 1971 // Card selected
1972 Dbprintf("Readcheck on Sector 2");
1973 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1974 if(ReaderReceiveIClass(resp) == 8) {
1975 Dbprintf(" CC: %02x %02x %02x %02x %02x %02x %02x %02x",
1976 resp[0], resp[1], resp[2],
1977 resp[3], resp[4], resp[5],
1978 resp[6], resp[7]);
1979 }else return;
1980 Dbprintf("Authenticate");
1981 //for now replay captured auth (as cc not updated)
1982 memcpy(check+5,MAC,4);
1983 Dbprintf(" AA: %02x %02x %02x %02x",
1984 check[5], check[6], check[7],check[8]);
1985 ReaderTransmitIClass(check, sizeof(check));
1986 if(ReaderReceiveIClass(resp) == 4) {
1987 Dbprintf(" AR: %02x %02x %02x %02x",
1988 resp[0], resp[1], resp[2],resp[3]);
1989 }else {
1990 Dbprintf("Error: Authentication Fail!");
1991 return;
1992 }
1993 Dbprintf("Write Block");
1994
1995 //read configuration for max block number
1996 read_success=false;
1997 read[1]=1;
1998 uint8_t *blockno=&read[1];
1999 crc = iclass_crc16((char *)blockno,1);
2000 read[2] = crc >> 8;
2001 read[3] = crc & 0xff;
2002 while(!read_success){
2003 ReaderTransmitIClass(read, sizeof(read));
2004 if(ReaderReceiveIClass(resp) == 10) {
2005 read_success=true;
2006 mem=resp[5];
2007 memory.k16= (mem & 0x80);
2008 memory.book= (mem & 0x20);
2009 memory.k2= (mem & 0x8);
2010 memory.lockauth= (mem & 0x2);
2011 memory.keyaccess= (mem & 0x1);
2012
2013 }
2014 }
2015 if (memory.k16){
2016 cardsize=255;
2017 }else cardsize=32;
2018 //check card_size
2019
2020 memcpy(write+1,blockNo,1);
2021 memcpy(write+2,data,8);
2022 memcpy(write+10,mac,4);
2023 while(!send_success){
2024 ReaderTransmitIClass(write, sizeof(write));
fecd8202 2025 if(ReaderReceiveIClass(resp) == 10) {
f38a1528 2026 write_success=true;
2027 }
2028 }//
1e262141 2029 }
2030 WDT_HIT();
2031 }
2032
2033 LED_A_OFF();
f38a1528 2034}*/
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