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Generic trace pt2: made iso14443b use standard trace format
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1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "cmd.h"
18
19 #include "iso14443crc.h"
20 #include "iso14443a.h"
21 #include "crapto1.h"
22 #include "mifareutil.h"
23
24 static uint32_t iso14a_timeout;
25 uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
26 int rsamples = 0;
27 int traceLen = 0;
28 int tracing = TRUE;
29 uint8_t trigger = 0;
30 // the block number for the ISO14443-4 PCB
31 static uint8_t iso14_pcb_blocknum = 0;
32
33 //
34 // ISO14443 timing:
35 //
36 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
37 #define REQUEST_GUARD_TIME (7000/16 + 1)
38 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
39 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
40 // bool LastCommandWasRequest = FALSE;
41
42 //
43 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
44 //
45 // When the PM acts as reader and is receiving tag data, it takes
46 // 3 ticks delay in the AD converter
47 // 16 ticks until the modulation detector completes and sets curbit
48 // 8 ticks until bit_to_arm is assigned from curbit
49 // 8*16 ticks for the transfer from FPGA to ARM
50 // 4*16 ticks until we measure the time
51 // - 8*16 ticks because we measure the time of the previous transfer
52 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
53
54 // When the PM acts as a reader and is sending, it takes
55 // 4*16 ticks until we can write data to the sending hold register
56 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
57 // 8 ticks until the first transfer starts
58 // 8 ticks later the FPGA samples the data
59 // 1 tick to assign mod_sig_coil
60 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
61
62 // When the PM acts as tag and is receiving it takes
63 // 2 ticks delay in the RF part (for the first falling edge),
64 // 3 ticks for the A/D conversion,
65 // 8 ticks on average until the start of the SSC transfer,
66 // 8 ticks until the SSC samples the first data
67 // 7*16 ticks to complete the transfer from FPGA to ARM
68 // 8 ticks until the next ssp_clk rising edge
69 // 4*16 ticks until we measure the time
70 // - 8*16 ticks because we measure the time of the previous transfer
71 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
72
73 // The FPGA will report its internal sending delay in
74 uint16_t FpgaSendQueueDelay;
75 // the 5 first bits are the number of bits buffered in mod_sig_buf
76 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
77 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
78
79 // When the PM acts as tag and is sending, it takes
80 // 4*16 ticks until we can write data to the sending hold register
81 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
82 // 8 ticks until the first transfer starts
83 // 8 ticks later the FPGA samples the data
84 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
85 // + 1 tick to assign mod_sig_coil
86 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
87
88 // When the PM acts as sniffer and is receiving tag data, it takes
89 // 3 ticks A/D conversion
90 // 14 ticks to complete the modulation detection
91 // 8 ticks (on average) until the result is stored in to_arm
92 // + the delays in transferring data - which is the same for
93 // sniffing reader and tag data and therefore not relevant
94 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
95
96 // When the PM acts as sniffer and is receiving reader data, it takes
97 // 2 ticks delay in analogue RF receiver (for the falling edge of the
98 // start bit, which marks the start of the communication)
99 // 3 ticks A/D conversion
100 // 8 ticks on average until the data is stored in to_arm.
101 // + the delays in transferring data - which is the same for
102 // sniffing reader and tag data and therefore not relevant
103 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
104
105 //variables used for timing purposes:
106 //these are in ssp_clk cycles:
107 static uint32_t NextTransferTime;
108 static uint32_t LastTimeProxToAirStart;
109 static uint32_t LastProxToAirDuration;
110
111
112
113 // CARD TO READER - manchester
114 // Sequence D: 11110000 modulation with subcarrier during first half
115 // Sequence E: 00001111 modulation with subcarrier during second half
116 // Sequence F: 00000000 no modulation with subcarrier
117 // READER TO CARD - miller
118 // Sequence X: 00001100 drop after half a period
119 // Sequence Y: 00000000 no drop
120 // Sequence Z: 11000000 drop at start
121 #define SEC_D 0xf0
122 #define SEC_E 0x0f
123 #define SEC_F 0x00
124 #define SEC_X 0x0c
125 #define SEC_Y 0x00
126 #define SEC_Z 0xc0
127
128 const uint8_t OddByteParity[256] = {
129 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
130 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
131 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
132 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
133 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
138 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
139 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
140 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
141 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
142 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
143 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
144 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
145 };
146
147 void iso14a_set_trigger(bool enable) {
148 trigger = enable;
149 }
150
151
152 void iso14a_set_timeout(uint32_t timeout) {
153 iso14a_timeout = timeout;
154 }
155
156 //-----------------------------------------------------------------------------
157 // Generate the parity value for a byte sequence
158 //
159 //-----------------------------------------------------------------------------
160 byte_t oddparity (const byte_t bt)
161 {
162 return OddByteParity[bt];
163 }
164
165 void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par)
166 {
167 uint16_t paritybit_cnt = 0;
168 uint16_t paritybyte_cnt = 0;
169 uint8_t parityBits = 0;
170
171 for (uint16_t i = 0; i < iLen; i++) {
172 // Generate the parity bits
173 parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt));
174 if (paritybit_cnt == 7) {
175 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
176 parityBits = 0; // and advance to next Parity Byte
177 paritybyte_cnt++;
178 paritybit_cnt = 0;
179 } else {
180 paritybit_cnt++;
181 }
182 }
183
184 // save remaining parity bits
185 par[paritybyte_cnt] = parityBits;
186
187 }
188
189 void AppendCrc14443a(uint8_t* data, int len)
190 {
191 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
192 }
193
194
195 //=============================================================================
196 // ISO 14443 Type A - Miller decoder
197 //=============================================================================
198 // Basics:
199 // This decoder is used when the PM3 acts as a tag.
200 // The reader will generate "pauses" by temporarily switching of the field.
201 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
202 // The FPGA does a comparison with a threshold and would deliver e.g.:
203 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
204 // The Miller decoder needs to identify the following sequences:
205 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
206 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
207 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
208 // Note 1: the bitstream may start at any time. We therefore need to sync.
209 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
210 //-----------------------------------------------------------------------------
211 static tUart Uart;
212
213 // Lookup-Table to decide if 4 raw bits are a modulation.
214 // We accept two or three consecutive "0" in any position with the rest "1"
215 const bool Mod_Miller_LUT[] = {
216 TRUE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE,
217 TRUE, TRUE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE
218 };
219 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4])
220 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)])
221
222 void UartReset()
223 {
224 Uart.state = STATE_UNSYNCD;
225 Uart.bitCount = 0;
226 Uart.len = 0; // number of decoded data bytes
227 Uart.parityLen = 0; // number of decoded parity bytes
228 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
229 Uart.parityBits = 0; // holds 8 parity bits
230 Uart.twoBits = 0x0000; // buffer for 2 Bits
231 Uart.highCnt = 0;
232 Uart.startTime = 0;
233 Uart.endTime = 0;
234 }
235
236 void UartInit(uint8_t *data, uint8_t *parity)
237 {
238 Uart.output = data;
239 Uart.parity = parity;
240 UartReset();
241 }
242
243 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
244 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
245 {
246
247 Uart.twoBits = (Uart.twoBits << 8) | bit;
248
249 if (Uart.state == STATE_UNSYNCD) { // not yet synced
250
251 if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
252 if (Uart.twoBits == 0xffff) {
253 Uart.highCnt++;
254 } else {
255 Uart.highCnt = 0;
256 }
257 } else {
258 Uart.syncBit = 0xFFFF; // not set
259 // look for 00xx1111 (the start bit)
260 if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
261 else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
262 else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
263 else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
264 else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
265 else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
266 else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
267 else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
268 if (Uart.syncBit != 0xFFFF) {
269 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
270 Uart.startTime -= Uart.syncBit;
271 Uart.endTime = Uart.startTime;
272 Uart.state = STATE_START_OF_COMMUNICATION;
273 }
274 }
275
276 } else {
277
278 if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) {
279 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error
280 UartReset();
281 Uart.highCnt = 6;
282 } else { // Modulation in first half = Sequence Z = logic "0"
283 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
284 UartReset();
285 Uart.highCnt = 6;
286 } else {
287 Uart.bitCount++;
288 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
289 Uart.state = STATE_MILLER_Z;
290 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
291 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
292 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
293 Uart.parityBits <<= 1; // make room for the parity bit
294 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
295 Uart.bitCount = 0;
296 Uart.shiftReg = 0;
297 if((Uart.len&0x0007) == 0) { // every 8 data bytes
298 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
299 Uart.parityBits = 0;
300 }
301 }
302 }
303 }
304 } else {
305 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
306 Uart.bitCount++;
307 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
308 Uart.state = STATE_MILLER_X;
309 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
310 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
311 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
312 Uart.parityBits <<= 1; // make room for the new parity bit
313 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
314 Uart.bitCount = 0;
315 Uart.shiftReg = 0;
316 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
317 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
318 Uart.parityBits = 0;
319 }
320 }
321 } else { // no modulation in both halves - Sequence Y
322 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
323 Uart.state = STATE_UNSYNCD;
324 Uart.bitCount--; // last "0" was part of EOC sequence
325 Uart.shiftReg <<= 1; // drop it
326 if(Uart.bitCount > 0) { // if we decoded some bits
327 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
328 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
329 Uart.parityBits <<= 1; // add a (void) parity bit
330 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits
331 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
332 return TRUE;
333 } else if (Uart.len & 0x0007) { // there are some parity bits to store
334 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits
335 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
336 }
337 if (Uart.len) {
338 return TRUE; // we are finished with decoding the raw data sequence
339 } else {
340 UartReset(); // Nothing receiver - start over
341 }
342 }
343 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
344 UartReset();
345 Uart.highCnt = 6;
346 } else { // a logic "0"
347 Uart.bitCount++;
348 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
349 Uart.state = STATE_MILLER_Y;
350 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
351 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
352 Uart.parityBits <<= 1; // make room for the parity bit
353 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
354 Uart.bitCount = 0;
355 Uart.shiftReg = 0;
356 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
357 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
358 Uart.parityBits = 0;
359 }
360 }
361 }
362 }
363 }
364
365 }
366
367 return FALSE; // not finished yet, need more data
368 }
369
370
371
372 //=============================================================================
373 // ISO 14443 Type A - Manchester decoder
374 //=============================================================================
375 // Basics:
376 // This decoder is used when the PM3 acts as a reader.
377 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
378 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
379 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
380 // The Manchester decoder needs to identify the following sequences:
381 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
382 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
383 // 8 ticks unmodulated: Sequence F = end of communication
384 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
385 // Note 1: the bitstream may start at any time. We therefore need to sync.
386 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
387 static tDemod Demod;
388
389 // Lookup-Table to decide if 4 raw bits are a modulation.
390 // We accept three or four "1" in any position
391 const bool Mod_Manchester_LUT[] = {
392 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
393 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
394 };
395
396 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
397 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
398
399
400 void DemodReset()
401 {
402 Demod.state = DEMOD_UNSYNCD;
403 Demod.len = 0; // number of decoded data bytes
404 Demod.parityLen = 0;
405 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
406 Demod.parityBits = 0; //
407 Demod.collisionPos = 0; // Position of collision bit
408 Demod.twoBits = 0xffff; // buffer for 2 Bits
409 Demod.highCnt = 0;
410 Demod.startTime = 0;
411 Demod.endTime = 0;
412 }
413
414 void DemodInit(uint8_t *data, uint8_t *parity)
415 {
416 Demod.output = data;
417 Demod.parity = parity;
418 DemodReset();
419 }
420
421 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
422 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
423 {
424
425 Demod.twoBits = (Demod.twoBits << 8) | bit;
426
427 if (Demod.state == DEMOD_UNSYNCD) {
428
429 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
430 if (Demod.twoBits == 0x0000) {
431 Demod.highCnt++;
432 } else {
433 Demod.highCnt = 0;
434 }
435 } else {
436 Demod.syncBit = 0xFFFF; // not set
437 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
438 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
439 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
440 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
441 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
442 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
443 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
444 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
445 if (Demod.syncBit != 0xFFFF) {
446 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
447 Demod.startTime -= Demod.syncBit;
448 Demod.bitCount = offset; // number of decoded data bits
449 Demod.state = DEMOD_MANCHESTER_DATA;
450 }
451 }
452
453 } else {
454
455 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
456 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
457 if (!Demod.collisionPos) {
458 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
459 }
460 } // modulation in first half only - Sequence D = 1
461 Demod.bitCount++;
462 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
463 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
464 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
465 Demod.parityBits <<= 1; // make room for the parity bit
466 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
467 Demod.bitCount = 0;
468 Demod.shiftReg = 0;
469 if((Demod.len&0x0007) == 0) { // every 8 data bytes
470 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
471 Demod.parityBits = 0;
472 }
473 }
474 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
475 } else { // no modulation in first half
476 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
477 Demod.bitCount++;
478 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
479 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
480 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
481 Demod.parityBits <<= 1; // make room for the new parity bit
482 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
483 Demod.bitCount = 0;
484 Demod.shiftReg = 0;
485 if ((Demod.len&0x0007) == 0) { // every 8 data bytes
486 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
487 Demod.parityBits = 0;
488 }
489 }
490 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
491 } else { // no modulation in both halves - End of communication
492 if(Demod.bitCount > 0) { // there are some remaining data bits
493 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
494 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
495 Demod.parityBits <<= 1; // add a (void) parity bit
496 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
497 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
498 return TRUE;
499 } else if (Demod.len & 0x0007) { // there are some parity bits to store
500 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
501 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
502 }
503 if (Demod.len) {
504 return TRUE; // we are finished with decoding the raw data sequence
505 } else { // nothing received. Start over
506 DemodReset();
507 }
508 }
509 }
510
511 }
512
513 return FALSE; // not finished yet, need more data
514 }
515
516 //=============================================================================
517 // Finally, a `sniffer' for ISO 14443 Type A
518 // Both sides of communication!
519 //=============================================================================
520
521 //-----------------------------------------------------------------------------
522 // Record the sequence of commands sent by the reader to the tag, with
523 // triggering so that we start recording at the point that the tag is moved
524 // near the reader.
525 //-----------------------------------------------------------------------------
526 void RAMFUNC SnoopIso14443a(uint8_t param) {
527 // param:
528 // bit 0 - trigger from first card answer
529 // bit 1 - trigger from first reader 7-bit request
530
531 LEDsoff();
532 // init trace buffer
533 iso14a_clear_trace();
534 iso14a_set_tracing(TRUE);
535
536 // We won't start recording the frames that we acquire until we trigger;
537 // a good trigger condition to get started is probably when we see a
538 // response from the tag.
539 // triggered == FALSE -- to wait first for card
540 bool triggered = !(param & 0x03);
541
542 // The command (reader -> tag) that we're receiving.
543 // The length of a received command will in most cases be no more than 18 bytes.
544 // So 32 should be enough!
545 uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET;
546 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
547
548 // The response (tag -> reader) that we're receiving.
549 uint8_t *receivedResponse = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET;
550 uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
551
552 // As we receive stuff, we copy it from receivedCmd or receivedResponse
553 // into trace, along with its length and other annotations.
554 //uint8_t *trace = (uint8_t *)BigBuf;
555
556 // The DMA buffer, used to stream samples from the FPGA
557 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
558 uint8_t *data = dmaBuf;
559 uint8_t previous_data = 0;
560 int maxDataLen = 0;
561 int dataLen = 0;
562 bool TagIsActive = FALSE;
563 bool ReaderIsActive = FALSE;
564
565 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
566
567 // Set up the demodulator for tag -> reader responses.
568 DemodInit(receivedResponse, receivedResponsePar);
569
570 // Set up the demodulator for the reader -> tag commands
571 UartInit(receivedCmd, receivedCmdPar);
572
573 // Setup and start DMA.
574 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
575
576 // And now we loop, receiving samples.
577 for(uint32_t rsamples = 0; TRUE; ) {
578
579 if(BUTTON_PRESS()) {
580 DbpString("cancelled by button");
581 break;
582 }
583
584 LED_A_ON();
585 WDT_HIT();
586
587 int register readBufDataP = data - dmaBuf;
588 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
589 if (readBufDataP <= dmaBufDataP){
590 dataLen = dmaBufDataP - readBufDataP;
591 } else {
592 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
593 }
594 // test for length of buffer
595 if(dataLen > maxDataLen) {
596 maxDataLen = dataLen;
597 if(dataLen > 400) {
598 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
599 break;
600 }
601 }
602 if(dataLen < 1) continue;
603
604 // primary buffer was stopped( <-- we lost data!
605 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
606 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
607 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
608 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
609 }
610 // secondary buffer sets as primary, secondary buffer was stopped
611 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
612 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
613 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
614 }
615
616 LED_A_OFF();
617
618 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
619
620 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
621 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
622 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
623 LED_C_ON();
624
625 // check - if there is a short 7bit request from reader
626 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
627
628 if(triggered) {
629 if (!LogTrace(receivedCmd,
630 Uart.len,
631 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
632 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
633 Uart.parity,
634 TRUE)) break;
635 }
636 /* And ready to receive another command. */
637 UartReset();
638 /* And also reset the demod code, which might have been */
639 /* false-triggered by the commands from the reader. */
640 DemodReset();
641 LED_B_OFF();
642 }
643 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
644 }
645
646 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
647 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
648 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
649 LED_B_ON();
650
651 if (!LogTrace(receivedResponse,
652 Demod.len,
653 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
654 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
655 Demod.parity,
656 FALSE)) break;
657
658 if ((!triggered) && (param & 0x01)) triggered = TRUE;
659
660 // And ready to receive another response.
661 DemodReset();
662 LED_C_OFF();
663 }
664 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
665 }
666 }
667
668 previous_data = *data;
669 rsamples++;
670 data++;
671 if(data == dmaBuf + DMA_BUFFER_SIZE) {
672 data = dmaBuf;
673 }
674 } // main cycle
675
676 DbpString("COMMAND FINISHED");
677
678 FpgaDisableSscDma();
679 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
680 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]);
681 LEDsoff();
682 }
683
684 //-----------------------------------------------------------------------------
685 // Prepare tag messages
686 //-----------------------------------------------------------------------------
687 static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
688 {
689 ToSendReset();
690
691 // Correction bit, might be removed when not needed
692 ToSendStuffBit(0);
693 ToSendStuffBit(0);
694 ToSendStuffBit(0);
695 ToSendStuffBit(0);
696 ToSendStuffBit(1); // 1
697 ToSendStuffBit(0);
698 ToSendStuffBit(0);
699 ToSendStuffBit(0);
700
701 // Send startbit
702 ToSend[++ToSendMax] = SEC_D;
703 LastProxToAirDuration = 8 * ToSendMax - 4;
704
705 for(uint16_t i = 0; i < len; i++) {
706 uint8_t b = cmd[i];
707
708 // Data bits
709 for(uint16_t j = 0; j < 8; j++) {
710 if(b & 1) {
711 ToSend[++ToSendMax] = SEC_D;
712 } else {
713 ToSend[++ToSendMax] = SEC_E;
714 }
715 b >>= 1;
716 }
717
718 // Get the parity bit
719 if (parity[i>>3] & (0x80>>(i&0x0007))) {
720 ToSend[++ToSendMax] = SEC_D;
721 LastProxToAirDuration = 8 * ToSendMax - 4;
722 } else {
723 ToSend[++ToSendMax] = SEC_E;
724 LastProxToAirDuration = 8 * ToSendMax;
725 }
726 }
727
728 // Send stopbit
729 ToSend[++ToSendMax] = SEC_F;
730
731 // Convert from last byte pos to length
732 ToSendMax++;
733 }
734
735 static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
736 {
737 uint8_t par[MAX_PARITY_SIZE];
738
739 GetParity(cmd, len, par);
740 CodeIso14443aAsTagPar(cmd, len, par);
741 }
742
743
744 static void Code4bitAnswerAsTag(uint8_t cmd)
745 {
746 int i;
747
748 ToSendReset();
749
750 // Correction bit, might be removed when not needed
751 ToSendStuffBit(0);
752 ToSendStuffBit(0);
753 ToSendStuffBit(0);
754 ToSendStuffBit(0);
755 ToSendStuffBit(1); // 1
756 ToSendStuffBit(0);
757 ToSendStuffBit(0);
758 ToSendStuffBit(0);
759
760 // Send startbit
761 ToSend[++ToSendMax] = SEC_D;
762
763 uint8_t b = cmd;
764 for(i = 0; i < 4; i++) {
765 if(b & 1) {
766 ToSend[++ToSendMax] = SEC_D;
767 LastProxToAirDuration = 8 * ToSendMax - 4;
768 } else {
769 ToSend[++ToSendMax] = SEC_E;
770 LastProxToAirDuration = 8 * ToSendMax;
771 }
772 b >>= 1;
773 }
774
775 // Send stopbit
776 ToSend[++ToSendMax] = SEC_F;
777
778 // Convert from last byte pos to length
779 ToSendMax++;
780 }
781
782 //-----------------------------------------------------------------------------
783 // Wait for commands from reader
784 // Stop when button is pressed
785 // Or return TRUE when command is captured
786 //-----------------------------------------------------------------------------
787 static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
788 {
789 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
790 // only, since we are receiving, not transmitting).
791 // Signal field is off with the appropriate LED
792 LED_D_OFF();
793 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
794
795 // Now run a `software UART' on the stream of incoming samples.
796 UartInit(received, parity);
797
798 // clear RXRDY:
799 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
800
801 for(;;) {
802 WDT_HIT();
803
804 if(BUTTON_PRESS()) return FALSE;
805
806 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
807 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
808 if(MillerDecoding(b, 0)) {
809 *len = Uart.len;
810 return TRUE;
811 }
812 }
813 }
814 }
815
816 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
817 int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
818 int EmSend4bit(uint8_t resp);
819 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
820 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
821 int EmSendCmd(uint8_t *resp, uint16_t respLen);
822 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
823 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
824 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
825
826 static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
827
828 typedef struct {
829 uint8_t* response;
830 size_t response_n;
831 uint8_t* modulation;
832 size_t modulation_n;
833 uint32_t ProxToAirDuration;
834 } tag_response_info_t;
835
836 void reset_free_buffer() {
837 free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
838 }
839
840 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
841 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
842 // This will need the following byte array for a modulation sequence
843 // 144 data bits (18 * 8)
844 // 18 parity bits
845 // 2 Start and stop
846 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
847 // 1 just for the case
848 // ----------- +
849 // 166 bytes, since every bit that needs to be send costs us a byte
850 //
851
852 // Prepare the tag modulation bits from the message
853 CodeIso14443aAsTag(response_info->response,response_info->response_n);
854
855 // Make sure we do not exceed the free buffer space
856 if (ToSendMax > max_buffer_size) {
857 Dbprintf("Out of memory, when modulating bits for tag answer:");
858 Dbhexdump(response_info->response_n,response_info->response,false);
859 return false;
860 }
861
862 // Copy the byte array, used for this modulation to the buffer position
863 memcpy(response_info->modulation,ToSend,ToSendMax);
864
865 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
866 response_info->modulation_n = ToSendMax;
867 response_info->ProxToAirDuration = LastProxToAirDuration;
868
869 return true;
870 }
871
872 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
873 // Retrieve and store the current buffer index
874 response_info->modulation = free_buffer_pointer;
875
876 // Determine the maximum size we can use from our buffer
877 size_t max_buffer_size = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + FREE_BUFFER_SIZE) - free_buffer_pointer;
878
879 // Forward the prepare tag modulation function to the inner function
880 if (prepare_tag_modulation(response_info,max_buffer_size)) {
881 // Update the free buffer offset
882 free_buffer_pointer += ToSendMax;
883 return true;
884 } else {
885 return false;
886 }
887 }
888
889 //-----------------------------------------------------------------------------
890 // Main loop of simulated tag: receive commands from reader, decide what
891 // response to send, and send it.
892 //-----------------------------------------------------------------------------
893 void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data)
894 {
895 // Enable and clear the trace
896 iso14a_clear_trace();
897 iso14a_set_tracing(TRUE);
898
899 uint8_t sak;
900
901 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
902 uint8_t response1[2];
903
904 switch (tagType) {
905 case 1: { // MIFARE Classic
906 // Says: I am Mifare 1k - original line
907 response1[0] = 0x04;
908 response1[1] = 0x00;
909 sak = 0x08;
910 } break;
911 case 2: { // MIFARE Ultralight
912 // Says: I am a stupid memory tag, no crypto
913 response1[0] = 0x04;
914 response1[1] = 0x00;
915 sak = 0x00;
916 } break;
917 case 3: { // MIFARE DESFire
918 // Says: I am a DESFire tag, ph33r me
919 response1[0] = 0x04;
920 response1[1] = 0x03;
921 sak = 0x20;
922 } break;
923 case 4: { // ISO/IEC 14443-4
924 // Says: I am a javacard (JCOP)
925 response1[0] = 0x04;
926 response1[1] = 0x00;
927 sak = 0x28;
928 } break;
929 case 5: { // MIFARE TNP3XXX
930 // Says: I am a toy
931 response1[0] = 0x01;
932 response1[1] = 0x0f;
933 sak = 0x01;
934 } break;
935 default: {
936 Dbprintf("Error: unkown tagtype (%d)",tagType);
937 return;
938 } break;
939 }
940
941 // The second response contains the (mandatory) first 24 bits of the UID
942 uint8_t response2[5];
943
944 // Check if the uid uses the (optional) part
945 uint8_t response2a[5];
946 if (uid_2nd) {
947 response2[0] = 0x88;
948 num_to_bytes(uid_1st,3,response2+1);
949 num_to_bytes(uid_2nd,4,response2a);
950 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
951
952 // Configure the ATQA and SAK accordingly
953 response1[0] |= 0x40;
954 sak |= 0x04;
955 } else {
956 num_to_bytes(uid_1st,4,response2);
957 // Configure the ATQA and SAK accordingly
958 response1[0] &= 0xBF;
959 sak &= 0xFB;
960 }
961
962 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
963 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
964
965 // Prepare the mandatory SAK (for 4 and 7 byte UID)
966 uint8_t response3[3];
967 response3[0] = sak;
968 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
969
970 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
971 uint8_t response3a[3];
972 response3a[0] = sak & 0xFB;
973 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
974
975 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
976 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
977 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
978 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
979 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
980 // TC(1) = 0x02: CID supported, NAD not supported
981 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
982
983 #define TAG_RESPONSE_COUNT 7
984 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
985 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
986 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
987 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
988 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
989 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
990 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
991 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
992 };
993
994 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
995 // Such a response is less time critical, so we can prepare them on the fly
996 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
997 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
998 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
999 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1000 tag_response_info_t dynamic_response_info = {
1001 .response = dynamic_response_buffer,
1002 .response_n = 0,
1003 .modulation = dynamic_modulation_buffer,
1004 .modulation_n = 0
1005 };
1006
1007 // Reset the offset pointer of the free buffer
1008 reset_free_buffer();
1009
1010 // Prepare the responses of the anticollision phase
1011 // there will be not enough time to do this at the moment the reader sends it REQA
1012 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
1013 prepare_allocated_tag_modulation(&responses[i]);
1014 }
1015
1016 int len = 0;
1017
1018 // To control where we are in the protocol
1019 int order = 0;
1020 int lastorder;
1021
1022 // Just to allow some checks
1023 int happened = 0;
1024 int happened2 = 0;
1025 int cmdsRecvd = 0;
1026
1027 // We need to listen to the high-frequency, peak-detected path.
1028 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1029
1030 // buffers used on software Uart:
1031 uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET;
1032 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
1033
1034 cmdsRecvd = 0;
1035 tag_response_info_t* p_response;
1036
1037 LED_A_ON();
1038 for(;;) {
1039 // Clean receive command buffer
1040
1041 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1042 DbpString("Button press");
1043 break;
1044 }
1045
1046 p_response = NULL;
1047
1048 // Okay, look at the command now.
1049 lastorder = order;
1050 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1051 p_response = &responses[0]; order = 1;
1052 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1053 p_response = &responses[0]; order = 6;
1054 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1055 p_response = &responses[1]; order = 2;
1056 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1057 p_response = &responses[2]; order = 20;
1058 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1059 p_response = &responses[3]; order = 3;
1060 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1061 p_response = &responses[4]; order = 30;
1062 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1063 EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
1064 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1065 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1066 p_response = NULL;
1067 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1068
1069 if (tracing) {
1070 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1071 }
1072 p_response = NULL;
1073 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1074 p_response = &responses[5]; order = 7;
1075 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1076 if (tagType == 1 || tagType == 2) { // RATS not supported
1077 EmSend4bit(CARD_NACK_NA);
1078 p_response = NULL;
1079 } else {
1080 p_response = &responses[6]; order = 70;
1081 }
1082 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1083 if (tracing) {
1084 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1085 }
1086 uint32_t nr = bytes_to_num(receivedCmd,4);
1087 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1088 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar);
1089 } else {
1090 // Check for ISO 14443A-4 compliant commands, look at left nibble
1091 switch (receivedCmd[0]) {
1092
1093 case 0x0B:
1094 case 0x0A: { // IBlock (command)
1095 dynamic_response_info.response[0] = receivedCmd[0];
1096 dynamic_response_info.response[1] = 0x00;
1097 dynamic_response_info.response[2] = 0x90;
1098 dynamic_response_info.response[3] = 0x00;
1099 dynamic_response_info.response_n = 4;
1100 } break;
1101
1102 case 0x1A:
1103 case 0x1B: { // Chaining command
1104 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1105 dynamic_response_info.response_n = 2;
1106 } break;
1107
1108 case 0xaa:
1109 case 0xbb: {
1110 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1111 dynamic_response_info.response_n = 2;
1112 } break;
1113
1114 case 0xBA: { //
1115 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1116 dynamic_response_info.response_n = 2;
1117 } break;
1118
1119 case 0xCA:
1120 case 0xC2: { // Readers sends deselect command
1121 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1122 dynamic_response_info.response_n = 2;
1123 } break;
1124
1125 default: {
1126 // Never seen this command before
1127 if (tracing) {
1128 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1129 }
1130 Dbprintf("Received unknown command (len=%d):",len);
1131 Dbhexdump(len,receivedCmd,false);
1132 // Do not respond
1133 dynamic_response_info.response_n = 0;
1134 } break;
1135 }
1136
1137 if (dynamic_response_info.response_n > 0) {
1138 // Copy the CID from the reader query
1139 dynamic_response_info.response[1] = receivedCmd[1];
1140
1141 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1142 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1143 dynamic_response_info.response_n += 2;
1144
1145 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1146 Dbprintf("Error preparing tag response");
1147 if (tracing) {
1148 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1149 }
1150 break;
1151 }
1152 p_response = &dynamic_response_info;
1153 }
1154 }
1155
1156 // Count number of wakeups received after a halt
1157 if(order == 6 && lastorder == 5) { happened++; }
1158
1159 // Count number of other messages after a halt
1160 if(order != 6 && lastorder == 5) { happened2++; }
1161
1162 if(cmdsRecvd > 999) {
1163 DbpString("1000 commands later...");
1164 break;
1165 }
1166 cmdsRecvd++;
1167
1168 if (p_response != NULL) {
1169 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1170 // do the tracing for the previous reader request and this tag answer:
1171 uint8_t par[MAX_PARITY_SIZE];
1172 GetParity(p_response->response, p_response->response_n, par);
1173
1174 EmLogTrace(Uart.output,
1175 Uart.len,
1176 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1177 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1178 Uart.parity,
1179 p_response->response,
1180 p_response->response_n,
1181 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1182 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1183 par);
1184 }
1185
1186 if (!tracing) {
1187 Dbprintf("Trace Full. Simulation stopped.");
1188 break;
1189 }
1190 }
1191
1192 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1193 LED_A_OFF();
1194 }
1195
1196
1197 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1198 // of bits specified in the delay parameter.
1199 void PrepareDelayedTransfer(uint16_t delay)
1200 {
1201 uint8_t bitmask = 0;
1202 uint8_t bits_to_shift = 0;
1203 uint8_t bits_shifted = 0;
1204
1205 delay &= 0x07;
1206 if (delay) {
1207 for (uint16_t i = 0; i < delay; i++) {
1208 bitmask |= (0x01 << i);
1209 }
1210 ToSend[ToSendMax++] = 0x00;
1211 for (uint16_t i = 0; i < ToSendMax; i++) {
1212 bits_to_shift = ToSend[i] & bitmask;
1213 ToSend[i] = ToSend[i] >> delay;
1214 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1215 bits_shifted = bits_to_shift;
1216 }
1217 }
1218 }
1219
1220
1221 //-------------------------------------------------------------------------------------
1222 // Transmit the command (to the tag) that was placed in ToSend[].
1223 // Parameter timing:
1224 // if NULL: transfer at next possible time, taking into account
1225 // request guard time and frame delay time
1226 // if == 0: transfer immediately and return time of transfer
1227 // if != 0: delay transfer until time specified
1228 //-------------------------------------------------------------------------------------
1229 static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
1230 {
1231
1232 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1233
1234 uint32_t ThisTransferTime = 0;
1235
1236 if (timing) {
1237 if(*timing == 0) { // Measure time
1238 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1239 } else {
1240 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1241 }
1242 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1243 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1244 LastTimeProxToAirStart = *timing;
1245 } else {
1246 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1247 while(GetCountSspClk() < ThisTransferTime);
1248 LastTimeProxToAirStart = ThisTransferTime;
1249 }
1250
1251 // clear TXRDY
1252 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1253
1254 uint16_t c = 0;
1255 for(;;) {
1256 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1257 AT91C_BASE_SSC->SSC_THR = cmd[c];
1258 c++;
1259 if(c >= len) {
1260 break;
1261 }
1262 }
1263 }
1264
1265 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1266 }
1267
1268
1269 //-----------------------------------------------------------------------------
1270 // Prepare reader command (in bits, support short frames) to send to FPGA
1271 //-----------------------------------------------------------------------------
1272 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity)
1273 {
1274 int i, j;
1275 int last;
1276 uint8_t b;
1277
1278 ToSendReset();
1279
1280 // Start of Communication (Seq. Z)
1281 ToSend[++ToSendMax] = SEC_Z;
1282 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1283 last = 0;
1284
1285 size_t bytecount = nbytes(bits);
1286 // Generate send structure for the data bits
1287 for (i = 0; i < bytecount; i++) {
1288 // Get the current byte to send
1289 b = cmd[i];
1290 size_t bitsleft = MIN((bits-(i*8)),8);
1291
1292 for (j = 0; j < bitsleft; j++) {
1293 if (b & 1) {
1294 // Sequence X
1295 ToSend[++ToSendMax] = SEC_X;
1296 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1297 last = 1;
1298 } else {
1299 if (last == 0) {
1300 // Sequence Z
1301 ToSend[++ToSendMax] = SEC_Z;
1302 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1303 } else {
1304 // Sequence Y
1305 ToSend[++ToSendMax] = SEC_Y;
1306 last = 0;
1307 }
1308 }
1309 b >>= 1;
1310 }
1311
1312 // Only transmit parity bit if we transmitted a complete byte
1313 if (j == 8) {
1314 // Get the parity bit
1315 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1316 // Sequence X
1317 ToSend[++ToSendMax] = SEC_X;
1318 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1319 last = 1;
1320 } else {
1321 if (last == 0) {
1322 // Sequence Z
1323 ToSend[++ToSendMax] = SEC_Z;
1324 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1325 } else {
1326 // Sequence Y
1327 ToSend[++ToSendMax] = SEC_Y;
1328 last = 0;
1329 }
1330 }
1331 }
1332 }
1333
1334 // End of Communication: Logic 0 followed by Sequence Y
1335 if (last == 0) {
1336 // Sequence Z
1337 ToSend[++ToSendMax] = SEC_Z;
1338 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1339 } else {
1340 // Sequence Y
1341 ToSend[++ToSendMax] = SEC_Y;
1342 last = 0;
1343 }
1344 ToSend[++ToSendMax] = SEC_Y;
1345
1346 // Convert to length of command:
1347 ToSendMax++;
1348 }
1349
1350 //-----------------------------------------------------------------------------
1351 // Prepare reader command to send to FPGA
1352 //-----------------------------------------------------------------------------
1353 void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity)
1354 {
1355 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1356 }
1357
1358 //-----------------------------------------------------------------------------
1359 // Wait for commands from reader
1360 // Stop when button is pressed (return 1) or field was gone (return 2)
1361 // Or return 0 when command is captured
1362 //-----------------------------------------------------------------------------
1363 static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
1364 {
1365 *len = 0;
1366
1367 uint32_t timer = 0, vtime = 0;
1368 int analogCnt = 0;
1369 int analogAVG = 0;
1370
1371 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1372 // only, since we are receiving, not transmitting).
1373 // Signal field is off with the appropriate LED
1374 LED_D_OFF();
1375 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1376
1377 // Set ADC to read field strength
1378 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1379 AT91C_BASE_ADC->ADC_MR =
1380 ADC_MODE_PRESCALE(32) |
1381 ADC_MODE_STARTUP_TIME(16) |
1382 ADC_MODE_SAMPLE_HOLD_TIME(8);
1383 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1384 // start ADC
1385 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1386
1387 // Now run a 'software UART' on the stream of incoming samples.
1388 UartInit(received, parity);
1389
1390 // Clear RXRDY:
1391 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1392
1393 for(;;) {
1394 WDT_HIT();
1395
1396 if (BUTTON_PRESS()) return 1;
1397
1398 // test if the field exists
1399 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1400 analogCnt++;
1401 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1402 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1403 if (analogCnt >= 32) {
1404 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1405 vtime = GetTickCount();
1406 if (!timer) timer = vtime;
1407 // 50ms no field --> card to idle state
1408 if (vtime - timer > 50) return 2;
1409 } else
1410 if (timer) timer = 0;
1411 analogCnt = 0;
1412 analogAVG = 0;
1413 }
1414 }
1415
1416 // receive and test the miller decoding
1417 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1418 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1419 if(MillerDecoding(b, 0)) {
1420 *len = Uart.len;
1421 return 0;
1422 }
1423 }
1424
1425 }
1426 }
1427
1428
1429 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
1430 {
1431 uint8_t b;
1432 uint16_t i = 0;
1433 uint32_t ThisTransferTime;
1434
1435 // Modulate Manchester
1436 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1437
1438 // include correction bit if necessary
1439 if (Uart.parityBits & 0x01) {
1440 correctionNeeded = TRUE;
1441 }
1442 if(correctionNeeded) {
1443 // 1236, so correction bit needed
1444 i = 0;
1445 } else {
1446 i = 1;
1447 }
1448
1449 // clear receiving shift register and holding register
1450 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1451 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1452 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1453 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1454
1455 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1456 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1457 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1458 if (AT91C_BASE_SSC->SSC_RHR) break;
1459 }
1460
1461 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1462
1463 // Clear TXRDY:
1464 AT91C_BASE_SSC->SSC_THR = SEC_F;
1465
1466 // send cycle
1467 for(; i <= respLen; ) {
1468 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1469 AT91C_BASE_SSC->SSC_THR = resp[i++];
1470 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1471 }
1472
1473 if(BUTTON_PRESS()) {
1474 break;
1475 }
1476 }
1477
1478 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1479 for (i = 0; i < 2 ; ) {
1480 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1481 AT91C_BASE_SSC->SSC_THR = SEC_F;
1482 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1483 i++;
1484 }
1485 }
1486
1487 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1488
1489 return 0;
1490 }
1491
1492 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1493 Code4bitAnswerAsTag(resp);
1494 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1495 // do the tracing for the previous reader request and this tag answer:
1496 uint8_t par[1];
1497 GetParity(&resp, 1, par);
1498 EmLogTrace(Uart.output,
1499 Uart.len,
1500 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1501 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1502 Uart.parity,
1503 &resp,
1504 1,
1505 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1506 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1507 par);
1508 return res;
1509 }
1510
1511 int EmSend4bit(uint8_t resp){
1512 return EmSend4bitEx(resp, false);
1513 }
1514
1515 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1516 CodeIso14443aAsTagPar(resp, respLen, par);
1517 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1518 // do the tracing for the previous reader request and this tag answer:
1519 EmLogTrace(Uart.output,
1520 Uart.len,
1521 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1522 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1523 Uart.parity,
1524 resp,
1525 respLen,
1526 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1527 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1528 par);
1529 return res;
1530 }
1531
1532 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1533 uint8_t par[MAX_PARITY_SIZE];
1534 GetParity(resp, respLen, par);
1535 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1536 }
1537
1538 int EmSendCmd(uint8_t *resp, uint16_t respLen){
1539 uint8_t par[MAX_PARITY_SIZE];
1540 GetParity(resp, respLen, par);
1541 return EmSendCmdExPar(resp, respLen, false, par);
1542 }
1543
1544 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1545 return EmSendCmdExPar(resp, respLen, false, par);
1546 }
1547
1548 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1549 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1550 {
1551 if (tracing) {
1552 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1553 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1554 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1555 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1556 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1557 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1558 reader_EndTime = tag_StartTime - exact_fdt;
1559 reader_StartTime = reader_EndTime - reader_modlen;
1560 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) {
1561 return FALSE;
1562 } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1563 } else {
1564 return TRUE;
1565 }
1566 }
1567
1568 //-----------------------------------------------------------------------------
1569 // Wait a certain time for tag response
1570 // If a response is captured return TRUE
1571 // If it takes too long return FALSE
1572 //-----------------------------------------------------------------------------
1573 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
1574 {
1575 uint32_t c;
1576
1577 // Set FPGA mode to "reader listen mode", no modulation (listen
1578 // only, since we are receiving, not transmitting).
1579 // Signal field is on with the appropriate LED
1580 LED_D_ON();
1581 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1582
1583 // Now get the answer from the card
1584 DemodInit(receivedResponse, receivedResponsePar);
1585
1586 // clear RXRDY:
1587 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1588
1589 c = 0;
1590 for(;;) {
1591 WDT_HIT();
1592
1593 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1594 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1595 if(ManchesterDecoding(b, offset, 0)) {
1596 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1597 return TRUE;
1598 } else if (c++ > iso14a_timeout) {
1599 return FALSE;
1600 }
1601 }
1602 }
1603 }
1604
1605 void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
1606 {
1607 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1608
1609 // Send command to tag
1610 TransmitFor14443a(ToSend, ToSendMax, timing);
1611 if(trigger)
1612 LED_A_ON();
1613
1614 // Log reader command in trace buffer
1615 if (tracing) {
1616 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1617 }
1618 }
1619
1620 void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
1621 {
1622 ReaderTransmitBitsPar(frame, len*8, par, timing);
1623 }
1624
1625 void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
1626 {
1627 // Generate parity and redirect
1628 uint8_t par[MAX_PARITY_SIZE];
1629 GetParity(frame, len/8, par);
1630 ReaderTransmitBitsPar(frame, len, par, timing);
1631 }
1632
1633 void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
1634 {
1635 // Generate parity and redirect
1636 uint8_t par[MAX_PARITY_SIZE];
1637 GetParity(frame, len, par);
1638 ReaderTransmitBitsPar(frame, len*8, par, timing);
1639 }
1640
1641 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
1642 {
1643 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) return FALSE;
1644 if (tracing) {
1645 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1646 }
1647 return Demod.len;
1648 }
1649
1650 int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
1651 {
1652 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE;
1653 if (tracing) {
1654 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1655 }
1656 return Demod.len;
1657 }
1658
1659 /* performs iso14443a anticollision procedure
1660 * fills the uid pointer unless NULL
1661 * fills resp_data unless NULL */
1662 int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr) {
1663 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1664 uint8_t sel_all[] = { 0x93,0x20 };
1665 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1666 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1667 uint8_t *resp = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET;
1668 uint8_t *resp_par = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
1669 byte_t uid_resp[4];
1670 size_t uid_resp_len;
1671
1672 uint8_t sak = 0x04; // cascade uid
1673 int cascade_level = 0;
1674 int len;
1675
1676 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1677 ReaderTransmitBitsPar(wupa,7,0, NULL);
1678
1679 // Receive the ATQA
1680 if(!ReaderReceive(resp, resp_par)) return 0;
1681
1682 if(p_hi14a_card) {
1683 memcpy(p_hi14a_card->atqa, resp, 2);
1684 p_hi14a_card->uidlen = 0;
1685 memset(p_hi14a_card->uid,0,10);
1686 }
1687
1688 // clear uid
1689 if (uid_ptr) {
1690 memset(uid_ptr,0,10);
1691 }
1692
1693 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1694 // which case we need to make a cascade 2 request and select - this is a long UID
1695 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1696 for(; sak & 0x04; cascade_level++) {
1697 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1698 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1699
1700 // SELECT_ALL
1701 ReaderTransmit(sel_all, sizeof(sel_all), NULL);
1702 if (!ReaderReceive(resp, resp_par)) return 0;
1703
1704 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1705 memset(uid_resp, 0, 4);
1706 uint16_t uid_resp_bits = 0;
1707 uint16_t collision_answer_offset = 0;
1708 // anti-collision-loop:
1709 while (Demod.collisionPos) {
1710 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1711 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1712 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1713 uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8);
1714 }
1715 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1716 uid_resp_bits++;
1717 // construct anticollosion command:
1718 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1719 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1720 sel_uid[2+i] = uid_resp[i];
1721 }
1722 collision_answer_offset = uid_resp_bits%8;
1723 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1724 if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0;
1725 }
1726 // finally, add the last bits and BCC of the UID
1727 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1728 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1729 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1730 }
1731
1732 } else { // no collision, use the response to SELECT_ALL as current uid
1733 memcpy(uid_resp, resp, 4);
1734 }
1735 uid_resp_len = 4;
1736
1737 // calculate crypto UID. Always use last 4 Bytes.
1738 if(cuid_ptr) {
1739 *cuid_ptr = bytes_to_num(uid_resp, 4);
1740 }
1741
1742 // Construct SELECT UID command
1743 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1744 memcpy(sel_uid+2, uid_resp, 4); // the UID
1745 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1746 AppendCrc14443a(sel_uid, 7); // calculate and add CRC
1747 ReaderTransmit(sel_uid, sizeof(sel_uid), NULL);
1748
1749 // Receive the SAK
1750 if (!ReaderReceive(resp, resp_par)) return 0;
1751 sak = resp[0];
1752
1753 // Test if more parts of the uid are coming
1754 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1755 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1756 // http://www.nxp.com/documents/application_note/AN10927.pdf
1757 uid_resp[0] = uid_resp[1];
1758 uid_resp[1] = uid_resp[2];
1759 uid_resp[2] = uid_resp[3];
1760
1761 uid_resp_len = 3;
1762 }
1763
1764 if(uid_ptr) {
1765 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1766 }
1767
1768 if(p_hi14a_card) {
1769 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1770 p_hi14a_card->uidlen += uid_resp_len;
1771 }
1772 }
1773
1774 if(p_hi14a_card) {
1775 p_hi14a_card->sak = sak;
1776 p_hi14a_card->ats_len = 0;
1777 }
1778
1779 // non iso14443a compliant tag
1780 if( (sak & 0x20) == 0) return 2;
1781
1782 // Request for answer to select
1783 AppendCrc14443a(rats, 2);
1784 ReaderTransmit(rats, sizeof(rats), NULL);
1785
1786 if (!(len = ReaderReceive(resp, resp_par))) return 0;
1787
1788
1789 if(p_hi14a_card) {
1790 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1791 p_hi14a_card->ats_len = len;
1792 }
1793
1794 // reset the PCB block number
1795 iso14_pcb_blocknum = 0;
1796 return 1;
1797 }
1798
1799 void iso14443a_setup(uint8_t fpga_minor_mode) {
1800 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1801 // Set up the synchronous serial port
1802 FpgaSetupSsc();
1803 // connect Demodulated Signal to ADC:
1804 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1805
1806 // Signal field is on with the appropriate LED
1807 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
1808 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
1809 LED_D_ON();
1810 } else {
1811 LED_D_OFF();
1812 }
1813 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
1814
1815 // Start the timer
1816 StartCountSspClk();
1817
1818 DemodReset();
1819 UartReset();
1820 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
1821 iso14a_set_timeout(1050); // 10ms default
1822 }
1823
1824 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
1825 uint8_t parity[MAX_PARITY_SIZE];
1826 uint8_t real_cmd[cmd_len+4];
1827 real_cmd[0] = 0x0a; //I-Block
1828 // put block number into the PCB
1829 real_cmd[0] |= iso14_pcb_blocknum;
1830 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1831 memcpy(real_cmd+2, cmd, cmd_len);
1832 AppendCrc14443a(real_cmd,cmd_len+2);
1833
1834 ReaderTransmit(real_cmd, cmd_len+4, NULL);
1835 size_t len = ReaderReceive(data, parity);
1836 uint8_t *data_bytes = (uint8_t *) data;
1837 if (!len)
1838 return 0; //DATA LINK ERROR
1839 // if we received an I- or R(ACK)-Block with a block number equal to the
1840 // current block number, toggle the current block number
1841 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1842 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1843 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1844 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1845 {
1846 iso14_pcb_blocknum ^= 1;
1847 }
1848
1849 return len;
1850 }
1851
1852 //-----------------------------------------------------------------------------
1853 // Read an ISO 14443a tag. Send out commands and store answers.
1854 //
1855 //-----------------------------------------------------------------------------
1856 void ReaderIso14443a(UsbCommand *c)
1857 {
1858 iso14a_command_t param = c->arg[0];
1859 uint8_t *cmd = c->d.asBytes;
1860 size_t len = c->arg[1];
1861 size_t lenbits = c->arg[2];
1862 uint32_t arg0 = 0;
1863 byte_t buf[USB_CMD_DATA_SIZE];
1864 uint8_t par[MAX_PARITY_SIZE];
1865
1866 if(param & ISO14A_CONNECT) {
1867 iso14a_clear_trace();
1868 }
1869
1870 iso14a_set_tracing(TRUE);
1871
1872 if(param & ISO14A_REQUEST_TRIGGER) {
1873 iso14a_set_trigger(TRUE);
1874 }
1875
1876 if(param & ISO14A_CONNECT) {
1877 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
1878 if(!(param & ISO14A_NO_SELECT)) {
1879 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
1880 arg0 = iso14443a_select_card(NULL,card,NULL);
1881 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
1882 }
1883 }
1884
1885 if(param & ISO14A_SET_TIMEOUT) {
1886 iso14a_set_timeout(c->arg[2]);
1887 }
1888
1889 if(param & ISO14A_APDU) {
1890 arg0 = iso14_apdu(cmd, len, buf);
1891 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1892 }
1893
1894 if(param & ISO14A_RAW) {
1895 if(param & ISO14A_APPEND_CRC) {
1896 AppendCrc14443a(cmd,len);
1897 len += 2;
1898 if (lenbits) lenbits += 16;
1899 }
1900 if(lenbits>0) {
1901 GetParity(cmd, lenbits/8, par);
1902 ReaderTransmitBitsPar(cmd, lenbits, par, NULL);
1903 } else {
1904 ReaderTransmit(cmd,len, NULL);
1905 }
1906 arg0 = ReaderReceive(buf, par);
1907 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1908 }
1909
1910 if(param & ISO14A_REQUEST_TRIGGER) {
1911 iso14a_set_trigger(FALSE);
1912 }
1913
1914 if(param & ISO14A_NO_DISCONNECT) {
1915 return;
1916 }
1917
1918 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1919 LEDsoff();
1920 }
1921
1922
1923 // Determine the distance between two nonces.
1924 // Assume that the difference is small, but we don't know which is first.
1925 // Therefore try in alternating directions.
1926 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
1927
1928 uint16_t i;
1929 uint32_t nttmp1, nttmp2;
1930
1931 if (nt1 == nt2) return 0;
1932
1933 nttmp1 = nt1;
1934 nttmp2 = nt2;
1935
1936 for (i = 1; i < 32768; i++) {
1937 nttmp1 = prng_successor(nttmp1, 1);
1938 if (nttmp1 == nt2) return i;
1939 nttmp2 = prng_successor(nttmp2, 1);
1940 if (nttmp2 == nt1) return -i;
1941 }
1942
1943 return(-99999); // either nt1 or nt2 are invalid nonces
1944 }
1945
1946
1947 //-----------------------------------------------------------------------------
1948 // Recover several bits of the cypher stream. This implements (first stages of)
1949 // the algorithm described in "The Dark Side of Security by Obscurity and
1950 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
1951 // (article by Nicolas T. Courtois, 2009)
1952 //-----------------------------------------------------------------------------
1953 void ReaderMifare(bool first_try)
1954 {
1955 // Mifare AUTH
1956 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
1957 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
1958 static uint8_t mf_nr_ar3;
1959
1960 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET);
1961 uint8_t* receivedAnswerPar = (((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET);
1962
1963 iso14a_clear_trace();
1964 iso14a_set_tracing(TRUE);
1965
1966 byte_t nt_diff = 0;
1967 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
1968 static byte_t par_low = 0;
1969 bool led_on = TRUE;
1970 uint8_t uid[10] ={0};
1971 uint32_t cuid;
1972
1973 uint32_t nt = 0;
1974 uint32_t previous_nt = 0;
1975 static uint32_t nt_attacked = 0;
1976 byte_t par_list[8] = {0x00};
1977 byte_t ks_list[8] = {0x00};
1978
1979 static uint32_t sync_time;
1980 static uint32_t sync_cycles;
1981 int catch_up_cycles = 0;
1982 int last_catch_up = 0;
1983 uint16_t consecutive_resyncs = 0;
1984 int isOK = 0;
1985
1986 if (first_try) {
1987 mf_nr_ar3 = 0;
1988 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
1989 sync_time = GetCountSspClk() & 0xfffffff8;
1990 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
1991 nt_attacked = 0;
1992 nt = 0;
1993 par[0] = 0;
1994 }
1995 else {
1996 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
1997 mf_nr_ar3++;
1998 mf_nr_ar[3] = mf_nr_ar3;
1999 par[0] = par_low;
2000 }
2001
2002 LED_A_ON();
2003 LED_B_OFF();
2004 LED_C_OFF();
2005
2006
2007 for(uint16_t i = 0; TRUE; i++) {
2008
2009 WDT_HIT();
2010
2011 // Test if the action was cancelled
2012 if(BUTTON_PRESS()) {
2013 break;
2014 }
2015
2016 LED_C_ON();
2017
2018 if(!iso14443a_select_card(uid, NULL, &cuid)) {
2019 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
2020 continue;
2021 }
2022
2023 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
2024 catch_up_cycles = 0;
2025
2026 // if we missed the sync time already, advance to the next nonce repeat
2027 while(GetCountSspClk() > sync_time) {
2028 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
2029 }
2030
2031 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2032 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2033
2034 // Receive the (4 Byte) "random" nonce
2035 if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2036 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2037 continue;
2038 }
2039
2040 previous_nt = nt;
2041 nt = bytes_to_num(receivedAnswer, 4);
2042
2043 // Transmit reader nonce with fake par
2044 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2045
2046 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2047 int nt_distance = dist_nt(previous_nt, nt);
2048 if (nt_distance == 0) {
2049 nt_attacked = nt;
2050 }
2051 else {
2052 if (nt_distance == -99999) { // invalid nonce received, try again
2053 continue;
2054 }
2055 sync_cycles = (sync_cycles - nt_distance);
2056 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
2057 continue;
2058 }
2059 }
2060
2061 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2062 catch_up_cycles = -dist_nt(nt_attacked, nt);
2063 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2064 catch_up_cycles = 0;
2065 continue;
2066 }
2067 if (catch_up_cycles == last_catch_up) {
2068 consecutive_resyncs++;
2069 }
2070 else {
2071 last_catch_up = catch_up_cycles;
2072 consecutive_resyncs = 0;
2073 }
2074 if (consecutive_resyncs < 3) {
2075 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2076 }
2077 else {
2078 sync_cycles = sync_cycles + catch_up_cycles;
2079 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2080 }
2081 continue;
2082 }
2083
2084 consecutive_resyncs = 0;
2085
2086 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2087 if (ReaderReceive(receivedAnswer, receivedAnswerPar))
2088 {
2089 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2090
2091 if (nt_diff == 0)
2092 {
2093 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2094 }
2095
2096 led_on = !led_on;
2097 if(led_on) LED_B_ON(); else LED_B_OFF();
2098
2099 par_list[nt_diff] = SwapBits(par[0], 8);
2100 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2101
2102 // Test if the information is complete
2103 if (nt_diff == 0x07) {
2104 isOK = 1;
2105 break;
2106 }
2107
2108 nt_diff = (nt_diff + 1) & 0x07;
2109 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2110 par[0] = par_low;
2111 } else {
2112 if (nt_diff == 0 && first_try)
2113 {
2114 par[0]++;
2115 } else {
2116 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2117 }
2118 }
2119 }
2120
2121
2122 mf_nr_ar[3] &= 0x1F;
2123
2124 byte_t buf[28];
2125 memcpy(buf + 0, uid, 4);
2126 num_to_bytes(nt, 4, buf + 4);
2127 memcpy(buf + 8, par_list, 8);
2128 memcpy(buf + 16, ks_list, 8);
2129 memcpy(buf + 24, mf_nr_ar, 4);
2130
2131 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2132
2133 // Thats it...
2134 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2135 LEDsoff();
2136
2137 iso14a_set_tracing(FALSE);
2138 }
2139
2140 /**
2141 *MIFARE 1K simulate.
2142 *
2143 *@param flags :
2144 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2145 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2146 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2147 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2148 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2149 */
2150 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2151 {
2152 int cardSTATE = MFEMUL_NOFIELD;
2153 int _7BUID = 0;
2154 int vHf = 0; // in mV
2155 int res;
2156 uint32_t selTimer = 0;
2157 uint32_t authTimer = 0;
2158 uint16_t len = 0;
2159 uint8_t cardWRBL = 0;
2160 uint8_t cardAUTHSC = 0;
2161 uint8_t cardAUTHKEY = 0xff; // no authentication
2162 uint32_t cardRr = 0;
2163 uint32_t cuid = 0;
2164 //uint32_t rn_enc = 0;
2165 uint32_t ans = 0;
2166 uint32_t cardINTREG = 0;
2167 uint8_t cardINTBLOCK = 0;
2168 struct Crypto1State mpcs = {0, 0};
2169 struct Crypto1State *pcs;
2170 pcs = &mpcs;
2171 uint32_t numReads = 0;//Counts numer of times reader read a block
2172 uint8_t* receivedCmd = get_bigbufptr_recvcmdbuf();
2173 uint8_t* receivedCmd_par = receivedCmd + MAX_FRAME_SIZE;
2174 uint8_t* response = get_bigbufptr_recvrespbuf();
2175 uint8_t* response_par = response + MAX_FRAME_SIZE;
2176
2177 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2178 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2179 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2180 uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2181 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2182
2183 uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2184 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2185
2186 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2187 // This can be used in a reader-only attack.
2188 // (it can also be retrieved via 'hf 14a list', but hey...
2189 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0};
2190 uint8_t ar_nr_collected = 0;
2191
2192 // clear trace
2193 iso14a_clear_trace();
2194 iso14a_set_tracing(TRUE);
2195
2196 // Authenticate response - nonce
2197 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2198
2199 //-- Determine the UID
2200 // Can be set from emulator memory, incoming data
2201 // and can be 7 or 4 bytes long
2202 if (flags & FLAG_4B_UID_IN_DATA)
2203 {
2204 // 4B uid comes from data-portion of packet
2205 memcpy(rUIDBCC1,datain,4);
2206 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2207
2208 } else if (flags & FLAG_7B_UID_IN_DATA) {
2209 // 7B uid comes from data-portion of packet
2210 memcpy(&rUIDBCC1[1],datain,3);
2211 memcpy(rUIDBCC2, datain+3, 4);
2212 _7BUID = true;
2213 } else {
2214 // get UID from emul memory
2215 emlGetMemBt(receivedCmd, 7, 1);
2216 _7BUID = !(receivedCmd[0] == 0x00);
2217 if (!_7BUID) { // ---------- 4BUID
2218 emlGetMemBt(rUIDBCC1, 0, 4);
2219 } else { // ---------- 7BUID
2220 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2221 emlGetMemBt(rUIDBCC2, 3, 4);
2222 }
2223 }
2224
2225 /*
2226 * Regardless of what method was used to set the UID, set fifth byte and modify
2227 * the ATQA for 4 or 7-byte UID
2228 */
2229 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2230 if (_7BUID) {
2231 rATQA[0] = 0x44;
2232 rUIDBCC1[0] = 0x88;
2233 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2234 }
2235
2236 // We need to listen to the high-frequency, peak-detected path.
2237 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2238
2239
2240 if (MF_DBGLEVEL >= 1) {
2241 if (!_7BUID) {
2242 Dbprintf("4B UID: %02x%02x%02x%02x",
2243 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
2244 } else {
2245 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2246 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2247 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
2248 }
2249 }
2250
2251 bool finished = FALSE;
2252 while (!BUTTON_PRESS() && !finished) {
2253 WDT_HIT();
2254
2255 // find reader field
2256 // Vref = 3300mV, and an 10:1 voltage divider on the input
2257 // can measure voltages up to 33000 mV
2258 if (cardSTATE == MFEMUL_NOFIELD) {
2259 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2260 if (vHf > MF_MINFIELDV) {
2261 cardSTATE_TO_IDLE();
2262 LED_A_ON();
2263 }
2264 }
2265 if(cardSTATE == MFEMUL_NOFIELD) continue;
2266
2267 //Now, get data
2268
2269 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2270 if (res == 2) { //Field is off!
2271 cardSTATE = MFEMUL_NOFIELD;
2272 LEDsoff();
2273 continue;
2274 } else if (res == 1) {
2275 break; //return value 1 means button press
2276 }
2277
2278 // REQ or WUP request in ANY state and WUP in HALTED state
2279 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2280 selTimer = GetTickCount();
2281 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2282 cardSTATE = MFEMUL_SELECT1;
2283
2284 // init crypto block
2285 LED_B_OFF();
2286 LED_C_OFF();
2287 crypto1_destroy(pcs);
2288 cardAUTHKEY = 0xff;
2289 continue;
2290 }
2291
2292 switch (cardSTATE) {
2293 case MFEMUL_NOFIELD:
2294 case MFEMUL_HALTED:
2295 case MFEMUL_IDLE:{
2296 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2297 break;
2298 }
2299 case MFEMUL_SELECT1:{
2300 // select all
2301 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2302 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2303 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2304 break;
2305 }
2306
2307 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2308 {
2309 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2310 }
2311 // select card
2312 if (len == 9 &&
2313 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2314 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
2315 cuid = bytes_to_num(rUIDBCC1, 4);
2316 if (!_7BUID) {
2317 cardSTATE = MFEMUL_WORK;
2318 LED_B_ON();
2319 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2320 break;
2321 } else {
2322 cardSTATE = MFEMUL_SELECT2;
2323 }
2324 }
2325 break;
2326 }
2327 case MFEMUL_AUTH1:{
2328 if( len != 8)
2329 {
2330 cardSTATE_TO_IDLE();
2331 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2332 break;
2333 }
2334 uint32_t ar = bytes_to_num(receivedCmd, 4);
2335 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
2336
2337 //Collect AR/NR
2338 if(ar_nr_collected < 2){
2339 if(ar_nr_responses[2] != ar)
2340 {// Avoid duplicates... probably not necessary, ar should vary.
2341 ar_nr_responses[ar_nr_collected*4] = cuid;
2342 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2343 ar_nr_responses[ar_nr_collected*4+2] = ar;
2344 ar_nr_responses[ar_nr_collected*4+3] = nr;
2345 ar_nr_collected++;
2346 }
2347 }
2348
2349 // --- crypto
2350 crypto1_word(pcs, ar , 1);
2351 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2352
2353 // test if auth OK
2354 if (cardRr != prng_successor(nonce, 64)){
2355 if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2356 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2357 cardRr, prng_successor(nonce, 64));
2358 // Shouldn't we respond anything here?
2359 // Right now, we don't nack or anything, which causes the
2360 // reader to do a WUPA after a while. /Martin
2361 // -- which is the correct response. /piwi
2362 cardSTATE_TO_IDLE();
2363 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2364 break;
2365 }
2366
2367 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2368
2369 num_to_bytes(ans, 4, rAUTH_AT);
2370 // --- crypto
2371 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2372 LED_C_ON();
2373 cardSTATE = MFEMUL_WORK;
2374 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2375 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2376 GetTickCount() - authTimer);
2377 break;
2378 }
2379 case MFEMUL_SELECT2:{
2380 if (!len) {
2381 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2382 break;
2383 }
2384 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2385 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2386 break;
2387 }
2388
2389 // select 2 card
2390 if (len == 9 &&
2391 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2392 EmSendCmd(rSAK, sizeof(rSAK));
2393 cuid = bytes_to_num(rUIDBCC2, 4);
2394 cardSTATE = MFEMUL_WORK;
2395 LED_B_ON();
2396 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2397 break;
2398 }
2399
2400 // i guess there is a command). go into the work state.
2401 if (len != 4) {
2402 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2403 break;
2404 }
2405 cardSTATE = MFEMUL_WORK;
2406 //goto lbWORK;
2407 //intentional fall-through to the next case-stmt
2408 }
2409
2410 case MFEMUL_WORK:{
2411 if (len == 0) {
2412 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2413 break;
2414 }
2415
2416 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2417
2418 if(encrypted_data) {
2419 // decrypt seqence
2420 mf_crypto1_decrypt(pcs, receivedCmd, len);
2421 }
2422
2423 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2424 authTimer = GetTickCount();
2425 cardAUTHSC = receivedCmd[1] / 4; // received block num
2426 cardAUTHKEY = receivedCmd[0] - 0x60;
2427 crypto1_destroy(pcs);//Added by martin
2428 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2429
2430 if (!encrypted_data) { // first authentication
2431 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2432
2433 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2434 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2435 } else { // nested authentication
2436 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2437 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2438 num_to_bytes(ans, 4, rAUTH_AT);
2439 }
2440 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2441 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2442 cardSTATE = MFEMUL_AUTH1;
2443 break;
2444 }
2445
2446 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2447 // BUT... ACK --> NACK
2448 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2449 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2450 break;
2451 }
2452
2453 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2454 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2455 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2456 break;
2457 }
2458
2459 if(len != 4) {
2460 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2461 break;
2462 }
2463
2464 if(receivedCmd[0] == 0x30 // read block
2465 || receivedCmd[0] == 0xA0 // write block
2466 || receivedCmd[0] == 0xC0 // inc
2467 || receivedCmd[0] == 0xC1 // dec
2468 || receivedCmd[0] == 0xC2 // restore
2469 || receivedCmd[0] == 0xB0) { // transfer
2470 if (receivedCmd[1] >= 16 * 4) {
2471 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2472 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2473 break;
2474 }
2475
2476 if (receivedCmd[1] / 4 != cardAUTHSC) {
2477 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2478 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2479 break;
2480 }
2481 }
2482 // read block
2483 if (receivedCmd[0] == 0x30) {
2484 if (MF_DBGLEVEL >= 4) {
2485 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2486 }
2487 emlGetMem(response, receivedCmd[1], 1);
2488 AppendCrc14443a(response, 16);
2489 mf_crypto1_encrypt(pcs, response, 18, response_par);
2490 EmSendCmdPar(response, 18, response_par);
2491 numReads++;
2492 if(exitAfterNReads > 0 && numReads == exitAfterNReads) {
2493 Dbprintf("%d reads done, exiting", numReads);
2494 finished = true;
2495 }
2496 break;
2497 }
2498 // write block
2499 if (receivedCmd[0] == 0xA0) {
2500 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2501 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2502 cardSTATE = MFEMUL_WRITEBL2;
2503 cardWRBL = receivedCmd[1];
2504 break;
2505 }
2506 // increment, decrement, restore
2507 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2508 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2509 if (emlCheckValBl(receivedCmd[1])) {
2510 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2511 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2512 break;
2513 }
2514 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2515 if (receivedCmd[0] == 0xC1)
2516 cardSTATE = MFEMUL_INTREG_INC;
2517 if (receivedCmd[0] == 0xC0)
2518 cardSTATE = MFEMUL_INTREG_DEC;
2519 if (receivedCmd[0] == 0xC2)
2520 cardSTATE = MFEMUL_INTREG_REST;
2521 cardWRBL = receivedCmd[1];
2522 break;
2523 }
2524 // transfer
2525 if (receivedCmd[0] == 0xB0) {
2526 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2527 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2528 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2529 else
2530 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2531 break;
2532 }
2533 // halt
2534 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2535 LED_B_OFF();
2536 LED_C_OFF();
2537 cardSTATE = MFEMUL_HALTED;
2538 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2539 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2540 break;
2541 }
2542 // RATS
2543 if (receivedCmd[0] == 0xe0) {//RATS
2544 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2545 break;
2546 }
2547 // command not allowed
2548 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2549 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2550 break;
2551 }
2552 case MFEMUL_WRITEBL2:{
2553 if (len == 18){
2554 mf_crypto1_decrypt(pcs, receivedCmd, len);
2555 emlSetMem(receivedCmd, cardWRBL, 1);
2556 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2557 cardSTATE = MFEMUL_WORK;
2558 } else {
2559 cardSTATE_TO_IDLE();
2560 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2561 }
2562 break;
2563 }
2564
2565 case MFEMUL_INTREG_INC:{
2566 mf_crypto1_decrypt(pcs, receivedCmd, len);
2567 memcpy(&ans, receivedCmd, 4);
2568 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2569 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2570 cardSTATE_TO_IDLE();
2571 break;
2572 }
2573 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2574 cardINTREG = cardINTREG + ans;
2575 cardSTATE = MFEMUL_WORK;
2576 break;
2577 }
2578 case MFEMUL_INTREG_DEC:{
2579 mf_crypto1_decrypt(pcs, receivedCmd, len);
2580 memcpy(&ans, receivedCmd, 4);
2581 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2582 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2583 cardSTATE_TO_IDLE();
2584 break;
2585 }
2586 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2587 cardINTREG = cardINTREG - ans;
2588 cardSTATE = MFEMUL_WORK;
2589 break;
2590 }
2591 case MFEMUL_INTREG_REST:{
2592 mf_crypto1_decrypt(pcs, receivedCmd, len);
2593 memcpy(&ans, receivedCmd, 4);
2594 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2595 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2596 cardSTATE_TO_IDLE();
2597 break;
2598 }
2599 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2600 cardSTATE = MFEMUL_WORK;
2601 break;
2602 }
2603 }
2604 }
2605
2606 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2607 LEDsoff();
2608
2609 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2610 {
2611 //May just aswell send the collected ar_nr in the response aswell
2612 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4);
2613 }
2614
2615 if(flags & FLAG_NR_AR_ATTACK)
2616 {
2617 if(ar_nr_collected > 1) {
2618 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2619 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
2620 ar_nr_responses[0], // UID
2621 ar_nr_responses[1], //NT
2622 ar_nr_responses[2], //AR1
2623 ar_nr_responses[3], //NR1
2624 ar_nr_responses[6], //AR2
2625 ar_nr_responses[7] //NR2
2626 );
2627 } else {
2628 Dbprintf("Failed to obtain two AR/NR pairs!");
2629 if(ar_nr_collected >0) {
2630 Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x",
2631 ar_nr_responses[0], // UID
2632 ar_nr_responses[1], //NT
2633 ar_nr_responses[2], //AR1
2634 ar_nr_responses[3] //NR1
2635 );
2636 }
2637 }
2638 }
2639 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
2640 }
2641
2642
2643
2644 //-----------------------------------------------------------------------------
2645 // MIFARE sniffer.
2646 //
2647 //-----------------------------------------------------------------------------
2648 void RAMFUNC SniffMifare(uint8_t param) {
2649 // param:
2650 // bit 0 - trigger from first card answer
2651 // bit 1 - trigger from first reader 7-bit request
2652
2653 // C(red) A(yellow) B(green)
2654 LEDsoff();
2655 // init trace buffer
2656 iso14a_clear_trace();
2657 iso14a_set_tracing(TRUE);
2658
2659 // The command (reader -> tag) that we're receiving.
2660 // The length of a received command will in most cases be no more than 18 bytes.
2661 // So 32 should be enough!
2662 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
2663 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
2664 // The response (tag -> reader) that we're receiving.
2665 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET);
2666 uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
2667
2668 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2669 // into trace, along with its length and other annotations.
2670 //uint8_t *trace = (uint8_t *)BigBuf;
2671
2672 // The DMA buffer, used to stream samples from the FPGA
2673 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
2674 uint8_t *data = dmaBuf;
2675 uint8_t previous_data = 0;
2676 int maxDataLen = 0;
2677 int dataLen = 0;
2678 bool ReaderIsActive = FALSE;
2679 bool TagIsActive = FALSE;
2680
2681 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
2682
2683 // Set up the demodulator for tag -> reader responses.
2684 DemodInit(receivedResponse, receivedResponsePar);
2685
2686 // Set up the demodulator for the reader -> tag commands
2687 UartInit(receivedCmd, receivedCmdPar);
2688
2689 // Setup for the DMA.
2690 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2691
2692 LED_D_OFF();
2693
2694 // init sniffer
2695 MfSniffInit();
2696
2697 // And now we loop, receiving samples.
2698 for(uint32_t sniffCounter = 0; TRUE; ) {
2699
2700 if(BUTTON_PRESS()) {
2701 DbpString("cancelled by button");
2702 break;
2703 }
2704
2705 LED_A_ON();
2706 WDT_HIT();
2707
2708 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2709 // check if a transaction is completed (timeout after 2000ms).
2710 // if yes, stop the DMA transfer and send what we have so far to the client
2711 if (MfSniffSend(2000)) {
2712 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2713 sniffCounter = 0;
2714 data = dmaBuf;
2715 maxDataLen = 0;
2716 ReaderIsActive = FALSE;
2717 TagIsActive = FALSE;
2718 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2719 }
2720 }
2721
2722 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2723 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2724 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2725 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2726 } else {
2727 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
2728 }
2729 // test for length of buffer
2730 if(dataLen > maxDataLen) { // we are more behind than ever...
2731 maxDataLen = dataLen;
2732 if(dataLen > 400) {
2733 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
2734 break;
2735 }
2736 }
2737 if(dataLen < 1) continue;
2738
2739 // primary buffer was stopped ( <-- we lost data!
2740 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2741 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2742 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
2743 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
2744 }
2745 // secondary buffer sets as primary, secondary buffer was stopped
2746 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2747 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
2748 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2749 }
2750
2751 LED_A_OFF();
2752
2753 if (sniffCounter & 0x01) {
2754
2755 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
2756 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
2757 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
2758 LED_C_INV();
2759 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
2760
2761 /* And ready to receive another command. */
2762 UartReset();
2763
2764 /* And also reset the demod code */
2765 DemodReset();
2766 }
2767 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
2768 }
2769
2770 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
2771 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
2772 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
2773 LED_C_INV();
2774
2775 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
2776
2777 // And ready to receive another response.
2778 DemodReset();
2779 }
2780 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
2781 }
2782 }
2783
2784 previous_data = *data;
2785 sniffCounter++;
2786 data++;
2787 if(data == dmaBuf + DMA_BUFFER_SIZE) {
2788 data = dmaBuf;
2789 }
2790
2791 } // main cycle
2792
2793 DbpString("COMMAND FINISHED");
2794
2795 FpgaDisableSscDma();
2796 MfSniffEnd();
2797
2798 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
2799 LEDsoff();
2800 }
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