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New LF edge detection algorithm + lowpass filter
[proxmark3-svn] / fpga / tests / tb_lp20khz_1MSa_iir_filter.v
1 //-----------------------------------------------------------------------------
2 // Copyright (C) 2014 iZsh <izsh at fail0verflow.com>
3 //
4 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
5 // at your option, any later version. See the LICENSE.txt file for the text of
6 // the license.
7 //-----------------------------------------------------------------------------
8 // testbench for lp20khz_1MSa_iir_filter
9 `include "lp20khz_1MSa_iir_filter.v"
10
11 `define FIN "tb_tmp/data.in"
12 `define FOUT "tb_tmp/data.filtered"
13
14 module lp20khz_1MSa_iir_filter_tb;
15
16 integer fin, fout, r;
17
18 reg clk;
19 reg [7:0] adc_d;
20 wire data_rdy;
21 wire [7:0] adc_filtered;
22
23 initial
24 begin
25 clk = 0;
26 fin = $fopen(`FIN, "r");
27 if (!fin) begin
28 $display("ERROR: can't open the data file");
29 $finish;
30 end
31 fout = $fopen(`FOUT, "w+");
32 if (!$feof(fin))
33 adc_d = $fgetc(fin); // read the first value
34 end
35
36 always
37 # 1 clk = !clk;
38
39 always @(posedge clk)
40 if (data_rdy) begin
41 if ($time > 1)
42 r = $fputc(adc_filtered, fout);
43 if (!$feof(fin))
44 adc_d <= $fgetc(fin);
45 else begin
46 $fclose(fin);
47 $fclose(fout);
48 $finish;
49 end
50 end
51
52 // module to test
53 lp20khz_1MSa_iir_filter filter(clk, adc_d, data_rdy, adc_filtered);
54
55 endmodule
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