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- fixed iso1443a ManchesterDecoder in order to fix broken Snoop/Sniff
[proxmark3-svn] / armsrc / iso14443a.c
1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "cmd.h"
18
19 #include "iso14443crc.h"
20 #include "iso14443a.h"
21 #include "crapto1.h"
22 #include "mifareutil.h"
23
24 static uint32_t iso14a_timeout;
25 uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
26 int rsamples = 0;
27 int traceLen = 0;
28 int tracing = TRUE;
29 uint8_t trigger = 0;
30 // the block number for the ISO14443-4 PCB
31 static uint8_t iso14_pcb_blocknum = 0;
32
33 //
34 // ISO14443 timing:
35 //
36 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
37 #define REQUEST_GUARD_TIME (7000/16 + 1)
38 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
39 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
40 // bool LastCommandWasRequest = FALSE;
41
42 //
43 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
44 //
45 // When the PM acts as reader and is receiving, it takes
46 // 3 ticks for the A/D conversion
47 // 10 ticks ( 16 on average) delay in the modulation detector.
48 // 6 ticks until the SSC samples the first data
49 // 7*16 ticks to complete the transfer from FPGA to ARM
50 // 8 ticks to the next ssp_clk rising edge
51 // 4*16 ticks until we measure the time
52 // - 8*16 ticks because we measure the time of the previous transfer
53 #define DELAY_AIR2ARM_AS_READER (3 + 10 + 6 + 7*16 + 8 + 4*16 - 8*16)
54
55 // When the PM acts as a reader and is sending, it takes
56 // 4*16 ticks until we can write data to the sending hold register
57 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
58 // 8 ticks until the first transfer starts
59 // 8 ticks later the FPGA samples the data
60 // 1 tick to assign mod_sig_coil
61 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
62
63 // When the PM acts as tag and is receiving it takes
64 // 12 ticks delay in the RF part,
65 // 3 ticks for the A/D conversion,
66 // 8 ticks on average until the start of the SSC transfer,
67 // 8 ticks until the SSC samples the first data
68 // 7*16 ticks to complete the transfer from FPGA to ARM
69 // 8 ticks until the next ssp_clk rising edge
70 // 3*16 ticks until we measure the time
71 // - 8*16 ticks because we measure the time of the previous transfer
72 #define DELAY_AIR2ARM_AS_TAG (12 + 3 + 8 + 8 + 7*16 + 8 + 3*16 - 8*16)
73
74 // The FPGA will report its internal sending delay in
75 uint16_t FpgaSendQueueDelay;
76 // the 5 first bits are the number of bits buffered in mod_sig_buf
77 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
78 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
79
80 // When the PM acts as tag and is sending, it takes
81 // 5*16 ticks until we can write data to the sending hold register
82 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
83 // 8 ticks until the first transfer starts
84 // 8 ticks later the FPGA samples the data
85 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
86 // + 1 tick to assign mod_sig_coil
87 #define DELAY_ARM2AIR_AS_TAG (5*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
88
89 // When the PM acts as sniffer and is receiving tag data, it takes
90 // 3 ticks A/D conversion
91 // 16 ticks delay in the modulation detector (on average).
92 // + 16 ticks until it's result is sampled.
93 // + the delays in transferring data - which is the same for
94 // sniffing reader and tag data and therefore not relevant
95 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 16 + 16)
96
97 // When the PM acts as sniffer and is receiving tag data, it takes
98 // 12 ticks delay in analogue RF receiver
99 // 3 ticks A/D conversion
100 // 8 ticks on average until we sample the data.
101 // + the delays in transferring data - which is the same for
102 // sniffing reader and tag data and therefore not relevant
103 #define DELAY_READER_AIR2ARM_AS_SNIFFER (12 + 3 + 8)
104
105 //variables used for timing purposes:
106 //these are in ssp_clk cycles:
107 uint32_t NextTransferTime;
108 uint32_t LastTimeProxToAirStart;
109 uint32_t LastProxToAirDuration;
110
111
112
113 // CARD TO READER - manchester
114 // Sequence D: 11110000 modulation with subcarrier during first half
115 // Sequence E: 00001111 modulation with subcarrier during second half
116 // Sequence F: 00000000 no modulation with subcarrier
117 // READER TO CARD - miller
118 // Sequence X: 00001100 drop after half a period
119 // Sequence Y: 00000000 no drop
120 // Sequence Z: 11000000 drop at start
121 #define SEC_D 0xf0
122 #define SEC_E 0x0f
123 #define SEC_F 0x00
124 #define SEC_X 0x0c
125 #define SEC_Y 0x00
126 #define SEC_Z 0xc0
127
128 const uint8_t OddByteParity[256] = {
129 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
130 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
131 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
132 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
133 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
138 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
139 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
140 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
141 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
142 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
143 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
144 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
145 };
146
147
148 void iso14a_set_trigger(bool enable) {
149 trigger = enable;
150 }
151
152 void iso14a_clear_trace() {
153 memset(trace, 0x44, TRACE_SIZE);
154 traceLen = 0;
155 }
156
157 void iso14a_set_tracing(bool enable) {
158 tracing = enable;
159 }
160
161 void iso14a_set_timeout(uint32_t timeout) {
162 iso14a_timeout = timeout;
163 }
164
165 //-----------------------------------------------------------------------------
166 // Generate the parity value for a byte sequence
167 //
168 //-----------------------------------------------------------------------------
169 byte_t oddparity (const byte_t bt)
170 {
171 return OddByteParity[bt];
172 }
173
174 uint32_t GetParity(const uint8_t * pbtCmd, int iLen)
175 {
176 int i;
177 uint32_t dwPar = 0;
178
179 // Generate the parity bits
180 for (i = 0; i < iLen; i++) {
181 // and save them to a 32Bit word
182 dwPar |= ((OddByteParity[pbtCmd[i]]) << i);
183 }
184 return dwPar;
185 }
186
187 void AppendCrc14443a(uint8_t* data, int len)
188 {
189 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
190 }
191
192 // The function LogTrace() is also used by the iClass implementation in iClass.c
193 bool RAMFUNC LogTrace(const uint8_t * btBytes, uint8_t iLen, uint32_t timestamp, uint32_t dwParity, bool bReader)
194 {
195 // Return when trace is full
196 if (traceLen + sizeof(timestamp) + sizeof(dwParity) + iLen >= TRACE_SIZE) {
197 tracing = FALSE; // don't trace any more
198 return FALSE;
199 }
200
201 // Trace the random, i'm curious
202 trace[traceLen++] = ((timestamp >> 0) & 0xff);
203 trace[traceLen++] = ((timestamp >> 8) & 0xff);
204 trace[traceLen++] = ((timestamp >> 16) & 0xff);
205 trace[traceLen++] = ((timestamp >> 24) & 0xff);
206 if (!bReader) {
207 trace[traceLen - 1] |= 0x80;
208 }
209 trace[traceLen++] = ((dwParity >> 0) & 0xff);
210 trace[traceLen++] = ((dwParity >> 8) & 0xff);
211 trace[traceLen++] = ((dwParity >> 16) & 0xff);
212 trace[traceLen++] = ((dwParity >> 24) & 0xff);
213 trace[traceLen++] = iLen;
214 if (btBytes != NULL && iLen != 0) {
215 memcpy(trace + traceLen, btBytes, iLen);
216 }
217 traceLen += iLen;
218 return TRUE;
219 }
220
221 //=============================================================================
222 // ISO 14443 Type A - Miller decoder
223 //=============================================================================
224 // Basics:
225 // This decoder is used when the PM3 acts as a tag.
226 // The reader will generate "pauses" by temporarily switching of the field.
227 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
228 // The FPGA does a comparison with a threshold and would deliver e.g.:
229 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
230 // The Miller decoder needs to identify the following sequences:
231 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
232 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
233 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
234 // Note 1: the bitstream may start at any time. We therefore need to sync.
235 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
236 //-----------------------------------------------------------------------------
237 static tUart Uart;
238
239 void UartReset()
240 {
241 Uart.state = STATE_UNSYNCD;
242 Uart.bitCount = 0;
243 Uart.len = 0; // number of decoded data bytes
244 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
245 Uart.parityBits = 0; //
246 Uart.twoBits = 0x0000; // buffer for 2 Bits
247 Uart.highCnt = 0;
248 Uart.startTime = 0;
249 Uart.endTime = 0;
250 }
251
252 inline RAMFUNC Modulation_t MillerModulation(uint8_t b)
253 {
254 // switch (b & 0x88) {
255 // case 0x00: return MILLER_MOD_BOTH_HALVES;
256 // case 0x08: return MILLER_MOD_FIRST_HALF;
257 // case 0x80: return MILLER_MOD_SECOND_HALF;
258 // case 0x88: return MILLER_MOD_NOMOD;
259 // }
260 // test the second cycle for a pause. For whatever reason the startbit tends to appear earlier than the rest.
261 switch (b & 0x44) {
262 case 0x00: return MOD_BOTH_HALVES;
263 case 0x04: return MOD_FIRST_HALF;
264 case 0x40: return MOD_SECOND_HALF;
265 default: return MOD_NOMOD;
266 }
267 }
268
269 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
270 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
271 {
272
273 Uart.twoBits = (Uart.twoBits << 8) | bit;
274
275 if (Uart.state == STATE_UNSYNCD) { // not yet synced
276 if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
277 if (Uart.twoBits == 0xffff) {
278 Uart.highCnt++;
279 } else {
280 Uart.highCnt = 0;
281 }
282 } else {
283 Uart.syncBit = 0xFFFF; // not set
284 // look for 00xx1111 (the start bit)
285 if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
286 else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
287 else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
288 else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
289 else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
290 else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
291 else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
292 else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
293 if (Uart.syncBit != 0xFFFF) {
294 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
295 Uart.startTime -= Uart.syncBit;
296 Uart.state = STATE_START_OF_COMMUNICATION;
297 }
298 }
299
300 } else {
301
302 switch (MillerModulation(Uart.twoBits >> Uart.syncBit)) {
303 case MOD_FIRST_HALF: // Sequence Z = 0
304 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
305 UartReset();
306 Uart.highCnt = 6;
307 } else {
308 Uart.bitCount++;
309 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
310 Uart.state = STATE_MILLER_Z;
311 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
312 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
313 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
314 Uart.parityBits <<= 1; // make room for the parity bit
315 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
316 Uart.bitCount = 0;
317 Uart.shiftReg = 0;
318 }
319 }
320 break;
321 case MOD_SECOND_HALF: // Sequence X = 1
322 Uart.bitCount++;
323 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
324 Uart.state = STATE_MILLER_X;
325 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
326 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
327 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
328 Uart.parityBits <<= 1; // make room for the new parity bit
329 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
330 Uart.bitCount = 0;
331 Uart.shiftReg = 0;
332 }
333 break;
334 case MOD_NOMOD: // no modulation in both halves - Sequence Y
335 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
336 Uart.state = STATE_UNSYNCD;
337 if(Uart.len == 0 && Uart.bitCount > 0) { // if we decoded some bits
338 Uart.shiftReg >>= (9 - Uart.bitCount); // add them to the output
339 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
340 Uart.parityBits <<= 1; // no parity bit - add "0"
341 Uart.bitCount--; // last "0" was part of the EOC sequence
342 }
343 return TRUE;
344 }
345 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
346 UartReset();
347 Uart.highCnt = 6;
348 } else { // a logic "0"
349 Uart.bitCount++;
350 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
351 Uart.state = STATE_MILLER_Y;
352 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
353 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
354 Uart.parityBits <<= 1; // make room for the parity bit
355 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
356 Uart.bitCount = 0;
357 Uart.shiftReg = 0;
358 }
359 }
360 break;
361 case MOD_BOTH_HALVES: // Error
362 UartReset();
363 Uart.highCnt = 6;
364 return FALSE;
365 }
366
367 }
368
369 return FALSE; // not finished yet, need more data
370 }
371
372
373
374 //=============================================================================
375 // ISO 14443 Type A - Manchester decoder
376 //=============================================================================
377 // Basics:
378 // This decoder is used when the PM3 acts as a reader.
379 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
380 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
381 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
382 // The Manchester decoder needs to identify the following sequences:
383 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
384 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
385 // 8 ticks unmodulated: Sequence F = end of communication
386 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
387 // Note 1: the bitstream may start at any time. We therefore need to sync.
388 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
389 static tDemod Demod;
390
391 const bool Mod_Manchester_LUT[] = {
392 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE, TRUE,
393 FALSE, FALSE, TRUE, TRUE, TRUE, TRUE, TRUE, TRUE
394 };
395
396 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
397 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
398
399
400 void DemodReset()
401 {
402 Demod.state = DEMOD_UNSYNCD;
403 Demod.len = 0; // number of decoded data bytes
404 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
405 Demod.parityBits = 0; //
406 Demod.collisionPos = 0; // Position of collision bit
407 Demod.twoBits = 0xffff; // buffer for 2 Bits
408 Demod.highCnt = 0;
409 Demod.startTime = 0;
410 Demod.endTime = 0;
411 }
412
413 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
414 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
415 {
416
417 Demod.twoBits = (Demod.twoBits << 8) | bit;
418
419 if (Demod.state == DEMOD_UNSYNCD) {
420
421 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
422 if (Demod.twoBits == 0x0000) {
423 Demod.highCnt++;
424 } else {
425 Demod.highCnt = 0;
426 }
427 } else {
428 Demod.syncBit = 0xFFFF; // not set
429 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
430 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
431 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
432 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
433 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
434 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
435 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
436 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
437 if (Demod.syncBit < 8) {
438 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
439 Demod.startTime -= Demod.syncBit;
440 Demod.bitCount = offset; // number of decoded data bits
441 Demod.state = DEMOD_MANCHESTER_DATA;
442 }
443 }
444
445 } else {
446
447 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
448 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
449 if (!Demod.collisionPos) {
450 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
451 }
452 } // modulation in first half only - Sequence D = 1
453 Demod.bitCount++;
454 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
455 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
456 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
457 Demod.parityBits <<= 1; // make room for the parity bit
458 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
459 Demod.bitCount = 0;
460 Demod.shiftReg = 0;
461 }
462 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
463 } else { // no modulation in first half
464 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
465 Demod.bitCount++;
466 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
467 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
468 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
469 Demod.parityBits <<= 1; // make room for the new parity bit
470 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
471 Demod.bitCount = 0;
472 Demod.shiftReg = 0;
473 }
474 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
475 } else { // no modulation in both halves - End of communication
476 if(Demod.bitCount > 0) { // if we decoded bits
477 Demod.shiftReg >>= (9 - Demod.bitCount); // add the remaining decoded bits to the output
478 Demod.output[Demod.len++] = Demod.shiftReg & 0xff;
479 // No parity bit, so just shift a 0
480 Demod.parityBits <<= 1;
481 }
482 Demod.state = DEMOD_UNSYNCD; // start from the beginning
483 Demod.twoBits = 0;
484 return TRUE; // we are finished with decoding the raw data sequence
485 }
486 }
487
488 }
489
490 return FALSE; // not finished yet, need more data
491 }
492
493 //=============================================================================
494 // Finally, a `sniffer' for ISO 14443 Type A
495 // Both sides of communication!
496 //=============================================================================
497
498 //-----------------------------------------------------------------------------
499 // Record the sequence of commands sent by the reader to the tag, with
500 // triggering so that we start recording at the point that the tag is moved
501 // near the reader.
502 //-----------------------------------------------------------------------------
503 void RAMFUNC SnoopIso14443a(uint8_t param) {
504 // param:
505 // bit 0 - trigger from first card answer
506 // bit 1 - trigger from first reader 7-bit request
507
508 LEDsoff();
509 // init trace buffer
510 iso14a_clear_trace();
511
512 // We won't start recording the frames that we acquire until we trigger;
513 // a good trigger condition to get started is probably when we see a
514 // response from the tag.
515 // triggered == FALSE -- to wait first for card
516 bool triggered = !(param & 0x03);
517
518 // The command (reader -> tag) that we're receiving.
519 // The length of a received command will in most cases be no more than 18 bytes.
520 // So 32 should be enough!
521 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
522 // The response (tag -> reader) that we're receiving.
523 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
524
525 // As we receive stuff, we copy it from receivedCmd or receivedResponse
526 // into trace, along with its length and other annotations.
527 //uint8_t *trace = (uint8_t *)BigBuf;
528
529 // The DMA buffer, used to stream samples from the FPGA
530 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
531 uint8_t *data = dmaBuf;
532 uint8_t previous_data = 0;
533 int maxDataLen = 0;
534 int dataLen = 0;
535 bool TagIsActive = FALSE;
536 bool ReaderIsActive = FALSE;
537
538 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
539
540 // Set up the demodulator for tag -> reader responses.
541 Demod.output = receivedResponse;
542
543 // Set up the demodulator for the reader -> tag commands
544 Uart.output = receivedCmd;
545
546 // Setup and start DMA.
547 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
548
549 // And now we loop, receiving samples.
550 for(uint32_t rsamples = 0; TRUE; ) {
551
552 if(BUTTON_PRESS()) {
553 DbpString("cancelled by button");
554 break;
555 }
556
557 LED_A_ON();
558 WDT_HIT();
559
560 int register readBufDataP = data - dmaBuf;
561 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
562 if (readBufDataP <= dmaBufDataP){
563 dataLen = dmaBufDataP - readBufDataP;
564 } else {
565 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
566 }
567 // test for length of buffer
568 if(dataLen > maxDataLen) {
569 maxDataLen = dataLen;
570 if(dataLen > 400) {
571 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
572 break;
573 }
574 }
575 if(dataLen < 1) continue;
576
577 // primary buffer was stopped( <-- we lost data!
578 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
579 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
580 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
581 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
582 }
583 // secondary buffer sets as primary, secondary buffer was stopped
584 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
585 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
586 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
587 }
588
589 LED_A_OFF();
590
591 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
592
593 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
594 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
595 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
596 LED_C_ON();
597
598 // check - if there is a short 7bit request from reader
599 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
600
601 if(triggered) {
602 if (!LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, Uart.parityBits, TRUE)) break;
603 if (!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
604 }
605 /* And ready to receive another command. */
606 UartReset();
607 /* And also reset the demod code, which might have been */
608 /* false-triggered by the commands from the reader. */
609 DemodReset();
610 LED_B_OFF();
611 }
612 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
613 }
614
615 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
616 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
617 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
618 LED_B_ON();
619
620 if (!LogTrace(receivedResponse, Demod.len, Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, Demod.parityBits, FALSE)) break;
621 if (!LogTrace(NULL, 0, Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, 0, FALSE)) break;
622
623 if ((!triggered) && (param & 0x01)) triggered = TRUE;
624
625 // And ready to receive another response.
626 DemodReset();
627 LED_C_OFF();
628 }
629 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
630 }
631 }
632
633 previous_data = *data;
634 rsamples++;
635 data++;
636 if(data > dmaBuf + DMA_BUFFER_SIZE) {
637 data = dmaBuf;
638 }
639 } // main cycle
640
641 DbpString("COMMAND FINISHED");
642
643 FpgaDisableSscDma();
644 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
645 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]);
646 LEDsoff();
647 }
648
649 //-----------------------------------------------------------------------------
650 // Prepare tag messages
651 //-----------------------------------------------------------------------------
652 static void CodeIso14443aAsTagPar(const uint8_t *cmd, int len, uint32_t dwParity)
653 {
654 int i;
655
656 ToSendReset();
657
658 // Correction bit, might be removed when not needed
659 ToSendStuffBit(0);
660 ToSendStuffBit(0);
661 ToSendStuffBit(0);
662 ToSendStuffBit(0);
663 ToSendStuffBit(1); // 1
664 ToSendStuffBit(0);
665 ToSendStuffBit(0);
666 ToSendStuffBit(0);
667
668 // Send startbit
669 ToSend[++ToSendMax] = SEC_D;
670 LastProxToAirDuration = 8 * ToSendMax - 4;
671
672 for(i = 0; i < len; i++) {
673 int j;
674 uint8_t b = cmd[i];
675
676 // Data bits
677 for(j = 0; j < 8; j++) {
678 if(b & 1) {
679 ToSend[++ToSendMax] = SEC_D;
680 } else {
681 ToSend[++ToSendMax] = SEC_E;
682 }
683 b >>= 1;
684 }
685
686 // Get the parity bit
687 if ((dwParity >> i) & 0x01) {
688 ToSend[++ToSendMax] = SEC_D;
689 LastProxToAirDuration = 8 * ToSendMax - 4;
690 } else {
691 ToSend[++ToSendMax] = SEC_E;
692 LastProxToAirDuration = 8 * ToSendMax;
693 }
694 }
695
696 // Send stopbit
697 ToSend[++ToSendMax] = SEC_F;
698
699 // Convert from last byte pos to length
700 ToSendMax++;
701 }
702
703 static void CodeIso14443aAsTag(const uint8_t *cmd, int len){
704 CodeIso14443aAsTagPar(cmd, len, GetParity(cmd, len));
705 }
706
707
708 static void Code4bitAnswerAsTag(uint8_t cmd)
709 {
710 int i;
711
712 ToSendReset();
713
714 // Correction bit, might be removed when not needed
715 ToSendStuffBit(0);
716 ToSendStuffBit(0);
717 ToSendStuffBit(0);
718 ToSendStuffBit(0);
719 ToSendStuffBit(1); // 1
720 ToSendStuffBit(0);
721 ToSendStuffBit(0);
722 ToSendStuffBit(0);
723
724 // Send startbit
725 ToSend[++ToSendMax] = SEC_D;
726
727 uint8_t b = cmd;
728 for(i = 0; i < 4; i++) {
729 if(b & 1) {
730 ToSend[++ToSendMax] = SEC_D;
731 LastProxToAirDuration = 8 * ToSendMax - 4;
732 } else {
733 ToSend[++ToSendMax] = SEC_E;
734 LastProxToAirDuration = 8 * ToSendMax;
735 }
736 b >>= 1;
737 }
738
739 // Send stopbit
740 ToSend[++ToSendMax] = SEC_F;
741
742 // Convert from last byte pos to length
743 ToSendMax++;
744 }
745
746 //-----------------------------------------------------------------------------
747 // Wait for commands from reader
748 // Stop when button is pressed
749 // Or return TRUE when command is captured
750 //-----------------------------------------------------------------------------
751 static int GetIso14443aCommandFromReader(uint8_t *received, int *len, int maxLen)
752 {
753 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
754 // only, since we are receiving, not transmitting).
755 // Signal field is off with the appropriate LED
756 LED_D_OFF();
757 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
758
759 // Now run a `software UART' on the stream of incoming samples.
760 UartReset();
761 Uart.output = received;
762
763 // clear RXRDY:
764 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
765
766 for(;;) {
767 WDT_HIT();
768
769 if(BUTTON_PRESS()) return FALSE;
770
771 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
772 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
773 if(MillerDecoding(b, 0)) {
774 *len = Uart.len;
775 return TRUE;
776 }
777 }
778 }
779 }
780
781 static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, bool correctionNeeded);
782 int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
783 int EmSend4bit(uint8_t resp);
784 int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par);
785 int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par);
786 int EmSendCmdEx(uint8_t *resp, int respLen, bool correctionNeeded);
787 int EmSendCmd(uint8_t *resp, int respLen);
788 int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par);
789 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint32_t reader_Parity,
790 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint32_t tag_Parity);
791
792 static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
793
794 typedef struct {
795 uint8_t* response;
796 size_t response_n;
797 uint8_t* modulation;
798 size_t modulation_n;
799 uint32_t ProxToAirDuration;
800 } tag_response_info_t;
801
802 void reset_free_buffer() {
803 free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
804 }
805
806 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
807 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
808 // This will need the following byte array for a modulation sequence
809 // 144 data bits (18 * 8)
810 // 18 parity bits
811 // 2 Start and stop
812 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
813 // 1 just for the case
814 // ----------- +
815 // 166 bytes, since every bit that needs to be send costs us a byte
816 //
817
818 // Prepare the tag modulation bits from the message
819 CodeIso14443aAsTag(response_info->response,response_info->response_n);
820
821 // Make sure we do not exceed the free buffer space
822 if (ToSendMax > max_buffer_size) {
823 Dbprintf("Out of memory, when modulating bits for tag answer:");
824 Dbhexdump(response_info->response_n,response_info->response,false);
825 return false;
826 }
827
828 // Copy the byte array, used for this modulation to the buffer position
829 memcpy(response_info->modulation,ToSend,ToSendMax);
830
831 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
832 response_info->modulation_n = ToSendMax;
833 response_info->ProxToAirDuration = LastProxToAirDuration;
834
835 return true;
836 }
837
838 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
839 // Retrieve and store the current buffer index
840 response_info->modulation = free_buffer_pointer;
841
842 // Determine the maximum size we can use from our buffer
843 size_t max_buffer_size = (((uint8_t *)BigBuf)+FREE_BUFFER_OFFSET+FREE_BUFFER_SIZE)-free_buffer_pointer;
844
845 // Forward the prepare tag modulation function to the inner function
846 if (prepare_tag_modulation(response_info,max_buffer_size)) {
847 // Update the free buffer offset
848 free_buffer_pointer += ToSendMax;
849 return true;
850 } else {
851 return false;
852 }
853 }
854
855 //-----------------------------------------------------------------------------
856 // Main loop of simulated tag: receive commands from reader, decide what
857 // response to send, and send it.
858 //-----------------------------------------------------------------------------
859 void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data)
860 {
861 // Enable and clear the trace
862 iso14a_clear_trace();
863 iso14a_set_tracing(TRUE);
864
865 uint8_t sak;
866
867 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
868 uint8_t response1[2];
869
870 switch (tagType) {
871 case 1: { // MIFARE Classic
872 // Says: I am Mifare 1k - original line
873 response1[0] = 0x04;
874 response1[1] = 0x00;
875 sak = 0x08;
876 } break;
877 case 2: { // MIFARE Ultralight
878 // Says: I am a stupid memory tag, no crypto
879 response1[0] = 0x04;
880 response1[1] = 0x00;
881 sak = 0x00;
882 } break;
883 case 3: { // MIFARE DESFire
884 // Says: I am a DESFire tag, ph33r me
885 response1[0] = 0x04;
886 response1[1] = 0x03;
887 sak = 0x20;
888 } break;
889 case 4: { // ISO/IEC 14443-4
890 // Says: I am a javacard (JCOP)
891 response1[0] = 0x04;
892 response1[1] = 0x00;
893 sak = 0x28;
894 } break;
895 default: {
896 Dbprintf("Error: unkown tagtype (%d)",tagType);
897 return;
898 } break;
899 }
900
901 // The second response contains the (mandatory) first 24 bits of the UID
902 uint8_t response2[5];
903
904 // Check if the uid uses the (optional) part
905 uint8_t response2a[5];
906 if (uid_2nd) {
907 response2[0] = 0x88;
908 num_to_bytes(uid_1st,3,response2+1);
909 num_to_bytes(uid_2nd,4,response2a);
910 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
911
912 // Configure the ATQA and SAK accordingly
913 response1[0] |= 0x40;
914 sak |= 0x04;
915 } else {
916 num_to_bytes(uid_1st,4,response2);
917 // Configure the ATQA and SAK accordingly
918 response1[0] &= 0xBF;
919 sak &= 0xFB;
920 }
921
922 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
923 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
924
925 // Prepare the mandatory SAK (for 4 and 7 byte UID)
926 uint8_t response3[3];
927 response3[0] = sak;
928 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
929
930 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
931 uint8_t response3a[3];
932 response3a[0] = sak & 0xFB;
933 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
934
935 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
936 uint8_t response6[] = { 0x04, 0x58, 0x00, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS
937 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
938
939 #define TAG_RESPONSE_COUNT 7
940 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
941 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
942 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
943 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
944 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
945 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
946 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
947 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
948 };
949
950 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
951 // Such a response is less time critical, so we can prepare them on the fly
952 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
953 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
954 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
955 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
956 tag_response_info_t dynamic_response_info = {
957 .response = dynamic_response_buffer,
958 .response_n = 0,
959 .modulation = dynamic_modulation_buffer,
960 .modulation_n = 0
961 };
962
963 // Reset the offset pointer of the free buffer
964 reset_free_buffer();
965
966 // Prepare the responses of the anticollision phase
967 // there will be not enough time to do this at the moment the reader sends it REQA
968 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
969 prepare_allocated_tag_modulation(&responses[i]);
970 }
971
972 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
973 int len = 0;
974
975 // To control where we are in the protocol
976 int order = 0;
977 int lastorder;
978
979 // Just to allow some checks
980 int happened = 0;
981 int happened2 = 0;
982 int cmdsRecvd = 0;
983
984 // We need to listen to the high-frequency, peak-detected path.
985 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
986
987 cmdsRecvd = 0;
988 tag_response_info_t* p_response;
989
990 LED_A_ON();
991 for(;;) {
992 // Clean receive command buffer
993
994 if(!GetIso14443aCommandFromReader(receivedCmd, &len, RECV_CMD_SIZE)) {
995 DbpString("Button press");
996 break;
997 }
998
999 p_response = NULL;
1000
1001 // doob - added loads of debug strings so we can see what the reader is saying to us during the sim as hi14alist is not populated
1002 // Okay, look at the command now.
1003 lastorder = order;
1004 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1005 p_response = &responses[0]; order = 1;
1006 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1007 p_response = &responses[0]; order = 6;
1008 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1009 p_response = &responses[1]; order = 2;
1010 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1011 p_response = &responses[2]; order = 20;
1012 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1013 p_response = &responses[3]; order = 3;
1014 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1015 p_response = &responses[4]; order = 30;
1016 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1017 EmSendCmdEx(data+(4*receivedCmd[0]),16,false);
1018 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1019 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1020 p_response = NULL;
1021 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1022 // DbpString("Reader requested we HALT!:");
1023 if (tracing) {
1024 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1025 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1026 }
1027 p_response = NULL;
1028 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1029 p_response = &responses[5]; order = 7;
1030 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1031 if (tagType == 1 || tagType == 2) { // RATS not supported
1032 EmSend4bit(CARD_NACK_NA);
1033 p_response = NULL;
1034 } else {
1035 p_response = &responses[6]; order = 70;
1036 }
1037 } else if (order == 7 && len == 8) { // Received authentication request
1038 if (tracing) {
1039 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1040 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1041 }
1042 uint32_t nr = bytes_to_num(receivedCmd,4);
1043 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1044 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar);
1045 } else {
1046 // Check for ISO 14443A-4 compliant commands, look at left nibble
1047 switch (receivedCmd[0]) {
1048
1049 case 0x0B:
1050 case 0x0A: { // IBlock (command)
1051 dynamic_response_info.response[0] = receivedCmd[0];
1052 dynamic_response_info.response[1] = 0x00;
1053 dynamic_response_info.response[2] = 0x90;
1054 dynamic_response_info.response[3] = 0x00;
1055 dynamic_response_info.response_n = 4;
1056 } break;
1057
1058 case 0x1A:
1059 case 0x1B: { // Chaining command
1060 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1061 dynamic_response_info.response_n = 2;
1062 } break;
1063
1064 case 0xaa:
1065 case 0xbb: {
1066 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1067 dynamic_response_info.response_n = 2;
1068 } break;
1069
1070 case 0xBA: { //
1071 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1072 dynamic_response_info.response_n = 2;
1073 } break;
1074
1075 case 0xCA:
1076 case 0xC2: { // Readers sends deselect command
1077 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1078 dynamic_response_info.response_n = 2;
1079 } break;
1080
1081 default: {
1082 // Never seen this command before
1083 if (tracing) {
1084 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1085 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1086 }
1087 Dbprintf("Received unknown command (len=%d):",len);
1088 Dbhexdump(len,receivedCmd,false);
1089 // Do not respond
1090 dynamic_response_info.response_n = 0;
1091 } break;
1092 }
1093
1094 if (dynamic_response_info.response_n > 0) {
1095 // Copy the CID from the reader query
1096 dynamic_response_info.response[1] = receivedCmd[1];
1097
1098 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1099 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1100 dynamic_response_info.response_n += 2;
1101
1102 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1103 Dbprintf("Error preparing tag response");
1104 if (tracing) {
1105 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1106 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1107 }
1108 break;
1109 }
1110 p_response = &dynamic_response_info;
1111 }
1112 }
1113
1114 // Count number of wakeups received after a halt
1115 if(order == 6 && lastorder == 5) { happened++; }
1116
1117 // Count number of other messages after a halt
1118 if(order != 6 && lastorder == 5) { happened2++; }
1119
1120 if(cmdsRecvd > 999) {
1121 DbpString("1000 commands later...");
1122 break;
1123 }
1124 cmdsRecvd++;
1125
1126 if (p_response != NULL) {
1127 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1128 // do the tracing for the previous reader request and this tag answer:
1129 EmLogTrace(Uart.output,
1130 Uart.len,
1131 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1132 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1133 Uart.parityBits,
1134 p_response->response,
1135 p_response->response_n,
1136 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1137 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1138 SwapBits(GetParity(p_response->response, p_response->response_n), p_response->response_n));
1139 }
1140
1141 if (!tracing) {
1142 Dbprintf("Trace Full. Simulation stopped.");
1143 break;
1144 }
1145 }
1146
1147 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1148 LED_A_OFF();
1149 }
1150
1151
1152 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1153 // of bits specified in the delay parameter.
1154 void PrepareDelayedTransfer(uint16_t delay)
1155 {
1156 uint8_t bitmask = 0;
1157 uint8_t bits_to_shift = 0;
1158 uint8_t bits_shifted = 0;
1159
1160 delay &= 0x07;
1161 if (delay) {
1162 for (uint16_t i = 0; i < delay; i++) {
1163 bitmask |= (0x01 << i);
1164 }
1165 ToSend[ToSendMax++] = 0x00;
1166 for (uint16_t i = 0; i < ToSendMax; i++) {
1167 bits_to_shift = ToSend[i] & bitmask;
1168 ToSend[i] = ToSend[i] >> delay;
1169 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1170 bits_shifted = bits_to_shift;
1171 }
1172 }
1173 }
1174
1175
1176 //-------------------------------------------------------------------------------------
1177 // Transmit the command (to the tag) that was placed in ToSend[].
1178 // Parameter timing:
1179 // if NULL: transfer at next possible time, taking into account
1180 // request guard time and frame delay time
1181 // if == 0: transfer immediately and return time of transfer
1182 // if != 0: delay transfer until time specified
1183 //-------------------------------------------------------------------------------------
1184 static void TransmitFor14443a(const uint8_t *cmd, int len, uint32_t *timing)
1185 {
1186
1187 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1188
1189 uint32_t ThisTransferTime = 0;
1190
1191 if (timing) {
1192 if(*timing == 0) { // Measure time
1193 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1194 } else {
1195 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1196 }
1197 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1198 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1199 LastTimeProxToAirStart = *timing;
1200 } else {
1201 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1202 while(GetCountSspClk() < ThisTransferTime);
1203 LastTimeProxToAirStart = ThisTransferTime;
1204 }
1205
1206 // clear TXRDY
1207 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1208
1209 // for(uint16_t c = 0; c < 10;) { // standard delay for each transfer (allow tag to be ready after last transmission)
1210 // if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1211 // AT91C_BASE_SSC->SSC_THR = SEC_Y;
1212 // c++;
1213 // }
1214 // }
1215
1216 uint16_t c = 0;
1217 for(;;) {
1218 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1219 AT91C_BASE_SSC->SSC_THR = cmd[c];
1220 c++;
1221 if(c >= len) {
1222 break;
1223 }
1224 }
1225 }
1226
1227 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1228
1229 }
1230
1231
1232 //-----------------------------------------------------------------------------
1233 // Prepare reader command (in bits, support short frames) to send to FPGA
1234 //-----------------------------------------------------------------------------
1235 void CodeIso14443aBitsAsReaderPar(const uint8_t * cmd, int bits, uint32_t dwParity)
1236 {
1237 int i, j;
1238 int last;
1239 uint8_t b;
1240
1241 ToSendReset();
1242
1243 // Start of Communication (Seq. Z)
1244 ToSend[++ToSendMax] = SEC_Z;
1245 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1246 last = 0;
1247
1248 size_t bytecount = nbytes(bits);
1249 // Generate send structure for the data bits
1250 for (i = 0; i < bytecount; i++) {
1251 // Get the current byte to send
1252 b = cmd[i];
1253 size_t bitsleft = MIN((bits-(i*8)),8);
1254
1255 for (j = 0; j < bitsleft; j++) {
1256 if (b & 1) {
1257 // Sequence X
1258 ToSend[++ToSendMax] = SEC_X;
1259 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1260 last = 1;
1261 } else {
1262 if (last == 0) {
1263 // Sequence Z
1264 ToSend[++ToSendMax] = SEC_Z;
1265 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1266 } else {
1267 // Sequence Y
1268 ToSend[++ToSendMax] = SEC_Y;
1269 last = 0;
1270 }
1271 }
1272 b >>= 1;
1273 }
1274
1275 // Only transmit (last) parity bit if we transmitted a complete byte
1276 if (j == 8) {
1277 // Get the parity bit
1278 if ((dwParity >> i) & 0x01) {
1279 // Sequence X
1280 ToSend[++ToSendMax] = SEC_X;
1281 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1282 last = 1;
1283 } else {
1284 if (last == 0) {
1285 // Sequence Z
1286 ToSend[++ToSendMax] = SEC_Z;
1287 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1288 } else {
1289 // Sequence Y
1290 ToSend[++ToSendMax] = SEC_Y;
1291 last = 0;
1292 }
1293 }
1294 }
1295 }
1296
1297 // End of Communication: Logic 0 followed by Sequence Y
1298 if (last == 0) {
1299 // Sequence Z
1300 ToSend[++ToSendMax] = SEC_Z;
1301 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1302 } else {
1303 // Sequence Y
1304 ToSend[++ToSendMax] = SEC_Y;
1305 last = 0;
1306 }
1307 ToSend[++ToSendMax] = SEC_Y;
1308
1309 // Convert to length of command:
1310 ToSendMax++;
1311 }
1312
1313 //-----------------------------------------------------------------------------
1314 // Prepare reader command to send to FPGA
1315 //-----------------------------------------------------------------------------
1316 void CodeIso14443aAsReaderPar(const uint8_t * cmd, int len, uint32_t dwParity)
1317 {
1318 CodeIso14443aBitsAsReaderPar(cmd,len*8,dwParity);
1319 }
1320
1321 //-----------------------------------------------------------------------------
1322 // Wait for commands from reader
1323 // Stop when button is pressed (return 1) or field was gone (return 2)
1324 // Or return 0 when command is captured
1325 //-----------------------------------------------------------------------------
1326 static int EmGetCmd(uint8_t *received, int *len)
1327 {
1328 *len = 0;
1329
1330 uint32_t timer = 0, vtime = 0;
1331 int analogCnt = 0;
1332 int analogAVG = 0;
1333
1334 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1335 // only, since we are receiving, not transmitting).
1336 // Signal field is off with the appropriate LED
1337 LED_D_OFF();
1338 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1339
1340 // Set ADC to read field strength
1341 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1342 AT91C_BASE_ADC->ADC_MR =
1343 ADC_MODE_PRESCALE(32) |
1344 ADC_MODE_STARTUP_TIME(16) |
1345 ADC_MODE_SAMPLE_HOLD_TIME(8);
1346 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1347 // start ADC
1348 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1349
1350 // Now run a 'software UART' on the stream of incoming samples.
1351 UartReset();
1352 Uart.output = received;
1353
1354 // Clear RXRDY:
1355 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1356
1357 for(;;) {
1358 WDT_HIT();
1359
1360 if (BUTTON_PRESS()) return 1;
1361
1362 // test if the field exists
1363 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1364 analogCnt++;
1365 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1366 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1367 if (analogCnt >= 32) {
1368 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1369 vtime = GetTickCount();
1370 if (!timer) timer = vtime;
1371 // 50ms no field --> card to idle state
1372 if (vtime - timer > 50) return 2;
1373 } else
1374 if (timer) timer = 0;
1375 analogCnt = 0;
1376 analogAVG = 0;
1377 }
1378 }
1379
1380 // receive and test the miller decoding
1381 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1382 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1383 if(MillerDecoding(b, 0)) {
1384 *len = Uart.len;
1385 return 0;
1386 }
1387 }
1388
1389 }
1390 }
1391
1392
1393 static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, bool correctionNeeded)
1394 {
1395 uint8_t b;
1396 uint16_t i = 0;
1397 uint32_t ThisTransferTime;
1398
1399 // Modulate Manchester
1400 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1401
1402 // include correction bit if necessary
1403 if (Uart.parityBits & 0x01) {
1404 correctionNeeded = TRUE;
1405 }
1406 if(correctionNeeded) {
1407 // 1236, so correction bit needed
1408 i = 0;
1409 } else {
1410 i = 1;
1411 }
1412
1413 // clear receiving shift register and holding register
1414 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1415 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1416 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1417 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1418
1419 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1420 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1421 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1422 if (AT91C_BASE_SSC->SSC_RHR) break;
1423 }
1424
1425 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1426
1427 // Clear TXRDY:
1428 AT91C_BASE_SSC->SSC_THR = SEC_F;
1429
1430 // send cycle
1431 for(; i <= respLen; ) {
1432 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1433 AT91C_BASE_SSC->SSC_THR = resp[i++];
1434 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1435 }
1436
1437 if(BUTTON_PRESS()) {
1438 break;
1439 }
1440 }
1441
1442 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1443 for (i = 0; i < 2 ; ) {
1444 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1445 AT91C_BASE_SSC->SSC_THR = SEC_F;
1446 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1447 i++;
1448 }
1449 }
1450
1451 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1452
1453 return 0;
1454 }
1455
1456 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1457 Code4bitAnswerAsTag(resp);
1458 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1459 // do the tracing for the previous reader request and this tag answer:
1460 EmLogTrace(Uart.output,
1461 Uart.len,
1462 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1463 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1464 Uart.parityBits,
1465 &resp,
1466 1,
1467 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1468 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1469 SwapBits(GetParity(&resp, 1), 1));
1470 return res;
1471 }
1472
1473 int EmSend4bit(uint8_t resp){
1474 return EmSend4bitEx(resp, false);
1475 }
1476
1477 int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par){
1478 CodeIso14443aAsTagPar(resp, respLen, par);
1479 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1480 // do the tracing for the previous reader request and this tag answer:
1481 EmLogTrace(Uart.output,
1482 Uart.len,
1483 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1484 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1485 Uart.parityBits,
1486 resp,
1487 respLen,
1488 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1489 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1490 SwapBits(GetParity(resp, respLen), respLen));
1491 return res;
1492 }
1493
1494 int EmSendCmdEx(uint8_t *resp, int respLen, bool correctionNeeded){
1495 return EmSendCmdExPar(resp, respLen, correctionNeeded, GetParity(resp, respLen));
1496 }
1497
1498 int EmSendCmd(uint8_t *resp, int respLen){
1499 return EmSendCmdExPar(resp, respLen, false, GetParity(resp, respLen));
1500 }
1501
1502 int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par){
1503 return EmSendCmdExPar(resp, respLen, false, par);
1504 }
1505
1506 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint32_t reader_Parity,
1507 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint32_t tag_Parity)
1508 {
1509 if (tracing) {
1510 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1511 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1512 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1513 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1514 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1515 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1516 reader_EndTime = tag_StartTime - exact_fdt;
1517 reader_StartTime = reader_EndTime - reader_modlen;
1518 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_Parity, TRUE)) {
1519 return FALSE;
1520 } else if (!LogTrace(NULL, 0, reader_EndTime, 0, TRUE)) {
1521 return FALSE;
1522 } else if (!LogTrace(tag_data, tag_len, tag_StartTime, tag_Parity, FALSE)) {
1523 return FALSE;
1524 } else {
1525 return (!LogTrace(NULL, 0, tag_EndTime, 0, FALSE));
1526 }
1527 } else {
1528 return TRUE;
1529 }
1530 }
1531
1532 //-----------------------------------------------------------------------------
1533 // Wait a certain time for tag response
1534 // If a response is captured return TRUE
1535 // If it takes too long return FALSE
1536 //-----------------------------------------------------------------------------
1537 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint16_t offset, int maxLen)
1538 {
1539 uint16_t c;
1540
1541 // Set FPGA mode to "reader listen mode", no modulation (listen
1542 // only, since we are receiving, not transmitting).
1543 // Signal field is on with the appropriate LED
1544 LED_D_ON();
1545 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1546
1547 // Now get the answer from the card
1548 DemodReset();
1549 Demod.output = receivedResponse;
1550
1551 // clear RXRDY:
1552 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1553
1554 c = 0;
1555 for(;;) {
1556 WDT_HIT();
1557
1558 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1559 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1560 if(ManchesterDecoding(b, offset, 0)) {
1561 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1562 return TRUE;
1563 } else if(c++ > iso14a_timeout) {
1564 return FALSE;
1565 }
1566 }
1567 }
1568 }
1569
1570 void ReaderTransmitBitsPar(uint8_t* frame, int bits, uint32_t par, uint32_t *timing)
1571 {
1572
1573 CodeIso14443aBitsAsReaderPar(frame,bits,par);
1574
1575 // Send command to tag
1576 TransmitFor14443a(ToSend, ToSendMax, timing);
1577 if(trigger)
1578 LED_A_ON();
1579
1580 // Log reader command in trace buffer
1581 if (tracing) {
1582 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1583 LogTrace(NULL, 0, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, 0, TRUE);
1584 }
1585 }
1586
1587 void ReaderTransmitPar(uint8_t* frame, int len, uint32_t par, uint32_t *timing)
1588 {
1589 ReaderTransmitBitsPar(frame,len*8,par, timing);
1590 }
1591
1592 void ReaderTransmitBits(uint8_t* frame, int len, uint32_t *timing)
1593 {
1594 // Generate parity and redirect
1595 ReaderTransmitBitsPar(frame,len,GetParity(frame,len/8), timing);
1596 }
1597
1598 void ReaderTransmit(uint8_t* frame, int len, uint32_t *timing)
1599 {
1600 // Generate parity and redirect
1601 ReaderTransmitBitsPar(frame,len*8,GetParity(frame,len), timing);
1602 }
1603
1604 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset)
1605 {
1606 if (!GetIso14443aAnswerFromTag(receivedAnswer,offset,160)) return FALSE;
1607 if (tracing) {
1608 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.parityBits, FALSE);
1609 LogTrace(NULL, 0, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, 0, FALSE);
1610 }
1611 return Demod.len;
1612 }
1613
1614 int ReaderReceive(uint8_t* receivedAnswer)
1615 {
1616 return ReaderReceiveOffset(receivedAnswer, 0);
1617 }
1618
1619 int ReaderReceivePar(uint8_t *receivedAnswer, uint32_t *parptr)
1620 {
1621 if (!GetIso14443aAnswerFromTag(receivedAnswer,0,160)) return FALSE;
1622 if (tracing) {
1623 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.parityBits, FALSE);
1624 LogTrace(NULL, 0, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, 0, FALSE);
1625 }
1626 *parptr = Demod.parityBits;
1627 return Demod.len;
1628 }
1629
1630 /* performs iso14443a anticollision procedure
1631 * fills the uid pointer unless NULL
1632 * fills resp_data unless NULL */
1633 int iso14443a_select_card(byte_t* uid_ptr, iso14a_card_select_t* p_hi14a_card, uint32_t* cuid_ptr) {
1634 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1635 uint8_t sel_all[] = { 0x93,0x20 };
1636 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1637 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1638 uint8_t* resp = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); // was 3560 - tied to other size changes
1639 byte_t uid_resp[4];
1640 size_t uid_resp_len;
1641
1642 uint8_t sak = 0x04; // cascade uid
1643 int cascade_level = 0;
1644 int len;
1645
1646 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1647 ReaderTransmitBitsPar(wupa,7,0, NULL);
1648
1649 // Receive the ATQA
1650 if(!ReaderReceive(resp)) return 0;
1651 // Dbprintf("atqa: %02x %02x",resp[0],resp[1]);
1652
1653 if(p_hi14a_card) {
1654 memcpy(p_hi14a_card->atqa, resp, 2);
1655 p_hi14a_card->uidlen = 0;
1656 memset(p_hi14a_card->uid,0,10);
1657 }
1658
1659 // clear uid
1660 if (uid_ptr) {
1661 memset(uid_ptr,0,10);
1662 }
1663
1664 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1665 // which case we need to make a cascade 2 request and select - this is a long UID
1666 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1667 for(; sak & 0x04; cascade_level++) {
1668 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1669 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1670
1671 // SELECT_ALL
1672 ReaderTransmit(sel_all,sizeof(sel_all), NULL);
1673 if (!ReaderReceive(resp)) return 0;
1674
1675 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1676 memset(uid_resp, 0, 4);
1677 uint16_t uid_resp_bits = 0;
1678 uint16_t collision_answer_offset = 0;
1679 // anti-collision-loop:
1680 while (Demod.collisionPos) {
1681 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1682 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1683 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1684 uid_resp[uid_resp_bits & 0xf8] |= UIDbit << (uid_resp_bits % 8);
1685 }
1686 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1687 uid_resp_bits++;
1688 // construct anticollosion command:
1689 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1690 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1691 sel_uid[2+i] = uid_resp[i];
1692 }
1693 collision_answer_offset = uid_resp_bits%8;
1694 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1695 if (!ReaderReceiveOffset(resp, collision_answer_offset)) return 0;
1696 }
1697 // finally, add the last bits and BCC of the UID
1698 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1699 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1700 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1701 }
1702
1703 } else { // no collision, use the response to SELECT_ALL as current uid
1704 memcpy(uid_resp,resp,4);
1705 }
1706 uid_resp_len = 4;
1707 // Dbprintf("uid: %02x %02x %02x %02x",uid_resp[0],uid_resp[1],uid_resp[2],uid_resp[3]);
1708
1709 // calculate crypto UID. Always use last 4 Bytes.
1710 if(cuid_ptr) {
1711 *cuid_ptr = bytes_to_num(uid_resp, 4);
1712 }
1713
1714 // Construct SELECT UID command
1715 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1716 memcpy(sel_uid+2,uid_resp,4); // the UID
1717 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1718 AppendCrc14443a(sel_uid,7); // calculate and add CRC
1719 ReaderTransmit(sel_uid,sizeof(sel_uid), NULL);
1720
1721 // Receive the SAK
1722 if (!ReaderReceive(resp)) return 0;
1723 sak = resp[0];
1724
1725 // Test if more parts of the uid are comming
1726 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1727 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1728 // http://www.nxp.com/documents/application_note/AN10927.pdf
1729 memcpy(uid_resp, uid_resp + 1, 3);
1730 uid_resp_len = 3;
1731 }
1732
1733 if(uid_ptr) {
1734 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1735 }
1736
1737 if(p_hi14a_card) {
1738 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1739 p_hi14a_card->uidlen += uid_resp_len;
1740 }
1741 }
1742
1743 if(p_hi14a_card) {
1744 p_hi14a_card->sak = sak;
1745 p_hi14a_card->ats_len = 0;
1746 }
1747
1748 if( (sak & 0x20) == 0) {
1749 return 2; // non iso14443a compliant tag
1750 }
1751
1752 // Request for answer to select
1753 AppendCrc14443a(rats, 2);
1754 ReaderTransmit(rats, sizeof(rats), NULL);
1755
1756 if (!(len = ReaderReceive(resp))) return 0;
1757
1758 if(p_hi14a_card) {
1759 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1760 p_hi14a_card->ats_len = len;
1761 }
1762
1763 // reset the PCB block number
1764 iso14_pcb_blocknum = 0;
1765 return 1;
1766 }
1767
1768 void iso14443a_setup(uint8_t fpga_minor_mode) {
1769 // Set up the synchronous serial port
1770 FpgaSetupSsc();
1771 // connect Demodulated Signal to ADC:
1772 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1773
1774 // Signal field is on with the appropriate LED
1775 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
1776 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
1777 LED_D_ON();
1778 } else {
1779 LED_D_OFF();
1780 }
1781 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
1782
1783 // Start the timer
1784 StartCountSspClk();
1785
1786 DemodReset();
1787 UartReset();
1788 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
1789 iso14a_set_timeout(1050); // 10ms default
1790 }
1791
1792 int iso14_apdu(uint8_t * cmd, size_t cmd_len, void * data) {
1793 uint8_t real_cmd[cmd_len+4];
1794 real_cmd[0] = 0x0a; //I-Block
1795 // put block number into the PCB
1796 real_cmd[0] |= iso14_pcb_blocknum;
1797 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1798 memcpy(real_cmd+2, cmd, cmd_len);
1799 AppendCrc14443a(real_cmd,cmd_len+2);
1800
1801 ReaderTransmit(real_cmd, cmd_len+4, NULL);
1802 size_t len = ReaderReceive(data);
1803 uint8_t * data_bytes = (uint8_t *) data;
1804 if (!len)
1805 return 0; //DATA LINK ERROR
1806 // if we received an I- or R(ACK)-Block with a block number equal to the
1807 // current block number, toggle the current block number
1808 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1809 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1810 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1811 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1812 {
1813 iso14_pcb_blocknum ^= 1;
1814 }
1815
1816 return len;
1817 }
1818
1819 //-----------------------------------------------------------------------------
1820 // Read an ISO 14443a tag. Send out commands and store answers.
1821 //
1822 //-----------------------------------------------------------------------------
1823 void ReaderIso14443a(UsbCommand *c)
1824 {
1825 iso14a_command_t param = c->arg[0];
1826 uint8_t *cmd = c->d.asBytes;
1827 size_t len = c->arg[1];
1828 size_t lenbits = c->arg[2];
1829 uint32_t arg0 = 0;
1830 byte_t buf[USB_CMD_DATA_SIZE];
1831
1832 if(param & ISO14A_CONNECT) {
1833 iso14a_clear_trace();
1834 }
1835
1836 iso14a_set_tracing(TRUE);
1837
1838 if(param & ISO14A_REQUEST_TRIGGER) {
1839 iso14a_set_trigger(TRUE);
1840 }
1841
1842 if(param & ISO14A_CONNECT) {
1843 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
1844 if(!(param & ISO14A_NO_SELECT)) {
1845 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
1846 arg0 = iso14443a_select_card(NULL,card,NULL);
1847 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
1848 }
1849 }
1850
1851 if(param & ISO14A_SET_TIMEOUT) {
1852 iso14a_timeout = c->arg[2];
1853 }
1854
1855 if(param & ISO14A_APDU) {
1856 arg0 = iso14_apdu(cmd, len, buf);
1857 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1858 }
1859
1860 if(param & ISO14A_RAW) {
1861 if(param & ISO14A_APPEND_CRC) {
1862 AppendCrc14443a(cmd,len);
1863 len += 2;
1864 }
1865 if(lenbits>0) {
1866 ReaderTransmitBitsPar(cmd,lenbits,GetParity(cmd,lenbits/8), NULL);
1867 } else {
1868 ReaderTransmit(cmd,len, NULL);
1869 }
1870 arg0 = ReaderReceive(buf);
1871 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1872 }
1873
1874 if(param & ISO14A_REQUEST_TRIGGER) {
1875 iso14a_set_trigger(FALSE);
1876 }
1877
1878 if(param & ISO14A_NO_DISCONNECT) {
1879 return;
1880 }
1881
1882 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1883 LEDsoff();
1884 }
1885
1886
1887 // Determine the distance between two nonces.
1888 // Assume that the difference is small, but we don't know which is first.
1889 // Therefore try in alternating directions.
1890 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
1891
1892 uint16_t i;
1893 uint32_t nttmp1, nttmp2;
1894
1895 if (nt1 == nt2) return 0;
1896
1897 nttmp1 = nt1;
1898 nttmp2 = nt2;
1899
1900 for (i = 1; i < 32768; i++) {
1901 nttmp1 = prng_successor(nttmp1, 1);
1902 if (nttmp1 == nt2) return i;
1903 nttmp2 = prng_successor(nttmp2, 1);
1904 if (nttmp2 == nt1) return -i;
1905 }
1906
1907 return(-99999); // either nt1 or nt2 are invalid nonces
1908 }
1909
1910
1911 //-----------------------------------------------------------------------------
1912 // Recover several bits of the cypher stream. This implements (first stages of)
1913 // the algorithm described in "The Dark Side of Security by Obscurity and
1914 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
1915 // (article by Nicolas T. Courtois, 2009)
1916 //-----------------------------------------------------------------------------
1917 void ReaderMifare(bool first_try)
1918 {
1919 // Mifare AUTH
1920 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
1921 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
1922 static uint8_t mf_nr_ar3;
1923
1924 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
1925
1926 iso14a_clear_trace();
1927 iso14a_set_tracing(TRUE);
1928
1929 byte_t nt_diff = 0;
1930 byte_t par = 0;
1931 //byte_t par_mask = 0xff;
1932 static byte_t par_low = 0;
1933 bool led_on = TRUE;
1934 uint8_t uid[10];
1935 uint32_t cuid;
1936
1937 uint32_t nt, previous_nt;
1938 static uint32_t nt_attacked = 0;
1939 byte_t par_list[8] = {0,0,0,0,0,0,0,0};
1940 byte_t ks_list[8] = {0,0,0,0,0,0,0,0};
1941
1942 static uint32_t sync_time;
1943 static uint32_t sync_cycles;
1944 int catch_up_cycles = 0;
1945 int last_catch_up = 0;
1946 uint16_t consecutive_resyncs = 0;
1947 int isOK = 0;
1948
1949
1950
1951 if (first_try) {
1952 mf_nr_ar3 = 0;
1953 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
1954 sync_time = GetCountSspClk() & 0xfffffff8;
1955 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
1956 nt_attacked = 0;
1957 nt = 0;
1958 par = 0;
1959 }
1960 else {
1961 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
1962 // nt_attacked = prng_successor(nt_attacked, 1);
1963 mf_nr_ar3++;
1964 mf_nr_ar[3] = mf_nr_ar3;
1965 par = par_low;
1966 }
1967
1968 LED_A_ON();
1969 LED_B_OFF();
1970 LED_C_OFF();
1971
1972
1973 for(uint16_t i = 0; TRUE; i++) {
1974
1975 WDT_HIT();
1976
1977 // Test if the action was cancelled
1978 if(BUTTON_PRESS()) {
1979 break;
1980 }
1981
1982 LED_C_ON();
1983
1984 if(!iso14443a_select_card(uid, NULL, &cuid)) {
1985 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
1986 continue;
1987 }
1988
1989 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
1990 catch_up_cycles = 0;
1991
1992 // if we missed the sync time already, advance to the next nonce repeat
1993 while(GetCountSspClk() > sync_time) {
1994 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
1995 }
1996
1997 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
1998 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
1999
2000 // Receive the (4 Byte) "random" nonce
2001 if (!ReaderReceive(receivedAnswer)) {
2002 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2003 continue;
2004 }
2005
2006 previous_nt = nt;
2007 nt = bytes_to_num(receivedAnswer, 4);
2008
2009 // Transmit reader nonce with fake par
2010 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2011
2012 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2013 int nt_distance = dist_nt(previous_nt, nt);
2014 if (nt_distance == 0) {
2015 nt_attacked = nt;
2016 }
2017 else {
2018 if (nt_distance == -99999) { // invalid nonce received, try again
2019 continue;
2020 }
2021 sync_cycles = (sync_cycles - nt_distance);
2022 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
2023 continue;
2024 }
2025 }
2026
2027 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2028 catch_up_cycles = -dist_nt(nt_attacked, nt);
2029 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2030 catch_up_cycles = 0;
2031 continue;
2032 }
2033 if (catch_up_cycles == last_catch_up) {
2034 consecutive_resyncs++;
2035 }
2036 else {
2037 last_catch_up = catch_up_cycles;
2038 consecutive_resyncs = 0;
2039 }
2040 if (consecutive_resyncs < 3) {
2041 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2042 }
2043 else {
2044 sync_cycles = sync_cycles + catch_up_cycles;
2045 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2046 }
2047 continue;
2048 }
2049
2050 consecutive_resyncs = 0;
2051
2052 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2053 if (ReaderReceive(receivedAnswer))
2054 {
2055 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2056
2057 if (nt_diff == 0)
2058 {
2059 par_low = par & 0x07; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2060 }
2061
2062 led_on = !led_on;
2063 if(led_on) LED_B_ON(); else LED_B_OFF();
2064
2065 par_list[nt_diff] = par;
2066 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2067
2068 // Test if the information is complete
2069 if (nt_diff == 0x07) {
2070 isOK = 1;
2071 break;
2072 }
2073
2074 nt_diff = (nt_diff + 1) & 0x07;
2075 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2076 par = par_low;
2077 } else {
2078 if (nt_diff == 0 && first_try)
2079 {
2080 par++;
2081 } else {
2082 par = (((par >> 3) + 1) << 3) | par_low;
2083 }
2084 }
2085 }
2086
2087
2088 mf_nr_ar[3] &= 0x1F;
2089
2090 byte_t buf[28];
2091 memcpy(buf + 0, uid, 4);
2092 num_to_bytes(nt, 4, buf + 4);
2093 memcpy(buf + 8, par_list, 8);
2094 memcpy(buf + 16, ks_list, 8);
2095 memcpy(buf + 24, mf_nr_ar, 4);
2096
2097 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2098
2099 // Thats it...
2100 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2101 LEDsoff();
2102
2103 iso14a_set_tracing(FALSE);
2104 }
2105
2106 /**
2107 *MIFARE 1K simulate.
2108 *
2109 *@param flags :
2110 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2111 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2112 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2113 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2114 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2115 */
2116 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2117 {
2118 int cardSTATE = MFEMUL_NOFIELD;
2119 int _7BUID = 0;
2120 int vHf = 0; // in mV
2121 int res;
2122 uint32_t selTimer = 0;
2123 uint32_t authTimer = 0;
2124 uint32_t par = 0;
2125 int len = 0;
2126 uint8_t cardWRBL = 0;
2127 uint8_t cardAUTHSC = 0;
2128 uint8_t cardAUTHKEY = 0xff; // no authentication
2129 uint32_t cardRr = 0;
2130 uint32_t cuid = 0;
2131 //uint32_t rn_enc = 0;
2132 uint32_t ans = 0;
2133 uint32_t cardINTREG = 0;
2134 uint8_t cardINTBLOCK = 0;
2135 struct Crypto1State mpcs = {0, 0};
2136 struct Crypto1State *pcs;
2137 pcs = &mpcs;
2138 uint32_t numReads = 0;//Counts numer of times reader read a block
2139 uint8_t* receivedCmd = eml_get_bigbufptr_recbuf();
2140 uint8_t *response = eml_get_bigbufptr_sendbuf();
2141
2142 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2143 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2144 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2145 uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2146 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2147
2148 uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2149 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2150
2151 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2152 // This can be used in a reader-only attack.
2153 // (it can also be retrieved via 'hf 14a list', but hey...
2154 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0};
2155 uint8_t ar_nr_collected = 0;
2156
2157 // clear trace
2158 iso14a_clear_trace();
2159 iso14a_set_tracing(TRUE);
2160
2161 // Authenticate response - nonce
2162 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2163
2164 //-- Determine the UID
2165 // Can be set from emulator memory, incoming data
2166 // and can be 7 or 4 bytes long
2167 if (flags & FLAG_4B_UID_IN_DATA)
2168 {
2169 // 4B uid comes from data-portion of packet
2170 memcpy(rUIDBCC1,datain,4);
2171 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2172
2173 } else if (flags & FLAG_7B_UID_IN_DATA) {
2174 // 7B uid comes from data-portion of packet
2175 memcpy(&rUIDBCC1[1],datain,3);
2176 memcpy(rUIDBCC2, datain+3, 4);
2177 _7BUID = true;
2178 } else {
2179 // get UID from emul memory
2180 emlGetMemBt(receivedCmd, 7, 1);
2181 _7BUID = !(receivedCmd[0] == 0x00);
2182 if (!_7BUID) { // ---------- 4BUID
2183 emlGetMemBt(rUIDBCC1, 0, 4);
2184 } else { // ---------- 7BUID
2185 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2186 emlGetMemBt(rUIDBCC2, 3, 4);
2187 }
2188 }
2189
2190 /*
2191 * Regardless of what method was used to set the UID, set fifth byte and modify
2192 * the ATQA for 4 or 7-byte UID
2193 */
2194 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2195 if (_7BUID) {
2196 rATQA[0] = 0x44;
2197 rUIDBCC1[0] = 0x88;
2198 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2199 }
2200
2201 // We need to listen to the high-frequency, peak-detected path.
2202 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2203
2204
2205 if (MF_DBGLEVEL >= 1) {
2206 if (!_7BUID) {
2207 Dbprintf("4B UID: %02x%02x%02x%02x",rUIDBCC1[0] , rUIDBCC1[1] , rUIDBCC1[2] , rUIDBCC1[3]);
2208 } else {
2209 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",rUIDBCC1[0] , rUIDBCC1[1] , rUIDBCC1[2] , rUIDBCC1[3],rUIDBCC2[0],rUIDBCC2[1] ,rUIDBCC2[2] , rUIDBCC2[3]);
2210 }
2211 }
2212
2213 bool finished = FALSE;
2214 while (!BUTTON_PRESS() && !finished) {
2215 WDT_HIT();
2216
2217 // find reader field
2218 // Vref = 3300mV, and an 10:1 voltage divider on the input
2219 // can measure voltages up to 33000 mV
2220 if (cardSTATE == MFEMUL_NOFIELD) {
2221 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2222 if (vHf > MF_MINFIELDV) {
2223 cardSTATE_TO_IDLE();
2224 LED_A_ON();
2225 }
2226 }
2227 if(cardSTATE == MFEMUL_NOFIELD) continue;
2228
2229 //Now, get data
2230
2231 res = EmGetCmd(receivedCmd, &len);
2232 if (res == 2) { //Field is off!
2233 cardSTATE = MFEMUL_NOFIELD;
2234 LEDsoff();
2235 continue;
2236 } else if (res == 1) {
2237 break; //return value 1 means button press
2238 }
2239
2240 // REQ or WUP request in ANY state and WUP in HALTED state
2241 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2242 selTimer = GetTickCount();
2243 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2244 cardSTATE = MFEMUL_SELECT1;
2245
2246 // init crypto block
2247 LED_B_OFF();
2248 LED_C_OFF();
2249 crypto1_destroy(pcs);
2250 cardAUTHKEY = 0xff;
2251 continue;
2252 }
2253
2254 switch (cardSTATE) {
2255 case MFEMUL_NOFIELD:
2256 case MFEMUL_HALTED:
2257 case MFEMUL_IDLE:{
2258 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2259 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2260 break;
2261 }
2262 case MFEMUL_SELECT1:{
2263 // select all
2264 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2265 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2266 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2267 break;
2268 }
2269
2270 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2271 {
2272 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2273 }
2274 // select card
2275 if (len == 9 &&
2276 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2277 EmSendCmd(_7BUID?rSAK1:rSAK, sizeof(_7BUID?rSAK1:rSAK));
2278 cuid = bytes_to_num(rUIDBCC1, 4);
2279 if (!_7BUID) {
2280 cardSTATE = MFEMUL_WORK;
2281 LED_B_ON();
2282 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2283 break;
2284 } else {
2285 cardSTATE = MFEMUL_SELECT2;
2286 }
2287 }
2288 break;
2289 }
2290 case MFEMUL_AUTH1:{
2291 if( len != 8)
2292 {
2293 cardSTATE_TO_IDLE();
2294 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2295 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2296 break;
2297 }
2298 uint32_t ar = bytes_to_num(receivedCmd, 4);
2299 uint32_t nr= bytes_to_num(&receivedCmd[4], 4);
2300
2301 //Collect AR/NR
2302 if(ar_nr_collected < 2){
2303 if(ar_nr_responses[2] != ar)
2304 {// Avoid duplicates... probably not necessary, ar should vary.
2305 ar_nr_responses[ar_nr_collected*4] = cuid;
2306 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2307 ar_nr_responses[ar_nr_collected*4+2] = ar;
2308 ar_nr_responses[ar_nr_collected*4+3] = nr;
2309 ar_nr_collected++;
2310 }
2311 }
2312
2313 // --- crypto
2314 crypto1_word(pcs, ar , 1);
2315 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2316
2317 // test if auth OK
2318 if (cardRr != prng_successor(nonce, 64)){
2319 if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED. cardRr=%08x, succ=%08x",cardRr, prng_successor(nonce, 64));
2320 // Shouldn't we respond anything here?
2321 // Right now, we don't nack or anything, which causes the
2322 // reader to do a WUPA after a while. /Martin
2323 cardSTATE_TO_IDLE();
2324 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2325 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2326 break;
2327 }
2328
2329 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2330
2331 num_to_bytes(ans, 4, rAUTH_AT);
2332 // --- crypto
2333 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2334 LED_C_ON();
2335 cardSTATE = MFEMUL_WORK;
2336 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED. sector=%d, key=%d time=%d", cardAUTHSC, cardAUTHKEY, GetTickCount() - authTimer);
2337 break;
2338 }
2339 case MFEMUL_SELECT2:{
2340 if (!len) {
2341 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2342 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2343 break;
2344 }
2345 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2346 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2347 break;
2348 }
2349
2350 // select 2 card
2351 if (len == 9 &&
2352 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2353 EmSendCmd(rSAK, sizeof(rSAK));
2354 cuid = bytes_to_num(rUIDBCC2, 4);
2355 cardSTATE = MFEMUL_WORK;
2356 LED_B_ON();
2357 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2358 break;
2359 }
2360
2361 // i guess there is a command). go into the work state.
2362 if (len != 4) {
2363 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2364 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2365 break;
2366 }
2367 cardSTATE = MFEMUL_WORK;
2368 //goto lbWORK;
2369 //intentional fall-through to the next case-stmt
2370 }
2371
2372 case MFEMUL_WORK:{
2373 if (len == 0) {
2374 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2375 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2376 break;
2377 }
2378
2379 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2380
2381 if(encrypted_data) {
2382 // decrypt seqence
2383 mf_crypto1_decrypt(pcs, receivedCmd, len);
2384 }
2385
2386 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2387 authTimer = GetTickCount();
2388 cardAUTHSC = receivedCmd[1] / 4; // received block num
2389 cardAUTHKEY = receivedCmd[0] - 0x60;
2390 crypto1_destroy(pcs);//Added by martin
2391 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2392
2393 if (!encrypted_data) { // first authentication
2394 if (MF_DBGLEVEL >= 2) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2395
2396 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2397 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2398 } else { // nested authentication
2399 if (MF_DBGLEVEL >= 2) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2400 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2401 num_to_bytes(ans, 4, rAUTH_AT);
2402 }
2403 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2404 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2405 cardSTATE = MFEMUL_AUTH1;
2406 break;
2407 }
2408
2409 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2410 // BUT... ACK --> NACK
2411 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2412 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2413 break;
2414 }
2415
2416 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2417 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2418 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2419 break;
2420 }
2421
2422 if(len != 4) {
2423 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2424 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2425 break;
2426 }
2427
2428 if(receivedCmd[0] == 0x30 // read block
2429 || receivedCmd[0] == 0xA0 // write block
2430 || receivedCmd[0] == 0xC0
2431 || receivedCmd[0] == 0xC1
2432 || receivedCmd[0] == 0xC2 // inc dec restore
2433 || receivedCmd[0] == 0xB0) { // transfer
2434 if (receivedCmd[1] >= 16 * 4) {
2435 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2436 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2437 break;
2438 }
2439
2440 if (receivedCmd[1] / 4 != cardAUTHSC) {
2441 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2442 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2443 break;
2444 }
2445 }
2446 // read block
2447 if (receivedCmd[0] == 0x30) {
2448 if (MF_DBGLEVEL >= 2) {
2449 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2450 }
2451 emlGetMem(response, receivedCmd[1], 1);
2452 AppendCrc14443a(response, 16);
2453 mf_crypto1_encrypt(pcs, response, 18, &par);
2454 EmSendCmdPar(response, 18, par);
2455 numReads++;
2456 if(exitAfterNReads > 0 && numReads == exitAfterNReads) {
2457 Dbprintf("%d reads done, exiting", numReads);
2458 finished = true;
2459 }
2460 break;
2461 }
2462 // write block
2463 if (receivedCmd[0] == 0xA0) {
2464 if (MF_DBGLEVEL >= 2) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2465 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2466 cardSTATE = MFEMUL_WRITEBL2;
2467 cardWRBL = receivedCmd[1];
2468 break;
2469 }
2470 // increment, decrement, restore
2471 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2472 if (MF_DBGLEVEL >= 2) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2473 if (emlCheckValBl(receivedCmd[1])) {
2474 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2475 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2476 break;
2477 }
2478 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2479 if (receivedCmd[0] == 0xC1)
2480 cardSTATE = MFEMUL_INTREG_INC;
2481 if (receivedCmd[0] == 0xC0)
2482 cardSTATE = MFEMUL_INTREG_DEC;
2483 if (receivedCmd[0] == 0xC2)
2484 cardSTATE = MFEMUL_INTREG_REST;
2485 cardWRBL = receivedCmd[1];
2486 break;
2487 }
2488 // transfer
2489 if (receivedCmd[0] == 0xB0) {
2490 if (MF_DBGLEVEL >= 2) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2491 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2492 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2493 else
2494 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2495 break;
2496 }
2497 // halt
2498 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2499 LED_B_OFF();
2500 LED_C_OFF();
2501 cardSTATE = MFEMUL_HALTED;
2502 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2503 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2504 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2505 break;
2506 }
2507 // RATS
2508 if (receivedCmd[0] == 0xe0) {//RATS
2509 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2510 break;
2511 }
2512 // command not allowed
2513 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2514 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2515 break;
2516 }
2517 case MFEMUL_WRITEBL2:{
2518 if (len == 18){
2519 mf_crypto1_decrypt(pcs, receivedCmd, len);
2520 emlSetMem(receivedCmd, cardWRBL, 1);
2521 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2522 cardSTATE = MFEMUL_WORK;
2523 } else {
2524 cardSTATE_TO_IDLE();
2525 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2526 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2527 }
2528 break;
2529 }
2530
2531 case MFEMUL_INTREG_INC:{
2532 mf_crypto1_decrypt(pcs, receivedCmd, len);
2533 memcpy(&ans, receivedCmd, 4);
2534 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2535 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2536 cardSTATE_TO_IDLE();
2537 break;
2538 }
2539 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2540 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2541 cardINTREG = cardINTREG + ans;
2542 cardSTATE = MFEMUL_WORK;
2543 break;
2544 }
2545 case MFEMUL_INTREG_DEC:{
2546 mf_crypto1_decrypt(pcs, receivedCmd, len);
2547 memcpy(&ans, receivedCmd, 4);
2548 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2549 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2550 cardSTATE_TO_IDLE();
2551 break;
2552 }
2553 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2554 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2555 cardINTREG = cardINTREG - ans;
2556 cardSTATE = MFEMUL_WORK;
2557 break;
2558 }
2559 case MFEMUL_INTREG_REST:{
2560 mf_crypto1_decrypt(pcs, receivedCmd, len);
2561 memcpy(&ans, receivedCmd, 4);
2562 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2563 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2564 cardSTATE_TO_IDLE();
2565 break;
2566 }
2567 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2568 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2569 cardSTATE = MFEMUL_WORK;
2570 break;
2571 }
2572 }
2573 }
2574
2575 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2576 LEDsoff();
2577
2578 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2579 {
2580 //May just aswell send the collected ar_nr in the response aswell
2581 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4);
2582 }
2583 if(flags & FLAG_NR_AR_ATTACK)
2584 {
2585 if(ar_nr_collected > 1) {
2586 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2587 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x",
2588 ar_nr_responses[0], // UID
2589 ar_nr_responses[1], //NT
2590 ar_nr_responses[2], //AR1
2591 ar_nr_responses[3], //NR1
2592 ar_nr_responses[6], //AR2
2593 ar_nr_responses[7] //NR2
2594 );
2595 } else {
2596 Dbprintf("Failed to obtain two AR/NR pairs!");
2597 if(ar_nr_collected >0) {
2598 Dbprintf("Only got these: UID=%08d, nonce=%08d, AR1=%08d, NR1=%08d",
2599 ar_nr_responses[0], // UID
2600 ar_nr_responses[1], //NT
2601 ar_nr_responses[2], //AR1
2602 ar_nr_responses[3] //NR1
2603 );
2604 }
2605 }
2606 }
2607 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
2608 }
2609
2610
2611
2612 //-----------------------------------------------------------------------------
2613 // MIFARE sniffer.
2614 //
2615 //-----------------------------------------------------------------------------
2616 void RAMFUNC SniffMifare(uint8_t param) {
2617 // param:
2618 // bit 0 - trigger from first card answer
2619 // bit 1 - trigger from first reader 7-bit request
2620
2621 // C(red) A(yellow) B(green)
2622 LEDsoff();
2623 // init trace buffer
2624 iso14a_clear_trace();
2625
2626 // The command (reader -> tag) that we're receiving.
2627 // The length of a received command will in most cases be no more than 18 bytes.
2628 // So 32 should be enough!
2629 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
2630 // The response (tag -> reader) that we're receiving.
2631 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
2632
2633 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2634 // into trace, along with its length and other annotations.
2635 //uint8_t *trace = (uint8_t *)BigBuf;
2636
2637 // The DMA buffer, used to stream samples from the FPGA
2638 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
2639 uint8_t *data = dmaBuf;
2640 uint8_t previous_data = 0;
2641 int maxDataLen = 0;
2642 int dataLen = 0;
2643 bool ReaderIsActive = FALSE;
2644 bool TagIsActive = FALSE;
2645
2646 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
2647
2648 // Set up the demodulator for tag -> reader responses.
2649 Demod.output = receivedResponse;
2650
2651 // Set up the demodulator for the reader -> tag commands
2652 Uart.output = receivedCmd;
2653
2654 // Setup for the DMA.
2655 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2656
2657 LED_D_OFF();
2658
2659 // init sniffer
2660 MfSniffInit();
2661
2662 // And now we loop, receiving samples.
2663 for(uint32_t sniffCounter = 0; TRUE; ) {
2664
2665 if(BUTTON_PRESS()) {
2666 DbpString("cancelled by button");
2667 break;
2668 }
2669
2670 LED_A_ON();
2671 WDT_HIT();
2672
2673 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2674 // check if a transaction is completed (timeout after 2000ms).
2675 // if yes, stop the DMA transfer and send what we have so far to the client
2676 if (MfSniffSend(2000)) {
2677 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2678 sniffCounter = 0;
2679 data = dmaBuf;
2680 maxDataLen = 0;
2681 ReaderIsActive = FALSE;
2682 TagIsActive = FALSE;
2683 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2684 }
2685 }
2686
2687 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2688 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2689 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2690 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2691 } else {
2692 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
2693 }
2694 // test for length of buffer
2695 if(dataLen > maxDataLen) { // we are more behind than ever...
2696 maxDataLen = dataLen;
2697 if(dataLen > 400) {
2698 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
2699 break;
2700 }
2701 }
2702 if(dataLen < 1) continue;
2703
2704 // primary buffer was stopped ( <-- we lost data!
2705 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2706 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2707 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
2708 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
2709 }
2710 // secondary buffer sets as primary, secondary buffer was stopped
2711 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2712 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
2713 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2714 }
2715
2716 LED_A_OFF();
2717
2718 if (sniffCounter & 0x01) {
2719
2720 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
2721 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
2722 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
2723 LED_C_INV();
2724 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parityBits, Uart.bitCount, TRUE)) break;
2725
2726 /* And ready to receive another command. */
2727 UartReset();
2728
2729 /* And also reset the demod code */
2730 DemodReset();
2731 }
2732 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
2733 }
2734
2735 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
2736 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
2737 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
2738 LED_C_INV();
2739
2740 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parityBits, Demod.bitCount, FALSE)) break;
2741
2742 // And ready to receive another response.
2743 DemodReset();
2744 }
2745 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
2746 }
2747 }
2748
2749 previous_data = *data;
2750 sniffCounter++;
2751 data++;
2752 if(data > dmaBuf + DMA_BUFFER_SIZE) {
2753 data = dmaBuf;
2754 }
2755
2756 } // main cycle
2757
2758 DbpString("COMMAND FINISHED");
2759
2760 FpgaDisableSscDma();
2761 MfSniffEnd();
2762
2763 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
2764 LEDsoff();
2765 }
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