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fix 'hf iclass sim':
[proxmark3-svn] / armsrc / iclass.c
1 //-----------------------------------------------------------------------------
2 // Gerhard de Koning Gans - May 2008
3 // Hagen Fritsch - June 2010
4 // Gerhard de Koning Gans - May 2011
5 // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support iClass.
12 //-----------------------------------------------------------------------------
13 // Based on ISO14443a implementation. Still in experimental phase.
14 // Contribution made during a security research at Radboud University Nijmegen
15 //
16 // Please feel free to contribute and extend iClass support!!
17 //-----------------------------------------------------------------------------
18 //
19 // FIX:
20 // ====
21 // We still have sometimes a demodulation error when snooping iClass communication.
22 // The resulting trace of a read-block-03 command may look something like this:
23 //
24 // + 22279: : 0c 03 e8 01
25 //
26 // ...with an incorrect answer...
27 //
28 // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29 //
30 // We still left the error signalling bytes in the traces like 0xbb
31 //
32 // A correct trace should look like this:
33 //
34 // + 21112: : 0c 03 e8 01
35 // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36 //
37 //-----------------------------------------------------------------------------
38
39 #include "iclass.h"
40
41 #include "proxmark3.h"
42 #include "apps.h"
43 #include "util.h"
44 #include "string.h"
45 #include "printf.h"
46 #include "common.h"
47 #include "cmd.h"
48 #include "iso14443a.h"
49 #include "iso15693.h"
50 // Needed for CRC in emulation mode;
51 // same construction as in ISO 14443;
52 // different initial value (CRC_ICLASS)
53 #include "iso14443crc.h"
54 #include "iso15693tools.h"
55 #include "protocols.h"
56 #include "optimized_cipher.h"
57 #include "usb_cdc.h" // for usb_poll_validate_length
58 #include "fpgaloader.h"
59
60 static int timeout = 4096;
61
62 //-----------------------------------------------------------------------------
63 // The software UART that receives commands from the reader, and its state
64 // variables.
65 //-----------------------------------------------------------------------------
66 static struct {
67 enum {
68 STATE_UNSYNCD,
69 STATE_START_OF_COMMUNICATION,
70 STATE_RECEIVING
71 } state;
72 uint16_t shiftReg;
73 int bitCnt;
74 int byteCnt;
75 int byteCntMax;
76 int posCnt;
77 int nOutOfCnt;
78 int OutOfCnt;
79 int syncBit;
80 int samples;
81 int highCnt;
82 int swapper;
83 int counter;
84 int bitBuffer;
85 int dropPosition;
86 uint8_t *output;
87 } Uart;
88
89 static RAMFUNC int OutOfNDecoding(int bit) {
90 //int error = 0;
91 int bitright;
92
93 if (!Uart.bitBuffer) {
94 Uart.bitBuffer = bit ^ 0xFF0;
95 return false;
96 } else {
97 Uart.bitBuffer <<= 4;
98 Uart.bitBuffer ^= bit;
99 }
100
101 /*if (Uart.swapper) {
102 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
103 Uart.byteCnt++;
104 Uart.swapper = 0;
105 if (Uart.byteCnt > 15) { return true; }
106 }
107 else {
108 Uart.swapper = 1;
109 }*/
110
111 if (Uart.state != STATE_UNSYNCD) {
112 Uart.posCnt++;
113
114 if ((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
115 bit = 0x00;
116 } else {
117 bit = 0x01;
118 }
119 if (((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
120 bitright = 0x00;
121 } else {
122 bitright = 0x01;
123 }
124 if (bit != bitright) {
125 bit = bitright;
126 }
127
128
129 // So, now we only have to deal with *bit*, lets see...
130 if (Uart.posCnt == 1) {
131 // measurement first half bitperiod
132 if (!bit) {
133 // Drop in first half means that we are either seeing
134 // an SOF or an EOF.
135
136 if (Uart.nOutOfCnt == 1) {
137 // End of Communication
138 Uart.state = STATE_UNSYNCD;
139 Uart.highCnt = 0;
140 if (Uart.byteCnt == 0) {
141 // Its not straightforward to show single EOFs
142 // So just leave it and do not return true
143 Uart.output[0] = 0xf0;
144 Uart.byteCnt++;
145 } else {
146 return true;
147 }
148 } else if (Uart.state != STATE_START_OF_COMMUNICATION) {
149 // When not part of SOF or EOF, it is an error
150 Uart.state = STATE_UNSYNCD;
151 Uart.highCnt = 0;
152 //error = 4;
153 }
154 }
155 } else {
156 // measurement second half bitperiod
157 // Count the bitslot we are in... (ISO 15693)
158 Uart.nOutOfCnt++;
159
160 if (!bit) {
161 if (Uart.dropPosition) {
162 if (Uart.state == STATE_START_OF_COMMUNICATION) {
163 //error = 1;
164 } else {
165 //error = 7;
166 }
167 // It is an error if we already have seen a drop in current frame
168 Uart.state = STATE_UNSYNCD;
169 Uart.highCnt = 0;
170 } else {
171 Uart.dropPosition = Uart.nOutOfCnt;
172 }
173 }
174
175 Uart.posCnt = 0;
176
177
178 if (Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
179 Uart.nOutOfCnt = 0;
180
181 if (Uart.state == STATE_START_OF_COMMUNICATION) {
182 if (Uart.dropPosition == 4) {
183 Uart.state = STATE_RECEIVING;
184 Uart.OutOfCnt = 256;
185 } else if (Uart.dropPosition == 3) {
186 Uart.state = STATE_RECEIVING;
187 Uart.OutOfCnt = 4;
188 //Uart.output[Uart.byteCnt] = 0xdd;
189 //Uart.byteCnt++;
190 } else {
191 Uart.state = STATE_UNSYNCD;
192 Uart.highCnt = 0;
193 }
194 Uart.dropPosition = 0;
195 } else {
196 // RECEIVING DATA
197 // 1 out of 4
198 if (!Uart.dropPosition) {
199 Uart.state = STATE_UNSYNCD;
200 Uart.highCnt = 0;
201 //error = 9;
202 } else {
203 Uart.shiftReg >>= 2;
204
205 // Swap bit order
206 Uart.dropPosition--;
207 //if (Uart.dropPosition == 1) { Uart.dropPosition = 2; }
208 //else if (Uart.dropPosition == 2) { Uart.dropPosition = 1; }
209
210 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
211 Uart.bitCnt += 2;
212 Uart.dropPosition = 0;
213
214 if (Uart.bitCnt == 8) {
215 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
216 Uart.byteCnt++;
217 Uart.bitCnt = 0;
218 Uart.shiftReg = 0;
219 }
220 }
221 }
222 } else if (Uart.nOutOfCnt == Uart.OutOfCnt) {
223 // RECEIVING DATA
224 // 1 out of 256
225 if (!Uart.dropPosition) {
226 Uart.state = STATE_UNSYNCD;
227 Uart.highCnt = 0;
228 //error = 3;
229 } else {
230 Uart.dropPosition--;
231 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
232 Uart.byteCnt++;
233 Uart.bitCnt = 0;
234 Uart.shiftReg = 0;
235 Uart.nOutOfCnt = 0;
236 Uart.dropPosition = 0;
237 }
238 }
239
240 /*if (error) {
241 Uart.output[Uart.byteCnt] = 0xAA;
242 Uart.byteCnt++;
243 Uart.output[Uart.byteCnt] = error & 0xFF;
244 Uart.byteCnt++;
245 Uart.output[Uart.byteCnt] = 0xAA;
246 Uart.byteCnt++;
247 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
248 Uart.byteCnt++;
249 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
250 Uart.byteCnt++;
251 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
252 Uart.byteCnt++;
253 Uart.output[Uart.byteCnt] = 0xAA;
254 Uart.byteCnt++;
255 return true;
256 }*/
257 }
258
259 } else {
260 bit = Uart.bitBuffer & 0xf0;
261 bit >>= 4;
262 bit ^= 0x0F; // drops become 1s ;-)
263 if (bit) {
264 // should have been high or at least (4 * 128) / fc
265 // according to ISO this should be at least (9 * 128 + 20) / fc
266 if (Uart.highCnt == 8) {
267 // we went low, so this could be start of communication
268 // it turns out to be safer to choose a less significant
269 // syncbit... so we check whether the neighbour also represents the drop
270 Uart.posCnt = 1; // apparently we are busy with our first half bit period
271 Uart.syncBit = bit & 8;
272 Uart.samples = 3;
273 if (!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
274 else if (bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
275 if (!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
276 else if (bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
277 if (!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
278 if (Uart.syncBit && (Uart.bitBuffer & 8)) {
279 Uart.syncBit = 8;
280
281 // the first half bit period is expected in next sample
282 Uart.posCnt = 0;
283 Uart.samples = 3;
284 }
285 } else if (bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
286
287 Uart.syncBit <<= 4;
288 Uart.state = STATE_START_OF_COMMUNICATION;
289 Uart.bitCnt = 0;
290 Uart.byteCnt = 0;
291 Uart.nOutOfCnt = 0;
292 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
293 Uart.dropPosition = 0;
294 Uart.shiftReg = 0;
295 //error = 0;
296 } else {
297 Uart.highCnt = 0;
298 }
299 } else if (Uart.highCnt < 8) {
300 Uart.highCnt++;
301 }
302 }
303
304 return false;
305 }
306
307
308 //=============================================================================
309 // Manchester
310 //=============================================================================
311
312 static struct {
313 enum {
314 DEMOD_UNSYNCD,
315 DEMOD_START_OF_COMMUNICATION,
316 DEMOD_START_OF_COMMUNICATION2,
317 DEMOD_START_OF_COMMUNICATION3,
318 DEMOD_SOF_COMPLETE,
319 DEMOD_MANCHESTER_D,
320 DEMOD_MANCHESTER_E,
321 DEMOD_END_OF_COMMUNICATION,
322 DEMOD_END_OF_COMMUNICATION2,
323 DEMOD_MANCHESTER_F,
324 DEMOD_ERROR_WAIT
325 } state;
326 int bitCount;
327 int posCount;
328 int syncBit;
329 uint16_t shiftReg;
330 int buffer;
331 int buffer2;
332 int buffer3;
333 int buff;
334 int samples;
335 int len;
336 enum {
337 SUB_NONE,
338 SUB_FIRST_HALF,
339 SUB_SECOND_HALF,
340 SUB_BOTH
341 } sub;
342 uint8_t *output;
343 } Demod;
344
345 static RAMFUNC int ManchesterDecoding(int v) {
346 int bit;
347 int modulation;
348 int error = 0;
349
350 bit = Demod.buffer;
351 Demod.buffer = Demod.buffer2;
352 Demod.buffer2 = Demod.buffer3;
353 Demod.buffer3 = v;
354
355 if (Demod.buff < 3) {
356 Demod.buff++;
357 return false;
358 }
359
360 if (Demod.state==DEMOD_UNSYNCD) {
361 Demod.output[Demod.len] = 0xfa;
362 Demod.syncBit = 0;
363 //Demod.samples = 0;
364 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
365
366 if (bit & 0x08) {
367 Demod.syncBit = 0x08;
368 }
369
370 if (bit & 0x04) {
371 if (Demod.syncBit) {
372 bit <<= 4;
373 }
374 Demod.syncBit = 0x04;
375 }
376
377 if (bit & 0x02) {
378 if (Demod.syncBit) {
379 bit <<= 2;
380 }
381 Demod.syncBit = 0x02;
382 }
383
384 if (bit & 0x01 && Demod.syncBit) {
385 Demod.syncBit = 0x01;
386 }
387
388 if (Demod.syncBit) {
389 Demod.len = 0;
390 Demod.state = DEMOD_START_OF_COMMUNICATION;
391 Demod.sub = SUB_FIRST_HALF;
392 Demod.bitCount = 0;
393 Demod.shiftReg = 0;
394 Demod.samples = 0;
395 if (Demod.posCount) {
396 switch (Demod.syncBit) {
397 case 0x08: Demod.samples = 3; break;
398 case 0x04: Demod.samples = 2; break;
399 case 0x02: Demod.samples = 1; break;
400 case 0x01: Demod.samples = 0; break;
401 }
402 // SOF must be long burst... otherwise stay unsynced!!!
403 if (!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
404 Demod.state = DEMOD_UNSYNCD;
405 }
406 } else {
407 // SOF must be long burst... otherwise stay unsynced!!!
408 if (!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
409 Demod.state = DEMOD_UNSYNCD;
410 error = 0x88;
411 }
412
413 }
414 error = 0;
415
416 }
417 } else {
418 // state is DEMOD is in SYNC from here on.
419 modulation = bit & Demod.syncBit;
420 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
421
422 Demod.samples += 4;
423
424 if (Demod.posCount == 0) {
425 Demod.posCount = 1;
426 if (modulation) {
427 Demod.sub = SUB_FIRST_HALF;
428 } else {
429 Demod.sub = SUB_NONE;
430 }
431 } else {
432 Demod.posCount = 0;
433 if (modulation) {
434 if (Demod.sub == SUB_FIRST_HALF) {
435 Demod.sub = SUB_BOTH;
436 } else {
437 Demod.sub = SUB_SECOND_HALF;
438 }
439 } else if (Demod.sub == SUB_NONE) {
440 if (Demod.state == DEMOD_SOF_COMPLETE) {
441 Demod.output[Demod.len] = 0x0f;
442 Demod.len++;
443 Demod.state = DEMOD_UNSYNCD;
444 return true;
445 } else {
446 Demod.state = DEMOD_ERROR_WAIT;
447 error = 0x33;
448 }
449 }
450
451 switch(Demod.state) {
452 case DEMOD_START_OF_COMMUNICATION:
453 if (Demod.sub == SUB_BOTH) {
454 Demod.state = DEMOD_START_OF_COMMUNICATION2;
455 Demod.posCount = 1;
456 Demod.sub = SUB_NONE;
457 } else {
458 Demod.output[Demod.len] = 0xab;
459 Demod.state = DEMOD_ERROR_WAIT;
460 error = 0xd2;
461 }
462 break;
463 case DEMOD_START_OF_COMMUNICATION2:
464 if (Demod.sub == SUB_SECOND_HALF) {
465 Demod.state = DEMOD_START_OF_COMMUNICATION3;
466 } else {
467 Demod.output[Demod.len] = 0xab;
468 Demod.state = DEMOD_ERROR_WAIT;
469 error = 0xd3;
470 }
471 break;
472 case DEMOD_START_OF_COMMUNICATION3:
473 if (Demod.sub == SUB_SECOND_HALF) {
474 Demod.state = DEMOD_SOF_COMPLETE;
475 } else {
476 Demod.output[Demod.len] = 0xab;
477 Demod.state = DEMOD_ERROR_WAIT;
478 error = 0xd4;
479 }
480 break;
481 case DEMOD_SOF_COMPLETE:
482 case DEMOD_MANCHESTER_D:
483 case DEMOD_MANCHESTER_E:
484 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
485 // 00001111 = 1 (0 in 14443)
486 if (Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
487 Demod.bitCount++;
488 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
489 Demod.state = DEMOD_MANCHESTER_D;
490 } else if (Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
491 Demod.bitCount++;
492 Demod.shiftReg >>= 1;
493 Demod.state = DEMOD_MANCHESTER_E;
494 } else if (Demod.sub == SUB_BOTH) {
495 Demod.state = DEMOD_MANCHESTER_F;
496 } else {
497 Demod.state = DEMOD_ERROR_WAIT;
498 error = 0x55;
499 }
500 break;
501
502 case DEMOD_MANCHESTER_F:
503 // Tag response does not need to be a complete byte!
504 if (Demod.len > 0 || Demod.bitCount > 0) {
505 if (Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
506 Demod.shiftReg >>= (9 - Demod.bitCount); // right align data
507 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
508 Demod.len++;
509 }
510
511 Demod.state = DEMOD_UNSYNCD;
512 return true;
513 } else {
514 Demod.output[Demod.len] = 0xad;
515 Demod.state = DEMOD_ERROR_WAIT;
516 error = 0x03;
517 }
518 break;
519
520 case DEMOD_ERROR_WAIT:
521 Demod.state = DEMOD_UNSYNCD;
522 break;
523
524 default:
525 Demod.output[Demod.len] = 0xdd;
526 Demod.state = DEMOD_UNSYNCD;
527 break;
528 }
529
530 if (Demod.bitCount >= 8) {
531 Demod.shiftReg >>= 1;
532 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
533 Demod.len++;
534 Demod.bitCount = 0;
535 Demod.shiftReg = 0;
536 }
537
538 if (error) {
539 Demod.output[Demod.len] = 0xBB;
540 Demod.len++;
541 Demod.output[Demod.len] = error & 0xFF;
542 Demod.len++;
543 Demod.output[Demod.len] = 0xBB;
544 Demod.len++;
545 Demod.output[Demod.len] = bit & 0xFF;
546 Demod.len++;
547 Demod.output[Demod.len] = Demod.buffer & 0xFF;
548 Demod.len++;
549 // Look harder ;-)
550 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
551 Demod.len++;
552 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
553 Demod.len++;
554 Demod.output[Demod.len] = 0xBB;
555 Demod.len++;
556 return true;
557 }
558
559 }
560
561 } // end (state != UNSYNCED)
562
563 return false;
564 }
565
566 //=============================================================================
567 // Finally, a `sniffer' for iClass communication
568 // Both sides of communication!
569 //=============================================================================
570
571 //-----------------------------------------------------------------------------
572 // Record the sequence of commands sent by the reader to the tag, with
573 // triggering so that we start recording at the point that the tag is moved
574 // near the reader.
575 //-----------------------------------------------------------------------------
576 void RAMFUNC SnoopIClass(void) {
577
578 // We won't start recording the frames that we acquire until we trigger;
579 // a good trigger condition to get started is probably when we see a
580 // response from the tag.
581 //int triggered = false; // false to wait first for card
582
583 // The command (reader -> tag) that we're receiving.
584 // The length of a received command will in most cases be no more than 18 bytes.
585 // So 32 should be enough!
586 #define ICLASS_BUFFER_SIZE 32
587 uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE];
588 // The response (tag -> reader) that we're receiving.
589 uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE];
590
591 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
592
593 // free all BigBuf memory
594 BigBuf_free();
595 // The DMA buffer, used to stream samples from the FPGA
596 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
597
598 set_tracing(true);
599 clear_trace();
600 iso14a_set_trigger(false);
601
602 int lastRxCounter;
603 uint8_t *upTo;
604 int smpl;
605 int maxBehindBy = 0;
606
607 // Count of samples received so far, so that we can include timing
608 // information in the trace buffer.
609 int samples = 0;
610 rsamples = 0;
611
612 // Set up the demodulator for tag -> reader responses.
613 Demod.output = tagToReaderResponse;
614 Demod.len = 0;
615 Demod.state = DEMOD_UNSYNCD;
616
617 // Setup for the DMA.
618 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
619 upTo = dmaBuf;
620 lastRxCounter = DMA_BUFFER_SIZE;
621 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
622
623 // And the reader -> tag commands
624 memset(&Uart, 0, sizeof(Uart));
625 Uart.output = readerToTagCmd;
626 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
627 Uart.state = STATE_UNSYNCD;
628
629 // And put the FPGA in the appropriate mode
630 // Signal field is off with the appropriate LED
631 LED_D_OFF();
632 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
633 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
634
635 uint32_t time_0 = GetCountSspClk();
636 uint32_t time_start = 0;
637 uint32_t time_stop = 0;
638
639 int div = 0;
640 //int div2 = 0;
641 int decbyte = 0;
642 int decbyter = 0;
643
644 // And now we loop, receiving samples.
645 for (;;) {
646 LED_A_ON();
647 WDT_HIT();
648 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1);
649 if (behindBy > maxBehindBy) {
650 maxBehindBy = behindBy;
651 if (behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
652 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
653 goto done;
654 }
655 }
656 if (behindBy < 1) continue;
657
658 LED_A_OFF();
659 smpl = upTo[0];
660 upTo++;
661 lastRxCounter -= 1;
662 if (upTo - dmaBuf > DMA_BUFFER_SIZE) {
663 upTo -= DMA_BUFFER_SIZE;
664 lastRxCounter += DMA_BUFFER_SIZE;
665 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
666 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
667 }
668
669 //samples += 4;
670 samples += 1;
671
672 if (smpl & 0xF) {
673 decbyte ^= (1 << (3 - div));
674 }
675
676 // FOR READER SIDE COMMUMICATION...
677
678 decbyter <<= 2;
679 decbyter ^= (smpl & 0x30);
680
681 div++;
682
683 if ((div + 1) % 2 == 0) {
684 smpl = decbyter;
685 if (OutOfNDecoding((smpl & 0xF0) >> 4)) {
686 rsamples = samples - Uart.samples;
687 time_stop = (GetCountSspClk()-time_0) << 4;
688 LED_C_ON();
689
690 //if (!LogTrace(Uart.output, Uart.byteCnt, rsamples, Uart.parityBits,true)) break;
691 //if (!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, true)) break;
692 uint8_t parity[MAX_PARITY_SIZE];
693 GetParity(Uart.output, Uart.byteCnt, parity);
694 LogTrace(Uart.output, Uart.byteCnt, time_start, time_stop, parity, true);
695
696 /* And ready to receive another command. */
697 Uart.state = STATE_UNSYNCD;
698 /* And also reset the demod code, which might have been */
699 /* false-triggered by the commands from the reader. */
700 Demod.state = DEMOD_UNSYNCD;
701 LED_B_OFF();
702 Uart.byteCnt = 0;
703 } else {
704 time_start = (GetCountSspClk()-time_0) << 4;
705 }
706 decbyter = 0;
707 }
708
709 if (div > 3) {
710 smpl = decbyte;
711 if (ManchesterDecoding(smpl & 0x0F)) {
712 time_stop = (GetCountSspClk()-time_0) << 4;
713
714 rsamples = samples - Demod.samples;
715 LED_B_ON();
716
717 uint8_t parity[MAX_PARITY_SIZE];
718 GetParity(Demod.output, Demod.len, parity);
719 LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, false);
720
721 // And ready to receive another response.
722 memset(&Demod, 0, sizeof(Demod));
723 Demod.output = tagToReaderResponse;
724 Demod.state = DEMOD_UNSYNCD;
725 LED_C_OFF();
726 } else {
727 time_start = (GetCountSspClk()-time_0) << 4;
728 }
729
730 div = 0;
731 decbyte = 0x00;
732 }
733
734 if (BUTTON_PRESS()) {
735 DbpString("cancelled_a");
736 goto done;
737 }
738 }
739
740 DbpString("COMMAND FINISHED");
741
742 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
743 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
744
745 done:
746 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
747 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
748 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
749 LEDsoff();
750 }
751
752 void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
753 int i;
754 for (i = 0; i < 8; i++) {
755 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
756 }
757 }
758
759 // Encode SOF only
760 static void CodeIClassTagSOF() {
761 //So far a dummy implementation, not used
762 //int lastProxToAirDuration =0;
763
764 ToSendReset();
765 // Send SOF
766 ToSend[++ToSendMax] = 0x1D;
767 // lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning
768
769 // Convert from last byte pos to length
770 ToSendMax++;
771 }
772
773 static void AppendCrc(uint8_t *data, int len) {
774 ComputeCrc14443(CRC_ICLASS, data, len, data+len, data+len+1);
775 }
776
777
778 /**
779 * @brief Does the actual simulation
780 * @param csn - csn to use
781 * @param breakAfterMacReceived if true, returns after reader MAC has been received.
782 */
783 int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf) {
784
785 // free eventually allocated BigBuf memory
786 BigBuf_free_keep_EM();
787
788 State cipher_state;
789
790 uint8_t *emulator = BigBuf_get_EM_addr();
791 uint8_t *csn = emulator;
792 uint8_t sof_data[] = { 0x0F } ;
793
794 // CSN followed by two CRC bytes
795 uint8_t anticoll_data[10] = { 0 };
796 uint8_t csn_data[10] = { 0 };
797 memcpy(csn_data, csn, sizeof(csn_data));
798 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x", csn[0], csn[1], csn[2], csn[3], csn[4], csn[5], csn[6], csn[7]);
799
800 // Construct anticollision-CSN
801 rotateCSN(csn_data, anticoll_data);
802
803 // Compute CRC on both CSNs
804 AppendCrc(anticoll_data, 8);
805 AppendCrc(csn_data, 8);
806
807 uint8_t diversified_key[8] = { 0 };
808 // e-Purse
809 uint8_t card_challenge_data[8] = { 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
810 //uint8_t card_challenge_data[8] = { 0 };
811 if (simulationMode == ICLASS_SIM_MODE_FULL) {
812 // The diversified key should be stored on block 3
813 // Get the diversified key from emulator memory
814 memcpy(diversified_key, emulator + (8 * 3), 8);
815 // Card challenge, a.k.a e-purse is on block 2
816 memcpy(card_challenge_data, emulator + (8 * 2), 8);
817 // Precalculate the cipher state, feeding it the CC
818 cipher_state = opt_doTagMAC_1(card_challenge_data, diversified_key);
819 }
820 // save card challenge for sim2,4 attack
821 if (reader_mac_buf != NULL) {
822 memcpy(reader_mac_buf, card_challenge_data, 8);
823 }
824
825 int exitLoop = 0;
826 // Reader 0a
827 // Tag 0f
828 // Reader 0c
829 // Tag anticoll. CSN
830 // Reader 81 anticoll. CSN
831 // Tag CSN
832
833 uint8_t *modulated_response;
834 int modulated_response_size = 0;
835 uint8_t *trace_data = NULL;
836 int trace_data_size = 0;
837
838 // Respond SOF -- takes 1 bytes
839 uint8_t *resp_sof = BigBuf_malloc(2);
840 int resp_sof_Len;
841
842 // Anticollision CSN (rotated CSN)
843 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
844 uint8_t *resp_anticoll = BigBuf_malloc(22);
845 int resp_anticoll_len;
846
847 // CSN (block 0)
848 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
849 uint8_t *resp_csn = BigBuf_malloc(22);
850 int resp_csn_len;
851
852 // configuration (block 1) picopass 2ks
853 uint8_t *resp_conf = BigBuf_malloc(22);
854 int resp_conf_len;
855 uint8_t conf_data[10] = {0x12, 0xFF, 0xFF, 0xFF, 0x7F, 0x1F, 0xFF, 0x3C, 0x00, 0x00};
856 AppendCrc(conf_data, 8);
857
858 // e-Purse (block 2)
859 // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
860 uint8_t *resp_cc = BigBuf_malloc(18);
861 int resp_cc_len;
862
863 // Kd, Kc (blocks 3 and 4). Cannot be read. Always respond with 0xff bytes only
864 uint8_t *resp_ff = BigBuf_malloc(22);
865 int resp_ff_len;
866 uint8_t ff_data[10] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00};
867 AppendCrc(ff_data, 8);
868
869 // Application Issuer Area (block 5)
870 uint8_t *resp_aia = BigBuf_malloc(22);
871 int resp_aia_len;
872 uint8_t aia_data[10] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00};
873 AppendCrc(aia_data, 8);
874
875 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
876 int len;
877
878 // Prepare card messages
879 ToSendMax = 0;
880
881 // First card answer: SOF only
882 CodeIClassTagSOF();
883 memcpy(resp_sof, ToSend, ToSendMax);
884 resp_sof_Len = ToSendMax;
885
886 // Anticollision CSN
887 CodeIso15693AsTag(anticoll_data, sizeof(anticoll_data));
888 memcpy(resp_anticoll, ToSend, ToSendMax);
889 resp_anticoll_len = ToSendMax;
890
891 // CSN (block 0)
892 CodeIso15693AsTag(csn_data, sizeof(csn_data));
893 memcpy(resp_csn, ToSend, ToSendMax);
894 resp_csn_len = ToSendMax;
895
896 // Configuration (block 1)
897 CodeIso15693AsTag(conf_data, sizeof(conf_data));
898 memcpy(resp_conf, ToSend, ToSendMax);
899 resp_conf_len = ToSendMax;
900
901 // e-Purse (block 2)
902 CodeIso15693AsTag(card_challenge_data, sizeof(card_challenge_data));
903 memcpy(resp_cc, ToSend, ToSendMax);
904 resp_cc_len = ToSendMax;
905
906 // Kd, Kc (blocks 3 and 4)
907 CodeIso15693AsTag(ff_data, sizeof(ff_data));
908 memcpy(resp_ff, ToSend, ToSendMax);
909 resp_ff_len = ToSendMax;
910
911 // Application Issuer Area (block 5)
912 CodeIso15693AsTag(aia_data, sizeof(aia_data));
913 memcpy(resp_aia, ToSend, ToSendMax);
914 resp_aia_len = ToSendMax;
915
916 //This is used for responding to READ-block commands or other data which is dynamically generated
917 uint8_t *data_generic_trace = BigBuf_malloc(32 + 2); // 32 bytes data + 2byte CRC is max tag answer
918 uint8_t *data_response = BigBuf_malloc( (32 + 2) * 2 + 2);
919
920 LED_A_ON();
921 bool buttonPressed = false;
922 while (!exitLoop) {
923 WDT_HIT();
924 LED_B_OFF();
925 //Signal tracer
926 // Can be used to get a trigger for an oscilloscope..
927 LED_C_OFF();
928
929 uint32_t reader_eof_time = 0;
930 len = GetIso15693CommandFromReader(receivedCmd, MAX_FRAME_SIZE, &reader_eof_time);
931 if (len < 0) {
932 buttonPressed = true;
933 break;
934 }
935
936 //Signal tracer
937 LED_C_ON();
938
939 // Now look at the reader command and provide appropriate responses
940 // default is no response:
941 modulated_response = NULL;
942 modulated_response_size = 0;
943 trace_data = NULL;
944 trace_data_size = 0;
945
946 if (receivedCmd[0] == ICLASS_CMD_ACTALL) {
947 // Reader in anticollission phase
948 modulated_response = resp_sof;
949 modulated_response_size = resp_sof_Len;
950 trace_data = sof_data;
951 trace_data_size = sizeof(sof_data);
952
953 } else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) { // identify
954 // Reader asks for anticollission CSN
955 modulated_response = resp_anticoll;
956 modulated_response_size = resp_anticoll_len;
957 trace_data = anticoll_data;
958 trace_data_size = sizeof(anticoll_data);
959
960 } else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4) { // read block
961 uint16_t blockNo = receivedCmd[1];
962 if (simulationMode == ICLASS_SIM_MODE_EXIT_AFTER_MAC) {
963 // provide defaults for blocks 0 ... 5
964 switch (blockNo) {
965 case 0: // csn (block 00)
966 modulated_response = resp_csn;
967 modulated_response_size = resp_csn_len;
968 trace_data = csn_data;
969 trace_data_size = sizeof(csn_data);
970 break;
971 case 1: // configuration (block 01)
972 modulated_response = resp_conf;
973 modulated_response_size = resp_conf_len;
974 trace_data = conf_data;
975 trace_data_size = sizeof(conf_data);
976 break;
977 case 2: // e-purse (block 02)
978 modulated_response = resp_cc;
979 modulated_response_size = resp_cc_len;
980 trace_data = card_challenge_data;
981 trace_data_size = sizeof(card_challenge_data);
982 // set epurse of sim2,4 attack
983 if (reader_mac_buf != NULL) {
984 memcpy(reader_mac_buf, card_challenge_data, 8);
985 }
986 break;
987 case 3:
988 case 4: // Kd, Kd, always respond with 0xff bytes
989 modulated_response = resp_ff;
990 modulated_response_size = resp_ff_len;
991 trace_data = ff_data;
992 trace_data_size = sizeof(ff_data);
993 break;
994 case 5: // Application Issuer Area (block 05)
995 modulated_response = resp_aia;
996 modulated_response_size = resp_aia_len;
997 trace_data = aia_data;
998 trace_data_size = sizeof(aia_data);
999 break;
1000 // default: don't respond
1001 }
1002 } else if (simulationMode == ICLASS_SIM_MODE_FULL) {
1003 if (blockNo == 3 || blockNo == 4) { // Kd, Kc, always respond with 0xff bytes
1004 modulated_response = resp_ff;
1005 modulated_response_size = resp_ff_len;
1006 trace_data = ff_data;
1007 trace_data_size = sizeof(ff_data);
1008 } else { // use data from emulator memory
1009 memcpy(data_generic_trace, emulator + (receivedCmd[1] << 3), 8);
1010 AppendCrc(data_generic_trace, 8);
1011 trace_data = data_generic_trace;
1012 trace_data_size = 10;
1013 CodeIso15693AsTag(trace_data, trace_data_size);
1014 memcpy(data_response, ToSend, ToSendMax);
1015 modulated_response = data_response;
1016 modulated_response_size = ToSendMax;
1017 }
1018 }
1019
1020 } else if (receivedCmd[0] == ICLASS_CMD_SELECT) {
1021 // Reader selects anticollission CSN.
1022 // Tag sends the corresponding real CSN
1023 modulated_response = resp_csn;
1024 modulated_response_size = resp_csn_len;
1025 trace_data = csn_data;
1026 trace_data_size = sizeof(csn_data);
1027
1028 } else if (receivedCmd[0] == ICLASS_CMD_READCHECK_KD
1029 || receivedCmd[0] == ICLASS_CMD_READCHECK_KC) {
1030 // Read e-purse (88 02 || 18 02)
1031 modulated_response = resp_cc;
1032 modulated_response_size = resp_cc_len;
1033 trace_data = card_challenge_data;
1034 trace_data_size = sizeof(card_challenge_data);
1035 LED_B_ON();
1036
1037 } else if (receivedCmd[0] == ICLASS_CMD_CHECK) {
1038 // Reader random and reader MAC!!!
1039 if (simulationMode == ICLASS_SIM_MODE_FULL) {
1040 //NR, from reader, is in receivedCmd+1
1041 opt_doTagMAC_2(cipher_state, receivedCmd+1, data_generic_trace, diversified_key);
1042 trace_data = data_generic_trace;
1043 trace_data_size = 4;
1044 CodeIso15693AsTag(trace_data, trace_data_size);
1045 memcpy(data_response, ToSend, ToSendMax);
1046 modulated_response = data_response;
1047 modulated_response_size = ToSendMax;
1048 //exitLoop = true;
1049 } else { // Not fullsim, we don't respond
1050 // We do not know what to answer, so lets keep quiet
1051 if (simulationMode == ICLASS_SIM_MODE_EXIT_AFTER_MAC) {
1052 if (reader_mac_buf != NULL) {
1053 // save NR and MAC for sim 2,4
1054 memcpy(reader_mac_buf + 8, receivedCmd + 1, 8);
1055 }
1056 exitLoop = true;
1057 }
1058 }
1059
1060 } else if (receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
1061 // Reader ends the session
1062 modulated_response = resp_sof;
1063 modulated_response_size = 0;
1064 trace_data = NULL;
1065 trace_data_size = 0;
1066
1067 } else if (simulationMode == ICLASS_SIM_MODE_FULL && receivedCmd[0] == ICLASS_CMD_READ4 && len == 4) { // 0x06
1068 //Read block
1069 //Take the data...
1070 memcpy(data_generic_trace, emulator + (receivedCmd[1] << 3), 8 * 4);
1071 AppendCrc(data_generic_trace, 8 * 4);
1072 trace_data = data_generic_trace;
1073 trace_data_size = 8 * 4 + 2;
1074 CodeIso15693AsTag(trace_data, trace_data_size);
1075 memcpy(data_response, ToSend, ToSendMax);
1076 modulated_response = data_response;
1077 modulated_response_size = ToSendMax;
1078
1079 } else if (receivedCmd[0] == ICLASS_CMD_UPDATE && simulationMode == ICLASS_SIM_MODE_FULL) {
1080 // Probably the reader wants to update the nonce. Let's just ignore that for now.
1081 // OBS! If this is implemented, don't forget to regenerate the cipher_state
1082 // We're expected to respond with the data+crc, exactly what's already in the receivedCmd
1083 // receivedCmd is now UPDATE 1b | ADDRESS 1b | DATA 8b | Signature 4b or CRC 2b
1084 memcpy(data_generic_trace, receivedCmd + 2, 8);
1085 AppendCrc(data_generic_trace, 8);
1086 trace_data = data_generic_trace;
1087 trace_data_size = 10;
1088 CodeIso15693AsTag(trace_data, trace_data_size);
1089 memcpy(data_response, ToSend, ToSendMax);
1090 modulated_response = data_response;
1091 modulated_response_size = ToSendMax;
1092
1093 } else if (receivedCmd[0] == ICLASS_CMD_PAGESEL) {
1094 // Pagesel
1095 // Pagesel enables to select a page in the selected chip memory and return its configuration block
1096 // Chips with a single page will not answer to this command
1097 // It appears we're fine ignoring this.
1098 // Otherwise, we should answer 8bytes (block) + 2bytes CRC
1099
1100 } else {
1101 // Never seen this command before
1102 char debug_message[250]; // should be enough
1103 sprintf(debug_message, "Unhandled command (len = %d) received from reader:", len);
1104 for (int i = 0; i < len && strlen(debug_message) < sizeof(debug_message) - 3 - 1; i++) {
1105 sprintf(debug_message + strlen(debug_message), " %02x", receivedCmd[i]);
1106 }
1107 Dbprintf("%s", debug_message);
1108 // Do not respond
1109 }
1110
1111 /**
1112 A legit tag has about 311,5us delay between reader EOT and tag SOF.
1113 **/
1114 if (modulated_response_size > 0) {
1115 uint32_t response_time = reader_eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM - DELAY_ARM_TO_READER_SIM;
1116 TransmitTo15693Reader(modulated_response, modulated_response_size, response_time, false);
1117 LogTrace(trace_data, trace_data_size, response_time + DELAY_ARM_TO_READER_SIM, response_time + (modulated_response_size << 6) + DELAY_ARM_TO_READER_SIM, NULL, false);
1118 }
1119
1120 }
1121
1122 LED_A_OFF();
1123 LED_B_OFF();
1124 LED_C_OFF();
1125
1126 if (buttonPressed)
1127 {
1128 DbpString("Button pressed");
1129 }
1130 return buttonPressed;
1131 }
1132
1133 /**
1134 * @brief SimulateIClass simulates an iClass card.
1135 * @param arg0 type of simulation
1136 * - 0 uses the first 8 bytes in usb data as CSN
1137 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
1138 * in the usb data. This mode collects MAC from the reader, in order to do an offline
1139 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
1140 * - Other : Uses the default CSN (031fec8af7ff12e0)
1141 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
1142 * @param arg2
1143 * @param datain
1144 */
1145 void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain) {
1146 uint32_t simType = arg0;
1147 uint32_t numberOfCSNS = arg1;
1148
1149 // setup hardware for simulation:
1150 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1151 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1152 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1153 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1154 StartCountSspClk();
1155
1156 // Enable and clear the trace
1157 set_tracing(true);
1158 clear_trace();
1159 //Use the emulator memory for SIM
1160 uint8_t *emulator = BigBuf_get_EM_addr();
1161
1162 if (simType == ICLASS_SIM_MODE_CSN) {
1163 // Use the CSN from commandline
1164 memcpy(emulator, datain, 8);
1165 doIClassSimulation(ICLASS_SIM_MODE_CSN, NULL);
1166 } else if (simType == ICLASS_SIM_MODE_CSN_DEFAULT) {
1167 //Default CSN
1168 uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1169 // Use the CSN from commandline
1170 memcpy(emulator, csn_crc, 8);
1171 doIClassSimulation(ICLASS_SIM_MODE_CSN, NULL);
1172 } else if (simType == ICLASS_SIM_MODE_READER_ATTACK) {
1173 uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 };
1174 Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS);
1175 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1176 // in order to collect MAC's from the reader. This can later be used in an offline-attack
1177 // in order to obtain the keys, as in the "dismantling iclass"-paper.
1178 int i;
1179 for (i = 0; i < numberOfCSNS && i*16+16 <= USB_CMD_DATA_SIZE; i++) {
1180 // The usb data is 512 bytes, fitting 32 responses (8 byte CC + 4 Byte NR + 4 Byte MAC = 16 Byte response).
1181 memcpy(emulator, datain+(i*8), 8);
1182 if (doIClassSimulation(ICLASS_SIM_MODE_EXIT_AFTER_MAC, mac_responses+i*16)) {
1183 // Button pressed
1184 break;
1185 }
1186 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1187 datain[i*8+0], datain[i*8+1], datain[i*8+2], datain[i*8+3],
1188 datain[i*8+4], datain[i*8+5], datain[i*8+6], datain[i*8+7]);
1189 Dbprintf("NR,MAC: %02x %02x %02x %02x %02x %02x %02x %02x",
1190 datain[i*8+ 8], datain[i*8+ 9], datain[i*8+10], datain[i*8+11],
1191 datain[i*8+12], datain[i*8+13], datain[i*8+14], datain[i*8+15]);
1192 }
1193 cmd_send(CMD_ACK, CMD_SIMULATE_TAG_ICLASS, i, 0, mac_responses, i*16);
1194 } else if (simType == ICLASS_SIM_MODE_FULL) {
1195 //This is 'full sim' mode, where we use the emulator storage for data.
1196 doIClassSimulation(ICLASS_SIM_MODE_FULL, NULL);
1197 } else {
1198 // We may want a mode here where we hardcode the csns to use (from proxclone).
1199 // That will speed things up a little, but not required just yet.
1200 Dbprintf("The mode is not implemented, reserved for future use");
1201 }
1202 Dbprintf("Done...");
1203
1204 }
1205
1206
1207 /// THE READER CODE
1208
1209 //-----------------------------------------------------------------------------
1210 // Transmit the command (to the tag) that was placed in ToSend[].
1211 //-----------------------------------------------------------------------------
1212 static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait) {
1213 int c;
1214 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1215 AT91C_BASE_SSC->SSC_THR = 0x00;
1216 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
1217
1218 if (wait) {
1219 if (*wait < 10) *wait = 10;
1220
1221 for (c = 0; c < *wait;) {
1222 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1223 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1224 c++;
1225 }
1226 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1227 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1228 (void)r;
1229 }
1230 WDT_HIT();
1231 }
1232 }
1233
1234 uint8_t sendbyte;
1235 bool firstpart = true;
1236 c = 0;
1237 for (;;) {
1238 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1239
1240 // DOUBLE THE SAMPLES!
1241 if (firstpart) {
1242 sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4);
1243 } else {
1244 sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4);
1245 c++;
1246 }
1247 if (sendbyte == 0xff) {
1248 sendbyte = 0xfe;
1249 }
1250 AT91C_BASE_SSC->SSC_THR = sendbyte;
1251 firstpart = !firstpart;
1252
1253 if (c >= len) {
1254 break;
1255 }
1256 }
1257 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1258 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1259 (void)r;
1260 }
1261 WDT_HIT();
1262 }
1263 if (samples && wait) *samples = (c + *wait) << 3;
1264 }
1265
1266
1267 //-----------------------------------------------------------------------------
1268 // Prepare iClass reader command to send to FPGA
1269 //-----------------------------------------------------------------------------
1270 void CodeIClassCommand(const uint8_t *cmd, int len) {
1271 int i, j, k;
1272
1273 ToSendReset();
1274
1275 // Start of Communication: 1 out of 4
1276 ToSend[++ToSendMax] = 0xf0;
1277 ToSend[++ToSendMax] = 0x00;
1278 ToSend[++ToSendMax] = 0x0f;
1279 ToSend[++ToSendMax] = 0x00;
1280
1281 // Modulate the bytes
1282 for (i = 0; i < len; i++) {
1283 uint8_t b = cmd[i];
1284 for (j = 0; j < 4; j++) {
1285 for (k = 0; k < 4; k++) {
1286 if (k == (b & 3)) {
1287 ToSend[++ToSendMax] = 0xf0;
1288 } else {
1289 ToSend[++ToSendMax] = 0x00;
1290 }
1291 }
1292 b >>= 2;
1293 }
1294 }
1295
1296 // End of Communication
1297 ToSend[++ToSendMax] = 0x00;
1298 ToSend[++ToSendMax] = 0x00;
1299 ToSend[++ToSendMax] = 0xf0;
1300 ToSend[++ToSendMax] = 0x00;
1301
1302 // Convert from last character reference to length
1303 ToSendMax++;
1304 }
1305
1306 static void ReaderTransmitIClass(uint8_t *frame, int len) {
1307 int wait = 0;
1308 int samples = 0;
1309
1310 // This is tied to other size changes
1311 CodeIClassCommand(frame, len);
1312
1313 // Select the card
1314 TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait);
1315 if (trigger)
1316 LED_A_ON();
1317
1318 // Store reader command in buffer
1319 uint8_t par[MAX_PARITY_SIZE];
1320 GetParity(frame, len, par);
1321 LogTrace(frame, len, rsamples, rsamples, par, true);
1322 }
1323
1324 //-----------------------------------------------------------------------------
1325 // Wait a certain time for tag response
1326 // If a response is captured return true
1327 // If it takes too long return false
1328 //-----------------------------------------------------------------------------
1329 static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) {
1330 //uint8_t *buffer
1331 // buffer needs to be 512 bytes
1332 int c;
1333
1334 // Set FPGA mode to "reader listen mode", no modulation (listen
1335 // only, since we are receiving, not transmitting).
1336 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1337
1338 // Now get the answer from the card
1339 Demod.output = receivedResponse;
1340 Demod.len = 0;
1341 Demod.state = DEMOD_UNSYNCD;
1342
1343 uint8_t b;
1344 if (elapsed) *elapsed = 0;
1345
1346 bool skip = false;
1347
1348 c = 0;
1349 for (;;) {
1350 WDT_HIT();
1351
1352 if (BUTTON_PRESS()) return false;
1353
1354 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1355 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1356 if (elapsed) (*elapsed)++;
1357 }
1358 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1359 if (c < timeout) {
1360 c++;
1361 } else {
1362 return false;
1363 }
1364 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1365 skip = !skip;
1366 if (skip) continue;
1367
1368 if (ManchesterDecoding(b & 0x0f)) {
1369 *samples = c << 3;
1370 return true;
1371 }
1372 }
1373 }
1374 }
1375
1376 static int ReaderReceiveIClass(uint8_t *receivedAnswer) {
1377 int samples = 0;
1378 if (!GetIClassAnswer(receivedAnswer, 160, &samples, 0)) {
1379 return false;
1380 }
1381 rsamples += samples;
1382 uint8_t parity[MAX_PARITY_SIZE];
1383 GetParity(receivedAnswer, Demod.len, parity);
1384 LogTrace(receivedAnswer, Demod.len, rsamples, rsamples, parity, false);
1385 if (samples == 0) return false;
1386 return Demod.len;
1387 }
1388
1389 static void setupIclassReader() {
1390 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1391 // Reset trace buffer
1392 set_tracing(true);
1393 clear_trace();
1394
1395 // Setup SSC
1396 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
1397 // Start from off (no field generated)
1398 // Signal field is off with the appropriate LED
1399 LED_D_OFF();
1400 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1401 SpinDelay(200);
1402
1403 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1404
1405 // Now give it time to spin up.
1406 // Signal field is on with the appropriate LED
1407 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1408 SpinDelay(200);
1409 LED_A_ON();
1410
1411 }
1412
1413 static bool sendCmdGetResponseWithRetries(uint8_t* command, size_t cmdsize, uint8_t* resp, uint8_t expected_size, uint8_t retries) {
1414 while (retries-- > 0) {
1415 ReaderTransmitIClass(command, cmdsize);
1416 if (expected_size == ReaderReceiveIClass(resp)) {
1417 return true;
1418 }
1419 }
1420 return false;//Error
1421 }
1422
1423 /**
1424 * @brief Talks to an iclass tag, sends the commands to get CSN and CC.
1425 * @param card_data where the CSN and CC are stored for return
1426 * @return 0 = fail
1427 * 1 = Got CSN
1428 * 2 = Got CSN and CC
1429 */
1430 static uint8_t handshakeIclassTag_ext(uint8_t *card_data, bool use_credit_key) {
1431 static uint8_t act_all[] = { 0x0a };
1432 //static uint8_t identify[] = { 0x0c };
1433 static uint8_t identify[] = { 0x0c, 0x00, 0x73, 0x33 };
1434 static uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1435 static uint8_t readcheck_cc[]= { 0x88, 0x02 };
1436 if (use_credit_key)
1437 readcheck_cc[0] = 0x18;
1438 else
1439 readcheck_cc[0] = 0x88;
1440
1441 uint8_t resp[ICLASS_BUFFER_SIZE];
1442
1443 uint8_t read_status = 0;
1444
1445 // Send act_all
1446 ReaderTransmitIClass(act_all, 1);
1447 // Card present?
1448 if (!ReaderReceiveIClass(resp)) return read_status;//Fail
1449 //Send Identify
1450 ReaderTransmitIClass(identify, 1);
1451 //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC
1452 uint8_t len = ReaderReceiveIClass(resp);
1453 if (len != 10) return read_status;//Fail
1454
1455 //Copy the Anti-collision CSN to our select-packet
1456 memcpy(&select[1], resp, 8);
1457 //Select the card
1458 ReaderTransmitIClass(select, sizeof(select));
1459 //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC
1460 len = ReaderReceiveIClass(resp);
1461 if (len != 10) return read_status;//Fail
1462
1463 //Success - level 1, we got CSN
1464 //Save CSN in response data
1465 memcpy(card_data, resp, 8);
1466
1467 //Flag that we got to at least stage 1, read CSN
1468 read_status = 1;
1469
1470 // Card selected, now read e-purse (cc) (only 8 bytes no CRC)
1471 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1472 if (ReaderReceiveIClass(resp) == 8) {
1473 //Save CC (e-purse) in response data
1474 memcpy(card_data+8, resp, 8);
1475 read_status++;
1476 }
1477
1478 return read_status;
1479 }
1480
1481 static uint8_t handshakeIclassTag(uint8_t *card_data) {
1482 return handshakeIclassTag_ext(card_data, false);
1483 }
1484
1485
1486 // Reader iClass Anticollission
1487 void ReaderIClass(uint8_t arg0) {
1488
1489 uint8_t card_data[6 * 8] = {0};
1490 memset(card_data, 0xFF, sizeof(card_data));
1491 uint8_t last_csn[8] = {0,0,0,0,0,0,0,0};
1492 uint8_t resp[ICLASS_BUFFER_SIZE];
1493 memset(resp, 0xFF, sizeof(resp));
1494 //Read conf block CRC(0x01) => 0xfa 0x22
1495 uint8_t readConf[] = { ICLASS_CMD_READ_OR_IDENTIFY, 0x01, 0xfa, 0x22};
1496 //Read App Issuer Area block CRC(0x05) => 0xde 0x64
1497 uint8_t readAA[] = { ICLASS_CMD_READ_OR_IDENTIFY, 0x05, 0xde, 0x64};
1498
1499 int read_status= 0;
1500 uint8_t result_status = 0;
1501 // flag to read until one tag is found successfully
1502 bool abort_after_read = arg0 & FLAG_ICLASS_READER_ONLY_ONCE;
1503 // flag to only try 5 times to find one tag then return
1504 bool try_once = arg0 & FLAG_ICLASS_READER_ONE_TRY;
1505 // if neither abort_after_read nor try_once then continue reading until button pressed.
1506
1507 bool use_credit_key = arg0 & FLAG_ICLASS_READER_CEDITKEY;
1508 // test flags for what blocks to be sure to read
1509 uint8_t flagReadConfig = arg0 & FLAG_ICLASS_READER_CONF;
1510 uint8_t flagReadCC = arg0 & FLAG_ICLASS_READER_CC;
1511 uint8_t flagReadAA = arg0 & FLAG_ICLASS_READER_AA;
1512
1513 set_tracing(true);
1514 setupIclassReader();
1515
1516 uint16_t tryCnt = 0;
1517 bool userCancelled = BUTTON_PRESS() || usb_poll_validate_length();
1518 while (!userCancelled) {
1519 // if only looking for one card try 2 times if we missed it the first time
1520 if (try_once && tryCnt > 2) {
1521 break;
1522 }
1523 tryCnt++;
1524 if (!get_tracing()) {
1525 DbpString("Trace full");
1526 break;
1527 }
1528 WDT_HIT();
1529
1530 read_status = handshakeIclassTag_ext(card_data, use_credit_key);
1531
1532 if (read_status == 0) continue;
1533 if (read_status == 1) result_status = FLAG_ICLASS_READER_CSN;
1534 if (read_status == 2) result_status = FLAG_ICLASS_READER_CSN | FLAG_ICLASS_READER_CC;
1535
1536 // handshakeIclass returns CSN|CC, but the actual block
1537 // layout is CSN|CONFIG|CC, so here we reorder the data,
1538 // moving CC forward 8 bytes
1539 memcpy(card_data+16, card_data+8, 8);
1540 //Read block 1, config
1541 if (flagReadConfig) {
1542 if (sendCmdGetResponseWithRetries(readConf, sizeof(readConf), resp, 10, 10)) {
1543 result_status |= FLAG_ICLASS_READER_CONF;
1544 memcpy(card_data+8, resp, 8);
1545 } else {
1546 Dbprintf("Failed to dump config block");
1547 }
1548 }
1549
1550 //Read block 5, AA
1551 if (flagReadAA) {
1552 if (sendCmdGetResponseWithRetries(readAA, sizeof(readAA), resp, 10, 10)) {
1553 result_status |= FLAG_ICLASS_READER_AA;
1554 memcpy(card_data + (8*5), resp, 8);
1555 } else {
1556 //Dbprintf("Failed to dump AA block");
1557 }
1558 }
1559
1560 // 0 : CSN
1561 // 1 : Configuration
1562 // 2 : e-purse
1563 // 3 : kd / debit / aa2 (write-only)
1564 // 4 : kc / credit / aa1 (write-only)
1565 // 5 : AIA, Application issuer area
1566 //Then we can 'ship' back the 6 * 8 bytes of data,
1567 // with 0xFF:s in block 3 and 4.
1568
1569 LED_B_ON();
1570 //Send back to client, but don't bother if we already sent this -
1571 // only useful if looping in arm (not try_once && not abort_after_read)
1572 if (memcmp(last_csn, card_data, 8) != 0) {
1573 // If caller requires that we get Conf, CC, AA, continue until we got it
1574 if ( (result_status ^ FLAG_ICLASS_READER_CSN ^ flagReadConfig ^ flagReadCC ^ flagReadAA) == 0) {
1575 cmd_send(CMD_ACK, result_status, 0, 0, card_data, sizeof(card_data));
1576 if (abort_after_read) {
1577 LED_A_OFF();
1578 LED_B_OFF();
1579 return;
1580 }
1581 //Save that we already sent this....
1582 memcpy(last_csn, card_data, 8);
1583 }
1584
1585 }
1586 LED_B_OFF();
1587 userCancelled = BUTTON_PRESS() || usb_poll_validate_length();
1588 }
1589 if (userCancelled) {
1590 cmd_send(CMD_ACK, 0xFF, 0, 0, card_data, 0);
1591 } else {
1592 cmd_send(CMD_ACK, 0, 0, 0, card_data, 0);
1593 }
1594 LED_A_OFF();
1595 }
1596
1597 void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
1598
1599 uint8_t card_data[USB_CMD_DATA_SIZE]={0};
1600 uint16_t block_crc_LUT[255] = {0};
1601
1602 //Generate a lookup table for block crc
1603 for (int block = 0; block < 255; block++){
1604 char bl = block;
1605 block_crc_LUT[block] = iclass_crc16(&bl ,1);
1606 }
1607 //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]);
1608
1609 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1610 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1611
1612 uint16_t crc = 0;
1613 uint8_t cardsize = 0;
1614 uint8_t mem = 0;
1615
1616 static struct memory_t {
1617 int k16;
1618 int book;
1619 int k2;
1620 int lockauth;
1621 int keyaccess;
1622 } memory;
1623
1624 uint8_t resp[ICLASS_BUFFER_SIZE];
1625
1626 setupIclassReader();
1627 set_tracing(true);
1628
1629 while (!BUTTON_PRESS()) {
1630
1631 WDT_HIT();
1632
1633 if (!get_tracing()) {
1634 DbpString("Trace full");
1635 break;
1636 }
1637
1638 uint8_t read_status = handshakeIclassTag(card_data);
1639 if (read_status < 2) continue;
1640
1641 //for now replay captured auth (as cc not updated)
1642 memcpy(check+5, MAC, 4);
1643
1644 if (!sendCmdGetResponseWithRetries(check, sizeof(check), resp, 4, 5)) {
1645 Dbprintf("Error: Authentication Fail!");
1646 continue;
1647 }
1648
1649 //first get configuration block (block 1)
1650 crc = block_crc_LUT[1];
1651 read[1] = 1;
1652 read[2] = crc >> 8;
1653 read[3] = crc & 0xff;
1654
1655 if (!sendCmdGetResponseWithRetries(read, sizeof(read),resp, 10, 10)) {
1656 Dbprintf("Dump config (block 1) failed");
1657 continue;
1658 }
1659
1660 mem = resp[5];
1661 memory.k16 = (mem & 0x80);
1662 memory.book = (mem & 0x20);
1663 memory.k2 = (mem & 0x8);
1664 memory.lockauth = (mem & 0x2);
1665 memory.keyaccess = (mem & 0x1);
1666
1667 cardsize = memory.k16 ? 255 : 32;
1668 WDT_HIT();
1669 //Set card_data to all zeroes, we'll fill it with data
1670 memset(card_data, 0x0, USB_CMD_DATA_SIZE);
1671 uint8_t failedRead = 0;
1672 uint32_t stored_data_length = 0;
1673 //then loop around remaining blocks
1674 for (int block = 0; block < cardsize; block++) {
1675 read[1] = block;
1676 crc = block_crc_LUT[block];
1677 read[2] = crc >> 8;
1678 read[3] = crc & 0xff;
1679
1680 if (sendCmdGetResponseWithRetries(read, sizeof(read), resp, 10, 10)) {
1681 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
1682 block, resp[0], resp[1], resp[2],
1683 resp[3], resp[4], resp[5],
1684 resp[6], resp[7]);
1685
1686 //Fill up the buffer
1687 memcpy(card_data+stored_data_length, resp, 8);
1688 stored_data_length += 8;
1689 if (stored_data_length +8 > USB_CMD_DATA_SIZE) {
1690 //Time to send this off and start afresh
1691 cmd_send(CMD_ACK,
1692 stored_data_length,//data length
1693 failedRead,//Failed blocks?
1694 0,//Not used ATM
1695 card_data, stored_data_length);
1696 //reset
1697 stored_data_length = 0;
1698 failedRead = 0;
1699 }
1700
1701 } else {
1702 failedRead = 1;
1703 stored_data_length += 8;//Otherwise, data becomes misaligned
1704 Dbprintf("Failed to dump block %d", block);
1705 }
1706 }
1707
1708 //Send off any remaining data
1709 if (stored_data_length > 0) {
1710 cmd_send(CMD_ACK,
1711 stored_data_length,//data length
1712 failedRead,//Failed blocks?
1713 0,//Not used ATM
1714 card_data,
1715 stored_data_length);
1716 }
1717 //If we got here, let's break
1718 break;
1719 }
1720 //Signal end of transmission
1721 cmd_send(CMD_ACK,
1722 0,//data length
1723 0,//Failed blocks?
1724 0,//Not used ATM
1725 card_data,
1726 0);
1727
1728 LED_A_OFF();
1729 }
1730
1731 void iClass_ReadCheck(uint8_t blockNo, uint8_t keyType) {
1732 uint8_t readcheck[] = { keyType, blockNo };
1733 uint8_t resp[] = {0,0,0,0,0,0,0,0};
1734 size_t isOK = 0;
1735 isOK = sendCmdGetResponseWithRetries(readcheck, sizeof(readcheck), resp, sizeof(resp), 6);
1736 cmd_send(CMD_ACK,isOK, 0, 0, 0, 0);
1737 }
1738
1739 void iClass_Authentication(uint8_t *MAC) {
1740 uint8_t check[] = { ICLASS_CMD_CHECK, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1741 uint8_t resp[ICLASS_BUFFER_SIZE];
1742 memcpy(check+5, MAC, 4);
1743 bool isOK;
1744 isOK = sendCmdGetResponseWithRetries(check, sizeof(check), resp, 4, 6);
1745 cmd_send(CMD_ACK,isOK, 0, 0, 0, 0);
1746 }
1747
1748 bool iClass_ReadBlock(uint8_t blockNo, uint8_t *readdata) {
1749 uint8_t readcmd[] = {ICLASS_CMD_READ_OR_IDENTIFY, blockNo, 0x00, 0x00}; //0x88, 0x00 // can i use 0C?
1750 char bl = blockNo;
1751 uint16_t rdCrc = iclass_crc16(&bl, 1);
1752 readcmd[2] = rdCrc >> 8;
1753 readcmd[3] = rdCrc & 0xff;
1754 uint8_t resp[] = {0,0,0,0,0,0,0,0,0,0};
1755 bool isOK = false;
1756
1757 //readcmd[1] = blockNo;
1758 isOK = sendCmdGetResponseWithRetries(readcmd, sizeof(readcmd), resp, 10, 10);
1759 memcpy(readdata, resp, sizeof(resp));
1760
1761 return isOK;
1762 }
1763
1764 void iClass_ReadBlk(uint8_t blockno) {
1765 uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0};
1766 bool isOK = false;
1767 isOK = iClass_ReadBlock(blockno, readblockdata);
1768 cmd_send(CMD_ACK, isOK, 0, 0, readblockdata, 8);
1769 }
1770
1771 void iClass_Dump(uint8_t blockno, uint8_t numblks) {
1772 uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0};
1773 bool isOK = false;
1774 uint8_t blkCnt = 0;
1775
1776 BigBuf_free();
1777 uint8_t *dataout = BigBuf_malloc(255*8);
1778 if (dataout == NULL) {
1779 Dbprintf("out of memory");
1780 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1781 LED_D_OFF();
1782 cmd_send(CMD_ACK, 0, 1, 0, 0, 0);
1783 LED_A_OFF();
1784 return;
1785 }
1786 memset(dataout, 0xFF, 255*8);
1787
1788 for ( ; blkCnt < numblks; blkCnt++) {
1789 isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata);
1790 if (!isOK || (readblockdata[0] == 0xBB || readblockdata[7] == 0xBB || readblockdata[2] == 0xBB)) { //try again
1791 isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata);
1792 if (!isOK) {
1793 Dbprintf("Block %02X failed to read", blkCnt+blockno);
1794 break;
1795 }
1796 }
1797 memcpy(dataout + (blkCnt*8), readblockdata, 8);
1798 }
1799 //return pointer to dump memory in arg3
1800 cmd_send(CMD_ACK, isOK, blkCnt, BigBuf_max_traceLen(), 0, 0);
1801 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1802 LEDsoff();
1803 BigBuf_free();
1804 }
1805
1806 static bool iClass_WriteBlock_ext(uint8_t blockNo, uint8_t *data) {
1807 uint8_t write[] = { ICLASS_CMD_UPDATE, blockNo, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1808 //uint8_t readblockdata[10];
1809 //write[1] = blockNo;
1810 memcpy(write+2, data, 12); // data + mac
1811 char *wrCmd = (char *)(write+1);
1812 uint16_t wrCrc = iclass_crc16(wrCmd, 13);
1813 write[14] = wrCrc >> 8;
1814 write[15] = wrCrc & 0xff;
1815 uint8_t resp[] = {0,0,0,0,0,0,0,0,0,0};
1816 bool isOK = false;
1817
1818 isOK = sendCmdGetResponseWithRetries(write, sizeof(write), resp, sizeof(resp), 10);
1819 if (isOK) { //if reader responded correctly
1820 //Dbprintf("WriteResp: %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X",resp[0],resp[1],resp[2],resp[3],resp[4],resp[5],resp[6],resp[7],resp[8],resp[9]);
1821 if (memcmp(write+2, resp, 8)) { //if response is not equal to write values
1822 if (blockNo != 3 && blockNo != 4) { //if not programming key areas (note key blocks don't get programmed with actual key data it is xor data)
1823 //error try again
1824 isOK = sendCmdGetResponseWithRetries(write, sizeof(write), resp, sizeof(resp), 10);
1825 }
1826 }
1827 }
1828 return isOK;
1829 }
1830
1831 void iClass_WriteBlock(uint8_t blockNo, uint8_t *data) {
1832 bool isOK = iClass_WriteBlock_ext(blockNo, data);
1833 if (isOK){
1834 Dbprintf("Write block [%02x] successful", blockNo);
1835 } else {
1836 Dbprintf("Write block [%02x] failed", blockNo);
1837 }
1838 cmd_send(CMD_ACK, isOK, 0, 0, 0, 0);
1839 }
1840
1841 void iClass_Clone(uint8_t startblock, uint8_t endblock, uint8_t *data) {
1842 int i;
1843 int written = 0;
1844 int total_block = (endblock - startblock) + 1;
1845 for (i = 0; i < total_block; i++) {
1846 // block number
1847 if (iClass_WriteBlock_ext(i+startblock, data + (i*12))){
1848 Dbprintf("Write block [%02x] successful", i + startblock);
1849 written++;
1850 } else {
1851 if (iClass_WriteBlock_ext(i+startblock, data + (i*12))){
1852 Dbprintf("Write block [%02x] successful", i + startblock);
1853 written++;
1854 } else {
1855 Dbprintf("Write block [%02x] failed", i + startblock);
1856 }
1857 }
1858 }
1859 if (written == total_block)
1860 Dbprintf("Clone complete");
1861 else
1862 Dbprintf("Clone incomplete");
1863
1864 cmd_send(CMD_ACK, 1, 0, 0, 0, 0);
1865 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1866 LEDsoff();
1867 }
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