1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
13 #include "iso14443a.h"
17 #include "proxmark3.h"
21 #include "iso14443crc.h"
22 #include "crapto1/crapto1.h"
23 #include "mifareutil.h"
24 #include "mifaresniff.h"
26 #include "protocols.h"
33 // DEMOD_MOD_FIRST_HALF,
34 // DEMOD_NOMOD_FIRST_HALF,
40 uint16_t collisionPos
;
47 uint32_t startTime
, endTime
;
62 STATE_START_OF_COMMUNICATION
,
78 uint32_t startTime
, endTime
;
83 static uint32_t iso14a_timeout
;
84 #define MAX_ISO14A_TIMEOUT 524288
88 // the block number for the ISO14443-4 PCB
89 static uint8_t iso14_pcb_blocknum
= 0;
94 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
95 #define REQUEST_GUARD_TIME (7000/16 + 1)
96 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
97 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
98 // bool LastCommandWasRequest = false;
101 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
103 // When the PM acts as reader and is receiving tag data, it takes
104 // 3 ticks delay in the AD converter
105 // 16 ticks until the modulation detector completes and sets curbit
106 // 8 ticks until bit_to_arm is assigned from curbit
107 // 8*16 ticks for the transfer from FPGA to ARM
108 // 4*16 ticks until we measure the time
109 // - 8*16 ticks because we measure the time of the previous transfer
110 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
112 // When the PM acts as a reader and is sending, it takes
113 // 4*16 ticks until we can write data to the sending hold register
114 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
115 // 8 ticks until the first transfer starts
116 // 8 ticks later the FPGA samples the data
117 // 1 tick to assign mod_sig_coil
118 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
120 // When the PM acts as tag and is receiving it takes
121 // 2 ticks delay in the RF part (for the first falling edge),
122 // 3 ticks for the A/D conversion,
123 // 8 ticks on average until the start of the SSC transfer,
124 // 8 ticks until the SSC samples the first data
125 // 7*16 ticks to complete the transfer from FPGA to ARM
126 // 8 ticks until the next ssp_clk rising edge
127 // 4*16 ticks until we measure the time
128 // - 8*16 ticks because we measure the time of the previous transfer
129 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
131 // The FPGA will report its internal sending delay in
132 uint16_t FpgaSendQueueDelay
;
133 // the 5 first bits are the number of bits buffered in mod_sig_buf
134 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
135 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
137 // When the PM acts as tag and is sending, it takes
138 // 4*16 + 8 ticks until we can write data to the sending hold register
139 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
140 // 8 ticks later the FPGA samples the first data
141 // + 16 ticks until assigned to mod_sig
142 // + 1 tick to assign mod_sig_coil
143 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
144 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8 + 8*16 + 8 + 16 + 1 + DELAY_FPGA_QUEUE)
146 // When the PM acts as sniffer and is receiving tag data, it takes
147 // 3 ticks A/D conversion
148 // 14 ticks to complete the modulation detection
149 // 8 ticks (on average) until the result is stored in to_arm
150 // + the delays in transferring data - which is the same for
151 // sniffing reader and tag data and therefore not relevant
152 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
154 // When the PM acts as sniffer and is receiving reader data, it takes
155 // 2 ticks delay in analogue RF receiver (for the falling edge of the
156 // start bit, which marks the start of the communication)
157 // 3 ticks A/D conversion
158 // 8 ticks on average until the data is stored in to_arm.
159 // + the delays in transferring data - which is the same for
160 // sniffing reader and tag data and therefore not relevant
161 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
163 //variables used for timing purposes:
164 //these are in ssp_clk cycles:
165 static uint32_t NextTransferTime
;
166 static uint32_t LastTimeProxToAirStart
;
167 static uint32_t LastProxToAirDuration
;
171 // CARD TO READER - manchester
172 // Sequence D: 11110000 modulation with subcarrier during first half
173 // Sequence E: 00001111 modulation with subcarrier during second half
174 // Sequence F: 00000000 no modulation with subcarrier
175 // READER TO CARD - miller
176 // Sequence X: 00001100 drop after half a period
177 // Sequence Y: 00000000 no drop
178 // Sequence Z: 11000000 drop at start
186 void iso14a_set_trigger(bool enable
) {
191 void iso14a_set_timeout(uint32_t timeout
) {
192 // adjust timeout by FPGA delays and 2 additional ssp_frames to detect SOF
193 iso14a_timeout
= timeout
+ (DELAY_AIR2ARM_AS_READER
+ DELAY_ARM2AIR_AS_READER
)/(16*8) + 2;
194 if(MF_DBGLEVEL
>= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", timeout
, timeout
/ 106);
198 uint32_t iso14a_get_timeout(void) {
199 return iso14a_timeout
- (DELAY_AIR2ARM_AS_READER
+ DELAY_ARM2AIR_AS_READER
)/(16*8) - 2;
202 //-----------------------------------------------------------------------------
203 // Generate the parity value for a byte sequence
205 //-----------------------------------------------------------------------------
206 void GetParity(const uint8_t *pbtCmd
, uint16_t iLen
, uint8_t *par
)
208 uint16_t paritybit_cnt
= 0;
209 uint16_t paritybyte_cnt
= 0;
210 uint8_t parityBits
= 0;
212 for (uint16_t i
= 0; i
< iLen
; i
++) {
213 // Generate the parity bits
214 parityBits
|= ((oddparity8(pbtCmd
[i
])) << (7-paritybit_cnt
));
215 if (paritybit_cnt
== 7) {
216 par
[paritybyte_cnt
] = parityBits
; // save 8 Bits parity
217 parityBits
= 0; // and advance to next Parity Byte
225 // save remaining parity bits
226 par
[paritybyte_cnt
] = parityBits
;
230 void AppendCrc14443a(uint8_t* data
, int len
)
232 ComputeCrc14443(CRC_14443_A
,data
,len
,data
+len
,data
+len
+1);
235 static void AppendCrc14443b(uint8_t* data
, int len
)
237 ComputeCrc14443(CRC_14443_B
,data
,len
,data
+len
,data
+len
+1);
241 //=============================================================================
242 // ISO 14443 Type A - Miller decoder
243 //=============================================================================
245 // This decoder is used when the PM3 acts as a tag.
246 // The reader will generate "pauses" by temporarily switching of the field.
247 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
248 // The FPGA does a comparison with a threshold and would deliver e.g.:
249 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
250 // The Miller decoder needs to identify the following sequences:
251 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
252 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
253 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
254 // Note 1: the bitstream may start at any time. We therefore need to sync.
255 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
256 //-----------------------------------------------------------------------------
259 // Lookup-Table to decide if 4 raw bits are a modulation.
260 // We accept the following:
261 // 0001 - a 3 tick wide pause
262 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
263 // 0111 - a 2 tick wide pause shifted left
264 // 1001 - a 2 tick wide pause shifted right
265 const bool Mod_Miller_LUT
[] = {
266 false, true, false, true, false, false, false, true,
267 false, true, false, false, false, false, false, false
269 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
270 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
272 static void UartReset()
274 Uart
.state
= STATE_UNSYNCD
;
276 Uart
.len
= 0; // number of decoded data bytes
277 Uart
.parityLen
= 0; // number of decoded parity bytes
278 Uart
.shiftReg
= 0; // shiftreg to hold decoded data bits
279 Uart
.parityBits
= 0; // holds 8 parity bits
284 static void UartInit(uint8_t *data
, uint8_t *parity
)
287 Uart
.parity
= parity
;
288 Uart
.fourBits
= 0x00000000; // clear the buffer for 4 Bits
292 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
293 static RAMFUNC
bool MillerDecoding(uint8_t bit
, uint32_t non_real_time
)
296 Uart
.fourBits
= (Uart
.fourBits
<< 8) | bit
;
298 if (Uart
.state
== STATE_UNSYNCD
) { // not yet synced
300 Uart
.syncBit
= 9999; // not set
301 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
302 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
303 // we therefore look for a ...xx11111111111100x11111xxxxxx... pattern
304 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
305 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00000111 11111111 11101111 10000000
306 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00000111 11111111 10001111 10000000
307 if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 0)) == ISO14443A_STARTBIT_PATTERN
>> 0) Uart
.syncBit
= 7;
308 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 1)) == ISO14443A_STARTBIT_PATTERN
>> 1) Uart
.syncBit
= 6;
309 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 2)) == ISO14443A_STARTBIT_PATTERN
>> 2) Uart
.syncBit
= 5;
310 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 3)) == ISO14443A_STARTBIT_PATTERN
>> 3) Uart
.syncBit
= 4;
311 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 4)) == ISO14443A_STARTBIT_PATTERN
>> 4) Uart
.syncBit
= 3;
312 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 5)) == ISO14443A_STARTBIT_PATTERN
>> 5) Uart
.syncBit
= 2;
313 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 6)) == ISO14443A_STARTBIT_PATTERN
>> 6) Uart
.syncBit
= 1;
314 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 7)) == ISO14443A_STARTBIT_PATTERN
>> 7) Uart
.syncBit
= 0;
316 if (Uart
.syncBit
!= 9999) { // found a sync bit
317 Uart
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
318 Uart
.startTime
-= Uart
.syncBit
;
319 Uart
.endTime
= Uart
.startTime
;
320 Uart
.state
= STATE_START_OF_COMMUNICATION
;
325 if (IsMillerModulationNibble1(Uart
.fourBits
>> Uart
.syncBit
)) {
326 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation in both halves - error
328 } else { // Modulation in first half = Sequence Z = logic "0"
329 if (Uart
.state
== STATE_MILLER_X
) { // error - must not follow after X
333 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
334 Uart
.state
= STATE_MILLER_Z
;
335 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 6;
336 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
337 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
338 Uart
.parityBits
<<= 1; // make room for the parity bit
339 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
342 if((Uart
.len
&0x0007) == 0) { // every 8 data bytes
343 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
350 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation second half = Sequence X = logic "1"
352 Uart
.shiftReg
= (Uart
.shiftReg
>> 1) | 0x100; // add a 1 to the shiftreg
353 Uart
.state
= STATE_MILLER_X
;
354 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 2;
355 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
356 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
357 Uart
.parityBits
<<= 1; // make room for the new parity bit
358 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
361 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
362 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
366 } else { // no modulation in both halves - Sequence Y
367 if (Uart
.state
== STATE_MILLER_Z
|| Uart
.state
== STATE_MILLER_Y
) { // Y after logic "0" - End of Communication
368 Uart
.state
= STATE_UNSYNCD
;
369 Uart
.bitCount
--; // last "0" was part of EOC sequence
370 Uart
.shiftReg
<<= 1; // drop it
371 if(Uart
.bitCount
> 0) { // if we decoded some bits
372 Uart
.shiftReg
>>= (9 - Uart
.bitCount
); // right align them
373 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff); // add last byte to the output
374 Uart
.parityBits
<<= 1; // add a (void) parity bit
375 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align parity bits
376 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store it
378 } else if (Uart
.len
& 0x0007) { // there are some parity bits to store
379 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align remaining parity bits
380 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store them
383 return true; // we are finished with decoding the raw data sequence
385 UartReset(); // Nothing received - start over
388 if (Uart
.state
== STATE_START_OF_COMMUNICATION
) { // error - must not follow directly after SOC
390 } else { // a logic "0"
392 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
393 Uart
.state
= STATE_MILLER_Y
;
394 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
395 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
396 Uart
.parityBits
<<= 1; // make room for the parity bit
397 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
400 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
401 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
411 return false; // not finished yet, need more data
416 //=============================================================================
417 // ISO 14443 Type A - Manchester decoder
418 //=============================================================================
420 // This decoder is used when the PM3 acts as a reader.
421 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
422 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
423 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
424 // The Manchester decoder needs to identify the following sequences:
425 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
426 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
427 // 8 ticks unmodulated: Sequence F = end of communication
428 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
429 // Note 1: the bitstream may start at any time. We therefore need to sync.
430 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
433 // Lookup-Table to decide if 4 raw bits are a modulation.
434 // We accept three or four "1" in any position
435 const bool Mod_Manchester_LUT
[] = {
436 false, false, false, false, false, false, false, true,
437 false, false, false, true, false, true, true, true
440 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
441 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
444 static void DemodReset()
446 Demod
.state
= DEMOD_UNSYNCD
;
447 Demod
.len
= 0; // number of decoded data bytes
449 Demod
.shiftReg
= 0; // shiftreg to hold decoded data bits
450 Demod
.parityBits
= 0; //
451 Demod
.collisionPos
= 0; // Position of collision bit
452 Demod
.twoBits
= 0xffff; // buffer for 2 Bits
458 static void DemodInit(uint8_t *data
, uint8_t *parity
)
461 Demod
.parity
= parity
;
465 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
466 static RAMFUNC
int ManchesterDecoding(uint8_t bit
, uint16_t offset
, uint32_t non_real_time
)
469 Demod
.twoBits
= (Demod
.twoBits
<< 8) | bit
;
471 if (Demod
.state
== DEMOD_UNSYNCD
) {
473 if (Demod
.highCnt
< 2) { // wait for a stable unmodulated signal
474 if (Demod
.twoBits
== 0x0000) {
480 Demod
.syncBit
= 0xFFFF; // not set
481 if ((Demod
.twoBits
& 0x7700) == 0x7000) Demod
.syncBit
= 7;
482 else if ((Demod
.twoBits
& 0x3B80) == 0x3800) Demod
.syncBit
= 6;
483 else if ((Demod
.twoBits
& 0x1DC0) == 0x1C00) Demod
.syncBit
= 5;
484 else if ((Demod
.twoBits
& 0x0EE0) == 0x0E00) Demod
.syncBit
= 4;
485 else if ((Demod
.twoBits
& 0x0770) == 0x0700) Demod
.syncBit
= 3;
486 else if ((Demod
.twoBits
& 0x03B8) == 0x0380) Demod
.syncBit
= 2;
487 else if ((Demod
.twoBits
& 0x01DC) == 0x01C0) Demod
.syncBit
= 1;
488 else if ((Demod
.twoBits
& 0x00EE) == 0x00E0) Demod
.syncBit
= 0;
489 if (Demod
.syncBit
!= 0xFFFF) {
490 Demod
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
491 Demod
.startTime
-= Demod
.syncBit
;
492 Demod
.bitCount
= offset
; // number of decoded data bits
493 Demod
.state
= DEMOD_MANCHESTER_DATA
;
499 if (IsManchesterModulationNibble1(Demod
.twoBits
>> Demod
.syncBit
)) { // modulation in first half
500 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // ... and in second half = collision
501 if (!Demod
.collisionPos
) {
502 Demod
.collisionPos
= (Demod
.len
<< 3) + Demod
.bitCount
;
504 } // modulation in first half only - Sequence D = 1
506 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) | 0x100; // in both cases, add a 1 to the shiftreg
507 if(Demod
.bitCount
== 9) { // if we decoded a full byte (including parity)
508 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
509 Demod
.parityBits
<<= 1; // make room for the parity bit
510 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
513 if((Demod
.len
&0x0007) == 0) { // every 8 data bytes
514 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits
515 Demod
.parityBits
= 0;
518 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1) - 4;
519 } else { // no modulation in first half
520 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // and modulation in second half = Sequence E = 0
522 Demod
.shiftReg
= (Demod
.shiftReg
>> 1); // add a 0 to the shiftreg
523 if(Demod
.bitCount
>= 9) { // if we decoded a full byte (including parity)
524 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
525 Demod
.parityBits
<<= 1; // make room for the new parity bit
526 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
529 if ((Demod
.len
&0x0007) == 0) { // every 8 data bytes
530 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits1
531 Demod
.parityBits
= 0;
534 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1);
535 } else { // no modulation in both halves - End of communication
536 if(Demod
.bitCount
> 0) { // there are some remaining data bits
537 Demod
.shiftReg
>>= (9 - Demod
.bitCount
); // right align the decoded bits
538 Demod
.output
[Demod
.len
++] = Demod
.shiftReg
& 0xff; // and add them to the output
539 Demod
.parityBits
<<= 1; // add a (void) parity bit
540 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
541 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
543 } else if (Demod
.len
& 0x0007) { // there are some parity bits to store
544 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
545 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
548 return true; // we are finished with decoding the raw data sequence
549 } else { // nothing received. Start over
557 return false; // not finished yet, need more data
560 //=============================================================================
561 // Finally, a `sniffer' for ISO 14443 Type A
562 // Both sides of communication!
563 //=============================================================================
565 //-----------------------------------------------------------------------------
566 // Record the sequence of commands sent by the reader to the tag, with
567 // triggering so that we start recording at the point that the tag is moved
569 //-----------------------------------------------------------------------------
570 void RAMFUNC
SnoopIso14443a(uint8_t param
) {
572 // bit 0 - trigger from first card answer
573 // bit 1 - trigger from first reader 7-bit request
577 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
579 // Allocate memory from BigBuf for some buffers
580 // free all previous allocations first
583 // The command (reader -> tag) that we're receiving.
584 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
585 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
587 // The response (tag -> reader) that we're receiving.
588 uint8_t *receivedResponse
= BigBuf_malloc(MAX_FRAME_SIZE
);
589 uint8_t *receivedResponsePar
= BigBuf_malloc(MAX_PARITY_SIZE
);
591 // The DMA buffer, used to stream samples from the FPGA
592 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
598 uint8_t *data
= dmaBuf
;
599 uint8_t previous_data
= 0;
602 bool TagIsActive
= false;
603 bool ReaderIsActive
= false;
605 // Set up the demodulator for tag -> reader responses.
606 DemodInit(receivedResponse
, receivedResponsePar
);
608 // Set up the demodulator for the reader -> tag commands
609 UartInit(receivedCmd
, receivedCmdPar
);
611 // Setup and start DMA.
612 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
);
614 // We won't start recording the frames that we acquire until we trigger;
615 // a good trigger condition to get started is probably when we see a
616 // response from the tag.
617 // triggered == false -- to wait first for card
618 bool triggered
= !(param
& 0x03);
620 // And now we loop, receiving samples.
621 for(uint32_t rsamples
= 0; true; ) {
624 DbpString("cancelled by button");
631 int register readBufDataP
= data
- dmaBuf
;
632 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
633 if (readBufDataP
<= dmaBufDataP
){
634 dataLen
= dmaBufDataP
- readBufDataP
;
636 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
;
638 // test for length of buffer
639 if(dataLen
> maxDataLen
) {
640 maxDataLen
= dataLen
;
641 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
642 Dbprintf("blew circular buffer! dataLen=%d", dataLen
);
646 if(dataLen
< 1) continue;
648 // primary buffer was stopped( <-- we lost data!
649 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
650 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
651 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
652 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
654 // secondary buffer sets as primary, secondary buffer was stopped
655 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
656 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
657 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
662 if (rsamples
& 0x01) { // Need two samples to feed Miller and Manchester-Decoder
664 if(!TagIsActive
) { // no need to try decoding reader data if the tag is sending
665 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
666 if (MillerDecoding(readerdata
, (rsamples
-1)*4)) {
669 // check - if there is a short 7bit request from reader
670 if ((!triggered
) && (param
& 0x02) && (Uart
.len
== 1) && (Uart
.bitCount
== 7)) triggered
= true;
673 if (!LogTrace(receivedCmd
,
675 Uart
.startTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
676 Uart
.endTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
680 /* And ready to receive another command. */
682 /* And also reset the demod code, which might have been */
683 /* false-triggered by the commands from the reader. */
687 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
690 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
691 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
692 if(ManchesterDecoding(tagdata
, 0, (rsamples
-1)*4)) {
695 if (!LogTrace(receivedResponse
,
697 Demod
.startTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
698 Demod
.endTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
702 if ((!triggered
) && (param
& 0x01)) triggered
= true;
704 // And ready to receive another response.
706 // And reset the Miller decoder including itS (now outdated) input buffer
707 UartInit(receivedCmd
, receivedCmdPar
);
711 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
715 previous_data
= *data
;
718 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
723 DbpString("COMMAND FINISHED");
726 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen
, Uart
.state
, Uart
.len
);
727 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart
.output
[0]);
731 //-----------------------------------------------------------------------------
732 // Prepare tag messages
733 //-----------------------------------------------------------------------------
734 static void CodeIso14443aAsTagPar(const uint8_t *cmd
, uint16_t len
, uint8_t *parity
)
738 // Correction bit, might be removed when not needed
743 ToSendStuffBit(1); // 1
749 ToSend
[++ToSendMax
] = SEC_D
;
750 LastProxToAirDuration
= 8 * ToSendMax
- 4;
752 for(uint16_t i
= 0; i
< len
; i
++) {
756 for(uint16_t j
= 0; j
< 8; j
++) {
758 ToSend
[++ToSendMax
] = SEC_D
;
760 ToSend
[++ToSendMax
] = SEC_E
;
765 // Get the parity bit
766 if (parity
[i
>>3] & (0x80>>(i
&0x0007))) {
767 ToSend
[++ToSendMax
] = SEC_D
;
768 LastProxToAirDuration
= 8 * ToSendMax
- 4;
770 ToSend
[++ToSendMax
] = SEC_E
;
771 LastProxToAirDuration
= 8 * ToSendMax
;
776 ToSend
[++ToSendMax
] = SEC_F
;
778 // Convert from last byte pos to length
783 static void Code4bitAnswerAsTag(uint8_t cmd
)
789 // Correction bit, might be removed when not needed
794 ToSendStuffBit(1); // 1
800 ToSend
[++ToSendMax
] = SEC_D
;
803 for(i
= 0; i
< 4; i
++) {
805 ToSend
[++ToSendMax
] = SEC_D
;
806 LastProxToAirDuration
= 8 * ToSendMax
- 4;
808 ToSend
[++ToSendMax
] = SEC_E
;
809 LastProxToAirDuration
= 8 * ToSendMax
;
815 ToSend
[++ToSendMax
] = SEC_F
;
817 // Convert from last byte pos to length
822 static uint8_t *LastReaderTraceTime
= NULL
;
824 static void EmLogTraceReader(void) {
825 // remember last reader trace start to fix timing info later
826 LastReaderTraceTime
= BigBuf_get_addr() + BigBuf_get_traceLen();
827 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, true);
831 static void FixLastReaderTraceTime(uint32_t tag_StartTime
) {
832 uint32_t reader_EndTime
= Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
;
833 uint32_t reader_StartTime
= Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
;
834 uint16_t reader_modlen
= reader_EndTime
- reader_StartTime
;
835 uint16_t approx_fdt
= tag_StartTime
- reader_EndTime
;
836 uint16_t exact_fdt
= (approx_fdt
- 20 + 32)/64 * 64 + 20;
837 reader_StartTime
= tag_StartTime
- exact_fdt
- reader_modlen
;
838 LastReaderTraceTime
[0] = (reader_StartTime
>> 0) & 0xff;
839 LastReaderTraceTime
[1] = (reader_StartTime
>> 8) & 0xff;
840 LastReaderTraceTime
[2] = (reader_StartTime
>> 16) & 0xff;
841 LastReaderTraceTime
[3] = (reader_StartTime
>> 24) & 0xff;
845 static void EmLogTraceTag(uint8_t *tag_data
, uint16_t tag_len
, uint8_t *tag_Parity
, uint32_t ProxToAirDuration
) {
846 uint32_t tag_StartTime
= LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
;
847 uint32_t tag_EndTime
= (LastTimeProxToAirStart
+ ProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
;
848 LogTrace(tag_data
, tag_len
, tag_StartTime
, tag_EndTime
, tag_Parity
, false);
849 FixLastReaderTraceTime(tag_StartTime
);
853 //-----------------------------------------------------------------------------
854 // Wait for commands from reader
855 // Stop when button is pressed
856 // Or return true when command is captured
857 //-----------------------------------------------------------------------------
858 static int GetIso14443aCommandFromReader(uint8_t *received
, uint8_t *parity
, int *len
)
860 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
861 // only, since we are receiving, not transmitting).
862 // Signal field is off with the appropriate LED
864 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
866 // Now run a `software UART' on the stream of incoming samples.
867 UartInit(received
, parity
);
870 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
875 if(BUTTON_PRESS()) return false;
877 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
878 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
879 if(MillerDecoding(b
, 0)) {
889 static int EmSend4bitEx(uint8_t resp
);
890 int EmSend4bit(uint8_t resp
);
891 static int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
);
892 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
);
893 int EmSendPrecompiledCmd(tag_response_info_t
*response_info
);
896 static bool prepare_tag_modulation(tag_response_info_t
* response_info
, size_t max_buffer_size
) {
897 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
898 // This will need the following byte array for a modulation sequence
899 // 144 data bits (18 * 8)
902 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
903 // 1 just for the case
905 // 166 bytes, since every bit that needs to be send costs us a byte
909 // Prepare the tag modulation bits from the message
910 GetParity(response_info
->response
, response_info
->response_n
, &(response_info
->par
));
911 CodeIso14443aAsTagPar(response_info
->response
,response_info
->response_n
, &(response_info
->par
));
913 // Make sure we do not exceed the free buffer space
914 if (ToSendMax
> max_buffer_size
) {
915 Dbprintf("Out of memory, when modulating bits for tag answer:");
916 Dbhexdump(response_info
->response_n
, response_info
->response
, false);
920 // Copy the byte array, used for this modulation to the buffer position
921 memcpy(response_info
->modulation
, ToSend
, ToSendMax
);
923 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
924 response_info
->modulation_n
= ToSendMax
;
925 response_info
->ProxToAirDuration
= LastProxToAirDuration
;
931 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
932 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
933 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits for the modulation
934 // -> need 273 bytes buffer
935 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 273
937 bool prepare_allocated_tag_modulation(tag_response_info_t
* response_info
, uint8_t **buffer
, size_t *max_buffer_size
) {
939 // Retrieve and store the current buffer index
940 response_info
->modulation
= *buffer
;
942 // Forward the prepare tag modulation function to the inner function
943 if (prepare_tag_modulation(response_info
, *max_buffer_size
)) {
944 // Update the free buffer offset and the remaining buffer size
945 *buffer
+= ToSendMax
;
946 *max_buffer_size
-= ToSendMax
;
953 //-----------------------------------------------------------------------------
954 // Main loop of simulated tag: receive commands from reader, decide what
955 // response to send, and send it.
956 //-----------------------------------------------------------------------------
957 void SimulateIso14443aTag(int tagType
, int uid_1st
, int uid_2nd
, byte_t
* data
)
961 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
962 uint8_t response1
[2];
965 case 1: { // MIFARE Classic
966 // Says: I am Mifare 1k - original line
971 case 2: { // MIFARE Ultralight
972 // Says: I am a stupid memory tag, no crypto
977 case 3: { // MIFARE DESFire
978 // Says: I am a DESFire tag, ph33r me
983 case 4: { // ISO/IEC 14443-4
984 // Says: I am a javacard (JCOP)
989 case 5: { // MIFARE TNP3XXX
996 Dbprintf("Error: unkown tagtype (%d)",tagType
);
1001 // The second response contains the (mandatory) first 24 bits of the UID
1002 uint8_t response2
[5] = {0x00};
1004 // Check if the uid uses the (optional) part
1005 uint8_t response2a
[5] = {0x00};
1008 response2
[0] = 0x88;
1009 num_to_bytes(uid_1st
,3,response2
+1);
1010 num_to_bytes(uid_2nd
,4,response2a
);
1011 response2a
[4] = response2a
[0] ^ response2a
[1] ^ response2a
[2] ^ response2a
[3];
1013 // Configure the ATQA and SAK accordingly
1014 response1
[0] |= 0x40;
1017 num_to_bytes(uid_1st
,4,response2
);
1018 // Configure the ATQA and SAK accordingly
1019 response1
[0] &= 0xBF;
1023 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1024 response2
[4] = response2
[0] ^ response2
[1] ^ response2
[2] ^ response2
[3];
1026 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1027 uint8_t response3
[3] = {0x00};
1029 ComputeCrc14443(CRC_14443_A
, response3
, 1, &response3
[1], &response3
[2]);
1031 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1032 uint8_t response3a
[3] = {0x00};
1033 response3a
[0] = sak
& 0xFB;
1034 ComputeCrc14443(CRC_14443_A
, response3a
, 1, &response3a
[1], &response3a
[2]);
1036 uint8_t response5
[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1037 uint8_t response6
[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1038 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1039 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1040 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1041 // TC(1) = 0x02: CID supported, NAD not supported
1042 ComputeCrc14443(CRC_14443_A
, response6
, 4, &response6
[4], &response6
[5]);
1044 #define TAG_RESPONSE_COUNT 7
1045 tag_response_info_t responses
[TAG_RESPONSE_COUNT
] = {
1046 { .response
= response1
, .response_n
= sizeof(response1
) }, // Answer to request - respond with card type
1047 { .response
= response2
, .response_n
= sizeof(response2
) }, // Anticollision cascade1 - respond with uid
1048 { .response
= response2a
, .response_n
= sizeof(response2a
) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1049 { .response
= response3
, .response_n
= sizeof(response3
) }, // Acknowledge select - cascade 1
1050 { .response
= response3a
, .response_n
= sizeof(response3a
) }, // Acknowledge select - cascade 2
1051 { .response
= response5
, .response_n
= sizeof(response5
) }, // Authentication answer (random nonce)
1052 { .response
= response6
, .response_n
= sizeof(response6
) }, // dummy ATS (pseudo-ATR), answer to RATS
1055 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1056 // Such a response is less time critical, so we can prepare them on the fly
1057 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1058 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1059 uint8_t dynamic_response_buffer
[DYNAMIC_RESPONSE_BUFFER_SIZE
];
1060 uint8_t dynamic_modulation_buffer
[DYNAMIC_MODULATION_BUFFER_SIZE
];
1061 tag_response_info_t dynamic_response_info
= {
1062 .response
= dynamic_response_buffer
,
1064 .modulation
= dynamic_modulation_buffer
,
1068 // We need to listen to the high-frequency, peak-detected path.
1069 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1071 BigBuf_free_keep_EM();
1073 // allocate buffers:
1074 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
1075 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
1076 uint8_t *free_buffer_pointer
= BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE
);
1077 size_t free_buffer_size
= ALLOCATED_TAG_MODULATION_BUFFER_SIZE
;
1082 // Prepare the responses of the anticollision phase
1083 // there will be not enough time to do this at the moment the reader sends it REQA
1084 for (size_t i
=0; i
<TAG_RESPONSE_COUNT
; i
++) {
1085 prepare_allocated_tag_modulation(&responses
[i
], &free_buffer_pointer
, &free_buffer_size
);
1090 // To control where we are in the protocol
1094 // Just to allow some checks
1100 tag_response_info_t
* p_response
;
1104 // Clean receive command buffer
1105 if(!GetIso14443aCommandFromReader(receivedCmd
, receivedCmdPar
, &len
)) {
1106 DbpString("Button press");
1112 // Okay, look at the command now.
1114 if(receivedCmd
[0] == 0x26) { // Received a REQUEST
1115 p_response
= &responses
[0]; order
= 1;
1116 } else if(receivedCmd
[0] == 0x52) { // Received a WAKEUP
1117 p_response
= &responses
[0]; order
= 6;
1118 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x93) { // Received request for UID (cascade 1)
1119 p_response
= &responses
[1]; order
= 2;
1120 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x95) { // Received request for UID (cascade 2)
1121 p_response
= &responses
[2]; order
= 20;
1122 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x93) { // Received a SELECT (cascade 1)
1123 p_response
= &responses
[3]; order
= 3;
1124 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x95) { // Received a SELECT (cascade 2)
1125 p_response
= &responses
[4]; order
= 30;
1126 } else if(receivedCmd
[0] == 0x30) { // Received a (plain) READ
1127 EmSendCmdEx(data
+(4*receivedCmd
[1]),16);
1128 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1129 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1131 } else if(receivedCmd
[0] == 0x50) { // Received a HALT
1133 } else if(receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61) { // Received an authentication request
1134 p_response
= &responses
[5]; order
= 7;
1135 } else if(receivedCmd
[0] == 0xE0) { // Received a RATS request
1136 if (tagType
== 1 || tagType
== 2) { // RATS not supported
1137 EmSend4bit(CARD_NACK_NA
);
1140 p_response
= &responses
[6]; order
= 70;
1142 } else if (order
== 7 && len
== 8) { // Received {nr] and {ar} (part of authentication)
1143 uint32_t nr
= bytes_to_num(receivedCmd
,4);
1144 uint32_t ar
= bytes_to_num(receivedCmd
+4,4);
1145 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr
,ar
);
1147 // Check for ISO 14443A-4 compliant commands, look at left nibble
1148 switch (receivedCmd
[0]) {
1151 case 0x0A: { // IBlock (command)
1152 dynamic_response_info
.response
[0] = receivedCmd
[0];
1153 dynamic_response_info
.response
[1] = 0x00;
1154 dynamic_response_info
.response
[2] = 0x90;
1155 dynamic_response_info
.response
[3] = 0x00;
1156 dynamic_response_info
.response_n
= 4;
1160 case 0x1B: { // Chaining command
1161 dynamic_response_info
.response
[0] = 0xaa | ((receivedCmd
[0]) & 1);
1162 dynamic_response_info
.response_n
= 2;
1167 dynamic_response_info
.response
[0] = receivedCmd
[0] ^ 0x11;
1168 dynamic_response_info
.response_n
= 2;
1172 memcpy(dynamic_response_info
.response
,"\xAB\x00",2);
1173 dynamic_response_info
.response_n
= 2;
1177 case 0xC2: { // Readers sends deselect command
1178 memcpy(dynamic_response_info
.response
,"\xCA\x00",2);
1179 dynamic_response_info
.response_n
= 2;
1183 // Never seen this command before
1184 Dbprintf("Received unknown command (len=%d):",len
);
1185 Dbhexdump(len
,receivedCmd
,false);
1187 dynamic_response_info
.response_n
= 0;
1191 if (dynamic_response_info
.response_n
> 0) {
1192 // Copy the CID from the reader query
1193 dynamic_response_info
.response
[1] = receivedCmd
[1];
1195 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1196 AppendCrc14443a(dynamic_response_info
.response
,dynamic_response_info
.response_n
);
1197 dynamic_response_info
.response_n
+= 2;
1199 if (prepare_tag_modulation(&dynamic_response_info
,DYNAMIC_MODULATION_BUFFER_SIZE
) == false) {
1200 Dbprintf("Error preparing tag response");
1203 p_response
= &dynamic_response_info
;
1207 // Count number of wakeups received after a halt
1208 if(order
== 6 && lastorder
== 5) { happened
++; }
1210 // Count number of other messages after a halt
1211 if(order
!= 6 && lastorder
== 5) { happened2
++; }
1213 if(cmdsRecvd
> 999) {
1214 DbpString("1000 commands later...");
1219 if (p_response
!= NULL
) {
1220 EmSendPrecompiledCmd(p_response
);
1223 if (!get_tracing()) {
1224 Dbprintf("Trace Full. Simulation stopped.");
1229 Dbprintf("%x %x %x", happened
, happened2
, cmdsRecvd
);
1231 BigBuf_free_keep_EM();
1235 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1236 // of bits specified in the delay parameter.
1237 static void PrepareDelayedTransfer(uint16_t delay
)
1239 uint8_t bitmask
= 0;
1240 uint8_t bits_to_shift
= 0;
1241 uint8_t bits_shifted
= 0;
1245 for (uint16_t i
= 0; i
< delay
; i
++) {
1246 bitmask
|= (0x01 << i
);
1248 ToSend
[ToSendMax
++] = 0x00;
1249 for (uint16_t i
= 0; i
< ToSendMax
; i
++) {
1250 bits_to_shift
= ToSend
[i
] & bitmask
;
1251 ToSend
[i
] = ToSend
[i
] >> delay
;
1252 ToSend
[i
] = ToSend
[i
] | (bits_shifted
<< (8 - delay
));
1253 bits_shifted
= bits_to_shift
;
1259 //-------------------------------------------------------------------------------------
1260 // Transmit the command (to the tag) that was placed in ToSend[].
1261 // Parameter timing:
1262 // if NULL: transfer at next possible time, taking into account
1263 // request guard time, startup frame guard time and frame delay time
1264 // if == 0: transfer immediately and return time of transfer
1265 // if != 0: delay transfer until time specified
1266 //-------------------------------------------------------------------------------------
1267 static void TransmitFor14443a(const uint8_t *cmd
, uint16_t len
, uint32_t *timing
)
1270 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1272 uint32_t ThisTransferTime
= 0;
1275 if(*timing
== 0) { // Measure time
1276 *timing
= (GetCountSspClk() + 8) & 0xfffffff8;
1278 PrepareDelayedTransfer(*timing
& 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1280 if(MF_DBGLEVEL
>= 4 && GetCountSspClk() >= (*timing
& 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1281 while(GetCountSspClk() < (*timing
& 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1282 LastTimeProxToAirStart
= *timing
;
1284 ThisTransferTime
= ((MAX(NextTransferTime
, GetCountSspClk()) & 0xfffffff8) + 8);
1285 while(GetCountSspClk() < ThisTransferTime
);
1286 LastTimeProxToAirStart
= ThisTransferTime
;
1290 AT91C_BASE_SSC
->SSC_THR
= SEC_Y
;
1294 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1295 AT91C_BASE_SSC
->SSC_THR
= cmd
[c
];
1303 NextTransferTime
= MAX(NextTransferTime
, LastTimeProxToAirStart
+ REQUEST_GUARD_TIME
);
1307 //-----------------------------------------------------------------------------
1308 // Prepare reader command (in bits, support short frames) to send to FPGA
1309 //-----------------------------------------------------------------------------
1310 static void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd
, uint16_t bits
, const uint8_t *parity
)
1318 // Start of Communication (Seq. Z)
1319 ToSend
[++ToSendMax
] = SEC_Z
;
1320 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1323 size_t bytecount
= nbytes(bits
);
1324 // Generate send structure for the data bits
1325 for (i
= 0; i
< bytecount
; i
++) {
1326 // Get the current byte to send
1328 size_t bitsleft
= MIN((bits
-(i
*8)),8);
1330 for (j
= 0; j
< bitsleft
; j
++) {
1333 ToSend
[++ToSendMax
] = SEC_X
;
1334 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1339 ToSend
[++ToSendMax
] = SEC_Z
;
1340 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1343 ToSend
[++ToSendMax
] = SEC_Y
;
1350 // Only transmit parity bit if we transmitted a complete byte
1351 if (j
== 8 && parity
!= NULL
) {
1352 // Get the parity bit
1353 if (parity
[i
>>3] & (0x80 >> (i
&0x0007))) {
1355 ToSend
[++ToSendMax
] = SEC_X
;
1356 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1361 ToSend
[++ToSendMax
] = SEC_Z
;
1362 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1365 ToSend
[++ToSendMax
] = SEC_Y
;
1372 // End of Communication: Logic 0 followed by Sequence Y
1375 ToSend
[++ToSendMax
] = SEC_Z
;
1376 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1379 ToSend
[++ToSendMax
] = SEC_Y
;
1382 ToSend
[++ToSendMax
] = SEC_Y
;
1384 // Convert to length of command:
1389 //-----------------------------------------------------------------------------
1390 // Wait for commands from reader
1391 // Stop when button is pressed (return 1) or field was gone (return 2)
1392 // Or return 0 when command is captured
1393 //-----------------------------------------------------------------------------
1394 int EmGetCmd(uint8_t *received
, uint16_t *len
, uint8_t *parity
)
1398 uint32_t timer
= 0, vtime
= 0;
1402 // Set ADC to read field strength
1403 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_SWRST
;
1404 AT91C_BASE_ADC
->ADC_MR
=
1405 ADC_MODE_PRESCALE(63) |
1406 ADC_MODE_STARTUP_TIME(1) |
1407 ADC_MODE_SAMPLE_HOLD_TIME(15);
1408 AT91C_BASE_ADC
->ADC_CHER
= ADC_CHANNEL(ADC_CHAN_HF_LOW
);
1410 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1412 // Run a 'software UART' on the stream of incoming samples.
1413 UartInit(received
, parity
);
1415 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN
1417 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1418 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1419 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1421 } while (GetCountSspClk() < LastTimeProxToAirStart
+ LastProxToAirDuration
+ (FpgaSendQueueDelay
>>3));
1423 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1424 // only, since we are receiving, not transmitting).
1425 // Signal field is off with the appropriate LED
1427 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1432 if (BUTTON_PRESS()) return 1;
1434 // test if the field exists
1435 if (AT91C_BASE_ADC
->ADC_SR
& ADC_END_OF_CONVERSION(ADC_CHAN_HF_LOW
)) {
1437 analogAVG
+= AT91C_BASE_ADC
->ADC_CDR
[ADC_CHAN_HF_LOW
];
1438 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1439 if (analogCnt
>= 32) {
1440 if ((MAX_ADC_HF_VOLTAGE_LOW
* (analogAVG
/ analogCnt
) >> 10) < MF_MINFIELDV
) {
1441 vtime
= GetTickCount();
1442 if (!timer
) timer
= vtime
;
1443 // 50ms no field --> card to idle state
1444 if (vtime
- timer
> 50) return 2;
1446 if (timer
) timer
= 0;
1452 // receive and test the miller decoding
1453 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1454 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1455 if(MillerDecoding(b
, 0)) {
1466 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
)
1470 bool correctionNeeded
;
1472 // Modulate Manchester
1473 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_MOD
);
1475 // include correction bit if necessary
1476 if (Uart
.bitCount
== 7)
1478 // Short tags (7 bits) don't have parity, determine the correct value from MSB
1479 correctionNeeded
= Uart
.output
[0] & 0x40;
1483 // Look at the last parity bit
1484 correctionNeeded
= Uart
.parity
[(Uart
.len
-1)/8] & (0x80 >> ((Uart
.len
-1) & 7));
1487 if(correctionNeeded
) {
1488 // 1236, so correction bit needed
1494 // clear receiving shift register and holding register
1495 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1496 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1497 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1498 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1500 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1501 for (uint16_t j
= 0; j
< 5; j
++) { // allow timeout - better late than never
1502 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1503 if (AT91C_BASE_SSC
->SSC_RHR
) break;
1506 LastTimeProxToAirStart
= (GetCountSspClk() & 0xfffffff8) + (correctionNeeded
?8:0);
1509 for(; i
< respLen
; ) {
1510 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1511 AT91C_BASE_SSC
->SSC_THR
= resp
[i
++];
1512 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1515 if(BUTTON_PRESS()) {
1524 static int EmSend4bitEx(uint8_t resp
){
1525 Code4bitAnswerAsTag(resp
);
1526 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
);
1527 // do the tracing for the previous reader request and this tag answer:
1528 EmLogTraceTag(&resp
, 1, NULL
, LastProxToAirDuration
);
1533 int EmSend4bit(uint8_t resp
){
1534 return EmSend4bitEx(resp
);
1538 static int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
){
1539 CodeIso14443aAsTagPar(resp
, respLen
, par
);
1540 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
);
1541 // do the tracing for the previous reader request and this tag answer:
1542 EmLogTraceTag(resp
, respLen
, par
, LastProxToAirDuration
);
1547 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
){
1548 uint8_t par
[MAX_PARITY_SIZE
];
1549 GetParity(resp
, respLen
, par
);
1550 return EmSendCmdExPar(resp
, respLen
, par
);
1554 int EmSendCmd(uint8_t *resp
, uint16_t respLen
){
1555 uint8_t par
[MAX_PARITY_SIZE
];
1556 GetParity(resp
, respLen
, par
);
1557 return EmSendCmdExPar(resp
, respLen
, par
);
1561 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
){
1562 return EmSendCmdExPar(resp
, respLen
, par
);
1566 int EmSendPrecompiledCmd(tag_response_info_t
*response_info
) {
1567 int ret
= EmSendCmd14443aRaw(response_info
->modulation
, response_info
->modulation_n
);
1568 // do the tracing for the previous reader request and this tag answer:
1569 EmLogTraceTag(response_info
->response
, response_info
->response_n
, &(response_info
->par
), response_info
->ProxToAirDuration
);
1574 //-----------------------------------------------------------------------------
1575 // Wait a certain time for tag response
1576 // If a response is captured return true
1577 // If it takes too long return false
1578 //-----------------------------------------------------------------------------
1579 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse
, uint8_t *receivedResponsePar
, uint16_t offset
)
1583 // Set FPGA mode to "reader listen mode", no modulation (listen
1584 // only, since we are receiving, not transmitting).
1585 // Signal field is on with the appropriate LED
1587 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1589 // Now get the answer from the card
1590 DemodInit(receivedResponse
, receivedResponsePar
);
1593 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1599 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1600 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1601 if(ManchesterDecoding(b
, offset
, 0)) {
1602 NextTransferTime
= MAX(NextTransferTime
, Demod
.endTime
- (DELAY_AIR2ARM_AS_READER
+ DELAY_ARM2AIR_AS_READER
)/16 + FRAME_DELAY_TIME_PICC_TO_PCD
);
1604 } else if (c
++ > iso14a_timeout
&& Demod
.state
== DEMOD_UNSYNCD
) {
1612 void ReaderTransmitBitsPar(uint8_t* frame
, uint16_t bits
, uint8_t *par
, uint32_t *timing
)
1614 CodeIso14443aBitsAsReaderPar(frame
, bits
, par
);
1616 // Send command to tag
1617 TransmitFor14443a(ToSend
, ToSendMax
, timing
);
1621 // Log reader command in trace buffer
1622 LogTrace(frame
, nbytes(bits
), LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_READER
, (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_READER
, par
, true);
1626 void ReaderTransmitPar(uint8_t* frame
, uint16_t len
, uint8_t *par
, uint32_t *timing
)
1628 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1632 static void ReaderTransmitBits(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1634 // Generate parity and redirect
1635 uint8_t par
[MAX_PARITY_SIZE
];
1636 GetParity(frame
, len
/8, par
);
1637 ReaderTransmitBitsPar(frame
, len
, par
, timing
);
1641 void ReaderTransmit(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1643 // Generate parity and redirect
1644 uint8_t par
[MAX_PARITY_SIZE
];
1645 GetParity(frame
, len
, par
);
1646 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1650 static int ReaderReceiveOffset(uint8_t* receivedAnswer
, uint16_t offset
, uint8_t *parity
)
1652 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, offset
)) return false;
1653 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, false);
1658 int ReaderReceive(uint8_t *receivedAnswer
, uint8_t *parity
)
1660 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, 0)) return false;
1661 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, false);
1666 static void iso14a_set_ATS_times(uint8_t *ats
) {
1672 if (ats
[0] > 1) { // there is a format byte T0
1673 if ((ats
[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
1674 if ((ats
[1] & 0x10) == 0x10) { // there is an interface byte TA(1) preceding TB(1)
1679 fwi
= (tb1
& 0xf0) >> 4; // frame waiting time integer (FWI)
1681 fwt
= 256 * 16 * (1 << fwi
); // frame waiting time (FWT) in 1/fc
1682 iso14a_set_timeout(fwt
/(8*16));
1684 sfgi
= tb1
& 0x0f; // startup frame guard time integer (SFGI)
1685 if (sfgi
!= 0 && sfgi
!= 15) {
1686 sfgt
= 256 * 16 * (1 << sfgi
); // startup frame guard time (SFGT) in 1/fc
1687 NextTransferTime
= MAX(NextTransferTime
, Demod
.endTime
+ (sfgt
- DELAY_AIR2ARM_AS_READER
- DELAY_ARM2AIR_AS_READER
)/16);
1694 static int GetATQA(uint8_t *resp
, uint8_t *resp_par
) {
1696 #define WUPA_RETRY_TIMEOUT 10 // 10ms
1697 uint8_t wupa
[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1699 uint32_t save_iso14a_timeout
= iso14a_get_timeout();
1700 iso14a_set_timeout(1236/(16*8)+1); // response to WUPA is expected at exactly 1236/fc. No need to wait longer.
1702 uint32_t start_time
= GetTickCount();
1705 // we may need several tries if we did send an unknown command or a wrong authentication before...
1707 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1708 ReaderTransmitBitsPar(wupa
, 7, NULL
, NULL
);
1710 len
= ReaderReceive(resp
, resp_par
);
1711 } while (len
== 0 && GetTickCount() <= start_time
+ WUPA_RETRY_TIMEOUT
);
1713 iso14a_set_timeout(save_iso14a_timeout
);
1718 // performs iso14443a anticollision (optional) and card select procedure
1719 // fills the uid and cuid pointer unless NULL
1720 // fills the card info record unless NULL
1721 // if anticollision is false, then the UID must be provided in uid_ptr[]
1722 // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
1723 // requests ATS unless no_rats is true
1724 int iso14443a_select_card(byte_t
*uid_ptr
, iso14a_card_select_t
*p_hi14a_card
, uint32_t *cuid_ptr
, bool anticollision
, uint8_t num_cascades
, bool no_rats
) {
1725 uint8_t sel_all
[] = { 0x93,0x20 };
1726 uint8_t sel_uid
[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1727 uint8_t rats
[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1728 uint8_t resp
[MAX_FRAME_SIZE
]; // theoretically. A usual RATS will be much smaller
1729 uint8_t resp_par
[MAX_PARITY_SIZE
];
1731 size_t uid_resp_len
;
1733 uint8_t sak
= 0x04; // cascade uid
1734 int cascade_level
= 0;
1739 p_hi14a_card
->uidlen
= 0;
1740 memset(p_hi14a_card
->uid
, 0, 10);
1741 p_hi14a_card
->ats_len
= 0;
1744 if (!GetATQA(resp
, resp_par
)) {
1749 memcpy(p_hi14a_card
->atqa
, resp
, 2);
1752 if (anticollision
) {
1755 memset(uid_ptr
,0,10);
1759 // check for proprietary anticollision:
1760 if ((resp
[0] & 0x1F) == 0) {
1764 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1765 // which case we need to make a cascade 2 request and select - this is a long UID
1766 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1767 for(; sak
& 0x04; cascade_level
++) {
1768 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1769 sel_uid
[0] = sel_all
[0] = 0x93 + cascade_level
* 2;
1771 if (anticollision
) {
1773 ReaderTransmit(sel_all
, sizeof(sel_all
), NULL
);
1774 if (!ReaderReceive(resp
, resp_par
)) return 0;
1776 if (Demod
.collisionPos
) { // we had a collision and need to construct the UID bit by bit
1777 memset(uid_resp
, 0, 4);
1778 uint16_t uid_resp_bits
= 0;
1779 uint16_t collision_answer_offset
= 0;
1780 // anti-collision-loop:
1781 while (Demod
.collisionPos
) {
1782 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod
.collisionPos
);
1783 for (uint16_t i
= collision_answer_offset
; i
< Demod
.collisionPos
; i
++, uid_resp_bits
++) { // add valid UID bits before collision point
1784 uint16_t UIDbit
= (resp
[i
/8] >> (i
% 8)) & 0x01;
1785 uid_resp
[uid_resp_bits
/ 8] |= UIDbit
<< (uid_resp_bits
% 8);
1787 uid_resp
[uid_resp_bits
/8] |= 1 << (uid_resp_bits
% 8); // next time select the card(s) with a 1 in the collision position
1789 // construct anticollosion command:
1790 sel_uid
[1] = ((2 + uid_resp_bits
/8) << 4) | (uid_resp_bits
& 0x07); // length of data in bytes and bits
1791 for (uint16_t i
= 0; i
<= uid_resp_bits
/8; i
++) {
1792 sel_uid
[2+i
] = uid_resp
[i
];
1794 collision_answer_offset
= uid_resp_bits
%8;
1795 ReaderTransmitBits(sel_uid
, 16 + uid_resp_bits
, NULL
);
1796 if (!ReaderReceiveOffset(resp
, collision_answer_offset
, resp_par
)) return 0;
1798 // finally, add the last bits and BCC of the UID
1799 for (uint16_t i
= collision_answer_offset
; i
< (Demod
.len
-1)*8; i
++, uid_resp_bits
++) {
1800 uint16_t UIDbit
= (resp
[i
/8] >> (i
%8)) & 0x01;
1801 uid_resp
[uid_resp_bits
/8] |= UIDbit
<< (uid_resp_bits
% 8);
1804 } else { // no collision, use the response to SELECT_ALL as current uid
1805 memcpy(uid_resp
, resp
, 4);
1808 if (cascade_level
< num_cascades
- 1) {
1810 memcpy(uid_resp
+1, uid_ptr
+cascade_level
*3, 3);
1812 memcpy(uid_resp
, uid_ptr
+cascade_level
*3, 4);
1817 // calculate crypto UID. Always use last 4 Bytes.
1819 *cuid_ptr
= bytes_to_num(uid_resp
, 4);
1822 // Construct SELECT UID command
1823 sel_uid
[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1824 memcpy(sel_uid
+2, uid_resp
, 4); // the UID received during anticollision, or the provided UID
1825 sel_uid
[6] = sel_uid
[2] ^ sel_uid
[3] ^ sel_uid
[4] ^ sel_uid
[5]; // calculate and add BCC
1826 AppendCrc14443a(sel_uid
, 7); // calculate and add CRC
1827 ReaderTransmit(sel_uid
, sizeof(sel_uid
), NULL
);
1830 if (!ReaderReceive(resp
, resp_par
)) return 0;
1833 // Test if more parts of the uid are coming
1834 if ((sak
& 0x04) /* && uid_resp[0] == 0x88 */) {
1835 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1836 // http://www.nxp.com/documents/application_note/AN10927.pdf
1837 uid_resp
[0] = uid_resp
[1];
1838 uid_resp
[1] = uid_resp
[2];
1839 uid_resp
[2] = uid_resp
[3];
1843 if(uid_ptr
&& anticollision
) {
1844 memcpy(uid_ptr
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1848 memcpy(p_hi14a_card
->uid
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1849 p_hi14a_card
->uidlen
+= uid_resp_len
;
1854 p_hi14a_card
->sak
= sak
;
1857 // PICC compilant with iso14443a-4 ---> (SAK & 0x20 != 0)
1858 if( (sak
& 0x20) == 0) return 2;
1861 // Request for answer to select
1862 AppendCrc14443a(rats
, 2);
1863 ReaderTransmit(rats
, sizeof(rats
), NULL
);
1865 if (!(len
= ReaderReceive(resp
, resp_par
))) return 0;
1868 memcpy(p_hi14a_card
->ats
, resp
, len
);
1869 p_hi14a_card
->ats_len
= len
;
1872 // reset the PCB block number
1873 iso14_pcb_blocknum
= 0;
1875 // set default timeout and delay next transfer based on ATS
1876 iso14a_set_ATS_times(resp
);
1883 void iso14443a_setup(uint8_t fpga_minor_mode
) {
1884 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1885 // Set up the synchronous serial port
1886 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A
);
1887 // connect Demodulated Signal to ADC:
1888 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1890 // Signal field is on with the appropriate LED
1891 if (fpga_minor_mode
== FPGA_HF_ISO14443A_READER_MOD
1892 || fpga_minor_mode
== FPGA_HF_ISO14443A_READER_LISTEN
) {
1897 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| fpga_minor_mode
);
1904 NextTransferTime
= 2*DELAY_ARM2AIR_AS_READER
;
1905 iso14a_set_timeout(1060); // 10ms default
1908 /* Peter Fillmore 2015
1909 Added card id field to the function
1910 info from ISO14443A standard
1913 b3 = depends on block
1914 b4 = Card ID following if set to 1
1915 b5 = depends on block type
1916 b6 = depends on block type
1919 b8 b7 b6 b5 b4 b3 b2 b1
1923 b8 b7 b6 b5 b4 b3 b2 b1
1927 b8 b7 b6 b5 b4 b3 b2 b1
1929 b5,b6 = 00 - DESELECT
1932 int iso14_apdu(uint8_t *cmd
, uint16_t cmd_len
, void *data
, uint8_t *res
) {
1933 uint8_t parity
[MAX_PARITY_SIZE
];
1934 uint8_t real_cmd
[cmd_len
+ 4];
1937 // ISO 14443 APDU frame: PCB [CID] [NAD] APDU CRC PCB=0x02
1938 real_cmd
[0] = 0x02; // bnr,nad,cid,chn=0; i-block(0x00)
1939 // put block number into the PCB
1940 real_cmd
[0] |= iso14_pcb_blocknum
;
1941 memcpy(real_cmd
+ 1, cmd
, cmd_len
);
1944 real_cmd
[0] = 0xA2; // r-block + ACK
1945 real_cmd
[0] |= iso14_pcb_blocknum
;
1947 AppendCrc14443a(real_cmd
, cmd_len
+ 1);
1949 ReaderTransmit(real_cmd
, cmd_len
+ 3, NULL
);
1951 size_t len
= ReaderReceive(data
, parity
);
1952 uint8_t *data_bytes
= (uint8_t *) data
;
1955 return 0; //DATA LINK ERROR
1958 while((data_bytes
[0] & 0xF2) == 0xF2) {
1959 uint32_t save_iso14a_timeout
= iso14a_get_timeout();
1960 // temporarily increase timeout
1961 iso14a_set_timeout(MAX((data_bytes
[1] & 0x3f) * save_iso14a_timeout
, MAX_ISO14A_TIMEOUT
));
1962 // Transmit WTX back
1963 // byte1 - WTXM [1..59]. command FWT=FWT*WTXM
1964 data_bytes
[1] = data_bytes
[1] & 0x3f; // 2 high bits mandatory set to 0b
1965 // now need to fix CRC.
1966 AppendCrc14443a(data_bytes
, len
- 2);
1968 ReaderTransmit(data_bytes
, len
, NULL
);
1969 // retrieve the result again (with increased timeout)
1970 len
= ReaderReceive(data
, parity
);
1973 iso14a_set_timeout(save_iso14a_timeout
);
1976 // if we received an I- or R(ACK)-Block with a block number equal to the
1977 // current block number, toggle the current block number
1978 if (len
>= 3 // PCB+CRC = 3 bytes
1979 && ((data_bytes
[0] & 0xC0) == 0 // I-Block
1980 || (data_bytes
[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1981 && (data_bytes
[0] & 0x01) == iso14_pcb_blocknum
) // equal block numbers
1983 iso14_pcb_blocknum
^= 1;
1986 // if we received I-block with chaining we need to send ACK and receive another block of data
1988 *res
= data_bytes
[0];
1991 if (len
>= 3 && !CheckCrc14443(CRC_14443_A
, data_bytes
, len
)) {
1999 // memmove(data_bytes, data_bytes + 1, len);
2000 for (int i
= 0; i
< len
; i
++)
2001 data_bytes
[i
] = data_bytes
[i
+ 1];
2007 //-----------------------------------------------------------------------------
2008 // Read an ISO 14443a tag. Send out commands and store answers.
2010 //-----------------------------------------------------------------------------
2011 void ReaderIso14443a(UsbCommand
*c
)
2013 iso14a_command_t param
= c
->arg
[0];
2014 uint8_t *cmd
= c
->d
.asBytes
;
2015 size_t len
= c
->arg
[1] & 0xffff;
2016 size_t lenbits
= c
->arg
[1] >> 16;
2017 uint32_t timeout
= c
->arg
[2];
2019 byte_t buf
[USB_CMD_DATA_SIZE
] = {0};
2020 uint8_t par
[MAX_PARITY_SIZE
];
2021 bool cantSELECT
= false;
2025 if(param
& ISO14A_CLEAR_TRACE
) {
2029 if(param
& ISO14A_REQUEST_TRIGGER
) {
2030 iso14a_set_trigger(true);
2033 if(param
& ISO14A_CONNECT
) {
2035 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN
);
2036 if(!(param
& ISO14A_NO_SELECT
)) {
2037 iso14a_card_select_t
*card
= (iso14a_card_select_t
*)buf
;
2038 arg0
= iso14443a_select_card(NULL
, card
, NULL
, true, 0, param
& ISO14A_NO_RATS
);
2040 // if we cant select then we cant send data
2041 if (arg0
!= 1 && arg0
!= 2) {
2042 // 1 - all is OK with ATS, 2 - without ATS
2047 cmd_send(CMD_ACK
,arg0
,card
->uidlen
,0,buf
,sizeof(iso14a_card_select_t
));
2052 if(param
& ISO14A_SET_TIMEOUT
) {
2053 iso14a_set_timeout(timeout
);
2056 if(param
& ISO14A_APDU
&& !cantSELECT
) {
2058 arg0
= iso14_apdu(cmd
, len
, buf
, &res
);
2060 cmd_send(CMD_ACK
, arg0
, res
, 0, buf
, sizeof(buf
));
2064 if(param
& ISO14A_RAW
&& !cantSELECT
) {
2065 if(param
& ISO14A_APPEND_CRC
) {
2066 if(param
& ISO14A_TOPAZMODE
) {
2067 AppendCrc14443b(cmd
,len
);
2069 AppendCrc14443a(cmd
,len
);
2072 if (lenbits
) lenbits
+= 16;
2074 if(lenbits
>0) { // want to send a specific number of bits (e.g. short commands)
2075 if(param
& ISO14A_TOPAZMODE
) {
2076 int bits_to_send
= lenbits
;
2078 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 7), NULL
, NULL
); // first byte is always short (7bits) and no parity
2080 while (bits_to_send
> 0) {
2081 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 8), NULL
, NULL
); // following bytes are 8 bit and no parity
2085 GetParity(cmd
, lenbits
/8, par
);
2086 ReaderTransmitBitsPar(cmd
, lenbits
, par
, NULL
); // bytes are 8 bit with odd parity
2088 } else { // want to send complete bytes only
2089 if(param
& ISO14A_TOPAZMODE
) {
2091 ReaderTransmitBitsPar(&cmd
[i
++], 7, NULL
, NULL
); // first byte: 7 bits, no paritiy
2093 ReaderTransmitBitsPar(&cmd
[i
++], 8, NULL
, NULL
); // following bytes: 8 bits, no paritiy
2096 ReaderTransmit(cmd
,len
, NULL
); // 8 bits, odd parity
2099 arg0
= ReaderReceive(buf
, par
);
2102 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
2106 if(param
& ISO14A_REQUEST_TRIGGER
) {
2107 iso14a_set_trigger(false);
2110 if(param
& ISO14A_NO_DISCONNECT
) {
2114 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2119 // Determine the distance between two nonces.
2120 // Assume that the difference is small, but we don't know which is first.
2121 // Therefore try in alternating directions.
2122 static int32_t dist_nt(uint32_t nt1
, uint32_t nt2
) {
2125 uint32_t nttmp1
, nttmp2
;
2127 if (nt1
== nt2
) return 0;
2132 for (i
= 1; i
< 32768; i
++) {
2133 nttmp1
= prng_successor(nttmp1
, 1);
2134 if (nttmp1
== nt2
) return i
;
2135 nttmp2
= prng_successor(nttmp2
, 1);
2136 if (nttmp2
== nt1
) return -i
;
2139 return(-99999); // either nt1 or nt2 are invalid nonces
2143 //-----------------------------------------------------------------------------
2144 // Recover several bits of the cypher stream. This implements (first stages of)
2145 // the algorithm described in "The Dark Side of Security by Obscurity and
2146 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2147 // (article by Nicolas T. Courtois, 2009)
2148 //-----------------------------------------------------------------------------
2149 void ReaderMifare(bool first_try
)
2152 uint8_t mf_auth
[] = { 0x60,0x00,0xf5,0x7b };
2153 uint8_t mf_nr_ar
[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2154 static uint8_t mf_nr_ar3
;
2156 uint8_t receivedAnswer
[MAX_MIFARE_FRAME_SIZE
];
2157 uint8_t receivedAnswerPar
[MAX_MIFARE_PARITY_SIZE
];
2159 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2161 // free eventually allocated BigBuf memory. We want all for tracing.
2167 uint8_t nt_diff
= 0;
2168 uint8_t par
[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2169 static uint8_t par_low
= 0;
2171 uint8_t uid
[10] ={0};
2175 uint32_t previous_nt
= 0;
2176 static uint32_t nt_attacked
= 0;
2177 uint8_t par_list
[8] = {0x00};
2178 uint8_t ks_list
[8] = {0x00};
2180 #define PRNG_SEQUENCE_LENGTH (1 << 16);
2181 uint32_t sync_time
= GetCountSspClk() & 0xfffffff8;
2182 static int32_t sync_cycles
;
2183 int catch_up_cycles
= 0;
2184 int last_catch_up
= 0;
2185 uint16_t elapsed_prng_sequences
;
2186 uint16_t consecutive_resyncs
= 0;
2191 par
[0] = par_low
= 0;
2192 sync_cycles
= PRNG_SEQUENCE_LENGTH
; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the tag nonces).
2196 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2198 mf_nr_ar
[3] = mf_nr_ar3
;
2207 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2208 #define MAX_SYNC_TRIES 32
2209 #define SYNC_TIME_BUFFER 16 // if there is only SYNC_TIME_BUFFER left before next planned sync, wait for next PRNG cycle
2210 #define NUM_DEBUG_INFOS 8 // per strategy
2211 #define MAX_STRATEGY 3
2212 uint16_t unexpected_random
= 0;
2213 uint16_t sync_tries
= 0;
2214 int16_t debug_info_nr
= -1;
2215 uint16_t strategy
= 0;
2216 int32_t debug_info
[MAX_STRATEGY
][NUM_DEBUG_INFOS
];
2217 uint32_t select_time
;
2220 for(uint16_t i
= 0; true; i
++) {
2225 // Test if the action was cancelled
2226 if(BUTTON_PRESS()) {
2231 if (strategy
== 2) {
2232 // test with additional hlt command
2234 int len
= mifare_sendcmd_short(NULL
, false, 0x50, 0x00, receivedAnswer
, receivedAnswerPar
, &halt_time
);
2235 if (len
&& MF_DBGLEVEL
>= 3) {
2236 Dbprintf("Unexpected response of %d bytes to hlt command (additional debugging).", len
);
2240 if (strategy
== 3) {
2241 // test with FPGA power off/on
2242 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2244 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2248 if(!iso14443a_select_card(uid
, NULL
, &cuid
, true, 0, true)) {
2249 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Can't select card");
2252 select_time
= GetCountSspClk();
2254 elapsed_prng_sequences
= 1;
2255 if (debug_info_nr
== -1) {
2256 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
+ catch_up_cycles
;
2257 catch_up_cycles
= 0;
2259 // if we missed the sync time already or are about to miss it, advance to the next nonce repeat
2260 while(sync_time
< GetCountSspClk() + SYNC_TIME_BUFFER
) {
2261 elapsed_prng_sequences
++;
2262 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
;
2265 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2266 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2268 // collect some information on tag nonces for debugging:
2269 #define DEBUG_FIXED_SYNC_CYCLES PRNG_SEQUENCE_LENGTH
2270 if (strategy
== 0) {
2271 // nonce distances at fixed time after card select:
2272 sync_time
= select_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2273 } else if (strategy
== 1) {
2274 // nonce distances at fixed time between authentications:
2275 sync_time
= sync_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2276 } else if (strategy
== 2) {
2277 // nonce distances at fixed time after halt:
2278 sync_time
= halt_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2280 // nonce_distances at fixed time after power on
2281 sync_time
= DEBUG_FIXED_SYNC_CYCLES
;
2283 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2286 // Receive the (4 Byte) "random" nonce
2287 if (!ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2288 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2293 nt
= bytes_to_num(receivedAnswer
, 4);
2295 // Transmit reader nonce with fake par
2296 ReaderTransmitPar(mf_nr_ar
, sizeof(mf_nr_ar
), par
, NULL
);
2298 if (first_try
&& previous_nt
&& !nt_attacked
) { // we didn't calibrate our clock yet
2299 int nt_distance
= dist_nt(previous_nt
, nt
);
2300 if (nt_distance
== 0) {
2303 if (nt_distance
== -99999) { // invalid nonce received
2304 unexpected_random
++;
2305 if (unexpected_random
> MAX_UNEXPECTED_RANDOM
) {
2306 isOK
= -3; // Card has an unpredictable PRNG. Give up
2309 continue; // continue trying...
2312 if (++sync_tries
> MAX_SYNC_TRIES
) {
2313 if (strategy
> MAX_STRATEGY
|| MF_DBGLEVEL
< 3) {
2314 isOK
= -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2316 } else { // continue for a while, just to collect some debug info
2317 debug_info
[strategy
][debug_info_nr
] = nt_distance
;
2319 if (debug_info_nr
== NUM_DEBUG_INFOS
) {
2326 sync_cycles
= (sync_cycles
- nt_distance
/elapsed_prng_sequences
);
2327 if (sync_cycles
<= 0) {
2328 sync_cycles
+= PRNG_SEQUENCE_LENGTH
;
2330 if (MF_DBGLEVEL
>= 3) {
2331 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i
, nt_distance
, elapsed_prng_sequences
, sync_cycles
);
2337 if ((nt
!= nt_attacked
) && nt_attacked
) { // we somehow lost sync. Try to catch up again...
2338 catch_up_cycles
= -dist_nt(nt_attacked
, nt
);
2339 if (catch_up_cycles
== 99999) { // invalid nonce received. Don't resync on that one.
2340 catch_up_cycles
= 0;
2343 catch_up_cycles
/= elapsed_prng_sequences
;
2344 if (catch_up_cycles
== last_catch_up
) {
2345 consecutive_resyncs
++;
2348 last_catch_up
= catch_up_cycles
;
2349 consecutive_resyncs
= 0;
2351 if (consecutive_resyncs
< 3) {
2352 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i
, -catch_up_cycles
, consecutive_resyncs
);
2355 sync_cycles
= sync_cycles
+ catch_up_cycles
;
2356 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i
, -catch_up_cycles
, sync_cycles
);
2358 catch_up_cycles
= 0;
2359 consecutive_resyncs
= 0;
2364 consecutive_resyncs
= 0;
2366 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2367 if (ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2368 catch_up_cycles
= 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2371 par_low
= par
[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2375 if(led_on
) LED_B_ON(); else LED_B_OFF();
2377 par_list
[nt_diff
] = SwapBits(par
[0], 8);
2378 ks_list
[nt_diff
] = receivedAnswer
[0] ^ 0x05;
2380 // Test if the information is complete
2381 if (nt_diff
== 0x07) {
2386 nt_diff
= (nt_diff
+ 1) & 0x07;
2387 mf_nr_ar
[3] = (mf_nr_ar
[3] & 0x1F) | (nt_diff
<< 5);
2390 if (nt_diff
== 0 && first_try
)
2393 if (par
[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2398 par
[0] = ((par
[0] & 0x1F) + 1) | par_low
;
2404 mf_nr_ar
[3] &= 0x1F;
2407 if (MF_DBGLEVEL
>= 3) {
2408 for (uint16_t i
= 0; i
<= MAX_STRATEGY
; i
++) {
2409 for(uint16_t j
= 0; j
< NUM_DEBUG_INFOS
; j
++) {
2410 Dbprintf("collected debug info[%d][%d] = %d", i
, j
, debug_info
[i
][j
]);
2417 memcpy(buf
+ 0, uid
, 4);
2418 num_to_bytes(nt
, 4, buf
+ 4);
2419 memcpy(buf
+ 8, par_list
, 8);
2420 memcpy(buf
+ 16, ks_list
, 8);
2421 memcpy(buf
+ 24, mf_nr_ar
, 8);
2423 cmd_send(CMD_ACK
, isOK
, 0, 0, buf
, 32);
2426 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2433 //-----------------------------------------------------------------------------
2436 //-----------------------------------------------------------------------------
2437 void RAMFUNC
SniffMifare(uint8_t param
) {
2439 // bit 0 - trigger from first card answer
2440 // bit 1 - trigger from first reader 7-bit request
2442 // C(red) A(yellow) B(green)
2444 // init trace buffer
2448 // The command (reader -> tag) that we're receiving.
2449 // The length of a received command will in most cases be no more than 18 bytes.
2450 // So 32 should be enough!
2451 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
];
2452 uint8_t receivedCmdPar
[MAX_MIFARE_PARITY_SIZE
];
2453 // The response (tag -> reader) that we're receiving.
2454 uint8_t receivedResponse
[MAX_MIFARE_FRAME_SIZE
];
2455 uint8_t receivedResponsePar
[MAX_MIFARE_PARITY_SIZE
];
2457 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
2459 // free eventually allocated BigBuf memory
2461 // allocate the DMA buffer, used to stream samples from the FPGA
2462 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
2463 uint8_t *data
= dmaBuf
;
2464 uint8_t previous_data
= 0;
2467 bool ReaderIsActive
= false;
2468 bool TagIsActive
= false;
2470 // Set up the demodulator for tag -> reader responses.
2471 DemodInit(receivedResponse
, receivedResponsePar
);
2473 // Set up the demodulator for the reader -> tag commands
2474 UartInit(receivedCmd
, receivedCmdPar
);
2476 // Setup for the DMA.
2477 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
2484 // And now we loop, receiving samples.
2485 for(uint32_t sniffCounter
= 0; true; ) {
2487 if(BUTTON_PRESS()) {
2488 DbpString("Canceled by button.");
2495 if ((sniffCounter
& 0x0000FFFF) == 0) { // from time to time
2496 // check if a transaction is completed (timeout after 2000ms).
2497 // if yes, stop the DMA transfer and send what we have so far to the client
2498 if (MfSniffSend(2000)) {
2499 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2503 ReaderIsActive
= false;
2504 TagIsActive
= false;
2505 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
2509 int register readBufDataP
= data
- dmaBuf
; // number of bytes we have processed so far
2510 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
; // number of bytes already transferred
2511 if (readBufDataP
<= dmaBufDataP
){ // we are processing the same block of data which is currently being transferred
2512 dataLen
= dmaBufDataP
- readBufDataP
; // number of bytes still to be processed
2514 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
; // number of bytes still to be processed
2516 // test for length of buffer
2517 if(dataLen
> maxDataLen
) { // we are more behind than ever...
2518 maxDataLen
= dataLen
;
2519 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
2520 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen
);
2524 if(dataLen
< 1) continue;
2526 // primary buffer was stopped ( <-- we lost data!
2527 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
2528 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
2529 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
2530 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
2532 // secondary buffer sets as primary, secondary buffer was stopped
2533 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
2534 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
2535 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
2540 if (sniffCounter
& 0x01) {
2542 if(!TagIsActive
) { // no need to try decoding tag data if the reader is sending
2543 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
2544 if(MillerDecoding(readerdata
, (sniffCounter
-1)*4)) {
2548 if (MfSniffLogic(receivedCmd
, Uart
.len
, Uart
.parity
, Uart
.bitCount
, true)) break;
2550 /* And ready to receive another command. */
2551 UartInit(receivedCmd
, receivedCmdPar
);
2553 /* And also reset the demod code */
2556 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
2559 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending
2560 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
2561 if(ManchesterDecoding(tagdata
, 0, (sniffCounter
-1)*4)) {
2565 if (MfSniffLogic(receivedResponse
, Demod
.len
, Demod
.parity
, Demod
.bitCount
, false)) break;
2567 // And ready to receive another response.
2569 // And reset the Miller decoder including its (now outdated) input buffer
2570 UartInit(receivedCmd
, receivedCmdPar
);
2572 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
2576 previous_data
= *data
;
2579 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
2585 DbpString("COMMAND FINISHED.");
2587 FpgaDisableSscDma();
2590 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen
, Uart
.state
, Uart
.len
);