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1 //===============================================================================
2 // FPGA MOONCRESTA T80_IP I/F
3 //
4 // Version : 1.00
5 //
6 // Copyright(c) 2004 Katsumi Degawa , All rights reserved
7 //
8 // Important !
9 //
10 // This program is freeware for non-commercial use.
11 // An author does no guarantee about this program.
12 // You can use this under your own risk.
13 //
14 //================================================================================
15
16 module Z80IP(
17
18 ADRS,
19 DINP,
20 DOUT,
21 BUSWO,
22 RESET_N,
23 INT_N,
24 NMI_N,
25 WAIT_N,
26 M1_N,
27 MREQ_N,
28 IORQ_N,
29 RD_N,
30 WR_N,
31 RFSH_N,
32 HALT_N,
33 CLK
34
35 );
36
37 // I/O assign
38 output [15:0]ADRS;
39 input [7:0] DINP;
40 output [7:0] DOUT;
41 input RESET_N,INT_N,NMI_N,WAIT_N,CLK;
42 output M1_N,MREQ_N,IORQ_N,RD_N,WR_N,RFSH_N,HALT_N,BUSWO;
43
44 // Z80IP interface
45 T80as z80core (
46
47 .RESET_n(RESET_N),
48 .CLK_n(CLK),
49 .WAIT_n(WAIT_N),
50 .INT_n(INT_N),
51 .NMI_n(NMI_N),
52 .BUSRQ_n(1'b1),
53 .M1_n(M1_N),
54 .MREQ_n(MREQ_N),
55 .IORQ_n(IORQ_N),
56 .RD_n(RD_N),
57 .WR_n(WR_N),
58 .RFSH_n(RFSH_N),
59 .HALT_n(HALT_N),
60 .BUSAK_n(),
61 .A(ADRS),
62 .DI(DINP),
63 .DO(DOUT),
64 .DOE(BUSWO)
65
66 );
67
68 endmodule
69
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