fix clock for LRAM

diff --git a/galaxian/src/mc_bram_if.v b/galaxian/src/mc_bram_if.v
index 1374c92c18571dbfc640547478f4838dee7b05cd..edbcdd0660d087fb2ffddfbc00890490bae03a94 100644 (file)
--- a/galaxian/src/mc_bram_if.v
+++ b/galaxian/src/mc_bram_if.v
@@ -282,7 +282,7 @@ RAMB4_S8 LRAM(
 .DI({3'b000,I_D}),\r
 .DO(W_D),\r
 .EN(1'b1),\r
-.WE(~I_WE),\r
+.WE(I_WE),\r
 .RST(1'b0)\r
 \r
 );\r

diff --git a/galaxian/src/mc_clock.v b/galaxian/src/mc_clock.v
index 5ccfbd606fe31e7d7637cb7141e420caf9bc3b7e..36925f3f3bee4be56cd942b2ad9688b126676fbe 100644 (file)
--- a/galaxian/src/mc_clock.v
+++ b/galaxian/src/mc_clock.v
@@ -20,7 +20,8 @@ module mc_clock(
 I_CLK_36M,\r
 O_CLK_18M,\r
 O_CLK_12M,\r
-O_CLK_06M\r
+O_CLK_06M,\r
+O_CLK_06Mn\r
 \r
 );\r
 \r
@@ -28,6 +29,7 @@ input I_CLK_36M;
 output O_CLK_18M;\r
 output O_CLK_12M;\r
 output O_CLK_06M;\r
+output O_CLK_06Mn;\r
 \r
 // 2/3 clock divider(duty 33%)\r
 //I_CLK   1010101010101010101\r
@@ -68,10 +70,15 @@ assign O_CLK_18M = CLK_18M;
 \r
 // 1/3 clock divider (duty 50%)\r
 reg CLK_6M;\r
+reg CLK_6Mn;\r
+\r
 always @(posedge O_CLK_12M)\r
 begin\r
    CLK_6M  <= ~CLK_6M;\r
+   CLK_6Mn <= CLK_6M;\r
 end\r
+\r
 assign O_CLK_06M = CLK_6M;\r
+assign O_CLK_06Mn = CLK_6Mn;\r
 \r
 endmodule\r

diff --git a/galaxian/src/mc_top.v b/galaxian/src/mc_top.v
index 0232f7698b1ec5f8ed1364b3b39f801d98200ca5..99206f367ab52db4aab5ed63f99d91ed33da776e 100644 (file)
--- a/galaxian/src/mc_top.v
+++ b/galaxian/src/mc_top.v
@@ -93,6 +93,7 @@ wire   W_CLK_18M;
 wire   W_CLK_36M;\r
 wire   W_CLK_12M,WB_CLK_12M;\r
 wire   W_CLK_6M,WB_CLK_6M;\r
+wire   W_CLK_6Mn;\r
 wire   W_STARS_CLK;\r
 \r
 mc_dcm clockgen(\r
@@ -148,7 +149,8 @@ mc_clock MC_CLK(
 .I_CLK_36M(W_CLK_36M),\r
 .O_CLK_18M(W_CLK_18M),\r
 .O_CLK_12M(WB_CLK_12M),\r
-.O_CLK_06M(WB_CLK_6M)\r
+.O_CLK_06M(WB_CLK_6M),\r
+.O_CLK_06Mn(W_CLK_6Mn)\r
 \r
 );\r
 \r
@@ -443,6 +445,7 @@ mc_video MC_VID(
 .I_CLK_18M(W_CLK_18M),\r
 .I_CLK_12M(W_CLK_12M),\r
 .I_CLK_6M(W_CLK_6M),\r
+.I_CLK_6Mn(W_CLK_6Mn),\r
 .I_H_CNT(W_H_CNT),\r
 .I_V_CNT(W_V_CNT),\r
 .I_H_FLIP(W_H_FLIP),\r

diff --git a/galaxian/src/mc_video.v b/galaxian/src/mc_video.v
index a12155d55546a01330c8762c0ad6acc3d7f68898..84f23976161634881be90447402da1a573820001 100644 (file)
--- a/galaxian/src/mc_video.v
+++ b/galaxian/src/mc_video.v
@@ -29,6 +29,7 @@ module mc_video(
 I_CLK_18M,\r
 I_CLK_12M,\r
 I_CLK_6M,\r
+I_CLK_6Mn,\r
 I_H_CNT,\r
 I_V_CNT,\r
 I_H_FLIP,\r
@@ -60,6 +61,7 @@ O_COL
 input  I_CLK_18M;\r
 input  I_CLK_12M;\r
 input  I_CLK_6M;\r
+input  I_CLK_6Mn;\r
 input  [8:0]I_H_CNT;\r
 input  [7:0]I_V_CNT;\r
 input  I_H_FLIP;\r
@@ -377,7 +379,7 @@ mc_lram LRAM(
 \r
 .I_CLK(I_CLK_18M),\r
 .I_ADDR(W_LRAM_A),\r
-.I_WE(I_CLK_6M),\r
+.I_WE(I_CLK_6Mn),\r
 .I_D(W_LRAM_DI),\r
 .O_Dn(W_LRAM_DO)\r
 \r