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a126332a | 1 | //----------------------------------------------------------------------------- |
b62a5a84 | 2 | // Merlok - June 2011, 2012 |
15c4dc5a | 3 | // Gerhard de Koning Gans - May 2008 |
534983d7 | 4 | // Hagen Fritsch - June 2010 |
bd20f8f4 | 5 | // |
6 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
7 | // at your option, any later version. See the LICENSE.txt file for the text of | |
8 | // the license. | |
15c4dc5a | 9 | //----------------------------------------------------------------------------- |
bd20f8f4 | 10 | // Routines to support ISO 14443 type A. |
11 | //----------------------------------------------------------------------------- | |
12 | ||
e30c654b | 13 | #include "proxmark3.h" |
15c4dc5a | 14 | #include "apps.h" |
f7e3ed82 | 15 | #include "util.h" |
9ab7a6c7 | 16 | #include "string.h" |
902cb3c0 | 17 | #include "cmd.h" |
15c4dc5a | 18 | #include "iso14443crc.h" |
534983d7 | 19 | #include "iso14443a.h" |
20f9a2a1 M |
20 | #include "crapto1.h" |
21 | #include "mifareutil.h" | |
3000dc4e | 22 | #include "BigBuf.h" |
f8ada309 | 23 | #include "parity.h" |
24 | ||
534983d7 | 25 | static uint32_t iso14a_timeout; |
1e262141 | 26 | int rsamples = 0; |
1e262141 | 27 | uint8_t trigger = 0; |
b0127e65 | 28 | // the block number for the ISO14443-4 PCB |
29 | static uint8_t iso14_pcb_blocknum = 0; | |
15c4dc5a | 30 | |
7bc95e2e | 31 | // |
32 | // ISO14443 timing: | |
33 | // | |
34 | // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles | |
35 | #define REQUEST_GUARD_TIME (7000/16 + 1) | |
36 | // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles | |
37 | #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1) | |
38 | // bool LastCommandWasRequest = FALSE; | |
39 | ||
40 | // | |
41 | // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz) | |
42 | // | |
d714d3ef | 43 | // When the PM acts as reader and is receiving tag data, it takes |
44 | // 3 ticks delay in the AD converter | |
45 | // 16 ticks until the modulation detector completes and sets curbit | |
46 | // 8 ticks until bit_to_arm is assigned from curbit | |
47 | // 8*16 ticks for the transfer from FPGA to ARM | |
7bc95e2e | 48 | // 4*16 ticks until we measure the time |
49 | // - 8*16 ticks because we measure the time of the previous transfer | |
d714d3ef | 50 | #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16) |
7bc95e2e | 51 | |
52 | // When the PM acts as a reader and is sending, it takes | |
53 | // 4*16 ticks until we can write data to the sending hold register | |
54 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register | |
55 | // 8 ticks until the first transfer starts | |
56 | // 8 ticks later the FPGA samples the data | |
57 | // 1 tick to assign mod_sig_coil | |
58 | #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1) | |
59 | ||
60 | // When the PM acts as tag and is receiving it takes | |
d714d3ef | 61 | // 2 ticks delay in the RF part (for the first falling edge), |
7bc95e2e | 62 | // 3 ticks for the A/D conversion, |
63 | // 8 ticks on average until the start of the SSC transfer, | |
64 | // 8 ticks until the SSC samples the first data | |
65 | // 7*16 ticks to complete the transfer from FPGA to ARM | |
66 | // 8 ticks until the next ssp_clk rising edge | |
d714d3ef | 67 | // 4*16 ticks until we measure the time |
7bc95e2e | 68 | // - 8*16 ticks because we measure the time of the previous transfer |
d714d3ef | 69 | #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16) |
7bc95e2e | 70 | |
71 | // The FPGA will report its internal sending delay in | |
72 | uint16_t FpgaSendQueueDelay; | |
73 | // the 5 first bits are the number of bits buffered in mod_sig_buf | |
74 | // the last three bits are the remaining ticks/2 after the mod_sig_buf shift | |
75 | #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1) | |
76 | ||
77 | // When the PM acts as tag and is sending, it takes | |
d714d3ef | 78 | // 4*16 ticks until we can write data to the sending hold register |
7bc95e2e | 79 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register |
80 | // 8 ticks until the first transfer starts | |
81 | // 8 ticks later the FPGA samples the data | |
82 | // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf) | |
83 | // + 1 tick to assign mod_sig_coil | |
d714d3ef | 84 | #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1) |
7bc95e2e | 85 | |
86 | // When the PM acts as sniffer and is receiving tag data, it takes | |
87 | // 3 ticks A/D conversion | |
d714d3ef | 88 | // 14 ticks to complete the modulation detection |
89 | // 8 ticks (on average) until the result is stored in to_arm | |
7bc95e2e | 90 | // + the delays in transferring data - which is the same for |
91 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 92 | #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8) |
7bc95e2e | 93 | |
d714d3ef | 94 | // When the PM acts as sniffer and is receiving reader data, it takes |
95 | // 2 ticks delay in analogue RF receiver (for the falling edge of the | |
96 | // start bit, which marks the start of the communication) | |
7bc95e2e | 97 | // 3 ticks A/D conversion |
d714d3ef | 98 | // 8 ticks on average until the data is stored in to_arm. |
7bc95e2e | 99 | // + the delays in transferring data - which is the same for |
100 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 101 | #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8) |
7bc95e2e | 102 | |
103 | //variables used for timing purposes: | |
104 | //these are in ssp_clk cycles: | |
6a1f2d82 | 105 | static uint32_t NextTransferTime; |
106 | static uint32_t LastTimeProxToAirStart; | |
107 | static uint32_t LastProxToAirDuration; | |
7bc95e2e | 108 | |
8f51ddb0 | 109 | // CARD TO READER - manchester |
72934aa3 | 110 | // Sequence D: 11110000 modulation with subcarrier during first half |
111 | // Sequence E: 00001111 modulation with subcarrier during second half | |
112 | // Sequence F: 00000000 no modulation with subcarrier | |
8f51ddb0 | 113 | // READER TO CARD - miller |
72934aa3 | 114 | // Sequence X: 00001100 drop after half a period |
115 | // Sequence Y: 00000000 no drop | |
116 | // Sequence Z: 11000000 drop at start | |
117 | #define SEC_D 0xf0 | |
118 | #define SEC_E 0x0f | |
119 | #define SEC_F 0x00 | |
120 | #define SEC_X 0x0c | |
121 | #define SEC_Y 0x00 | |
122 | #define SEC_Z 0xc0 | |
15c4dc5a | 123 | |
902cb3c0 | 124 | void iso14a_set_trigger(bool enable) { |
534983d7 | 125 | trigger = enable; |
126 | } | |
127 | ||
b0127e65 | 128 | void iso14a_set_timeout(uint32_t timeout) { |
129 | iso14a_timeout = timeout; | |
19a700a8 | 130 | if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106); |
b0127e65 | 131 | } |
8556b852 | 132 | |
19a700a8 | 133 | void iso14a_set_ATS_timeout(uint8_t *ats) { |
134 | ||
135 | uint8_t tb1; | |
136 | uint8_t fwi; | |
137 | uint32_t fwt; | |
138 | ||
139 | if (ats[0] > 1) { // there is a format byte T0 | |
140 | if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1) | |
4c0cf2d2 | 141 | |
142 | if ((ats[1] & 0x10) == 0x10) // there is an interface byte TA(1) preceding TB(1) | |
19a700a8 | 143 | tb1 = ats[3]; |
4c0cf2d2 | 144 | else |
19a700a8 | 145 | tb1 = ats[2]; |
4c0cf2d2 | 146 | |
19a700a8 | 147 | fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI) |
4c0cf2d2 | 148 | //fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc |
149 | fwt = 4096 * (1 << fwi); | |
19a700a8 | 150 | |
4c0cf2d2 | 151 | //iso14a_set_timeout(fwt/(8*16)); |
152 | iso14a_set_timeout(fwt/128); | |
19a700a8 | 153 | } |
154 | } | |
155 | } | |
156 | ||
15c4dc5a | 157 | //----------------------------------------------------------------------------- |
158 | // Generate the parity value for a byte sequence | |
e30c654b | 159 | // |
15c4dc5a | 160 | //----------------------------------------------------------------------------- |
6a1f2d82 | 161 | void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par) |
15c4dc5a | 162 | { |
6a1f2d82 | 163 | uint16_t paritybit_cnt = 0; |
164 | uint16_t paritybyte_cnt = 0; | |
165 | uint8_t parityBits = 0; | |
166 | ||
167 | for (uint16_t i = 0; i < iLen; i++) { | |
168 | // Generate the parity bits | |
f8ada309 | 169 | parityBits |= ((oddparity8(pbtCmd[i])) << (7-paritybit_cnt)); |
6a1f2d82 | 170 | if (paritybit_cnt == 7) { |
171 | par[paritybyte_cnt] = parityBits; // save 8 Bits parity | |
172 | parityBits = 0; // and advance to next Parity Byte | |
173 | paritybyte_cnt++; | |
174 | paritybit_cnt = 0; | |
175 | } else { | |
176 | paritybit_cnt++; | |
177 | } | |
5f6d6c90 | 178 | } |
6a1f2d82 | 179 | |
180 | // save remaining parity bits | |
181 | par[paritybyte_cnt] = parityBits; | |
182 | ||
15c4dc5a | 183 | } |
184 | ||
534983d7 | 185 | void AppendCrc14443a(uint8_t* data, int len) |
15c4dc5a | 186 | { |
5f6d6c90 | 187 | ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1); |
15c4dc5a | 188 | } |
189 | ||
0ec548dc | 190 | void AppendCrc14443b(uint8_t* data, int len) |
191 | { | |
192 | ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1); | |
193 | } | |
194 | ||
195 | ||
7bc95e2e | 196 | //============================================================================= |
197 | // ISO 14443 Type A - Miller decoder | |
198 | //============================================================================= | |
199 | // Basics: | |
200 | // This decoder is used when the PM3 acts as a tag. | |
201 | // The reader will generate "pauses" by temporarily switching of the field. | |
202 | // At the PM3 antenna we will therefore measure a modulated antenna voltage. | |
203 | // The FPGA does a comparison with a threshold and would deliver e.g.: | |
204 | // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 ....... | |
205 | // The Miller decoder needs to identify the following sequences: | |
206 | // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0") | |
207 | // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information") | |
208 | // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1") | |
209 | // Note 1: the bitstream may start at any time. We therefore need to sync. | |
210 | // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence. | |
15c4dc5a | 211 | //----------------------------------------------------------------------------- |
b62a5a84 | 212 | static tUart Uart; |
15c4dc5a | 213 | |
d7aa3739 | 214 | // Lookup-Table to decide if 4 raw bits are a modulation. |
0ec548dc | 215 | // We accept the following: |
216 | // 0001 - a 3 tick wide pause | |
217 | // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left | |
218 | // 0111 - a 2 tick wide pause shifted left | |
219 | // 1001 - a 2 tick wide pause shifted right | |
d7aa3739 | 220 | const bool Mod_Miller_LUT[] = { |
0ec548dc | 221 | FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, |
222 | FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE | |
d7aa3739 | 223 | }; |
0ec548dc | 224 | #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4]) |
225 | #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)]) | |
d7aa3739 | 226 | |
7bc95e2e | 227 | void UartReset() |
15c4dc5a | 228 | { |
7bc95e2e | 229 | Uart.state = STATE_UNSYNCD; |
230 | Uart.bitCount = 0; | |
231 | Uart.len = 0; // number of decoded data bytes | |
6a1f2d82 | 232 | Uart.parityLen = 0; // number of decoded parity bytes |
7bc95e2e | 233 | Uart.shiftReg = 0; // shiftreg to hold decoded data bits |
6a1f2d82 | 234 | Uart.parityBits = 0; // holds 8 parity bits |
7bc95e2e | 235 | Uart.startTime = 0; |
236 | Uart.endTime = 0; | |
46c65fed | 237 | |
238 | Uart.byteCntMax = 0; | |
239 | Uart.posCnt = 0; | |
240 | Uart.syncBit = 9999; | |
7bc95e2e | 241 | } |
15c4dc5a | 242 | |
6a1f2d82 | 243 | void UartInit(uint8_t *data, uint8_t *parity) |
244 | { | |
245 | Uart.output = data; | |
246 | Uart.parity = parity; | |
0ec548dc | 247 | Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits |
6a1f2d82 | 248 | UartReset(); |
249 | } | |
d714d3ef | 250 | |
7bc95e2e | 251 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
252 | static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) | |
253 | { | |
15c4dc5a | 254 | |
0ec548dc | 255 | Uart.fourBits = (Uart.fourBits << 8) | bit; |
7bc95e2e | 256 | |
0c8d25eb | 257 | if (Uart.state == STATE_UNSYNCD) { // not yet synced |
3fe4ff4f | 258 | |
0ec548dc | 259 | Uart.syncBit = 9999; // not set |
46c65fed | 260 | |
261 | // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication") | |
262 | // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information") | |
263 | // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1") | |
264 | ||
0ec548dc | 265 | // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from |
46c65fed | 266 | // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111) |
267 | // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern | |
0ec548dc | 268 | // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's) |
46c65fed | 269 | // |
270 | #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000 | |
271 | #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000 | |
272 | ||
0ec548dc | 273 | if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7; |
274 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6; | |
275 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5; | |
276 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4; | |
277 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3; | |
278 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2; | |
279 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1; | |
280 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0; | |
281 | ||
282 | if (Uart.syncBit != 9999) { // found a sync bit | |
7bc95e2e | 283 | Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); |
284 | Uart.startTime -= Uart.syncBit; | |
d7aa3739 | 285 | Uart.endTime = Uart.startTime; |
7bc95e2e | 286 | Uart.state = STATE_START_OF_COMMUNICATION; |
15c4dc5a | 287 | } |
288 | ||
7bc95e2e | 289 | } else { |
15c4dc5a | 290 | |
0ec548dc | 291 | if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) { |
292 | if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error | |
d7aa3739 | 293 | UartReset(); |
d7aa3739 | 294 | } else { // Modulation in first half = Sequence Z = logic "0" |
7bc95e2e | 295 | if (Uart.state == STATE_MILLER_X) { // error - must not follow after X |
296 | UartReset(); | |
7bc95e2e | 297 | } else { |
298 | Uart.bitCount++; | |
299 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
300 | Uart.state = STATE_MILLER_Z; | |
301 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6; | |
302 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
303 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
304 | Uart.parityBits <<= 1; // make room for the parity bit | |
305 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
306 | Uart.bitCount = 0; | |
307 | Uart.shiftReg = 0; | |
6a1f2d82 | 308 | if((Uart.len&0x0007) == 0) { // every 8 data bytes |
309 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
310 | Uart.parityBits = 0; | |
311 | } | |
15c4dc5a | 312 | } |
7bc95e2e | 313 | } |
d7aa3739 | 314 | } |
315 | } else { | |
0ec548dc | 316 | if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1" |
7bc95e2e | 317 | Uart.bitCount++; |
318 | Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg | |
319 | Uart.state = STATE_MILLER_X; | |
320 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2; | |
321 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
322 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
323 | Uart.parityBits <<= 1; // make room for the new parity bit | |
324 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
325 | Uart.bitCount = 0; | |
326 | Uart.shiftReg = 0; | |
6a1f2d82 | 327 | if ((Uart.len&0x0007) == 0) { // every 8 data bytes |
328 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
329 | Uart.parityBits = 0; | |
330 | } | |
7bc95e2e | 331 | } |
d7aa3739 | 332 | } else { // no modulation in both halves - Sequence Y |
7bc95e2e | 333 | if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication |
15c4dc5a | 334 | Uart.state = STATE_UNSYNCD; |
6a1f2d82 | 335 | Uart.bitCount--; // last "0" was part of EOC sequence |
336 | Uart.shiftReg <<= 1; // drop it | |
337 | if(Uart.bitCount > 0) { // if we decoded some bits | |
338 | Uart.shiftReg >>= (9 - Uart.bitCount); // right align them | |
339 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output | |
340 | Uart.parityBits <<= 1; // add a (void) parity bit | |
341 | Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits | |
342 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it | |
343 | return TRUE; | |
344 | } else if (Uart.len & 0x0007) { // there are some parity bits to store | |
345 | Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits | |
346 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them | |
52bfb955 | 347 | } |
348 | if (Uart.len) { | |
6a1f2d82 | 349 | return TRUE; // we are finished with decoding the raw data sequence |
52bfb955 | 350 | } else { |
0c8d25eb | 351 | UartReset(); // Nothing received - start over |
7bc95e2e | 352 | } |
15c4dc5a | 353 | } |
7bc95e2e | 354 | if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC |
355 | UartReset(); | |
7bc95e2e | 356 | } else { // a logic "0" |
357 | Uart.bitCount++; | |
358 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
359 | Uart.state = STATE_MILLER_Y; | |
360 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
361 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
362 | Uart.parityBits <<= 1; // make room for the parity bit | |
363 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
364 | Uart.bitCount = 0; | |
365 | Uart.shiftReg = 0; | |
6a1f2d82 | 366 | if ((Uart.len&0x0007) == 0) { // every 8 data bytes |
367 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
368 | Uart.parityBits = 0; | |
369 | } | |
15c4dc5a | 370 | } |
371 | } | |
d7aa3739 | 372 | } |
15c4dc5a | 373 | } |
7bc95e2e | 374 | |
375 | } | |
15c4dc5a | 376 | |
7bc95e2e | 377 | return FALSE; // not finished yet, need more data |
15c4dc5a | 378 | } |
379 | ||
7bc95e2e | 380 | |
381 | ||
15c4dc5a | 382 | //============================================================================= |
e691fc45 | 383 | // ISO 14443 Type A - Manchester decoder |
15c4dc5a | 384 | //============================================================================= |
e691fc45 | 385 | // Basics: |
7bc95e2e | 386 | // This decoder is used when the PM3 acts as a reader. |
e691fc45 | 387 | // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage |
388 | // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following: | |
389 | // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ....... | |
390 | // The Manchester decoder needs to identify the following sequences: | |
391 | // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication") | |
392 | // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0 | |
393 | // 8 ticks unmodulated: Sequence F = end of communication | |
394 | // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D | |
7bc95e2e | 395 | // Note 1: the bitstream may start at any time. We therefore need to sync. |
e691fc45 | 396 | // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only) |
b62a5a84 | 397 | static tDemod Demod; |
15c4dc5a | 398 | |
d7aa3739 | 399 | // Lookup-Table to decide if 4 raw bits are a modulation. |
d714d3ef | 400 | // We accept three or four "1" in any position |
7bc95e2e | 401 | const bool Mod_Manchester_LUT[] = { |
d7aa3739 | 402 | FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE, |
d714d3ef | 403 | FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE |
7bc95e2e | 404 | }; |
405 | ||
406 | #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4]) | |
407 | #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)]) | |
15c4dc5a | 408 | |
2f2d9fc5 | 409 | |
7bc95e2e | 410 | void DemodReset() |
e691fc45 | 411 | { |
7bc95e2e | 412 | Demod.state = DEMOD_UNSYNCD; |
413 | Demod.len = 0; // number of decoded data bytes | |
6a1f2d82 | 414 | Demod.parityLen = 0; |
7bc95e2e | 415 | Demod.shiftReg = 0; // shiftreg to hold decoded data bits |
416 | Demod.parityBits = 0; // | |
417 | Demod.collisionPos = 0; // Position of collision bit | |
418 | Demod.twoBits = 0xffff; // buffer for 2 Bits | |
419 | Demod.highCnt = 0; | |
420 | Demod.startTime = 0; | |
421 | Demod.endTime = 0; | |
46c65fed | 422 | |
423 | // | |
424 | Demod.bitCount = 0; | |
425 | Demod.syncBit = 0xFFFF; | |
426 | Demod.samples = 0; | |
e691fc45 | 427 | } |
15c4dc5a | 428 | |
6a1f2d82 | 429 | void DemodInit(uint8_t *data, uint8_t *parity) |
430 | { | |
431 | Demod.output = data; | |
432 | Demod.parity = parity; | |
433 | DemodReset(); | |
434 | } | |
435 | ||
7bc95e2e | 436 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
437 | static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time) | |
e691fc45 | 438 | { |
7bc95e2e | 439 | |
440 | Demod.twoBits = (Demod.twoBits << 8) | bit; | |
e691fc45 | 441 | |
7bc95e2e | 442 | if (Demod.state == DEMOD_UNSYNCD) { |
443 | ||
444 | if (Demod.highCnt < 2) { // wait for a stable unmodulated signal | |
445 | if (Demod.twoBits == 0x0000) { | |
446 | Demod.highCnt++; | |
447 | } else { | |
448 | Demod.highCnt = 0; | |
449 | } | |
450 | } else { | |
451 | Demod.syncBit = 0xFFFF; // not set | |
452 | if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7; | |
453 | else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6; | |
454 | else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5; | |
455 | else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4; | |
456 | else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3; | |
457 | else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2; | |
458 | else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1; | |
459 | else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0; | |
d7aa3739 | 460 | if (Demod.syncBit != 0xFFFF) { |
7bc95e2e | 461 | Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); |
462 | Demod.startTime -= Demod.syncBit; | |
463 | Demod.bitCount = offset; // number of decoded data bits | |
e691fc45 | 464 | Demod.state = DEMOD_MANCHESTER_DATA; |
2f2d9fc5 | 465 | } |
7bc95e2e | 466 | } |
15c4dc5a | 467 | |
7bc95e2e | 468 | } else { |
15c4dc5a | 469 | |
7bc95e2e | 470 | if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half |
471 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision | |
e691fc45 | 472 | if (!Demod.collisionPos) { |
473 | Demod.collisionPos = (Demod.len << 3) + Demod.bitCount; | |
474 | } | |
475 | } // modulation in first half only - Sequence D = 1 | |
7bc95e2e | 476 | Demod.bitCount++; |
477 | Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg | |
478 | if(Demod.bitCount == 9) { // if we decoded a full byte (including parity) | |
e691fc45 | 479 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 480 | Demod.parityBits <<= 1; // make room for the parity bit |
e691fc45 | 481 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
482 | Demod.bitCount = 0; | |
483 | Demod.shiftReg = 0; | |
6a1f2d82 | 484 | if((Demod.len&0x0007) == 0) { // every 8 data bytes |
485 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits | |
486 | Demod.parityBits = 0; | |
487 | } | |
15c4dc5a | 488 | } |
7bc95e2e | 489 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4; |
490 | } else { // no modulation in first half | |
491 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0 | |
e691fc45 | 492 | Demod.bitCount++; |
7bc95e2e | 493 | Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg |
e691fc45 | 494 | if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity) |
e691fc45 | 495 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 496 | Demod.parityBits <<= 1; // make room for the new parity bit |
e691fc45 | 497 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
498 | Demod.bitCount = 0; | |
499 | Demod.shiftReg = 0; | |
6a1f2d82 | 500 | if ((Demod.len&0x0007) == 0) { // every 8 data bytes |
501 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1 | |
502 | Demod.parityBits = 0; | |
503 | } | |
15c4dc5a | 504 | } |
7bc95e2e | 505 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1); |
e691fc45 | 506 | } else { // no modulation in both halves - End of communication |
6a1f2d82 | 507 | if(Demod.bitCount > 0) { // there are some remaining data bits |
508 | Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits | |
509 | Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output | |
510 | Demod.parityBits <<= 1; // add a (void) parity bit | |
511 | Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits | |
512 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
513 | return TRUE; | |
514 | } else if (Demod.len & 0x0007) { // there are some parity bits to store | |
515 | Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits | |
516 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
52bfb955 | 517 | } |
518 | if (Demod.len) { | |
d7aa3739 | 519 | return TRUE; // we are finished with decoding the raw data sequence |
520 | } else { // nothing received. Start over | |
521 | DemodReset(); | |
e691fc45 | 522 | } |
15c4dc5a | 523 | } |
7bc95e2e | 524 | } |
e691fc45 | 525 | } |
e691fc45 | 526 | return FALSE; // not finished yet, need more data |
15c4dc5a | 527 | } |
528 | ||
529 | //============================================================================= | |
530 | // Finally, a `sniffer' for ISO 14443 Type A | |
531 | // Both sides of communication! | |
532 | //============================================================================= | |
533 | ||
534 | //----------------------------------------------------------------------------- | |
535 | // Record the sequence of commands sent by the reader to the tag, with | |
536 | // triggering so that we start recording at the point that the tag is moved | |
537 | // near the reader. | |
538 | //----------------------------------------------------------------------------- | |
d26849d4 | 539 | void RAMFUNC SniffIso14443a(uint8_t param) { |
5cd9ec01 M |
540 | // param: |
541 | // bit 0 - trigger from first card answer | |
542 | // bit 1 - trigger from first reader 7-bit request | |
5cd9ec01 | 543 | LEDsoff(); |
5cd9ec01 | 544 | |
99cf19d9 | 545 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); |
7bc95e2e | 546 | |
f71f4deb | 547 | // Allocate memory from BigBuf for some buffers |
548 | // free all previous allocations first | |
549 | BigBuf_free(); | |
7838f4be | 550 | |
551 | // init trace buffer | |
552 | clear_trace(); | |
553 | set_tracing(TRUE); | |
554 | ||
5cd9ec01 | 555 | // The command (reader -> tag) that we're receiving. |
f71f4deb | 556 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); |
557 | uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE); | |
6a1f2d82 | 558 | |
5cd9ec01 | 559 | // The response (tag -> reader) that we're receiving. |
f71f4deb | 560 | uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE); |
561 | uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE); | |
5cd9ec01 M |
562 | |
563 | // The DMA buffer, used to stream samples from the FPGA | |
f71f4deb | 564 | uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE); |
565 | ||
7bc95e2e | 566 | uint8_t *data = dmaBuf; |
567 | uint8_t previous_data = 0; | |
5cd9ec01 M |
568 | int maxDataLen = 0; |
569 | int dataLen = 0; | |
7bc95e2e | 570 | bool TagIsActive = FALSE; |
571 | bool ReaderIsActive = FALSE; | |
572 | ||
5cd9ec01 | 573 | // Set up the demodulator for tag -> reader responses. |
6a1f2d82 | 574 | DemodInit(receivedResponse, receivedResponsePar); |
575 | ||
5cd9ec01 | 576 | // Set up the demodulator for the reader -> tag commands |
6a1f2d82 | 577 | UartInit(receivedCmd, receivedCmdPar); |
578 | ||
7bc95e2e | 579 | // Setup and start DMA. |
5cd9ec01 | 580 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); |
7bc95e2e | 581 | |
99cf19d9 | 582 | // We won't start recording the frames that we acquire until we trigger; |
583 | // a good trigger condition to get started is probably when we see a | |
584 | // response from the tag. | |
585 | // triggered == FALSE -- to wait first for card | |
586 | bool triggered = !(param & 0x03); | |
587 | ||
5cd9ec01 | 588 | // And now we loop, receiving samples. |
7bc95e2e | 589 | for(uint32_t rsamples = 0; TRUE; ) { |
590 | ||
5cd9ec01 M |
591 | if(BUTTON_PRESS()) { |
592 | DbpString("cancelled by button"); | |
7bc95e2e | 593 | break; |
5cd9ec01 | 594 | } |
15c4dc5a | 595 | |
5cd9ec01 M |
596 | LED_A_ON(); |
597 | WDT_HIT(); | |
15c4dc5a | 598 | |
5cd9ec01 M |
599 | int register readBufDataP = data - dmaBuf; |
600 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; | |
601 | if (readBufDataP <= dmaBufDataP){ | |
602 | dataLen = dmaBufDataP - readBufDataP; | |
603 | } else { | |
7bc95e2e | 604 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; |
5cd9ec01 M |
605 | } |
606 | // test for length of buffer | |
607 | if(dataLen > maxDataLen) { | |
608 | maxDataLen = dataLen; | |
f71f4deb | 609 | if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) { |
7bc95e2e | 610 | Dbprintf("blew circular buffer! dataLen=%d", dataLen); |
611 | break; | |
5cd9ec01 M |
612 | } |
613 | } | |
614 | if(dataLen < 1) continue; | |
615 | ||
616 | // primary buffer was stopped( <-- we lost data! | |
617 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { | |
618 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
619 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
7bc95e2e | 620 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
621 | } |
622 | // secondary buffer sets as primary, secondary buffer was stopped | |
623 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
624 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
625 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; | |
626 | } | |
627 | ||
628 | LED_A_OFF(); | |
7bc95e2e | 629 | |
630 | if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder | |
3be2a5ae | 631 | |
7bc95e2e | 632 | if(!TagIsActive) { // no need to try decoding reader data if the tag is sending |
633 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); | |
634 | if (MillerDecoding(readerdata, (rsamples-1)*4)) { | |
635 | LED_C_ON(); | |
5cd9ec01 | 636 | |
7bc95e2e | 637 | // check - if there is a short 7bit request from reader |
638 | if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE; | |
5cd9ec01 | 639 | |
7bc95e2e | 640 | if(triggered) { |
6a1f2d82 | 641 | if (!LogTrace(receivedCmd, |
642 | Uart.len, | |
643 | Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
644 | Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
645 | Uart.parity, | |
646 | TRUE)) break; | |
7bc95e2e | 647 | } |
648 | /* And ready to receive another command. */ | |
649 | UartReset(); | |
650 | /* And also reset the demod code, which might have been */ | |
651 | /* false-triggered by the commands from the reader. */ | |
652 | DemodReset(); | |
653 | LED_B_OFF(); | |
654 | } | |
655 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
5cd9ec01 | 656 | } |
3be2a5ae | 657 | |
7bc95e2e | 658 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time |
659 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); | |
660 | if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) { | |
661 | LED_B_ON(); | |
5cd9ec01 | 662 | |
6a1f2d82 | 663 | if (!LogTrace(receivedResponse, |
664 | Demod.len, | |
665 | Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
666 | Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
667 | Demod.parity, | |
668 | FALSE)) break; | |
5cd9ec01 | 669 | |
7bc95e2e | 670 | if ((!triggered) && (param & 0x01)) triggered = TRUE; |
5cd9ec01 | 671 | |
7bc95e2e | 672 | // And ready to receive another response. |
673 | DemodReset(); | |
0ec548dc | 674 | // And reset the Miller decoder including itS (now outdated) input buffer |
675 | UartInit(receivedCmd, receivedCmdPar); | |
676 | ||
7bc95e2e | 677 | LED_C_OFF(); |
678 | } | |
679 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
680 | } | |
5cd9ec01 M |
681 | } |
682 | ||
7bc95e2e | 683 | previous_data = *data; |
684 | rsamples++; | |
5cd9ec01 | 685 | data++; |
d714d3ef | 686 | if(data == dmaBuf + DMA_BUFFER_SIZE) { |
5cd9ec01 M |
687 | data = dmaBuf; |
688 | } | |
689 | } // main cycle | |
690 | ||
7bc95e2e | 691 | FpgaDisableSscDma(); |
7838f4be | 692 | LEDsoff(); |
693 | ||
7bc95e2e | 694 | Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len); |
3000dc4e | 695 | Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]); |
5ee53a0e | 696 | |
697 | set_tracing(FALSE); | |
15c4dc5a | 698 | } |
699 | ||
15c4dc5a | 700 | //----------------------------------------------------------------------------- |
701 | // Prepare tag messages | |
702 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 703 | static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity) |
15c4dc5a | 704 | { |
8f51ddb0 | 705 | ToSendReset(); |
15c4dc5a | 706 | |
707 | // Correction bit, might be removed when not needed | |
708 | ToSendStuffBit(0); | |
709 | ToSendStuffBit(0); | |
710 | ToSendStuffBit(0); | |
711 | ToSendStuffBit(0); | |
712 | ToSendStuffBit(1); // 1 | |
713 | ToSendStuffBit(0); | |
714 | ToSendStuffBit(0); | |
715 | ToSendStuffBit(0); | |
8f51ddb0 | 716 | |
15c4dc5a | 717 | // Send startbit |
72934aa3 | 718 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 719 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 720 | |
6a1f2d82 | 721 | for(uint16_t i = 0; i < len; i++) { |
8f51ddb0 | 722 | uint8_t b = cmd[i]; |
15c4dc5a | 723 | |
724 | // Data bits | |
6a1f2d82 | 725 | for(uint16_t j = 0; j < 8; j++) { |
15c4dc5a | 726 | if(b & 1) { |
72934aa3 | 727 | ToSend[++ToSendMax] = SEC_D; |
15c4dc5a | 728 | } else { |
72934aa3 | 729 | ToSend[++ToSendMax] = SEC_E; |
8f51ddb0 M |
730 | } |
731 | b >>= 1; | |
732 | } | |
15c4dc5a | 733 | |
0014cb46 | 734 | // Get the parity bit |
6a1f2d82 | 735 | if (parity[i>>3] & (0x80>>(i&0x0007))) { |
8f51ddb0 | 736 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 737 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 738 | } else { |
72934aa3 | 739 | ToSend[++ToSendMax] = SEC_E; |
7bc95e2e | 740 | LastProxToAirDuration = 8 * ToSendMax; |
15c4dc5a | 741 | } |
8f51ddb0 | 742 | } |
15c4dc5a | 743 | |
8f51ddb0 M |
744 | // Send stopbit |
745 | ToSend[++ToSendMax] = SEC_F; | |
15c4dc5a | 746 | |
8f51ddb0 M |
747 | // Convert from last byte pos to length |
748 | ToSendMax++; | |
8f51ddb0 M |
749 | } |
750 | ||
6a1f2d82 | 751 | static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len) |
752 | { | |
7504dc50 | 753 | uint8_t par[MAX_PARITY_SIZE] = {0}; |
6a1f2d82 | 754 | |
755 | GetParity(cmd, len, par); | |
756 | CodeIso14443aAsTagPar(cmd, len, par); | |
15c4dc5a | 757 | } |
758 | ||
15c4dc5a | 759 | |
8f51ddb0 M |
760 | static void Code4bitAnswerAsTag(uint8_t cmd) |
761 | { | |
762 | int i; | |
763 | ||
5f6d6c90 | 764 | ToSendReset(); |
8f51ddb0 M |
765 | |
766 | // Correction bit, might be removed when not needed | |
767 | ToSendStuffBit(0); | |
768 | ToSendStuffBit(0); | |
769 | ToSendStuffBit(0); | |
770 | ToSendStuffBit(0); | |
771 | ToSendStuffBit(1); // 1 | |
772 | ToSendStuffBit(0); | |
773 | ToSendStuffBit(0); | |
774 | ToSendStuffBit(0); | |
775 | ||
776 | // Send startbit | |
777 | ToSend[++ToSendMax] = SEC_D; | |
778 | ||
779 | uint8_t b = cmd; | |
780 | for(i = 0; i < 4; i++) { | |
781 | if(b & 1) { | |
782 | ToSend[++ToSendMax] = SEC_D; | |
7bc95e2e | 783 | LastProxToAirDuration = 8 * ToSendMax - 4; |
8f51ddb0 M |
784 | } else { |
785 | ToSend[++ToSendMax] = SEC_E; | |
7bc95e2e | 786 | LastProxToAirDuration = 8 * ToSendMax; |
8f51ddb0 M |
787 | } |
788 | b >>= 1; | |
789 | } | |
790 | ||
791 | // Send stopbit | |
792 | ToSend[++ToSendMax] = SEC_F; | |
793 | ||
5f6d6c90 | 794 | // Convert from last byte pos to length |
795 | ToSendMax++; | |
15c4dc5a | 796 | } |
797 | ||
798 | //----------------------------------------------------------------------------- | |
799 | // Wait for commands from reader | |
800 | // Stop when button is pressed | |
801 | // Or return TRUE when command is captured | |
802 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 803 | static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len) |
15c4dc5a | 804 | { |
805 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
806 | // only, since we are receiving, not transmitting). | |
807 | // Signal field is off with the appropriate LED | |
808 | LED_D_OFF(); | |
809 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
810 | ||
811 | // Now run a `software UART' on the stream of incoming samples. | |
6a1f2d82 | 812 | UartInit(received, parity); |
7bc95e2e | 813 | |
814 | // clear RXRDY: | |
815 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
15c4dc5a | 816 | |
817 | for(;;) { | |
818 | WDT_HIT(); | |
819 | ||
820 | if(BUTTON_PRESS()) return FALSE; | |
7bc95e2e | 821 | |
15c4dc5a | 822 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
7bc95e2e | 823 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
824 | if(MillerDecoding(b, 0)) { | |
825 | *len = Uart.len; | |
15c4dc5a | 826 | return TRUE; |
827 | } | |
7bc95e2e | 828 | } |
15c4dc5a | 829 | } |
830 | } | |
28afbd2b | 831 | |
6a1f2d82 | 832 | static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded); |
7bc95e2e | 833 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded); |
28afbd2b | 834 | int EmSend4bit(uint8_t resp); |
6a1f2d82 | 835 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par); |
836 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded); | |
837 | int EmSendCmd(uint8_t *resp, uint16_t respLen); | |
838 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par); | |
839 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, | |
840 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity); | |
15c4dc5a | 841 | |
117d9ec2 | 842 | static uint8_t* free_buffer_pointer; |
ce02f6f9 | 843 | |
844 | typedef struct { | |
845 | uint8_t* response; | |
846 | size_t response_n; | |
847 | uint8_t* modulation; | |
848 | size_t modulation_n; | |
7bc95e2e | 849 | uint32_t ProxToAirDuration; |
ce02f6f9 | 850 | } tag_response_info_t; |
851 | ||
ce02f6f9 | 852 | bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) { |
7bc95e2e | 853 | // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes |
ce02f6f9 | 854 | // This will need the following byte array for a modulation sequence |
855 | // 144 data bits (18 * 8) | |
856 | // 18 parity bits | |
857 | // 2 Start and stop | |
858 | // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA) | |
859 | // 1 just for the case | |
860 | // ----------- + | |
861 | // 166 bytes, since every bit that needs to be send costs us a byte | |
862 | // | |
f71f4deb | 863 | |
864 | ||
ce02f6f9 | 865 | // Prepare the tag modulation bits from the message |
866 | CodeIso14443aAsTag(response_info->response,response_info->response_n); | |
867 | ||
868 | // Make sure we do not exceed the free buffer space | |
869 | if (ToSendMax > max_buffer_size) { | |
870 | Dbprintf("Out of memory, when modulating bits for tag answer:"); | |
871 | Dbhexdump(response_info->response_n,response_info->response,false); | |
872 | return false; | |
873 | } | |
874 | ||
875 | // Copy the byte array, used for this modulation to the buffer position | |
876 | memcpy(response_info->modulation,ToSend,ToSendMax); | |
877 | ||
7bc95e2e | 878 | // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them |
ce02f6f9 | 879 | response_info->modulation_n = ToSendMax; |
7bc95e2e | 880 | response_info->ProxToAirDuration = LastProxToAirDuration; |
ce02f6f9 | 881 | |
882 | return true; | |
883 | } | |
884 | ||
f71f4deb | 885 | |
886 | // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit. | |
887 | // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction) | |
888 | // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits | |
889 | // -> need 273 bytes buffer | |
c9216a92 | 890 | // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370 |
891 | // 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits | |
892 | #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453 | |
f71f4deb | 893 | |
ce02f6f9 | 894 | bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) { |
895 | // Retrieve and store the current buffer index | |
896 | response_info->modulation = free_buffer_pointer; | |
897 | ||
898 | // Determine the maximum size we can use from our buffer | |
f71f4deb | 899 | size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE; |
ce02f6f9 | 900 | |
901 | // Forward the prepare tag modulation function to the inner function | |
f71f4deb | 902 | if (prepare_tag_modulation(response_info, max_buffer_size)) { |
ce02f6f9 | 903 | // Update the free buffer offset |
904 | free_buffer_pointer += ToSendMax; | |
905 | return true; | |
906 | } else { | |
907 | return false; | |
908 | } | |
909 | } | |
910 | ||
15c4dc5a | 911 | //----------------------------------------------------------------------------- |
912 | // Main loop of simulated tag: receive commands from reader, decide what | |
913 | // response to send, and send it. | |
914 | //----------------------------------------------------------------------------- | |
0db6ed9a | 915 | void SimulateIso14443aTag(int tagType, int flags, byte_t* data) |
15c4dc5a | 916 | { |
a126332a | 917 | uint32_t counters[] = {0,0,0}; |
d26849d4 | 918 | //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2 |
919 | // This can be used in a reader-only attack. | |
920 | // (it can also be retrieved via 'hf 14a list', but hey... | |
921 | uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0}; | |
922 | uint8_t ar_nr_collected = 0; | |
923 | ||
81cd0474 | 924 | uint8_t sak; |
32719adf | 925 | |
926 | // PACK response to PWD AUTH for EV1/NTAG | |
e98572a1 | 927 | uint8_t response8[4] = {0,0,0,0}; |
32719adf | 928 | |
81cd0474 | 929 | // The first response contains the ATQA (note: bytes are transmitted in reverse order). |
e98572a1 | 930 | uint8_t response1[2] = {0,0}; |
81cd0474 | 931 | |
932 | switch (tagType) { | |
933 | case 1: { // MIFARE Classic | |
934 | // Says: I am Mifare 1k - original line | |
935 | response1[0] = 0x04; | |
936 | response1[1] = 0x00; | |
937 | sak = 0x08; | |
938 | } break; | |
939 | case 2: { // MIFARE Ultralight | |
940 | // Says: I am a stupid memory tag, no crypto | |
32719adf | 941 | response1[0] = 0x44; |
81cd0474 | 942 | response1[1] = 0x00; |
943 | sak = 0x00; | |
944 | } break; | |
945 | case 3: { // MIFARE DESFire | |
946 | // Says: I am a DESFire tag, ph33r me | |
947 | response1[0] = 0x04; | |
948 | response1[1] = 0x03; | |
949 | sak = 0x20; | |
950 | } break; | |
951 | case 4: { // ISO/IEC 14443-4 | |
952 | // Says: I am a javacard (JCOP) | |
953 | response1[0] = 0x04; | |
954 | response1[1] = 0x00; | |
955 | sak = 0x28; | |
956 | } break; | |
3fe4ff4f | 957 | case 5: { // MIFARE TNP3XXX |
958 | // Says: I am a toy | |
959 | response1[0] = 0x01; | |
960 | response1[1] = 0x0f; | |
961 | sak = 0x01; | |
d26849d4 | 962 | } break; |
963 | case 6: { // MIFARE Mini | |
964 | // Says: I am a Mifare Mini, 320b | |
965 | response1[0] = 0x44; | |
966 | response1[1] = 0x00; | |
967 | sak = 0x09; | |
968 | } break; | |
32719adf | 969 | case 7: { // NTAG? |
970 | // Says: I am a NTAG, | |
971 | response1[0] = 0x44; | |
972 | response1[1] = 0x00; | |
973 | sak = 0x00; | |
974 | // PACK | |
975 | response8[0] = 0x80; | |
976 | response8[1] = 0x80; | |
977 | ComputeCrc14443(CRC_14443_A, response8, 2, &response8[2], &response8[3]); | |
2b1f4228 | 978 | // uid not supplied then get from emulator memory |
979 | if (data[0]==0) { | |
980 | uint16_t start = 4 * (0+12); | |
981 | uint8_t emdata[8]; | |
982 | emlGetMemBt( emdata, start, sizeof(emdata)); | |
983 | memcpy(data, emdata, 3); //uid bytes 0-2 | |
984 | memcpy(data+3, emdata+4, 4); //uid bytes 3-7 | |
985 | flags |= FLAG_7B_UID_IN_DATA; | |
986 | } | |
32719adf | 987 | } break; |
81cd0474 | 988 | default: { |
989 | Dbprintf("Error: unkown tagtype (%d)",tagType); | |
990 | return; | |
991 | } break; | |
992 | } | |
993 | ||
994 | // The second response contains the (mandatory) first 24 bits of the UID | |
c8b6da22 | 995 | uint8_t response2[5] = {0x00}; |
81cd0474 | 996 | |
997 | // Check if the uid uses the (optional) part | |
c8b6da22 | 998 | uint8_t response2a[5] = {0x00}; |
999 | ||
d26849d4 | 1000 | if (flags & FLAG_7B_UID_IN_DATA) { |
81cd0474 | 1001 | response2[0] = 0x88; |
d26849d4 | 1002 | response2[1] = data[0]; |
1003 | response2[2] = data[1]; | |
1004 | response2[3] = data[2]; | |
1005 | ||
1006 | response2a[0] = data[3]; | |
1007 | response2a[1] = data[4]; | |
1008 | response2a[2] = data[5]; | |
c3c241f3 | 1009 | response2a[3] = data[6]; //?? |
81cd0474 | 1010 | response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3]; |
1011 | ||
1012 | // Configure the ATQA and SAK accordingly | |
1013 | response1[0] |= 0x40; | |
1014 | sak |= 0x04; | |
1015 | } else { | |
d26849d4 | 1016 | memcpy(response2, data, 4); |
1017 | //num_to_bytes(uid_1st,4,response2); | |
81cd0474 | 1018 | // Configure the ATQA and SAK accordingly |
1019 | response1[0] &= 0xBF; | |
1020 | sak &= 0xFB; | |
1021 | } | |
1022 | ||
1023 | // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID. | |
1024 | response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3]; | |
1025 | ||
1026 | // Prepare the mandatory SAK (for 4 and 7 byte UID) | |
c8b6da22 | 1027 | uint8_t response3[3] = {0x00}; |
81cd0474 | 1028 | response3[0] = sak; |
1029 | ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]); | |
1030 | ||
1031 | // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit | |
c8b6da22 | 1032 | uint8_t response3a[3] = {0x00}; |
81cd0474 | 1033 | response3a[0] = sak & 0xFB; |
1034 | ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]); | |
1035 | ||
0de8e387 | 1036 | uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce |
6a1f2d82 | 1037 | uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS: |
1038 | // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present, | |
1039 | // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1 | |
1040 | // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us) | |
1041 | // TC(1) = 0x02: CID supported, NAD not supported | |
ce02f6f9 | 1042 | ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]); |
1043 | ||
2b1f4228 | 1044 | // Prepare GET_VERSION (different for UL EV-1 / NTAG) |
32719adf | 1045 | //uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION. |
2b1f4228 | 1046 | //uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215 |
32719adf | 1047 | |
c9216a92 | 1048 | // Prepare CHK_TEARING |
2b1f4228 | 1049 | //uint8_t response9[] = {0xBD,0x90,0x3f}; |
c9216a92 | 1050 | |
1051 | #define TAG_RESPONSE_COUNT 10 | |
7bc95e2e | 1052 | tag_response_info_t responses[TAG_RESPONSE_COUNT] = { |
1053 | { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type | |
1054 | { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid | |
1055 | { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked | |
1056 | { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1 | |
1057 | { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2 | |
1058 | { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce) | |
1059 | { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS | |
4c0cf2d2 | 1060 | |
495d7f13 | 1061 | { .response = response8, .response_n = sizeof(response8) } // EV1/NTAG PACK response |
4c0cf2d2 | 1062 | }; |
1063 | //{ .response = response7_NTAG, .response_n = sizeof(response7_NTAG)}, // EV1/NTAG GET_VERSION response | |
2b1f4228 | 1064 | //{ .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response |
4c0cf2d2 | 1065 | |
7bc95e2e | 1066 | |
1067 | // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it | |
1068 | // Such a response is less time critical, so we can prepare them on the fly | |
1069 | #define DYNAMIC_RESPONSE_BUFFER_SIZE 64 | |
1070 | #define DYNAMIC_MODULATION_BUFFER_SIZE 512 | |
1071 | uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE]; | |
1072 | uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE]; | |
1073 | tag_response_info_t dynamic_response_info = { | |
1074 | .response = dynamic_response_buffer, | |
1075 | .response_n = 0, | |
1076 | .modulation = dynamic_modulation_buffer, | |
1077 | .modulation_n = 0 | |
1078 | }; | |
ce02f6f9 | 1079 | |
99cf19d9 | 1080 | // We need to listen to the high-frequency, peak-detected path. |
1081 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1082 | ||
f71f4deb | 1083 | BigBuf_free_keep_EM(); |
1084 | ||
1085 | // allocate buffers: | |
1086 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); | |
1087 | uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE); | |
1088 | free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE); | |
1089 | ||
1090 | // clear trace | |
3000dc4e MHS |
1091 | clear_trace(); |
1092 | set_tracing(TRUE); | |
f71f4deb | 1093 | |
7bc95e2e | 1094 | // Prepare the responses of the anticollision phase |
ce02f6f9 | 1095 | // there will be not enough time to do this at the moment the reader sends it REQA |
495d7f13 | 1096 | for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) |
7bc95e2e | 1097 | prepare_allocated_tag_modulation(&responses[i]); |
15c4dc5a | 1098 | |
7bc95e2e | 1099 | int len = 0; |
15c4dc5a | 1100 | |
1101 | // To control where we are in the protocol | |
1102 | int order = 0; | |
1103 | int lastorder; | |
1104 | ||
1105 | // Just to allow some checks | |
1106 | int happened = 0; | |
1107 | int happened2 = 0; | |
81cd0474 | 1108 | int cmdsRecvd = 0; |
15c4dc5a | 1109 | |
254b70a4 | 1110 | cmdsRecvd = 0; |
7bc95e2e | 1111 | tag_response_info_t* p_response; |
15c4dc5a | 1112 | |
254b70a4 | 1113 | LED_A_ON(); |
1114 | for(;;) { | |
4c0cf2d2 | 1115 | |
1116 | WDT_HIT(); | |
1117 | ||
7bc95e2e | 1118 | // Clean receive command buffer |
6a1f2d82 | 1119 | if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) { |
ce02f6f9 | 1120 | DbpString("Button press"); |
254b70a4 | 1121 | break; |
1122 | } | |
7bc95e2e | 1123 | |
1124 | p_response = NULL; | |
1125 | ||
254b70a4 | 1126 | // Okay, look at the command now. |
1127 | lastorder = order; | |
1128 | if(receivedCmd[0] == 0x26) { // Received a REQUEST | |
ce02f6f9 | 1129 | p_response = &responses[0]; order = 1; |
254b70a4 | 1130 | } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP |
ce02f6f9 | 1131 | p_response = &responses[0]; order = 6; |
254b70a4 | 1132 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1) |
ce02f6f9 | 1133 | p_response = &responses[1]; order = 2; |
6a1f2d82 | 1134 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2) |
ce02f6f9 | 1135 | p_response = &responses[2]; order = 20; |
254b70a4 | 1136 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1) |
ce02f6f9 | 1137 | p_response = &responses[3]; order = 3; |
254b70a4 | 1138 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2) |
ce02f6f9 | 1139 | p_response = &responses[4]; order = 30; |
254b70a4 | 1140 | } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ |
32719adf | 1141 | uint8_t block = receivedCmd[1]; |
2b1f4228 | 1142 | // if Ultralight or NTAG (4 byte blocks) |
1143 | if ( tagType == 7 || tagType == 2 ) { | |
1144 | //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature] | |
1145 | uint16_t start = 4 * (block+12); | |
5e428463 | 1146 | uint8_t emdata[MAX_MIFARE_FRAME_SIZE]; |
1147 | emlGetMemBt( emdata, start, 16); | |
1148 | AppendCrc14443a(emdata, 16); | |
1149 | EmSendCmdEx(emdata, sizeof(emdata), false); | |
2b1f4228 | 1150 | // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below |
32719adf | 1151 | p_response = NULL; |
2b1f4228 | 1152 | } else { // all other tags (16 byte block tags) |
1153 | EmSendCmdEx(data+(4*receivedCmd[1]),16,false); | |
32719adf | 1154 | // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]); |
1155 | // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below | |
1156 | p_response = NULL; | |
1157 | } | |
a126332a | 1158 | } else if(receivedCmd[0] == 0x3A) { // Received a FAST READ (ranged read) |
5e428463 | 1159 | |
1160 | uint8_t emdata[MAX_FRAME_SIZE]; | |
2b1f4228 | 1161 | //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature] |
1162 | int start = (receivedCmd[1]+12) * 4; | |
ce3d6bd2 | 1163 | int len = (receivedCmd[2] - receivedCmd[1] + 1) * 4; |
5e428463 | 1164 | emlGetMemBt( emdata, start, len); |
1165 | AppendCrc14443a(emdata, len); | |
1166 | EmSendCmdEx(emdata, len+2, false); | |
1167 | p_response = NULL; | |
1168 | ||
839a53ae | 1169 | } else if(receivedCmd[0] == 0x3C && tagType == 7) { // Received a READ SIGNATURE -- |
2b1f4228 | 1170 | //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature] |
1171 | uint16_t start = 4 * 4; | |
1172 | uint8_t emdata[34]; | |
1173 | emlGetMemBt( emdata, start, 32); | |
1174 | AppendCrc14443a(emdata, 32); | |
1175 | EmSendCmdEx(emdata, sizeof(emdata), false); | |
839a53ae | 1176 | p_response = NULL; |
a126332a | 1177 | } else if (receivedCmd[0] == 0x39 && tagType == 7) { // Received a READ COUNTER -- |
e9a92fe2 | 1178 | uint8_t index = receivedCmd[1]; |
a126332a | 1179 | uint8_t data[] = {0x00,0x00,0x00,0x14,0xa5}; |
e9a92fe2 | 1180 | if ( counters[index] > 0) { |
1181 | num_to_bytes(counters[index], 3, data); | |
1182 | AppendCrc14443a(data, sizeof(data)-2); | |
1183 | } | |
a126332a | 1184 | EmSendCmdEx(data,sizeof(data),false); |
1185 | p_response = NULL; | |
1186 | } else if (receivedCmd[0] == 0xA5 && tagType == 7) { // Received a INC COUNTER -- | |
ce3d6bd2 | 1187 | // number of counter |
a126332a | 1188 | uint8_t counter = receivedCmd[1]; |
1189 | uint32_t val = bytes_to_num(receivedCmd+2,4); | |
1190 | counters[counter] = val; | |
1191 | ||
ce3d6bd2 | 1192 | // send ACK |
1193 | uint8_t ack[] = {0x0a}; | |
1194 | EmSendCmdEx(ack,sizeof(ack),false); | |
1195 | p_response = NULL; | |
1196 | ||
c9216a92 | 1197 | } else if(receivedCmd[0] == 0x3E && tagType == 7) { // Received a CHECK_TEARING_EVENT -- |
2b1f4228 | 1198 | //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature] |
1199 | uint8_t emdata[3]; | |
1200 | uint8_t counter=0; | |
1201 | if (receivedCmd[1]<3) counter = receivedCmd[1]; | |
1202 | emlGetMemBt( emdata, 10+counter, 1); | |
1203 | AppendCrc14443a(emdata, sizeof(emdata)-2); | |
1204 | EmSendCmdEx(emdata, sizeof(emdata), false); | |
b0300679 | 1205 | p_response = NULL; |
254b70a4 | 1206 | } else if(receivedCmd[0] == 0x50) { // Received a HALT |
810f5379 | 1207 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1208 | p_response = NULL; |
254b70a4 | 1209 | } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request |
32719adf | 1210 | |
1211 | if ( tagType == 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request. | |
2b1f4228 | 1212 | uint8_t emdata[10]; |
1213 | emlGetMemBt( emdata, 0, 8 ); | |
1214 | AppendCrc14443a(emdata, sizeof(emdata)-2); | |
1215 | EmSendCmdEx(emdata, sizeof(emdata), false); | |
1216 | p_response = NULL; | |
32719adf | 1217 | } else { |
1218 | p_response = &responses[5]; order = 7; | |
1219 | } | |
254b70a4 | 1220 | } else if(receivedCmd[0] == 0xE0) { // Received a RATS request |
7bc95e2e | 1221 | if (tagType == 1 || tagType == 2) { // RATS not supported |
1222 | EmSend4bit(CARD_NACK_NA); | |
1223 | p_response = NULL; | |
1224 | } else { | |
1225 | p_response = &responses[6]; order = 70; | |
1226 | } | |
6a1f2d82 | 1227 | } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication) |
810f5379 | 1228 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
d26849d4 | 1229 | uint32_t nonce = bytes_to_num(response5,4); |
7bc95e2e | 1230 | uint32_t nr = bytes_to_num(receivedCmd,4); |
1231 | uint32_t ar = bytes_to_num(receivedCmd+4,4); | |
d26849d4 | 1232 | //Dbprintf("Auth attempt {nonce}{nr}{ar}: %08x %08x %08x", nonce, nr, ar); |
1233 | ||
1234 | if(flags & FLAG_NR_AR_ATTACK ) | |
1235 | { | |
1236 | if(ar_nr_collected < 2){ | |
1237 | // Avoid duplicates... probably not necessary, nr should vary. | |
1238 | //if(ar_nr_responses[3] != nr){ | |
1239 | ar_nr_responses[ar_nr_collected*5] = 0; | |
1240 | ar_nr_responses[ar_nr_collected*5+1] = 0; | |
1241 | ar_nr_responses[ar_nr_collected*5+2] = nonce; | |
1242 | ar_nr_responses[ar_nr_collected*5+3] = nr; | |
1243 | ar_nr_responses[ar_nr_collected*5+4] = ar; | |
1244 | ar_nr_collected++; | |
1245 | //} | |
1246 | } | |
1247 | ||
1248 | if(ar_nr_collected > 1 ) { | |
1249 | ||
1250 | if (MF_DBGLEVEL >= 2) { | |
1251 | Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:"); | |
1252 | Dbprintf("../tools/mfkey/mfkey32 %07x%08x %08x %08x %08x %08x %08x", | |
1253 | ar_nr_responses[0], // UID1 | |
1254 | ar_nr_responses[1], // UID2 | |
1255 | ar_nr_responses[2], // NT | |
1256 | ar_nr_responses[3], // AR1 | |
1257 | ar_nr_responses[4], // NR1 | |
1258 | ar_nr_responses[8], // AR2 | |
1259 | ar_nr_responses[9] // NR2 | |
1260 | ); | |
7838f4be | 1261 | Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x", |
1262 | ar_nr_responses[0], // UID1 | |
1263 | ar_nr_responses[1], // UID2 | |
1264 | ar_nr_responses[2], // NT1 | |
1265 | ar_nr_responses[3], // AR1 | |
1266 | ar_nr_responses[4], // NR1 | |
1267 | ar_nr_responses[7], // NT2 | |
1268 | ar_nr_responses[8], // AR2 | |
1269 | ar_nr_responses[9] // NR2 | |
1270 | ); | |
d26849d4 | 1271 | } |
1272 | uint8_t len = ar_nr_collected*5*4; | |
1273 | cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,len,0,&ar_nr_responses,len); | |
1274 | ar_nr_collected = 0; | |
1275 | memset(ar_nr_responses, 0x00, len); | |
d26849d4 | 1276 | } |
1277 | } | |
32719adf | 1278 | } else if (receivedCmd[0] == 0x1a ) // ULC authentication |
1279 | { | |
1280 | ||
1281 | } | |
1282 | else if (receivedCmd[0] == 0x1b) // NTAG / EV-1 authentication | |
1283 | { | |
1284 | if ( tagType == 7 ) { | |
2b1f4228 | 1285 | uint16_t start = 13; //first 4 blocks of emu are [getversion answer - check tearing - pack - 0x00] |
1286 | uint8_t emdata[4]; | |
1287 | emlGetMemBt( emdata, start, 2); | |
1288 | AppendCrc14443a(emdata, 2); | |
1289 | EmSendCmdEx(emdata, sizeof(emdata), false); | |
1290 | p_response = NULL; | |
ce3d6bd2 | 1291 | uint32_t pwd = bytes_to_num(receivedCmd+1,4); |
e98572a1 | 1292 | |
1293 | if ( MF_DBGLEVEL >= 3) Dbprintf("Auth attempt: %08x", pwd); | |
32719adf | 1294 | } |
2b1f4228 | 1295 | } else { |
7bc95e2e | 1296 | // Check for ISO 14443A-4 compliant commands, look at left nibble |
1297 | switch (receivedCmd[0]) { | |
7838f4be | 1298 | case 0x02: |
1299 | case 0x03: { // IBlock (command no CID) | |
1300 | dynamic_response_info.response[0] = receivedCmd[0]; | |
1301 | dynamic_response_info.response[1] = 0x90; | |
1302 | dynamic_response_info.response[2] = 0x00; | |
1303 | dynamic_response_info.response_n = 3; | |
1304 | } break; | |
7bc95e2e | 1305 | case 0x0B: |
7838f4be | 1306 | case 0x0A: { // IBlock (command CID) |
7bc95e2e | 1307 | dynamic_response_info.response[0] = receivedCmd[0]; |
1308 | dynamic_response_info.response[1] = 0x00; | |
1309 | dynamic_response_info.response[2] = 0x90; | |
1310 | dynamic_response_info.response[3] = 0x00; | |
1311 | dynamic_response_info.response_n = 4; | |
1312 | } break; | |
1313 | ||
1314 | case 0x1A: | |
1315 | case 0x1B: { // Chaining command | |
1316 | dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1); | |
1317 | dynamic_response_info.response_n = 2; | |
1318 | } break; | |
1319 | ||
1320 | case 0xaa: | |
1321 | case 0xbb: { | |
1322 | dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11; | |
1323 | dynamic_response_info.response_n = 2; | |
1324 | } break; | |
1325 | ||
7838f4be | 1326 | case 0xBA: { // ping / pong |
1327 | dynamic_response_info.response[0] = 0xAB; | |
1328 | dynamic_response_info.response[1] = 0x00; | |
1329 | dynamic_response_info.response_n = 2; | |
7bc95e2e | 1330 | } break; |
1331 | ||
1332 | case 0xCA: | |
1333 | case 0xC2: { // Readers sends deselect command | |
7838f4be | 1334 | dynamic_response_info.response[0] = 0xCA; |
1335 | dynamic_response_info.response[1] = 0x00; | |
1336 | dynamic_response_info.response_n = 2; | |
7bc95e2e | 1337 | } break; |
1338 | ||
1339 | default: { | |
1340 | // Never seen this command before | |
810f5379 | 1341 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1342 | Dbprintf("Received unknown command (len=%d):",len); |
1343 | Dbhexdump(len,receivedCmd,false); | |
1344 | // Do not respond | |
1345 | dynamic_response_info.response_n = 0; | |
1346 | } break; | |
1347 | } | |
ce02f6f9 | 1348 | |
7bc95e2e | 1349 | if (dynamic_response_info.response_n > 0) { |
1350 | // Copy the CID from the reader query | |
1351 | dynamic_response_info.response[1] = receivedCmd[1]; | |
ce02f6f9 | 1352 | |
7bc95e2e | 1353 | // Add CRC bytes, always used in ISO 14443A-4 compliant cards |
1354 | AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n); | |
1355 | dynamic_response_info.response_n += 2; | |
ce02f6f9 | 1356 | |
7bc95e2e | 1357 | if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) { |
1358 | Dbprintf("Error preparing tag response"); | |
810f5379 | 1359 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1360 | break; |
1361 | } | |
1362 | p_response = &dynamic_response_info; | |
1363 | } | |
81cd0474 | 1364 | } |
15c4dc5a | 1365 | |
1366 | // Count number of wakeups received after a halt | |
1367 | if(order == 6 && lastorder == 5) { happened++; } | |
1368 | ||
1369 | // Count number of other messages after a halt | |
1370 | if(order != 6 && lastorder == 5) { happened2++; } | |
1371 | ||
15c4dc5a | 1372 | if(cmdsRecvd > 999) { |
1373 | DbpString("1000 commands later..."); | |
254b70a4 | 1374 | break; |
15c4dc5a | 1375 | } |
ce02f6f9 | 1376 | cmdsRecvd++; |
1377 | ||
1378 | if (p_response != NULL) { | |
7bc95e2e | 1379 | EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52); |
1380 | // do the tracing for the previous reader request and this tag answer: | |
810f5379 | 1381 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; |
6a1f2d82 | 1382 | GetParity(p_response->response, p_response->response_n, par); |
3fe4ff4f | 1383 | |
7bc95e2e | 1384 | EmLogTrace(Uart.output, |
1385 | Uart.len, | |
1386 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1387 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1388 | Uart.parity, |
7bc95e2e | 1389 | p_response->response, |
1390 | p_response->response_n, | |
1391 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1392 | (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1393 | par); |
7bc95e2e | 1394 | } |
1395 | ||
1396 | if (!tracing) { | |
1397 | Dbprintf("Trace Full. Simulation stopped."); | |
1398 | break; | |
1399 | } | |
1400 | } | |
15c4dc5a | 1401 | |
d26849d4 | 1402 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
5ee53a0e | 1403 | set_tracing(FALSE); |
f71f4deb | 1404 | BigBuf_free_keep_EM(); |
c9216a92 | 1405 | LED_A_OFF(); |
1406 | ||
0de8e387 | 1407 | if (MF_DBGLEVEL >= 4){ |
5ee53a0e | 1408 | Dbprintf("-[ Wake ups after halt [%d]", happened); |
1409 | Dbprintf("-[ Messages after halt [%d]", happened2); | |
1410 | Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd); | |
0de8e387 | 1411 | } |
15c4dc5a | 1412 | } |
1413 | ||
9492e0b0 | 1414 | |
1415 | // prepare a delayed transfer. This simply shifts ToSend[] by a number | |
1416 | // of bits specified in the delay parameter. | |
1417 | void PrepareDelayedTransfer(uint16_t delay) | |
1418 | { | |
7504dc50 | 1419 | delay &= 0x07; |
1420 | if (!delay) return; | |
1421 | ||
9492e0b0 | 1422 | uint8_t bitmask = 0; |
1423 | uint8_t bits_to_shift = 0; | |
1424 | uint8_t bits_shifted = 0; | |
7504dc50 | 1425 | uint16_t i = 0; |
1426 | ||
1427 | for (i = 0; i < delay; ++i) | |
1428 | bitmask |= (0x01 << i); | |
2285d9dd | 1429 | |
4c0cf2d2 | 1430 | ToSend[++ToSendMax] = 0x00; |
7504dc50 | 1431 | |
1432 | for (i = 0; i < ToSendMax; ++i) { | |
9492e0b0 | 1433 | bits_to_shift = ToSend[i] & bitmask; |
1434 | ToSend[i] = ToSend[i] >> delay; | |
1435 | ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay)); | |
1436 | bits_shifted = bits_to_shift; | |
1437 | } | |
1438 | } | |
9492e0b0 | 1439 | |
7bc95e2e | 1440 | |
1441 | //------------------------------------------------------------------------------------- | |
15c4dc5a | 1442 | // Transmit the command (to the tag) that was placed in ToSend[]. |
9492e0b0 | 1443 | // Parameter timing: |
7bc95e2e | 1444 | // if NULL: transfer at next possible time, taking into account |
1445 | // request guard time and frame delay time | |
1446 | // if == 0: transfer immediately and return time of transfer | |
9492e0b0 | 1447 | // if != 0: delay transfer until time specified |
7bc95e2e | 1448 | //------------------------------------------------------------------------------------- |
6a1f2d82 | 1449 | static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing) |
15c4dc5a | 1450 | { |
9492e0b0 | 1451 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD); |
e30c654b | 1452 | |
7bc95e2e | 1453 | uint32_t ThisTransferTime = 0; |
e30c654b | 1454 | |
9492e0b0 | 1455 | if (timing) { |
7504dc50 | 1456 | |
1457 | if (*timing != 0) | |
1458 | // Delay transfer (fine tuning - up to 7 MF clock ticks) | |
1459 | PrepareDelayedTransfer(*timing & 0x00000007); | |
1460 | else | |
1461 | // Measure time | |
7bc95e2e | 1462 | *timing = (GetCountSspClk() + 8) & 0xfffffff8; |
7504dc50 | 1463 | |
4c0cf2d2 | 1464 | |
7504dc50 | 1465 | if (MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) |
1466 | Dbprintf("TransmitFor14443a: Missed timing"); | |
1467 | ||
1468 | // Delay transfer (multiple of 8 MF clock ticks) | |
1469 | while (GetCountSspClk() < (*timing & 0xfffffff8)); | |
1470 | ||
7bc95e2e | 1471 | LastTimeProxToAirStart = *timing; |
1472 | } else { | |
1473 | ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8); | |
7504dc50 | 1474 | |
7bc95e2e | 1475 | while(GetCountSspClk() < ThisTransferTime); |
7504dc50 | 1476 | |
7bc95e2e | 1477 | LastTimeProxToAirStart = ThisTransferTime; |
9492e0b0 | 1478 | } |
1479 | ||
7bc95e2e | 1480 | // clear TXRDY |
1481 | AT91C_BASE_SSC->SSC_THR = SEC_Y; | |
1482 | ||
7bc95e2e | 1483 | uint16_t c = 0; |
9492e0b0 | 1484 | for(;;) { |
1485 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1486 | AT91C_BASE_SSC->SSC_THR = cmd[c]; | |
4c0cf2d2 | 1487 | ++c; |
5ebcb867 | 1488 | if(c >= len) |
9492e0b0 | 1489 | break; |
9492e0b0 | 1490 | } |
1491 | } | |
7bc95e2e | 1492 | |
1493 | NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME); | |
15c4dc5a | 1494 | } |
1495 | ||
7bc95e2e | 1496 | |
15c4dc5a | 1497 | //----------------------------------------------------------------------------- |
195af472 | 1498 | // Prepare reader command (in bits, support short frames) to send to FPGA |
15c4dc5a | 1499 | //----------------------------------------------------------------------------- |
6a1f2d82 | 1500 | void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity) |
15c4dc5a | 1501 | { |
7bc95e2e | 1502 | int i, j; |
5ebcb867 | 1503 | int last = 0; |
7bc95e2e | 1504 | uint8_t b; |
e30c654b | 1505 | |
7bc95e2e | 1506 | ToSendReset(); |
e30c654b | 1507 | |
7bc95e2e | 1508 | // Start of Communication (Seq. Z) |
1509 | ToSend[++ToSendMax] = SEC_Z; | |
1510 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
7bc95e2e | 1511 | |
1512 | size_t bytecount = nbytes(bits); | |
1513 | // Generate send structure for the data bits | |
1514 | for (i = 0; i < bytecount; i++) { | |
1515 | // Get the current byte to send | |
1516 | b = cmd[i]; | |
1517 | size_t bitsleft = MIN((bits-(i*8)),8); | |
1518 | ||
1519 | for (j = 0; j < bitsleft; j++) { | |
1520 | if (b & 1) { | |
1521 | // Sequence X | |
1522 | ToSend[++ToSendMax] = SEC_X; | |
1523 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1524 | last = 1; | |
1525 | } else { | |
1526 | if (last == 0) { | |
1527 | // Sequence Z | |
1528 | ToSend[++ToSendMax] = SEC_Z; | |
1529 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1530 | } else { | |
1531 | // Sequence Y | |
1532 | ToSend[++ToSendMax] = SEC_Y; | |
1533 | last = 0; | |
1534 | } | |
1535 | } | |
1536 | b >>= 1; | |
1537 | } | |
1538 | ||
6a1f2d82 | 1539 | // Only transmit parity bit if we transmitted a complete byte |
0ec548dc | 1540 | if (j == 8 && parity != NULL) { |
7bc95e2e | 1541 | // Get the parity bit |
6a1f2d82 | 1542 | if (parity[i>>3] & (0x80 >> (i&0x0007))) { |
7bc95e2e | 1543 | // Sequence X |
1544 | ToSend[++ToSendMax] = SEC_X; | |
1545 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1546 | last = 1; | |
1547 | } else { | |
1548 | if (last == 0) { | |
1549 | // Sequence Z | |
1550 | ToSend[++ToSendMax] = SEC_Z; | |
1551 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1552 | } else { | |
1553 | // Sequence Y | |
1554 | ToSend[++ToSendMax] = SEC_Y; | |
1555 | last = 0; | |
1556 | } | |
1557 | } | |
1558 | } | |
1559 | } | |
e30c654b | 1560 | |
7bc95e2e | 1561 | // End of Communication: Logic 0 followed by Sequence Y |
1562 | if (last == 0) { | |
1563 | // Sequence Z | |
1564 | ToSend[++ToSendMax] = SEC_Z; | |
1565 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1566 | } else { | |
1567 | // Sequence Y | |
1568 | ToSend[++ToSendMax] = SEC_Y; | |
1569 | last = 0; | |
1570 | } | |
1571 | ToSend[++ToSendMax] = SEC_Y; | |
e30c654b | 1572 | |
7bc95e2e | 1573 | // Convert to length of command: |
4b78d6b3 | 1574 | ++ToSendMax; |
15c4dc5a | 1575 | } |
1576 | ||
195af472 | 1577 | //----------------------------------------------------------------------------- |
1578 | // Prepare reader command to send to FPGA | |
1579 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 1580 | void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity) |
195af472 | 1581 | { |
4b78d6b3 | 1582 | //CodeIso14443aBitsAsReaderPar(cmd, len*8, parity); |
1583 | CodeIso14443aBitsAsReaderPar(cmd, len<<3, parity); | |
195af472 | 1584 | } |
1585 | ||
0c8d25eb | 1586 | |
9ca155ba M |
1587 | //----------------------------------------------------------------------------- |
1588 | // Wait for commands from reader | |
1589 | // Stop when button is pressed (return 1) or field was gone (return 2) | |
1590 | // Or return 0 when command is captured | |
1591 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 1592 | static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity) |
9ca155ba M |
1593 | { |
1594 | *len = 0; | |
1595 | ||
1596 | uint32_t timer = 0, vtime = 0; | |
1597 | int analogCnt = 0; | |
1598 | int analogAVG = 0; | |
1599 | ||
1600 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
1601 | // only, since we are receiving, not transmitting). | |
1602 | // Signal field is off with the appropriate LED | |
1603 | LED_D_OFF(); | |
1604 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1605 | ||
1606 | // Set ADC to read field strength | |
1607 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST; | |
1608 | AT91C_BASE_ADC->ADC_MR = | |
0c8d25eb | 1609 | ADC_MODE_PRESCALE(63) | |
1610 | ADC_MODE_STARTUP_TIME(1) | | |
1611 | ADC_MODE_SAMPLE_HOLD_TIME(15); | |
9ca155ba M |
1612 | AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF); |
1613 | // start ADC | |
1614 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1615 | ||
1616 | // Now run a 'software UART' on the stream of incoming samples. | |
6a1f2d82 | 1617 | UartInit(received, parity); |
7bc95e2e | 1618 | |
1619 | // Clear RXRDY: | |
1620 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
0c8d25eb | 1621 | |
9ca155ba M |
1622 | for(;;) { |
1623 | WDT_HIT(); | |
1624 | ||
1625 | if (BUTTON_PRESS()) return 1; | |
1626 | ||
1627 | // test if the field exists | |
1628 | if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) { | |
1629 | analogCnt++; | |
1630 | analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF]; | |
1631 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1632 | if (analogCnt >= 32) { | |
0c8d25eb | 1633 | if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) { |
9ca155ba M |
1634 | vtime = GetTickCount(); |
1635 | if (!timer) timer = vtime; | |
1636 | // 50ms no field --> card to idle state | |
1637 | if (vtime - timer > 50) return 2; | |
1638 | } else | |
1639 | if (timer) timer = 0; | |
1640 | analogCnt = 0; | |
1641 | analogAVG = 0; | |
1642 | } | |
1643 | } | |
7bc95e2e | 1644 | |
9ca155ba | 1645 | // receive and test the miller decoding |
7bc95e2e | 1646 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
1647 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1648 | if(MillerDecoding(b, 0)) { | |
1649 | *len = Uart.len; | |
9ca155ba M |
1650 | return 0; |
1651 | } | |
7bc95e2e | 1652 | } |
1653 | ||
9ca155ba M |
1654 | } |
1655 | } | |
1656 | ||
9ca155ba | 1657 | |
6a1f2d82 | 1658 | static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded) |
7bc95e2e | 1659 | { |
1660 | uint8_t b; | |
1661 | uint16_t i = 0; | |
1662 | uint32_t ThisTransferTime; | |
1663 | ||
9ca155ba M |
1664 | // Modulate Manchester |
1665 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD); | |
7bc95e2e | 1666 | |
1667 | // include correction bit if necessary | |
1668 | if (Uart.parityBits & 0x01) { | |
1669 | correctionNeeded = TRUE; | |
1670 | } | |
1671 | if(correctionNeeded) { | |
9ca155ba M |
1672 | // 1236, so correction bit needed |
1673 | i = 0; | |
7bc95e2e | 1674 | } else { |
1675 | i = 1; | |
9ca155ba | 1676 | } |
7bc95e2e | 1677 | |
d714d3ef | 1678 | // clear receiving shift register and holding register |
7bc95e2e | 1679 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); |
1680 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
1681 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1682 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
9ca155ba | 1683 | |
7bc95e2e | 1684 | // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line) |
1685 | for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never | |
1686 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1687 | if (AT91C_BASE_SSC->SSC_RHR) break; | |
1688 | } | |
1689 | ||
1690 | while ((ThisTransferTime = GetCountSspClk()) & 0x00000007); | |
1691 | ||
1692 | // Clear TXRDY: | |
1693 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1694 | ||
9ca155ba | 1695 | // send cycle |
bb42a03e | 1696 | for(; i < respLen; ) { |
9ca155ba | 1697 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
7bc95e2e | 1698 | AT91C_BASE_SSC->SSC_THR = resp[i++]; |
1699 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
9ca155ba | 1700 | } |
7bc95e2e | 1701 | |
17ad0e09 | 1702 | if(BUTTON_PRESS()) break; |
9ca155ba M |
1703 | } |
1704 | ||
7bc95e2e | 1705 | // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: |
4b78d6b3 | 1706 | uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; // twich /8 ?? >>3, |
0c8d25eb | 1707 | for (i = 0; i <= fpga_queued_bits/8 + 1; ) { |
7bc95e2e | 1708 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
1709 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1710 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1711 | i++; | |
1712 | } | |
1713 | } | |
0c8d25eb | 1714 | |
7bc95e2e | 1715 | LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0); |
1716 | ||
9ca155ba M |
1717 | return 0; |
1718 | } | |
1719 | ||
7bc95e2e | 1720 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded){ |
1721 | Code4bitAnswerAsTag(resp); | |
0a39986e | 1722 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1723 | // do the tracing for the previous reader request and this tag answer: |
5ebcb867 | 1724 | uint8_t par[1] = {0x00}; |
6a1f2d82 | 1725 | GetParity(&resp, 1, par); |
7bc95e2e | 1726 | EmLogTrace(Uart.output, |
1727 | Uart.len, | |
1728 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1729 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1730 | Uart.parity, |
7bc95e2e | 1731 | &resp, |
1732 | 1, | |
1733 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1734 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1735 | par); |
0a39986e | 1736 | return res; |
9ca155ba M |
1737 | } |
1738 | ||
8f51ddb0 | 1739 | int EmSend4bit(uint8_t resp){ |
7bc95e2e | 1740 | return EmSend4bitEx(resp, false); |
8f51ddb0 M |
1741 | } |
1742 | ||
6a1f2d82 | 1743 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){ |
7bc95e2e | 1744 | CodeIso14443aAsTagPar(resp, respLen, par); |
8f51ddb0 | 1745 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1746 | // do the tracing for the previous reader request and this tag answer: |
1747 | EmLogTrace(Uart.output, | |
1748 | Uart.len, | |
1749 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1750 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1751 | Uart.parity, |
7bc95e2e | 1752 | resp, |
1753 | respLen, | |
1754 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1755 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1756 | par); |
8f51ddb0 M |
1757 | return res; |
1758 | } | |
1759 | ||
6a1f2d82 | 1760 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){ |
5ebcb867 | 1761 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; |
6a1f2d82 | 1762 | GetParity(resp, respLen, par); |
1763 | return EmSendCmdExPar(resp, respLen, correctionNeeded, par); | |
8f51ddb0 M |
1764 | } |
1765 | ||
6a1f2d82 | 1766 | int EmSendCmd(uint8_t *resp, uint16_t respLen){ |
5ebcb867 | 1767 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; |
6a1f2d82 | 1768 | GetParity(resp, respLen, par); |
1769 | return EmSendCmdExPar(resp, respLen, false, par); | |
8f51ddb0 M |
1770 | } |
1771 | ||
6a1f2d82 | 1772 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){ |
7bc95e2e | 1773 | return EmSendCmdExPar(resp, respLen, false, par); |
1774 | } | |
1775 | ||
6a1f2d82 | 1776 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, |
1777 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity) | |
7bc95e2e | 1778 | { |
810f5379 | 1779 | // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from |
1780 | // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp. | |
1781 | // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated: | |
1782 | uint16_t reader_modlen = reader_EndTime - reader_StartTime; | |
1783 | uint16_t approx_fdt = tag_StartTime - reader_EndTime; | |
1784 | uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20; | |
1785 | reader_EndTime = tag_StartTime - exact_fdt; | |
1786 | reader_StartTime = reader_EndTime - reader_modlen; | |
5ebcb867 | 1787 | |
810f5379 | 1788 | if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) |
1789 | return FALSE; | |
1790 | else | |
1791 | return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE)); | |
1792 | ||
9ca155ba M |
1793 | } |
1794 | ||
15c4dc5a | 1795 | //----------------------------------------------------------------------------- |
1796 | // Wait a certain time for tag response | |
1797 | // If a response is captured return TRUE | |
e691fc45 | 1798 | // If it takes too long return FALSE |
15c4dc5a | 1799 | //----------------------------------------------------------------------------- |
6a1f2d82 | 1800 | static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset) |
15c4dc5a | 1801 | { |
46c65fed | 1802 | uint32_t c = 0x00; |
e691fc45 | 1803 | |
15c4dc5a | 1804 | // Set FPGA mode to "reader listen mode", no modulation (listen |
534983d7 | 1805 | // only, since we are receiving, not transmitting). |
1806 | // Signal field is on with the appropriate LED | |
1807 | LED_D_ON(); | |
1808 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN); | |
1c611bbd | 1809 | |
534983d7 | 1810 | // Now get the answer from the card |
6a1f2d82 | 1811 | DemodInit(receivedResponse, receivedResponsePar); |
15c4dc5a | 1812 | |
7bc95e2e | 1813 | // clear RXRDY: |
1814 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
0c8d25eb | 1815 | |
15c4dc5a | 1816 | for(;;) { |
534983d7 | 1817 | WDT_HIT(); |
15c4dc5a | 1818 | |
534983d7 | 1819 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
534983d7 | 1820 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
7bc95e2e | 1821 | if(ManchesterDecoding(b, offset, 0)) { |
1822 | NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD); | |
15c4dc5a | 1823 | return TRUE; |
19a700a8 | 1824 | } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) { |
7bc95e2e | 1825 | return FALSE; |
15c4dc5a | 1826 | } |
534983d7 | 1827 | } |
1828 | } | |
15c4dc5a | 1829 | } |
1830 | ||
6a1f2d82 | 1831 | void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing) |
15c4dc5a | 1832 | { |
6a1f2d82 | 1833 | CodeIso14443aBitsAsReaderPar(frame, bits, par); |
dfc3c505 | 1834 | |
7bc95e2e | 1835 | // Send command to tag |
1836 | TransmitFor14443a(ToSend, ToSendMax, timing); | |
1837 | if(trigger) | |
1838 | LED_A_ON(); | |
dfc3c505 | 1839 | |
7bc95e2e | 1840 | // Log reader command in trace buffer |
4b78d6b3 | 1841 | //LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE); |
1842 | LogTrace(frame, nbytes(bits), (LastTimeProxToAirStart<<4) + DELAY_ARM2AIR_AS_READER, ((LastTimeProxToAirStart + LastProxToAirDuration)<<4) + DELAY_ARM2AIR_AS_READER, par, TRUE); | |
15c4dc5a | 1843 | } |
1844 | ||
6a1f2d82 | 1845 | void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing) |
dfc3c505 | 1846 | { |
4b78d6b3 | 1847 | //ReaderTransmitBitsPar(frame, len*8, par, timing); |
1848 | ReaderTransmitBitsPar(frame, len<<3, par, timing); | |
dfc3c505 | 1849 | } |
15c4dc5a | 1850 | |
6a1f2d82 | 1851 | void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing) |
e691fc45 | 1852 | { |
1853 | // Generate parity and redirect | |
5ebcb867 | 1854 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; |
4b78d6b3 | 1855 | //GetParity(frame, len/8, par); |
1856 | GetParity(frame, len >> 3, par); | |
6a1f2d82 | 1857 | ReaderTransmitBitsPar(frame, len, par, timing); |
e691fc45 | 1858 | } |
1859 | ||
6a1f2d82 | 1860 | void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing) |
15c4dc5a | 1861 | { |
1862 | // Generate parity and redirect | |
5ebcb867 | 1863 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; |
6a1f2d82 | 1864 | GetParity(frame, len, par); |
4b78d6b3 | 1865 | //ReaderTransmitBitsPar(frame, len*8, par, timing); |
1866 | ReaderTransmitBitsPar(frame, len<<3, par, timing); | |
15c4dc5a | 1867 | } |
1868 | ||
6a1f2d82 | 1869 | int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity) |
e691fc45 | 1870 | { |
5ebcb867 | 1871 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) |
1872 | return FALSE; | |
1873 | ||
4b78d6b3 | 1874 | //LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE); |
1875 | LogTrace(receivedAnswer, Demod.len, (Demod.startTime<<4) - DELAY_AIR2ARM_AS_READER, (Demod.endTime<<4) - DELAY_AIR2ARM_AS_READER, parity, FALSE); | |
e691fc45 | 1876 | return Demod.len; |
1877 | } | |
1878 | ||
6a1f2d82 | 1879 | int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity) |
15c4dc5a | 1880 | { |
5ebcb867 | 1881 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) |
1882 | return FALSE; | |
1883 | ||
4b78d6b3 | 1884 | //LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE); |
1885 | LogTrace(receivedAnswer, Demod.len, (Demod.startTime<<4) - DELAY_AIR2ARM_AS_READER, (Demod.endTime<<4) - DELAY_AIR2ARM_AS_READER, parity, FALSE); | |
e691fc45 | 1886 | return Demod.len; |
f89c7050 M |
1887 | } |
1888 | ||
c188b1b9 | 1889 | // performs iso14443a anticollision (optional) and card select procedure |
1890 | // fills the uid and cuid pointer unless NULL | |
1891 | // fills the card info record unless NULL | |
1892 | // if anticollision is false, then the UID must be provided in uid_ptr[] | |
1893 | // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID) | |
1894 | int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades) { | |
6a1f2d82 | 1895 | uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP |
1896 | uint8_t sel_all[] = { 0x93,0x20 }; | |
1897 | uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; | |
1898 | uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0 | |
4c0cf2d2 | 1899 | uint8_t resp[MAX_FRAME_SIZE] = {0}; // theoretically. A usual RATS will be much smaller |
1900 | uint8_t resp_par[MAX_PARITY_SIZE] = {0}; | |
1901 | byte_t uid_resp[4] = {0}; | |
1902 | size_t uid_resp_len = 0; | |
6a1f2d82 | 1903 | |
1904 | uint8_t sak = 0x04; // cascade uid | |
1905 | int cascade_level = 0; | |
1906 | int len; | |
1907 | ||
1908 | // Broadcast for a card, WUPA (0x52) will force response from all cards in the field | |
c188b1b9 | 1909 | ReaderTransmitBitsPar(wupa, 7, NULL, NULL); |
7bc95e2e | 1910 | |
6a1f2d82 | 1911 | // Receive the ATQA |
1912 | if(!ReaderReceive(resp, resp_par)) return 0; | |
6a1f2d82 | 1913 | |
1914 | if(p_hi14a_card) { | |
1915 | memcpy(p_hi14a_card->atqa, resp, 2); | |
1916 | p_hi14a_card->uidlen = 0; | |
1917 | memset(p_hi14a_card->uid,0,10); | |
1918 | } | |
5f6d6c90 | 1919 | |
c188b1b9 | 1920 | if (anticollision) { |
4c0cf2d2 | 1921 | // clear uid |
1922 | if (uid_ptr) | |
1923 | memset(uid_ptr,0,10); | |
c188b1b9 | 1924 | } |
79a73ab2 | 1925 | |
0ec548dc | 1926 | // check for proprietary anticollision: |
4c0cf2d2 | 1927 | if ((resp[0] & 0x1F) == 0) return 3; |
0ec548dc | 1928 | |
6a1f2d82 | 1929 | // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in |
1930 | // which case we need to make a cascade 2 request and select - this is a long UID | |
1931 | // While the UID is not complete, the 3nd bit (from the right) is set in the SAK. | |
1932 | for(; sak & 0x04; cascade_level++) { | |
1933 | // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97) | |
1934 | sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2; | |
1935 | ||
c188b1b9 | 1936 | if (anticollision) { |
6a1f2d82 | 1937 | // SELECT_ALL |
4c0cf2d2 | 1938 | ReaderTransmit(sel_all, sizeof(sel_all), NULL); |
1939 | if (!ReaderReceive(resp, resp_par)) return 0; | |
1940 | ||
1941 | if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit | |
1942 | memset(uid_resp, 0, 4); | |
1943 | uint16_t uid_resp_bits = 0; | |
1944 | uint16_t collision_answer_offset = 0; | |
1945 | // anti-collision-loop: | |
1946 | while (Demod.collisionPos) { | |
1947 | Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos); | |
1948 | for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point | |
1949 | uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01; | |
1950 | uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8); | |
1951 | } | |
1952 | uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position | |
1953 | uid_resp_bits++; | |
1954 | // construct anticollosion command: | |
1955 | sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits | |
1956 | for (uint16_t i = 0; i <= uid_resp_bits/8; i++) { | |
1957 | sel_uid[2+i] = uid_resp[i]; | |
1958 | } | |
1959 | collision_answer_offset = uid_resp_bits%8; | |
1960 | ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL); | |
1961 | if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0; | |
6a1f2d82 | 1962 | } |
4c0cf2d2 | 1963 | // finally, add the last bits and BCC of the UID |
1964 | for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) { | |
1965 | uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01; | |
1966 | uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8); | |
6a1f2d82 | 1967 | } |
e691fc45 | 1968 | |
4c0cf2d2 | 1969 | } else { // no collision, use the response to SELECT_ALL as current uid |
1970 | memcpy(uid_resp, resp, 4); | |
1971 | } | |
1972 | ||
c188b1b9 | 1973 | } else { |
1974 | if (cascade_level < num_cascades - 1) { | |
1975 | uid_resp[0] = 0x88; | |
1976 | memcpy(uid_resp+1, uid_ptr+cascade_level*3, 3); | |
1977 | } else { | |
1978 | memcpy(uid_resp, uid_ptr+cascade_level*3, 4); | |
1979 | } | |
1980 | } | |
6a1f2d82 | 1981 | uid_resp_len = 4; |
5f6d6c90 | 1982 | |
6a1f2d82 | 1983 | // calculate crypto UID. Always use last 4 Bytes. |
4c0cf2d2 | 1984 | if(cuid_ptr) |
6a1f2d82 | 1985 | *cuid_ptr = bytes_to_num(uid_resp, 4); |
e30c654b | 1986 | |
6a1f2d82 | 1987 | // Construct SELECT UID command |
1988 | sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC) | |
c188b1b9 | 1989 | memcpy(sel_uid+2, uid_resp, 4); // the UID received during anticollision, or the provided UID |
6a1f2d82 | 1990 | sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC |
1991 | AppendCrc14443a(sel_uid, 7); // calculate and add CRC | |
1992 | ReaderTransmit(sel_uid, sizeof(sel_uid), NULL); | |
1993 | ||
1994 | // Receive the SAK | |
1995 | if (!ReaderReceive(resp, resp_par)) return 0; | |
4c0cf2d2 | 1996 | |
6a1f2d82 | 1997 | sak = resp[0]; |
1998 | ||
810f5379 | 1999 | // Test if more parts of the uid are coming |
6a1f2d82 | 2000 | if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) { |
2001 | // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of: | |
2002 | // http://www.nxp.com/documents/application_note/AN10927.pdf | |
6a1f2d82 | 2003 | uid_resp[0] = uid_resp[1]; |
2004 | uid_resp[1] = uid_resp[2]; | |
2005 | uid_resp[2] = uid_resp[3]; | |
6a1f2d82 | 2006 | uid_resp_len = 3; |
2007 | } | |
5f6d6c90 | 2008 | |
4c0cf2d2 | 2009 | if(uid_ptr && anticollision) |
6a1f2d82 | 2010 | memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len); |
5f6d6c90 | 2011 | |
6a1f2d82 | 2012 | if(p_hi14a_card) { |
2013 | memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len); | |
2014 | p_hi14a_card->uidlen += uid_resp_len; | |
2015 | } | |
2016 | } | |
79a73ab2 | 2017 | |
6a1f2d82 | 2018 | if(p_hi14a_card) { |
2019 | p_hi14a_card->sak = sak; | |
2020 | p_hi14a_card->ats_len = 0; | |
2021 | } | |
534983d7 | 2022 | |
3fe4ff4f | 2023 | // non iso14443a compliant tag |
2024 | if( (sak & 0x20) == 0) return 2; | |
534983d7 | 2025 | |
6a1f2d82 | 2026 | // Request for answer to select |
2027 | AppendCrc14443a(rats, 2); | |
2028 | ReaderTransmit(rats, sizeof(rats), NULL); | |
1c611bbd | 2029 | |
6a1f2d82 | 2030 | if (!(len = ReaderReceive(resp, resp_par))) return 0; |
3fe4ff4f | 2031 | |
6a1f2d82 | 2032 | if(p_hi14a_card) { |
2033 | memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats)); | |
2034 | p_hi14a_card->ats_len = len; | |
2035 | } | |
5f6d6c90 | 2036 | |
6a1f2d82 | 2037 | // reset the PCB block number |
2038 | iso14_pcb_blocknum = 0; | |
19a700a8 | 2039 | |
2040 | // set default timeout based on ATS | |
2041 | iso14a_set_ATS_timeout(resp); | |
2042 | ||
6a1f2d82 | 2043 | return 1; |
7e758047 | 2044 | } |
15c4dc5a | 2045 | |
7bc95e2e | 2046 | void iso14443a_setup(uint8_t fpga_minor_mode) { |
7cc204bf | 2047 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
9492e0b0 | 2048 | // Set up the synchronous serial port |
2049 | FpgaSetupSsc(); | |
7bc95e2e | 2050 | // connect Demodulated Signal to ADC: |
7e758047 | 2051 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
e30c654b | 2052 | |
7e758047 | 2053 | // Signal field is on with the appropriate LED |
7bc95e2e | 2054 | if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD |
2055 | || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) { | |
2056 | LED_D_ON(); | |
2057 | } else { | |
2058 | LED_D_OFF(); | |
2059 | } | |
2060 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode); | |
534983d7 | 2061 | |
7bc95e2e | 2062 | // Start the timer |
2063 | StartCountSspClk(); | |
2064 | ||
2065 | DemodReset(); | |
2066 | UartReset(); | |
2067 | NextTransferTime = 2*DELAY_ARM2AIR_AS_READER; | |
46c65fed | 2068 | iso14a_set_timeout(10*106); // 10ms default |
7e758047 | 2069 | } |
15c4dc5a | 2070 | |
6a1f2d82 | 2071 | int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) { |
810f5379 | 2072 | uint8_t parity[MAX_PARITY_SIZE] = {0x00}; |
534983d7 | 2073 | uint8_t real_cmd[cmd_len+4]; |
2074 | real_cmd[0] = 0x0a; //I-Block | |
b0127e65 | 2075 | // put block number into the PCB |
2076 | real_cmd[0] |= iso14_pcb_blocknum; | |
534983d7 | 2077 | real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards |
2078 | memcpy(real_cmd+2, cmd, cmd_len); | |
2079 | AppendCrc14443a(real_cmd,cmd_len+2); | |
2080 | ||
9492e0b0 | 2081 | ReaderTransmit(real_cmd, cmd_len+4, NULL); |
6a1f2d82 | 2082 | size_t len = ReaderReceive(data, parity); |
2083 | uint8_t *data_bytes = (uint8_t *) data; | |
b0127e65 | 2084 | if (!len) |
2085 | return 0; //DATA LINK ERROR | |
2086 | // if we received an I- or R(ACK)-Block with a block number equal to the | |
2087 | // current block number, toggle the current block number | |
2088 | else if (len >= 4 // PCB+CID+CRC = 4 bytes | |
2089 | && ((data_bytes[0] & 0xC0) == 0 // I-Block | |
2090 | || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0 | |
2091 | && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers | |
2092 | { | |
2093 | iso14_pcb_blocknum ^= 1; | |
2094 | } | |
2095 | ||
534983d7 | 2096 | return len; |
2097 | } | |
2098 | ||
7e758047 | 2099 | //----------------------------------------------------------------------------- |
2100 | // Read an ISO 14443a tag. Send out commands and store answers. | |
2101 | // | |
2102 | //----------------------------------------------------------------------------- | |
7bc95e2e | 2103 | void ReaderIso14443a(UsbCommand *c) |
7e758047 | 2104 | { |
534983d7 | 2105 | iso14a_command_t param = c->arg[0]; |
7bc95e2e | 2106 | uint8_t *cmd = c->d.asBytes; |
04bc1c66 | 2107 | size_t len = c->arg[1] & 0xffff; |
2108 | size_t lenbits = c->arg[1] >> 16; | |
2109 | uint32_t timeout = c->arg[2]; | |
9492e0b0 | 2110 | uint32_t arg0 = 0; |
810f5379 | 2111 | byte_t buf[USB_CMD_DATA_SIZE] = {0x00}; |
2112 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; | |
902cb3c0 | 2113 | |
810f5379 | 2114 | if (param & ISO14A_CONNECT) |
3000dc4e | 2115 | clear_trace(); |
e691fc45 | 2116 | |
3000dc4e | 2117 | set_tracing(TRUE); |
e30c654b | 2118 | |
810f5379 | 2119 | if (param & ISO14A_REQUEST_TRIGGER) |
7bc95e2e | 2120 | iso14a_set_trigger(TRUE); |
15c4dc5a | 2121 | |
810f5379 | 2122 | |
2123 | if (param & ISO14A_CONNECT) { | |
7bc95e2e | 2124 | iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN); |
5f6d6c90 | 2125 | if(!(param & ISO14A_NO_SELECT)) { |
2126 | iso14a_card_select_t *card = (iso14a_card_select_t*)buf; | |
c188b1b9 | 2127 | arg0 = iso14443a_select_card(NULL,card,NULL, true, 0); |
5f6d6c90 | 2128 | cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t)); |
2129 | } | |
534983d7 | 2130 | } |
e30c654b | 2131 | |
810f5379 | 2132 | if (param & ISO14A_SET_TIMEOUT) |
04bc1c66 | 2133 | iso14a_set_timeout(timeout); |
e30c654b | 2134 | |
810f5379 | 2135 | if (param & ISO14A_APDU) { |
902cb3c0 | 2136 | arg0 = iso14_apdu(cmd, len, buf); |
79a73ab2 | 2137 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 2138 | } |
e30c654b | 2139 | |
810f5379 | 2140 | if (param & ISO14A_RAW) { |
534983d7 | 2141 | if(param & ISO14A_APPEND_CRC) { |
0ec548dc | 2142 | if(param & ISO14A_TOPAZMODE) { |
2143 | AppendCrc14443b(cmd,len); | |
2144 | } else { | |
d26849d4 | 2145 | AppendCrc14443a(cmd,len); |
0ec548dc | 2146 | } |
534983d7 | 2147 | len += 2; |
c7324bef | 2148 | if (lenbits) lenbits += 16; |
15c4dc5a | 2149 | } |
0ec548dc | 2150 | if(lenbits>0) { // want to send a specific number of bits (e.g. short commands) |
2151 | if(param & ISO14A_TOPAZMODE) { | |
2152 | int bits_to_send = lenbits; | |
2153 | uint16_t i = 0; | |
2154 | ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity | |
2155 | bits_to_send -= 7; | |
2156 | while (bits_to_send > 0) { | |
2157 | ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity | |
2158 | bits_to_send -= 8; | |
2159 | } | |
2160 | } else { | |
6a1f2d82 | 2161 | GetParity(cmd, lenbits/8, par); |
0ec548dc | 2162 | ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity |
2163 | } | |
2164 | } else { // want to send complete bytes only | |
2165 | if(param & ISO14A_TOPAZMODE) { | |
2166 | uint16_t i = 0; | |
2167 | ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy | |
2168 | while (i < len) { | |
2169 | ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy | |
2170 | } | |
5f6d6c90 | 2171 | } else { |
0ec548dc | 2172 | ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity |
2173 | } | |
5f6d6c90 | 2174 | } |
6a1f2d82 | 2175 | arg0 = ReaderReceive(buf, par); |
9492e0b0 | 2176 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 2177 | } |
15c4dc5a | 2178 | |
810f5379 | 2179 | if (param & ISO14A_REQUEST_TRIGGER) |
7bc95e2e | 2180 | iso14a_set_trigger(FALSE); |
15c4dc5a | 2181 | |
810f5379 | 2182 | |
2183 | if (param & ISO14A_NO_DISCONNECT) | |
534983d7 | 2184 | return; |
15c4dc5a | 2185 | |
15c4dc5a | 2186 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
5ee53a0e | 2187 | set_tracing(FALSE); |
15c4dc5a | 2188 | LEDsoff(); |
15c4dc5a | 2189 | } |
b0127e65 | 2190 | |
1c611bbd | 2191 | |
1c611bbd | 2192 | // Determine the distance between two nonces. |
2193 | // Assume that the difference is small, but we don't know which is first. | |
2194 | // Therefore try in alternating directions. | |
2195 | int32_t dist_nt(uint32_t nt1, uint32_t nt2) { | |
2196 | ||
1c611bbd | 2197 | if (nt1 == nt2) return 0; |
4b78d6b3 | 2198 | |
7504dc50 | 2199 | uint16_t i; |
810f5379 | 2200 | uint32_t nttmp1 = nt1; |
2201 | uint32_t nttmp2 = nt2; | |
2202 | ||
7504dc50 | 2203 | for (i = 1; i < 0xFFFF; i += 8) { |
2204 | nttmp1 = prng_successor_one(nttmp1); if (nttmp1 == nt2) return i; | |
2205 | nttmp2 = prng_successor_one(nttmp2); if (nttmp2 == nt1) return -i; | |
810f5379 | 2206 | |
7504dc50 | 2207 | nttmp1 = prng_successor_one(nttmp1); if (nttmp1 == nt2) return i+1; |
b0300679 | 2208 | nttmp2 = prng_successor_one(nttmp2); if (nttmp2 == nt1) return -i-1; |
7504dc50 | 2209 | |
2210 | nttmp1 = prng_successor_one(nttmp1); if (nttmp1 == nt2) return i+2; | |
b0300679 | 2211 | nttmp2 = prng_successor_one(nttmp2); if (nttmp2 == nt1) return -i-2; |
7504dc50 | 2212 | |
2213 | nttmp1 = prng_successor_one(nttmp1); if (nttmp1 == nt2) return i+3; | |
b0300679 | 2214 | nttmp2 = prng_successor_one(nttmp2); if (nttmp2 == nt1) return -i-3; |
7504dc50 | 2215 | |
2216 | nttmp1 = prng_successor_one(nttmp1); if (nttmp1 == nt2) return i+4; | |
b0300679 | 2217 | nttmp2 = prng_successor_one(nttmp2); if (nttmp2 == nt1) return -i-4; |
7504dc50 | 2218 | |
2219 | nttmp1 = prng_successor_one(nttmp1); if (nttmp1 == nt2) return i+5; | |
b0300679 | 2220 | nttmp2 = prng_successor_one(nttmp2); if (nttmp2 == nt1) return -i-5; |
7504dc50 | 2221 | |
2222 | nttmp1 = prng_successor_one(nttmp1); if (nttmp1 == nt2) return i+6; | |
b0300679 | 2223 | nttmp2 = prng_successor_one(nttmp2); if (nttmp2 == nt1) return -i-6; |
7504dc50 | 2224 | |
2225 | nttmp1 = prng_successor_one(nttmp1); if (nttmp1 == nt2) return i+7; | |
b0300679 | 2226 | nttmp2 = prng_successor_one(nttmp2); if (nttmp2 == nt1) return -i-7; |
7504dc50 | 2227 | /* |
2228 | if ( prng_successor(nttmp1, i) == nt2) return i; | |
2229 | if ( prng_successor(nttmp2, i) == nt1) return -i; | |
2230 | ||
2231 | if ( prng_successor(nttmp1, i+2) == nt2) return i+2; | |
2232 | if ( prng_successor(nttmp2, i+2) == nt1) return -(i+2); | |
2233 | ||
2234 | if ( prng_successor(nttmp1, i+3) == nt2) return i+3; | |
2235 | if ( prng_successor(nttmp2, i+3) == nt1) return -(i+3); | |
2236 | ||
2237 | if ( prng_successor(nttmp1, i+4) == nt2) return i+4; | |
2238 | if ( prng_successor(nttmp2, i+4) == nt1) return -(i+4); | |
2239 | ||
2240 | if ( prng_successor(nttmp1, i+5) == nt2) return i+5; | |
2241 | if ( prng_successor(nttmp2, i+5) == nt1) return -(i+5); | |
2242 | ||
2243 | if ( prng_successor(nttmp1, i+6) == nt2) return i+6; | |
2244 | if ( prng_successor(nttmp2, i+6) == nt1) return -(i+6); | |
2245 | ||
2246 | if ( prng_successor(nttmp1, i+7) == nt2) return i+7; | |
2247 | if ( prng_successor(nttmp2, i+7) == nt1) return -(i+7); | |
7504dc50 | 2248 | */ |
810f5379 | 2249 | } |
1c611bbd | 2250 | |
2251 | return(-99999); // either nt1 or nt2 are invalid nonces | |
e772353f | 2252 | } |
2253 | ||
e772353f | 2254 | |
1c611bbd | 2255 | //----------------------------------------------------------------------------- |
2256 | // Recover several bits of the cypher stream. This implements (first stages of) | |
2257 | // the algorithm described in "The Dark Side of Security by Obscurity and | |
2258 | // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime" | |
2259 | // (article by Nicolas T. Courtois, 2009) | |
2260 | //----------------------------------------------------------------------------- | |
810f5379 | 2261 | void ReaderMifare(bool first_try, uint8_t block ) |
c830303d | 2262 | { |
2263 | // Mifare AUTH | |
810f5379 | 2264 | //uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b }; |
2265 | //uint8_t mf_auth[] = { 0x60,0x05, 0x58, 0x2c }; | |
b0300679 | 2266 | uint8_t mf_auth[] = { 0x60,0x00, 0x00, 0x00 }; |
2267 | uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; | |
2268 | uint8_t uid[10] = {0,0,0,0,0,0,0,0,0,0}; | |
2269 | uint8_t par_list[8] = {0,0,0,0,0,0,0,0}; | |
2270 | uint8_t ks_list[8] = {0,0,0,0,0,0,0,0}; | |
495d7f13 | 2271 | uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE] = {0x00}; |
2272 | uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE] = {0x00}; | |
b0300679 | 2273 | uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough |
2274 | ||
2275 | mf_auth[1] = block; | |
2276 | AppendCrc14443a(mf_auth, 2); | |
c830303d | 2277 | |
1c611bbd | 2278 | byte_t nt_diff = 0; |
e772353f | 2279 | |
6a1f2d82 | 2280 | uint32_t nt = 0; |
b0300679 | 2281 | uint32_t previous_nt = 0; |
2282 | uint32_t halt_time = 0; | |
2283 | uint32_t cuid = 0; | |
2284 | ||
1c611bbd | 2285 | int catch_up_cycles = 0; |
2286 | int last_catch_up = 0; | |
b0300679 | 2287 | int isOK = 0; |
2288 | ||
4c0cf2d2 | 2289 | uint16_t elapsed_prng_sequences = 1; |
1c611bbd | 2290 | uint16_t consecutive_resyncs = 0; |
0de8e387 | 2291 | uint16_t unexpected_random = 0; |
2292 | uint16_t sync_tries = 0; | |
3bc7b13d | 2293 | uint16_t strategy = 0; |
b0300679 | 2294 | |
2295 | static uint32_t nt_attacked = 0; | |
2296 | static uint32_t sync_time = 0; | |
2297 | static int32_t sync_cycles = 0; | |
2298 | static uint8_t par_low = 0; | |
2299 | static uint8_t mf_nr_ar3 = 0; | |
2300 | ||
2301 | #define PRNG_SEQUENCE_LENGTH (1 << 16) | |
2302 | #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up. | |
2303 | #define MAX_SYNC_TRIES 32 | |
2304 | #define MAX_STRATEGY 3 | |
4c0cf2d2 | 2305 | |
4b78d6b3 | 2306 | clear_trace(); |
2307 | set_tracing(TRUE); | |
4c0cf2d2 | 2308 | |
2309 | LED_A_ON(); | |
4c0cf2d2 | 2310 | |
2311 | if (first_try) | |
2312 | iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD); | |
2313 | ||
2314 | // free eventually allocated BigBuf memory. We want all for tracing. | |
2315 | BigBuf_free(); | |
4c0cf2d2 | 2316 | |
2317 | if (first_try) { | |
2318 | sync_time = GetCountSspClk() & 0xfffffff8; | |
b0300679 | 2319 | sync_cycles = PRNG_SEQUENCE_LENGTH + 1100; //65536; //0x10000 // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces). |
4c0cf2d2 | 2320 | mf_nr_ar3 = 0; |
2321 | nt_attacked = 0; | |
b0300679 | 2322 | |
4c0cf2d2 | 2323 | } else { |
b0300679 | 2324 | // we were unsuccessful on a previous call. |
2325 | // Try another READER nonce (first 3 parity bits remain the same) | |
2326 | ++mf_nr_ar3; | |
4c0cf2d2 | 2327 | mf_nr_ar[3] = mf_nr_ar3; |
2328 | par[0] = par_low; | |
2329 | } | |
1c611bbd | 2330 | |
b0300679 | 2331 | LED_A_ON(); |
4c0cf2d2 | 2332 | LED_C_ON(); |
2333 | for(uint16_t i = 0; TRUE; ++i) { | |
2334 | ||
1c611bbd | 2335 | WDT_HIT(); |
e30c654b | 2336 | |
1c611bbd | 2337 | // Test if the action was cancelled |
c830303d | 2338 | if(BUTTON_PRESS()) { |
2339 | isOK = -1; | |
1c611bbd | 2340 | break; |
2341 | } | |
2342 | ||
3bc7b13d | 2343 | if (strategy == 2) { |
4c0cf2d2 | 2344 | // test with additional halt command |
3bc7b13d | 2345 | halt_time = 0; |
2346 | int len = mifare_sendcmd_short(NULL, false, 0x50, 0x00, receivedAnswer, receivedAnswerPar, &halt_time); | |
4c0cf2d2 | 2347 | |
2348 | if (len && MF_DBGLEVEL >= 3) | |
4b78d6b3 | 2349 | Dbprintf("Unexpected response of %d bytes to halt command.", len); |
3bc7b13d | 2350 | } |
2351 | ||
2352 | if (strategy == 3) { | |
2353 | // test with FPGA power off/on | |
2354 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
2355 | SpinDelay(200); | |
2356 | iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD); | |
2357 | SpinDelay(100); | |
4c0cf2d2 | 2358 | sync_time = GetCountSspClk() & 0xfffffff8; |
5ebcb867 | 2359 | WDT_HIT(); |
3bc7b13d | 2360 | } |
2361 | ||
b0300679 | 2362 | if (!iso14443a_select_card(uid, NULL, &cuid, true, 0)) { |
2363 | if (MF_DBGLEVEL >= 2) Dbprintf("Mifare: Can't select card\n"); | |
1c611bbd | 2364 | continue; |
2365 | } | |
b0300679 | 2366 | |
2367 | // Sending timeslot of ISO14443a frame | |
4c0cf2d2 | 2368 | |
4b78d6b3 | 2369 | sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles; |
2370 | catch_up_cycles = 0; | |
b0300679 | 2371 | |
2372 | //catch_up_cycles = 0; | |
4b78d6b3 | 2373 | |
2374 | // if we missed the sync time already, advance to the next nonce repeat | |
2375 | while(GetCountSspClk() > sync_time) { | |
2376 | ++elapsed_prng_sequences; | |
b0300679 | 2377 | sync_time = (sync_time & 0xfffffff8) + sync_cycles; |
4b78d6b3 | 2378 | } |
2379 | // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked) | |
2380 | ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time); | |
f89c7050 | 2381 | |
1c611bbd | 2382 | // Receive the (4 Byte) "random" nonce |
4c0cf2d2 | 2383 | if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) |
1c611bbd | 2384 | continue; |
1c611bbd | 2385 | |
1c611bbd | 2386 | // Transmit reader nonce with fake par |
9492e0b0 | 2387 | ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL); |
1c611bbd | 2388 | |
4b78d6b3 | 2389 | previous_nt = nt; |
2390 | nt = bytes_to_num(receivedAnswer, 4); | |
2391 | ||
1c611bbd | 2392 | if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet |
2393 | int nt_distance = dist_nt(previous_nt, nt); | |
2394 | if (nt_distance == 0) { | |
2395 | nt_attacked = nt; | |
0de8e387 | 2396 | } else { |
c830303d | 2397 | if (nt_distance == -99999) { // invalid nonce received |
0de8e387 | 2398 | unexpected_random++; |
3bc7b13d | 2399 | if (unexpected_random > MAX_UNEXPECTED_RANDOM) { |
c830303d | 2400 | isOK = -3; // Card has an unpredictable PRNG. Give up |
2401 | break; | |
2402 | } else { | |
2403 | continue; // continue trying... | |
2404 | } | |
1c611bbd | 2405 | } |
4c0cf2d2 | 2406 | |
0de8e387 | 2407 | if (++sync_tries > MAX_SYNC_TRIES) { |
3bc7b13d | 2408 | if (strategy > MAX_STRATEGY || MF_DBGLEVEL < 3) { |
0de8e387 | 2409 | isOK = -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly |
2410 | break; | |
4b78d6b3 | 2411 | } else { |
0de8e387 | 2412 | continue; |
b0300679 | 2413 | } |
0de8e387 | 2414 | } |
4c0cf2d2 | 2415 | |
4b78d6b3 | 2416 | sync_cycles = (sync_cycles - nt_distance)/elapsed_prng_sequences; |
4c0cf2d2 | 2417 | if (sync_cycles <= 0) |
0de8e387 | 2418 | sync_cycles += PRNG_SEQUENCE_LENGTH; |
4c0cf2d2 | 2419 | |
4b78d6b3 | 2420 | if (MF_DBGLEVEL >= 3) |
3bc7b13d | 2421 | Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i, nt_distance, elapsed_prng_sequences, sync_cycles); |
4c0cf2d2 | 2422 | |
1c611bbd | 2423 | continue; |
2424 | } | |
2425 | } | |
2426 | ||
2427 | if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again... | |
4c0cf2d2 | 2428 | |
1c611bbd | 2429 | catch_up_cycles = -dist_nt(nt_attacked, nt); |
c830303d | 2430 | if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one. |
1c611bbd | 2431 | catch_up_cycles = 0; |
2432 | continue; | |
2433 | } | |
4c0cf2d2 | 2434 | |
2435 | // average? | |
3bc7b13d | 2436 | catch_up_cycles /= elapsed_prng_sequences; |
4c0cf2d2 | 2437 | |
1c611bbd | 2438 | if (catch_up_cycles == last_catch_up) { |
4a71da5a | 2439 | ++consecutive_resyncs; |
4c0cf2d2 | 2440 | } else { |
1c611bbd | 2441 | last_catch_up = catch_up_cycles; |
2442 | consecutive_resyncs = 0; | |
4b78d6b3 | 2443 | } |
4c0cf2d2 | 2444 | |
1c611bbd | 2445 | if (consecutive_resyncs < 3) { |
4c0cf2d2 | 2446 | if (MF_DBGLEVEL >= 3) |
2447 | Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs); | |
2448 | } else { | |
2449 | sync_cycles += catch_up_cycles; | |
2450 | ||
2451 | if (MF_DBGLEVEL >= 3) | |
2452 | Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles); | |
2453 | ||
3bc7b13d | 2454 | last_catch_up = 0; |
2455 | catch_up_cycles = 0; | |
2456 | consecutive_resyncs = 0; | |
1c611bbd | 2457 | } |
2458 | continue; | |
2459 | } | |
2460 | ||
1c611bbd | 2461 | // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding |
3bc7b13d | 2462 | if (ReaderReceive(receivedAnswer, receivedAnswerPar)) { |
9492e0b0 | 2463 | catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer |
1c611bbd | 2464 | |
495d7f13 | 2465 | if (nt_diff == 0) |
6a1f2d82 | 2466 | par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change |
1c611bbd | 2467 | |
6a1f2d82 | 2468 | par_list[nt_diff] = SwapBits(par[0], 8); |
1c611bbd | 2469 | ks_list[nt_diff] = receivedAnswer[0] ^ 0x05; |
2470 | ||
2471 | // Test if the information is complete | |
2472 | if (nt_diff == 0x07) { | |
2473 | isOK = 1; | |
2474 | break; | |
2475 | } | |
2476 | ||
2477 | nt_diff = (nt_diff + 1) & 0x07; | |
2478 | mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5); | |
6a1f2d82 | 2479 | par[0] = par_low; |
4b78d6b3 | 2480 | |
1c611bbd | 2481 | } else { |
b0300679 | 2482 | // No NACK. |
495d7f13 | 2483 | if (nt_diff == 0 && first_try) { |
6a1f2d82 | 2484 | par[0]++; |
5ebcb867 | 2485 | if (par[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK. |
c830303d | 2486 | isOK = -2; |
2487 | break; | |
2488 | } | |
1c611bbd | 2489 | } else { |
b0300679 | 2490 | // Why this? |
6a1f2d82 | 2491 | par[0] = ((par[0] & 0x1F) + 1) | par_low; |
1c611bbd | 2492 | } |
2493 | } | |
4b78d6b3 | 2494 | |
2495 | consecutive_resyncs = 0; | |
1c611bbd | 2496 | } |
2497 | ||
1c611bbd | 2498 | mf_nr_ar[3] &= 0x1F; |
5ebcb867 | 2499 | |
2500 | WDT_HIT(); | |
4c0cf2d2 | 2501 | |
2502 | // reset sync_time. | |
2503 | if ( isOK == 1) { | |
2504 | sync_time = 0; | |
2505 | sync_cycles = 0; | |
2506 | mf_nr_ar3 = 0; | |
2507 | nt_attacked = 0; | |
2508 | par[0] = 0; | |
0de8e387 | 2509 | } |
d26849d4 | 2510 | |
b0300679 | 2511 | uint8_t buf[28] = {0x00}; |
2512 | num_to_bytes(cuid, 4, buf); | |
1c611bbd | 2513 | num_to_bytes(nt, 4, buf + 4); |
2514 | memcpy(buf + 8, par_list, 8); | |
2515 | memcpy(buf + 16, ks_list, 8); | |
2516 | memcpy(buf + 24, mf_nr_ar, 4); | |
2517 | ||
2518 | cmd_send(CMD_ACK,isOK,0,0,buf,28); | |
2519 | ||
1c611bbd | 2520 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
2521 | LEDsoff(); | |
99cf19d9 | 2522 | set_tracing(FALSE); |
20f9a2a1 | 2523 | } |
1c611bbd | 2524 | |
0de8e387 | 2525 | /** |
d2f487af | 2526 | *MIFARE 1K simulate. |
2527 | * | |
2528 | *@param flags : | |
2529 | * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK | |
2530 | * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that | |
2531 | * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that | |
2532 | * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later | |
2533 | *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite | |
2534 | */ | |
2535 | void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain) | |
20f9a2a1 | 2536 | { |
50193c1e | 2537 | int cardSTATE = MFEMUL_NOFIELD; |
8556b852 | 2538 | int _7BUID = 0; |
9ca155ba | 2539 | int vHf = 0; // in mV |
8f51ddb0 | 2540 | int res; |
0a39986e M |
2541 | uint32_t selTimer = 0; |
2542 | uint32_t authTimer = 0; | |
6a1f2d82 | 2543 | uint16_t len = 0; |
8f51ddb0 | 2544 | uint8_t cardWRBL = 0; |
9ca155ba M |
2545 | uint8_t cardAUTHSC = 0; |
2546 | uint8_t cardAUTHKEY = 0xff; // no authentication | |
c3c241f3 | 2547 | // uint32_t cardRr = 0; |
9ca155ba | 2548 | uint32_t cuid = 0; |
d2f487af | 2549 | //uint32_t rn_enc = 0; |
51969283 | 2550 | uint32_t ans = 0; |
0014cb46 M |
2551 | uint32_t cardINTREG = 0; |
2552 | uint8_t cardINTBLOCK = 0; | |
9ca155ba M |
2553 | struct Crypto1State mpcs = {0, 0}; |
2554 | struct Crypto1State *pcs; | |
2555 | pcs = &mpcs; | |
d2f487af | 2556 | uint32_t numReads = 0;//Counts numer of times reader read a block |
5ebcb867 | 2557 | uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00}; |
2558 | uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE] = {0x00}; | |
2559 | uint8_t response[MAX_MIFARE_FRAME_SIZE] = {0x00}; | |
2560 | uint8_t response_par[MAX_MIFARE_PARITY_SIZE] = {0x00}; | |
9ca155ba | 2561 | |
d2f487af | 2562 | uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID |
2563 | uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; | |
2564 | uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!! | |
94422fa2 | 2565 | uint8_t rSAK[] = {0x08, 0xb6, 0xdd}; // Mifare Classic |
2566 | //uint8_t rSAK[] = {0x09, 0x3f, 0xcc }; // Mifare Mini | |
d2f487af | 2567 | uint8_t rSAK1[] = {0x04, 0xda, 0x17}; |
9ca155ba | 2568 | |
02a40596 | 2569 | //uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01}; |
2570 | uint8_t rAUTH_NT[] = {0x55, 0x41, 0x49, 0x92}; | |
d2f487af | 2571 | uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00}; |
7bc95e2e | 2572 | |
2b1f4228 | 2573 | //Here, we collect UID1,UID2,NT,AR,NR,0,0,NT2,AR2,NR2 |
d2f487af | 2574 | // This can be used in a reader-only attack. |
2575 | // (it can also be retrieved via 'hf 14a list', but hey... | |
c3c241f3 | 2576 | uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0}; |
d2f487af | 2577 | uint8_t ar_nr_collected = 0; |
0014cb46 | 2578 | |
7bc95e2e | 2579 | // Authenticate response - nonce |
51969283 | 2580 | uint32_t nonce = bytes_to_num(rAUTH_NT, 4); |
7bc95e2e | 2581 | |
d2f487af | 2582 | //-- Determine the UID |
2583 | // Can be set from emulator memory, incoming data | |
2584 | // and can be 7 or 4 bytes long | |
7bc95e2e | 2585 | if (flags & FLAG_4B_UID_IN_DATA) |
d2f487af | 2586 | { |
2587 | // 4B uid comes from data-portion of packet | |
2588 | memcpy(rUIDBCC1,datain,4); | |
8556b852 | 2589 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; |
8556b852 | 2590 | |
7bc95e2e | 2591 | } else if (flags & FLAG_7B_UID_IN_DATA) { |
d2f487af | 2592 | // 7B uid comes from data-portion of packet |
2593 | memcpy(&rUIDBCC1[1],datain,3); | |
2594 | memcpy(rUIDBCC2, datain+3, 4); | |
2595 | _7BUID = true; | |
7bc95e2e | 2596 | } else { |
d2f487af | 2597 | // get UID from emul memory |
2598 | emlGetMemBt(receivedCmd, 7, 1); | |
2599 | _7BUID = !(receivedCmd[0] == 0x00); | |
2600 | if (!_7BUID) { // ---------- 4BUID | |
2601 | emlGetMemBt(rUIDBCC1, 0, 4); | |
2602 | } else { // ---------- 7BUID | |
2603 | emlGetMemBt(&rUIDBCC1[1], 0, 3); | |
2604 | emlGetMemBt(rUIDBCC2, 3, 4); | |
2605 | } | |
2606 | } | |
7bc95e2e | 2607 | |
c3c241f3 | 2608 | // save uid. |
2609 | ar_nr_responses[0*5] = bytes_to_num(rUIDBCC1+1, 3); | |
2610 | if ( _7BUID ) | |
2611 | ar_nr_responses[0*5+1] = bytes_to_num(rUIDBCC2, 4); | |
2612 | ||
d2f487af | 2613 | /* |
2614 | * Regardless of what method was used to set the UID, set fifth byte and modify | |
2615 | * the ATQA for 4 or 7-byte UID | |
2616 | */ | |
d2f487af | 2617 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; |
7bc95e2e | 2618 | if (_7BUID) { |
d2f487af | 2619 | rATQA[0] = 0x44; |
8556b852 | 2620 | rUIDBCC1[0] = 0x88; |
d26849d4 | 2621 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; |
8556b852 M |
2622 | rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3]; |
2623 | } | |
2624 | ||
d2f487af | 2625 | if (MF_DBGLEVEL >= 1) { |
2626 | if (!_7BUID) { | |
b03c0f2d | 2627 | Dbprintf("4B UID: %02x%02x%02x%02x", |
2628 | rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]); | |
7bc95e2e | 2629 | } else { |
b03c0f2d | 2630 | Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x", |
2631 | rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3], | |
2632 | rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]); | |
d2f487af | 2633 | } |
2634 | } | |
7bc95e2e | 2635 | |
99cf19d9 | 2636 | // We need to listen to the high-frequency, peak-detected path. |
2637 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
2638 | ||
2639 | // free eventually allocated BigBuf memory but keep Emulator Memory | |
2640 | BigBuf_free_keep_EM(); | |
2641 | ||
2642 | // clear trace | |
2643 | clear_trace(); | |
2644 | set_tracing(TRUE); | |
2645 | ||
2646 | ||
7bc95e2e | 2647 | bool finished = FALSE; |
2b1f4228 | 2648 | while (!BUTTON_PRESS() && !finished && !usb_poll_validate_length()) { |
9ca155ba | 2649 | WDT_HIT(); |
9ca155ba M |
2650 | |
2651 | // find reader field | |
9ca155ba | 2652 | if (cardSTATE == MFEMUL_NOFIELD) { |
0c8d25eb | 2653 | vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10; |
9ca155ba | 2654 | if (vHf > MF_MINFIELDV) { |
0014cb46 | 2655 | cardSTATE_TO_IDLE(); |
9ca155ba M |
2656 | LED_A_ON(); |
2657 | } | |
2658 | } | |
d2f487af | 2659 | if(cardSTATE == MFEMUL_NOFIELD) continue; |
9ca155ba | 2660 | |
d2f487af | 2661 | //Now, get data |
6a1f2d82 | 2662 | res = EmGetCmd(receivedCmd, &len, receivedCmd_par); |
d2f487af | 2663 | if (res == 2) { //Field is off! |
2664 | cardSTATE = MFEMUL_NOFIELD; | |
2665 | LEDsoff(); | |
2666 | continue; | |
7bc95e2e | 2667 | } else if (res == 1) { |
2668 | break; //return value 1 means button press | |
2669 | } | |
2670 | ||
d2f487af | 2671 | // REQ or WUP request in ANY state and WUP in HALTED state |
2672 | if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) { | |
2673 | selTimer = GetTickCount(); | |
2674 | EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52)); | |
2675 | cardSTATE = MFEMUL_SELECT1; | |
2676 | ||
2677 | // init crypto block | |
2678 | LED_B_OFF(); | |
2679 | LED_C_OFF(); | |
2680 | crypto1_destroy(pcs); | |
2681 | cardAUTHKEY = 0xff; | |
2682 | continue; | |
0a39986e | 2683 | } |
7bc95e2e | 2684 | |
50193c1e | 2685 | switch (cardSTATE) { |
d2f487af | 2686 | case MFEMUL_NOFIELD: |
2687 | case MFEMUL_HALTED: | |
50193c1e | 2688 | case MFEMUL_IDLE:{ |
6a1f2d82 | 2689 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
50193c1e M |
2690 | break; |
2691 | } | |
2692 | case MFEMUL_SELECT1:{ | |
9ca155ba M |
2693 | // select all |
2694 | if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) { | |
d2f487af | 2695 | if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received"); |
9ca155ba | 2696 | EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1)); |
0014cb46 | 2697 | break; |
9ca155ba M |
2698 | } |
2699 | ||
d2f487af | 2700 | if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 ) |
2701 | { | |
2702 | Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]); | |
2703 | } | |
9ca155ba | 2704 | // select card |
0a39986e M |
2705 | if (len == 9 && |
2706 | (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) { | |
bfb6a143 | 2707 | EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK)); |
9ca155ba | 2708 | cuid = bytes_to_num(rUIDBCC1, 4); |
8556b852 M |
2709 | if (!_7BUID) { |
2710 | cardSTATE = MFEMUL_WORK; | |
0014cb46 M |
2711 | LED_B_ON(); |
2712 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer); | |
2713 | break; | |
8556b852 M |
2714 | } else { |
2715 | cardSTATE = MFEMUL_SELECT2; | |
8556b852 | 2716 | } |
9ca155ba | 2717 | } |
50193c1e M |
2718 | break; |
2719 | } | |
d2f487af | 2720 | case MFEMUL_AUTH1:{ |
495d7f13 | 2721 | if( len != 8) { |
d2f487af | 2722 | cardSTATE_TO_IDLE(); |
6a1f2d82 | 2723 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
d2f487af | 2724 | break; |
2725 | } | |
0c8d25eb | 2726 | |
d2f487af | 2727 | uint32_t ar = bytes_to_num(receivedCmd, 4); |
6a1f2d82 | 2728 | uint32_t nr = bytes_to_num(&receivedCmd[4], 4); |
d2f487af | 2729 | |
2730 | //Collect AR/NR | |
46cd801c | 2731 | //if(ar_nr_collected < 2 && cardAUTHSC == 2){ |
495d7f13 | 2732 | if(ar_nr_collected < 2) { |
2733 | if(ar_nr_responses[2] != ar) { | |
2734 | // Avoid duplicates... probably not necessary, ar should vary. | |
c3c241f3 | 2735 | //ar_nr_responses[ar_nr_collected*5] = 0; |
2736 | //ar_nr_responses[ar_nr_collected*5+1] = 0; | |
2737 | ar_nr_responses[ar_nr_collected*5+2] = nonce; | |
2738 | ar_nr_responses[ar_nr_collected*5+3] = nr; | |
2739 | ar_nr_responses[ar_nr_collected*5+4] = ar; | |
273b57a7 | 2740 | ar_nr_collected++; |
12d708fe | 2741 | } |
2742 | // Interactive mode flag, means we need to send ACK | |
2743 | if(flags & FLAG_INTERACTIVE && ar_nr_collected == 2) | |
12d708fe | 2744 | finished = true; |
d2f487af | 2745 | } |
2746 | ||
2747 | // --- crypto | |
c3c241f3 | 2748 | //crypto1_word(pcs, ar , 1); |
2749 | //cardRr = nr ^ crypto1_word(pcs, 0, 0); | |
2750 | ||
2751 | //test if auth OK | |
2752 | //if (cardRr != prng_successor(nonce, 64)){ | |
2753 | ||
2754 | //if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x", | |
2755 | // cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', | |
2756 | // cardRr, prng_successor(nonce, 64)); | |
7bc95e2e | 2757 | // Shouldn't we respond anything here? |
d2f487af | 2758 | // Right now, we don't nack or anything, which causes the |
2759 | // reader to do a WUPA after a while. /Martin | |
b03c0f2d | 2760 | // -- which is the correct response. /piwi |
c3c241f3 | 2761 | //cardSTATE_TO_IDLE(); |
2762 | //LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); | |
2763 | //break; | |
2764 | //} | |
d2f487af | 2765 | |
2766 | ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0); | |
2767 | ||
2768 | num_to_bytes(ans, 4, rAUTH_AT); | |
2769 | // --- crypto | |
2770 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); | |
2771 | LED_C_ON(); | |
2772 | cardSTATE = MFEMUL_WORK; | |
495d7f13 | 2773 | if (MF_DBGLEVEL >= 4) { |
2774 | Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d", | |
2775 | cardAUTHSC, | |
2776 | cardAUTHKEY == 0 ? 'A' : 'B', | |
2777 | GetTickCount() - authTimer | |
2778 | ); | |
2779 | } | |
d2f487af | 2780 | break; |
2781 | } | |
50193c1e | 2782 | case MFEMUL_SELECT2:{ |
7bc95e2e | 2783 | if (!len) { |
6a1f2d82 | 2784 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2785 | break; |
2786 | } | |
8556b852 | 2787 | if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) { |
9ca155ba | 2788 | EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2)); |
8556b852 M |
2789 | break; |
2790 | } | |
9ca155ba | 2791 | |
8556b852 M |
2792 | // select 2 card |
2793 | if (len == 9 && | |
495d7f13 | 2794 | (receivedCmd[0] == 0x95 && |
2795 | receivedCmd[1] == 0x70 && | |
2796 | memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0) ) { | |
8556b852 | 2797 | EmSendCmd(rSAK, sizeof(rSAK)); |
8556b852 M |
2798 | cuid = bytes_to_num(rUIDBCC2, 4); |
2799 | cardSTATE = MFEMUL_WORK; | |
2800 | LED_B_ON(); | |
0014cb46 | 2801 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer); |
8556b852 M |
2802 | break; |
2803 | } | |
0014cb46 M |
2804 | |
2805 | // i guess there is a command). go into the work state. | |
7bc95e2e | 2806 | if (len != 4) { |
6a1f2d82 | 2807 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2808 | break; |
2809 | } | |
0014cb46 | 2810 | cardSTATE = MFEMUL_WORK; |
d2f487af | 2811 | //goto lbWORK; |
2812 | //intentional fall-through to the next case-stmt | |
50193c1e | 2813 | } |
51969283 | 2814 | |
7bc95e2e | 2815 | case MFEMUL_WORK:{ |
2816 | if (len == 0) { | |
6a1f2d82 | 2817 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2818 | break; |
2819 | } | |
2820 | ||
d2f487af | 2821 | bool encrypted_data = (cardAUTHKEY != 0xFF) ; |
2822 | ||
495d7f13 | 2823 | // decrypt seqence |
2824 | if(encrypted_data) | |
51969283 | 2825 | mf_crypto1_decrypt(pcs, receivedCmd, len); |
7bc95e2e | 2826 | |
d2f487af | 2827 | if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) { |
2828 | authTimer = GetTickCount(); | |
2829 | cardAUTHSC = receivedCmd[1] / 4; // received block num | |
2830 | cardAUTHKEY = receivedCmd[0] - 0x60; | |
2831 | crypto1_destroy(pcs);//Added by martin | |
2832 | crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY)); | |
51969283 | 2833 | |
d2f487af | 2834 | if (!encrypted_data) { // first authentication |
b03c0f2d | 2835 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); |
51969283 | 2836 | |
d2f487af | 2837 | crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state |
2838 | num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce | |
7bc95e2e | 2839 | } else { // nested authentication |
b03c0f2d | 2840 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); |
7bc95e2e | 2841 | ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0); |
d2f487af | 2842 | num_to_bytes(ans, 4, rAUTH_AT); |
2843 | } | |
0c8d25eb | 2844 | |
d2f487af | 2845 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); |
2846 | //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]); | |
2847 | cardSTATE = MFEMUL_AUTH1; | |
2848 | break; | |
51969283 | 2849 | } |
7bc95e2e | 2850 | |
8f51ddb0 M |
2851 | // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued |
2852 | // BUT... ACK --> NACK | |
2853 | if (len == 1 && receivedCmd[0] == CARD_ACK) { | |
2854 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2855 | break; | |
2856 | } | |
2857 | ||
2858 | // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK) | |
2859 | if (len == 1 && receivedCmd[0] == CARD_NACK_NA) { | |
2860 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2861 | break; | |
0a39986e M |
2862 | } |
2863 | ||
7bc95e2e | 2864 | if(len != 4) { |
6a1f2d82 | 2865 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2866 | break; |
2867 | } | |
d2f487af | 2868 | |
2869 | if(receivedCmd[0] == 0x30 // read block | |
2870 | || receivedCmd[0] == 0xA0 // write block | |
b03c0f2d | 2871 | || receivedCmd[0] == 0xC0 // inc |
2872 | || receivedCmd[0] == 0xC1 // dec | |
2873 | || receivedCmd[0] == 0xC2 // restore | |
7bc95e2e | 2874 | || receivedCmd[0] == 0xB0) { // transfer |
2875 | if (receivedCmd[1] >= 16 * 4) { | |
d2f487af | 2876 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
c3c241f3 | 2877 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
d2f487af | 2878 | break; |
2879 | } | |
2880 | ||
7bc95e2e | 2881 | if (receivedCmd[1] / 4 != cardAUTHSC) { |
8f51ddb0 | 2882 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
c3c241f3 | 2883 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC); |
8f51ddb0 M |
2884 | break; |
2885 | } | |
d2f487af | 2886 | } |
2887 | // read block | |
2888 | if (receivedCmd[0] == 0x30) { | |
495d7f13 | 2889 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]); |
2890 | ||
8f51ddb0 M |
2891 | emlGetMem(response, receivedCmd[1], 1); |
2892 | AppendCrc14443a(response, 16); | |
6a1f2d82 | 2893 | mf_crypto1_encrypt(pcs, response, 18, response_par); |
2894 | EmSendCmdPar(response, 18, response_par); | |
d2f487af | 2895 | numReads++; |
12d708fe | 2896 | if(exitAfterNReads > 0 && numReads >= exitAfterNReads) { |
d2f487af | 2897 | Dbprintf("%d reads done, exiting", numReads); |
2898 | finished = true; | |
2899 | } | |
0a39986e M |
2900 | break; |
2901 | } | |
0a39986e | 2902 | // write block |
d2f487af | 2903 | if (receivedCmd[0] == 0xA0) { |
b03c0f2d | 2904 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]); |
8f51ddb0 | 2905 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); |
8f51ddb0 M |
2906 | cardSTATE = MFEMUL_WRITEBL2; |
2907 | cardWRBL = receivedCmd[1]; | |
0a39986e | 2908 | break; |
7bc95e2e | 2909 | } |
0014cb46 | 2910 | // increment, decrement, restore |
d2f487af | 2911 | if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) { |
b03c0f2d | 2912 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
d2f487af | 2913 | if (emlCheckValBl(receivedCmd[1])) { |
c3c241f3 | 2914 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking"); |
0014cb46 M |
2915 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2916 | break; | |
2917 | } | |
2918 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2919 | if (receivedCmd[0] == 0xC1) | |
2920 | cardSTATE = MFEMUL_INTREG_INC; | |
2921 | if (receivedCmd[0] == 0xC0) | |
2922 | cardSTATE = MFEMUL_INTREG_DEC; | |
2923 | if (receivedCmd[0] == 0xC2) | |
2924 | cardSTATE = MFEMUL_INTREG_REST; | |
2925 | cardWRBL = receivedCmd[1]; | |
0014cb46 M |
2926 | break; |
2927 | } | |
0014cb46 | 2928 | // transfer |
d2f487af | 2929 | if (receivedCmd[0] == 0xB0) { |
b03c0f2d | 2930 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
0014cb46 M |
2931 | if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1])) |
2932 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2933 | else | |
2934 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
0014cb46 M |
2935 | break; |
2936 | } | |
9ca155ba | 2937 | // halt |
d2f487af | 2938 | if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) { |
9ca155ba | 2939 | LED_B_OFF(); |
0a39986e | 2940 | LED_C_OFF(); |
0014cb46 M |
2941 | cardSTATE = MFEMUL_HALTED; |
2942 | if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer); | |
6a1f2d82 | 2943 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0a39986e | 2944 | break; |
9ca155ba | 2945 | } |
d2f487af | 2946 | // RATS |
2947 | if (receivedCmd[0] == 0xe0) {//RATS | |
8f51ddb0 M |
2948 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2949 | break; | |
2950 | } | |
d2f487af | 2951 | // command not allowed |
2952 | if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking"); | |
2953 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
51969283 | 2954 | break; |
8f51ddb0 M |
2955 | } |
2956 | case MFEMUL_WRITEBL2:{ | |
495d7f13 | 2957 | if (len == 18) { |
8f51ddb0 M |
2958 | mf_crypto1_decrypt(pcs, receivedCmd, len); |
2959 | emlSetMem(receivedCmd, cardWRBL, 1); | |
2960 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2961 | cardSTATE = MFEMUL_WORK; | |
51969283 | 2962 | } else { |
0014cb46 | 2963 | cardSTATE_TO_IDLE(); |
6a1f2d82 | 2964 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
8f51ddb0 | 2965 | } |
8f51ddb0 | 2966 | break; |
50193c1e | 2967 | } |
0014cb46 M |
2968 | |
2969 | case MFEMUL_INTREG_INC:{ | |
2970 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2971 | memcpy(&ans, receivedCmd, 4); | |
2972 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2973 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2974 | cardSTATE_TO_IDLE(); | |
2975 | break; | |
7bc95e2e | 2976 | } |
6a1f2d82 | 2977 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2978 | cardINTREG = cardINTREG + ans; |
2979 | cardSTATE = MFEMUL_WORK; | |
2980 | break; | |
2981 | } | |
2982 | case MFEMUL_INTREG_DEC:{ | |
2983 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2984 | memcpy(&ans, receivedCmd, 4); | |
2985 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2986 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2987 | cardSTATE_TO_IDLE(); | |
2988 | break; | |
2989 | } | |
6a1f2d82 | 2990 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2991 | cardINTREG = cardINTREG - ans; |
2992 | cardSTATE = MFEMUL_WORK; | |
2993 | break; | |
2994 | } | |
2995 | case MFEMUL_INTREG_REST:{ | |
2996 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2997 | memcpy(&ans, receivedCmd, 4); | |
2998 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2999 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
3000 | cardSTATE_TO_IDLE(); | |
3001 | break; | |
3002 | } | |
6a1f2d82 | 3003 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
3004 | cardSTATE = MFEMUL_WORK; |
3005 | break; | |
3006 | } | |
50193c1e | 3007 | } |
50193c1e M |
3008 | } |
3009 | ||
9ca155ba M |
3010 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
3011 | LEDsoff(); | |
3012 | ||
810f5379 | 3013 | // Interactive mode flag, means we need to send ACK |
3014 | if(flags & FLAG_INTERACTIVE) { | |
d2f487af | 3015 | //May just aswell send the collected ar_nr in the response aswell |
c3c241f3 | 3016 | uint8_t len = ar_nr_collected*5*4; |
3017 | cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len); | |
d2f487af | 3018 | } |
d714d3ef | 3019 | |
810f5379 | 3020 | if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1 ) { |
12d708fe | 3021 | if(ar_nr_collected > 1 ) { |
d2f487af | 3022 | Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:"); |
c3c241f3 | 3023 | Dbprintf("../tools/mfkey/mfkey32 %06x%08x %08x %08x %08x %08x %08x", |
3024 | ar_nr_responses[0], // UID1 | |
3025 | ar_nr_responses[1], // UID2 | |
3026 | ar_nr_responses[2], // NT | |
3027 | ar_nr_responses[3], // AR1 | |
3028 | ar_nr_responses[4], // NR1 | |
3029 | ar_nr_responses[8], // AR2 | |
3030 | ar_nr_responses[9] // NR2 | |
d2f487af | 3031 | ); |
7838f4be | 3032 | Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x", |
3033 | ar_nr_responses[0], // UID1 | |
3034 | ar_nr_responses[1], // UID2 | |
3035 | ar_nr_responses[2], // NT1 | |
3036 | ar_nr_responses[3], // AR1 | |
3037 | ar_nr_responses[4], // NR1 | |
3038 | ar_nr_responses[7], // NT2 | |
3039 | ar_nr_responses[8], // AR2 | |
3040 | ar_nr_responses[9] // NR2 | |
3041 | ); | |
7bc95e2e | 3042 | } else { |
d2f487af | 3043 | Dbprintf("Failed to obtain two AR/NR pairs!"); |
12d708fe | 3044 | if(ar_nr_collected > 0 ) { |
2b1f4228 | 3045 | Dbprintf("Only got these: UID=%06x%08x, nonce=%08x, AR1=%08x, NR1=%08x", |
c3c241f3 | 3046 | ar_nr_responses[0], // UID1 |
3047 | ar_nr_responses[1], // UID2 | |
3048 | ar_nr_responses[2], // NT | |
3049 | ar_nr_responses[3], // AR1 | |
3050 | ar_nr_responses[4] // NR1 | |
d2f487af | 3051 | ); |
3052 | } | |
3053 | } | |
3054 | } | |
c3c241f3 | 3055 | if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen()); |
5ee53a0e | 3056 | |
3057 | set_tracing(FALSE); | |
15c4dc5a | 3058 | } |
b62a5a84 | 3059 | |
d2f487af | 3060 | |
b62a5a84 M |
3061 | //----------------------------------------------------------------------------- |
3062 | // MIFARE sniffer. | |
3063 | // | |
3064 | //----------------------------------------------------------------------------- | |
5cd9ec01 M |
3065 | void RAMFUNC SniffMifare(uint8_t param) { |
3066 | // param: | |
3067 | // bit 0 - trigger from first card answer | |
3068 | // bit 1 - trigger from first reader 7-bit request | |
b62a5a84 | 3069 | LEDsoff(); |
810f5379 | 3070 | |
b62a5a84 | 3071 | // init trace buffer |
3000dc4e MHS |
3072 | clear_trace(); |
3073 | set_tracing(TRUE); | |
b62a5a84 | 3074 | |
b62a5a84 M |
3075 | // The command (reader -> tag) that we're receiving. |
3076 | // The length of a received command will in most cases be no more than 18 bytes. | |
3077 | // So 32 should be enough! | |
810f5379 | 3078 | uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00}; |
495d7f13 | 3079 | uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE] = {0x00}; |
810f5379 | 3080 | |
b62a5a84 | 3081 | // The response (tag -> reader) that we're receiving. |
495d7f13 | 3082 | uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE] = {0x00}; |
3083 | uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE] = {0x00}; | |
b62a5a84 | 3084 | |
99cf19d9 | 3085 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); |
3086 | ||
3087 | // free eventually allocated BigBuf memory | |
3088 | BigBuf_free(); | |
810f5379 | 3089 | |
f71f4deb | 3090 | // allocate the DMA buffer, used to stream samples from the FPGA |
3091 | uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE); | |
7bc95e2e | 3092 | uint8_t *data = dmaBuf; |
3093 | uint8_t previous_data = 0; | |
5cd9ec01 M |
3094 | int maxDataLen = 0; |
3095 | int dataLen = 0; | |
7bc95e2e | 3096 | bool ReaderIsActive = FALSE; |
3097 | bool TagIsActive = FALSE; | |
3098 | ||
b62a5a84 | 3099 | // Set up the demodulator for tag -> reader responses. |
6a1f2d82 | 3100 | DemodInit(receivedResponse, receivedResponsePar); |
b62a5a84 M |
3101 | |
3102 | // Set up the demodulator for the reader -> tag commands | |
6a1f2d82 | 3103 | UartInit(receivedCmd, receivedCmdPar); |
b62a5a84 M |
3104 | |
3105 | // Setup for the DMA. | |
7bc95e2e | 3106 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer. |
b62a5a84 | 3107 | |
b62a5a84 | 3108 | LED_D_OFF(); |
39864b0b M |
3109 | |
3110 | // init sniffer | |
3111 | MfSniffInit(); | |
b62a5a84 | 3112 | |
b62a5a84 | 3113 | // And now we loop, receiving samples. |
7bc95e2e | 3114 | for(uint32_t sniffCounter = 0; TRUE; ) { |
3115 | ||
5cd9ec01 M |
3116 | if(BUTTON_PRESS()) { |
3117 | DbpString("cancelled by button"); | |
7bc95e2e | 3118 | break; |
5cd9ec01 M |
3119 | } |
3120 | ||
b62a5a84 M |
3121 | LED_A_ON(); |
3122 | WDT_HIT(); | |
39864b0b | 3123 | |
7bc95e2e | 3124 | if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time |
3125 | // check if a transaction is completed (timeout after 2000ms). | |
3126 | // if yes, stop the DMA transfer and send what we have so far to the client | |
3127 | if (MfSniffSend(2000)) { | |
3128 | // Reset everything - we missed some sniffed data anyway while the DMA was stopped | |
3129 | sniffCounter = 0; | |
3130 | data = dmaBuf; | |
3131 | maxDataLen = 0; | |
3132 | ReaderIsActive = FALSE; | |
3133 | TagIsActive = FALSE; | |
3134 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer. | |
39864b0b | 3135 | } |
39864b0b | 3136 | } |
7bc95e2e | 3137 | |
3138 | int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far | |
3139 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred | |
495d7f13 | 3140 | |
3141 | if (readBufDataP <= dmaBufDataP) // we are processing the same block of data which is currently being transferred | |
7bc95e2e | 3142 | dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed |
495d7f13 | 3143 | else |
7bc95e2e | 3144 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed |
495d7f13 | 3145 | |
5cd9ec01 | 3146 | // test for length of buffer |
7bc95e2e | 3147 | if(dataLen > maxDataLen) { // we are more behind than ever... |
3148 | maxDataLen = dataLen; | |
f71f4deb | 3149 | if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) { |
5cd9ec01 | 3150 | Dbprintf("blew circular buffer! dataLen=0x%x", dataLen); |
7bc95e2e | 3151 | break; |
b62a5a84 M |
3152 | } |
3153 | } | |
5cd9ec01 | 3154 | if(dataLen < 1) continue; |
b62a5a84 | 3155 | |
7bc95e2e | 3156 | // primary buffer was stopped ( <-- we lost data! |
5cd9ec01 M |
3157 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { |
3158 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
3159 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
55acbb2a | 3160 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
3161 | } |
3162 | // secondary buffer sets as primary, secondary buffer was stopped | |
3163 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
3164 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
b62a5a84 M |
3165 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; |
3166 | } | |
5cd9ec01 M |
3167 | |
3168 | LED_A_OFF(); | |
b62a5a84 | 3169 | |
7bc95e2e | 3170 | if (sniffCounter & 0x01) { |
b62a5a84 | 3171 | |
495d7f13 | 3172 | // no need to try decoding tag data if the reader is sending |
3173 | if(!TagIsActive) { | |
7bc95e2e | 3174 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); |
3175 | if(MillerDecoding(readerdata, (sniffCounter-1)*4)) { | |
3176 | LED_C_INV(); | |
495d7f13 | 3177 | |
6a1f2d82 | 3178 | if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break; |
b62a5a84 | 3179 | |
7bc95e2e | 3180 | /* And ready to receive another command. */ |
f8ada309 | 3181 | UartInit(receivedCmd, receivedCmdPar); |
7bc95e2e | 3182 | |
3183 | /* And also reset the demod code */ | |
3184 | DemodReset(); | |
3185 | } | |
3186 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
3187 | } | |
3188 | ||
495d7f13 | 3189 | // no need to try decoding tag data if the reader is sending |
3190 | if(!ReaderIsActive) { | |
7bc95e2e | 3191 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); |
3192 | if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) { | |
3193 | LED_C_INV(); | |
b62a5a84 | 3194 | |
6a1f2d82 | 3195 | if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break; |
39864b0b | 3196 | |
7bc95e2e | 3197 | // And ready to receive another response. |
3198 | DemodReset(); | |
495d7f13 | 3199 | |
0ec548dc | 3200 | // And reset the Miller decoder including its (now outdated) input buffer |
3201 | UartInit(receivedCmd, receivedCmdPar); | |
7bc95e2e | 3202 | } |
3203 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
3204 | } | |
b62a5a84 M |
3205 | } |
3206 | ||
7bc95e2e | 3207 | previous_data = *data; |
3208 | sniffCounter++; | |
5cd9ec01 | 3209 | data++; |
495d7f13 | 3210 | |
3211 | if(data == dmaBuf + DMA_BUFFER_SIZE) | |
5cd9ec01 | 3212 | data = dmaBuf; |
7bc95e2e | 3213 | |
b62a5a84 M |
3214 | } // main cycle |
3215 | ||
55acbb2a | 3216 | FpgaDisableSscDma(); |
39864b0b | 3217 | MfSniffEnd(); |
b62a5a84 | 3218 | LEDsoff(); |
7838f4be | 3219 | Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len); |
5ee53a0e | 3220 | set_tracing(FALSE); |
3803d529 | 3221 | } |