NET "PCI_STOPn" LOC = "A12" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
NET "PCI_TRDYn" LOC = "B13" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
NET "PCI_PAR" LOC = "A9" | IOSTANDARD = PCI33_3 | SLEW = FAST ;
+NET "TAST_RESn" LOC = "AA3" | IOSTANDARD = LVTTL | PULLUP ;
+NET "TAST_SETn" LOC = "Y4" | IOSTANDARD = LVTTL | PULLUP ;
+NET "LED_2" LOC = "AB5" | IOSTANDARD = LVTTL | DRIVE = 24 ;
+NET "LED_3" LOC = "AA5" | IOSTANDARD = LVTTL | DRIVE = 24 ;
+NET "LED_4" LOC = "AA4" | IOSTANDARD = LVTTL | DRIVE = 24 ;
+NET "LED_5" LOC = "AB4" | IOSTANDARD = LVTTL | DRIVE = 24 ;
end if;\r
end process;\r
\r
- SIG_PROPAGATE_INT <= SIG_TAST_Q \r
- OR (REG(0) AND INT_MASKE(0)) \r
- OR (REG(1) AND INT_MASKE(1))\r
- OR (REG(2) AND INT_MASKE(2))\r
- OR (REG(3) AND INT_MASKE(3))\r
- OR (REG(4) AND INT_MASKE(4))\r
- OR (REG(5) AND INT_MASKE(5))\r
- OR (REG(6) AND INT_MASKE(6))\r
- OR (REG(7) AND INT_MASKE(7));\r
+ SIG_PROPAGATE_INT <= SIG_TAST_Q\r
+ OR (REG(0) AND not INT_MASKE(0)) \r
+ OR (REG(1) AND not INT_MASKE(1))\r
+ OR (REG(2) AND not INT_MASKE(2))\r
+ OR (REG(3) AND not INT_MASKE(3))\r
+ OR (REG(4) AND not INT_MASKE(4))\r
+ OR (REG(5) AND not INT_MASKE(5))\r
+ OR (REG(6) AND not INT_MASKE(6))\r
+ OR (REG(7) AND not INT_MASKE(7));\r
\r
process (PCI_CLOCK)\r
begin\r
\r
\r
INTAn <= not SIG_PROPAGATE_INT_SECOND;\r
- PCI_INTAn <= '1' when SIG_PROPAGATE_INT_SECOND = '0' else 'Z';\r
+ PCI_INTAn <= '0' when SIG_PROPAGATE_INT_SECOND = '0' else 'Z';\r
\r
INT_REG <= REG;\r
\r
-- SPC_RDY_IN : In std_logic;\r
TAST_RESn : In std_logic;\r
TAST_SETn : In std_logic;\r
+ LED_2 : out std_logic;\r
+ LED_3 : out std_logic;\r
+ LED_4 : out std_logic;\r
+ LED_5 : out std_logic;\r
PCI_AD : InOut std_logic_vector (31 downto 0);\r
PCI_PAR : InOut std_logic;\r
PCI_DEVSELn : Out std_logic;\r
signal SPC_RDY_IN : std_logic;\r
signal SERIAL_OUT : std_logic;\r
signal SPC_RDY_OUT : std_logic;\r
+ signal watch : std_logic;\r
\r
component MESS_1_TB\r
Port ( DEVSELn : In std_logic;\r
begin\r
SERIAL_IN <= SERIAL_OUT;\r
SPC_RDY_IN <= SPC_RDY_OUT;\r
+ LED_2 <= TAST_RESn;\r
+ LED_3 <= TAST_SETn;\r
+ LED_4 <= '0';\r
+ LED_5 <= not watch;\r
+ PCI_INTAn <= watch;\r
\r
I19 : MESS_1_TB\r
Port Map ( DEVSELn=>DEVSELn, INTAn=>INTAn, KONST_1=>KONST_1,\r
READ_XX5_4=>READ_XX5_4, RESET=>REG_OUT_XX7(0),\r
TAST_RESn=>TAST_RESn, TAST_SETn=>TAST_SETn,\r
TRDYn=>TRDYn, INT_REG(7 downto 0)=>INT_REG(7 downto 0),\r
- INTAn=>INTAn, PCI_INTAn=>PCI_INTAn );\r
+ INTAn=>INTAn, PCI_INTAn=>watch);\r
I14 : FIFO_CONTROL\r
Port Map ( FIFO_RDn=>FIFO_RDn, FLAG_IN_0=>R_ERROR,\r
FLAG_IN_4=>S_ERROR, HOLD=>READ_SEL(0), KONST_1=>KONST_1,\r