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ADD: the option to simulate tnp3xxx inthe command "hf mf sim"
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15c4dc5a 1//-----------------------------------------------------------------------------
b62a5a84 2// Merlok - June 2011, 2012
15c4dc5a 3// Gerhard de Koning Gans - May 2008
534983d7 4// Hagen Fritsch - June 2010
bd20f8f4 5//
6// This code is licensed to you under the terms of the GNU GPL, version 2 or,
7// at your option, any later version. See the LICENSE.txt file for the text of
8// the license.
15c4dc5a 9//-----------------------------------------------------------------------------
bd20f8f4 10// Routines to support ISO 14443 type A.
11//-----------------------------------------------------------------------------
12
f38a1528 13#include "../include/proxmark3.h"
15c4dc5a 14#include "apps.h"
f7e3ed82 15#include "util.h"
9ab7a6c7 16#include "string.h"
f38a1528 17#include "../common/cmd.h"
18#include "../common/iso14443crc.h"
534983d7 19#include "iso14443a.h"
20f9a2a1
M
20#include "crapto1.h"
21#include "mifareutil.h"
15c4dc5a 22
534983d7 23static uint32_t iso14a_timeout;
d19929cb 24uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
1e262141 25int rsamples = 0;
7bc95e2e 26int traceLen = 0;
1e262141 27int tracing = TRUE;
28uint8_t trigger = 0;
b0127e65 29// the block number for the ISO14443-4 PCB
30static uint8_t iso14_pcb_blocknum = 0;
15c4dc5a 31
7bc95e2e 32//
33// ISO14443 timing:
34//
35// minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
36#define REQUEST_GUARD_TIME (7000/16 + 1)
37// minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
38#define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
39// bool LastCommandWasRequest = FALSE;
40
41//
42// Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
43//
d714d3ef 44// When the PM acts as reader and is receiving tag data, it takes
45// 3 ticks delay in the AD converter
46// 16 ticks until the modulation detector completes and sets curbit
47// 8 ticks until bit_to_arm is assigned from curbit
48// 8*16 ticks for the transfer from FPGA to ARM
7bc95e2e 49// 4*16 ticks until we measure the time
50// - 8*16 ticks because we measure the time of the previous transfer
d714d3ef 51#define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
7bc95e2e 52
53// When the PM acts as a reader and is sending, it takes
54// 4*16 ticks until we can write data to the sending hold register
55// 8*16 ticks until the SHR is transferred to the Sending Shift Register
56// 8 ticks until the first transfer starts
57// 8 ticks later the FPGA samples the data
58// 1 tick to assign mod_sig_coil
59#define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
60
61// When the PM acts as tag and is receiving it takes
d714d3ef 62// 2 ticks delay in the RF part (for the first falling edge),
7bc95e2e 63// 3 ticks for the A/D conversion,
64// 8 ticks on average until the start of the SSC transfer,
65// 8 ticks until the SSC samples the first data
66// 7*16 ticks to complete the transfer from FPGA to ARM
67// 8 ticks until the next ssp_clk rising edge
d714d3ef 68// 4*16 ticks until we measure the time
7bc95e2e 69// - 8*16 ticks because we measure the time of the previous transfer
d714d3ef 70#define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
7bc95e2e 71
72// The FPGA will report its internal sending delay in
73uint16_t FpgaSendQueueDelay;
74// the 5 first bits are the number of bits buffered in mod_sig_buf
75// the last three bits are the remaining ticks/2 after the mod_sig_buf shift
76#define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
77
78// When the PM acts as tag and is sending, it takes
d714d3ef 79// 4*16 ticks until we can write data to the sending hold register
7bc95e2e 80// 8*16 ticks until the SHR is transferred to the Sending Shift Register
81// 8 ticks until the first transfer starts
82// 8 ticks later the FPGA samples the data
83// + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
84// + 1 tick to assign mod_sig_coil
d714d3ef 85#define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
7bc95e2e 86
87// When the PM acts as sniffer and is receiving tag data, it takes
88// 3 ticks A/D conversion
d714d3ef 89// 14 ticks to complete the modulation detection
90// 8 ticks (on average) until the result is stored in to_arm
7bc95e2e 91// + the delays in transferring data - which is the same for
92// sniffing reader and tag data and therefore not relevant
d714d3ef 93#define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
7bc95e2e 94
d714d3ef 95// When the PM acts as sniffer and is receiving reader data, it takes
96// 2 ticks delay in analogue RF receiver (for the falling edge of the
97// start bit, which marks the start of the communication)
7bc95e2e 98// 3 ticks A/D conversion
d714d3ef 99// 8 ticks on average until the data is stored in to_arm.
7bc95e2e 100// + the delays in transferring data - which is the same for
101// sniffing reader and tag data and therefore not relevant
d714d3ef 102#define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
7bc95e2e 103
104//variables used for timing purposes:
105//these are in ssp_clk cycles:
106uint32_t NextTransferTime;
107uint32_t LastTimeProxToAirStart;
108uint32_t LastProxToAirDuration;
109
110
111
8f51ddb0 112// CARD TO READER - manchester
72934aa3 113// Sequence D: 11110000 modulation with subcarrier during first half
114// Sequence E: 00001111 modulation with subcarrier during second half
115// Sequence F: 00000000 no modulation with subcarrier
8f51ddb0 116// READER TO CARD - miller
72934aa3 117// Sequence X: 00001100 drop after half a period
118// Sequence Y: 00000000 no drop
119// Sequence Z: 11000000 drop at start
120#define SEC_D 0xf0
121#define SEC_E 0x0f
122#define SEC_F 0x00
123#define SEC_X 0x0c
124#define SEC_Y 0x00
125#define SEC_Z 0xc0
15c4dc5a 126
95e63594 127//replaced large parity table with small parity generation function - saves flash code
128/*
1e262141 129const uint8_t OddByteParity[256] = {
15c4dc5a 130 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
131 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
132 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
133 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
134 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
135 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
136 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
137 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
138 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
139 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
140 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
141 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
142 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
143 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
144 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
145 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
146};
95e63594 147*/
1e262141 148
902cb3c0 149void iso14a_set_trigger(bool enable) {
534983d7 150 trigger = enable;
151}
152
902cb3c0 153void iso14a_clear_trace() {
7bc95e2e 154 memset(trace, 0x44, TRACE_SIZE);
8556b852
M
155 traceLen = 0;
156}
d19929cb 157
902cb3c0 158void iso14a_set_tracing(bool enable) {
8556b852
M
159 tracing = enable;
160}
d19929cb 161
b0127e65 162void iso14a_set_timeout(uint32_t timeout) {
163 iso14a_timeout = timeout;
164}
8556b852 165
15c4dc5a 166//-----------------------------------------------------------------------------
167// Generate the parity value for a byte sequence
e30c654b 168//
15c4dc5a 169//-----------------------------------------------------------------------------
95e63594 170/*
20f9a2a1
M
171byte_t oddparity (const byte_t bt)
172{
5f6d6c90 173 return OddByteParity[bt];
20f9a2a1 174}
95e63594 175*/
20f9a2a1 176
f7e3ed82 177uint32_t GetParity(const uint8_t * pbtCmd, int iLen)
15c4dc5a 178{
5f6d6c90 179 int i;
180 uint32_t dwPar = 0;
72934aa3 181
e691fc45 182 // Generate the parity bits
5f6d6c90 183 for (i = 0; i < iLen; i++) {
e691fc45 184 // and save them to a 32Bit word
95e63594 185 //dwPar |= ((OddByteParity[pbtCmd[i]]) << i);
186 dwPar |= (oddparity(pbtCmd[i]) << i);
5f6d6c90 187 }
188 return dwPar;
15c4dc5a 189}
190
534983d7 191void AppendCrc14443a(uint8_t* data, int len)
15c4dc5a 192{
5f6d6c90 193 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
15c4dc5a 194}
195
1e262141 196// The function LogTrace() is also used by the iClass implementation in iClass.c
17cba269 197bool RAMFUNC LogTrace(const uint8_t * btBytes, uint8_t iLen, uint32_t timestamp, uint32_t dwParity, bool readerToTag)
15c4dc5a 198{
fdcd43eb 199 if (!tracing) return FALSE;
7bc95e2e 200 // Return when trace is full
201 if (traceLen + sizeof(timestamp) + sizeof(dwParity) + iLen >= TRACE_SIZE) {
202 tracing = FALSE; // don't trace any more
203 return FALSE;
204 }
205
206 // Trace the random, i'm curious
207 trace[traceLen++] = ((timestamp >> 0) & 0xff);
208 trace[traceLen++] = ((timestamp >> 8) & 0xff);
209 trace[traceLen++] = ((timestamp >> 16) & 0xff);
210 trace[traceLen++] = ((timestamp >> 24) & 0xff);
17cba269
MHS
211
212 if (!readerToTag) {
7bc95e2e 213 trace[traceLen - 1] |= 0x80;
214 }
215 trace[traceLen++] = ((dwParity >> 0) & 0xff);
216 trace[traceLen++] = ((dwParity >> 8) & 0xff);
217 trace[traceLen++] = ((dwParity >> 16) & 0xff);
218 trace[traceLen++] = ((dwParity >> 24) & 0xff);
219 trace[traceLen++] = iLen;
220 if (btBytes != NULL && iLen != 0) {
221 memcpy(trace + traceLen, btBytes, iLen);
222 }
223 traceLen += iLen;
224 return TRUE;
15c4dc5a 225}
226
7bc95e2e 227//=============================================================================
228// ISO 14443 Type A - Miller decoder
229//=============================================================================
230// Basics:
231// This decoder is used when the PM3 acts as a tag.
232// The reader will generate "pauses" by temporarily switching of the field.
233// At the PM3 antenna we will therefore measure a modulated antenna voltage.
234// The FPGA does a comparison with a threshold and would deliver e.g.:
235// ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
236// The Miller decoder needs to identify the following sequences:
237// 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
238// 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
239// 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
240// Note 1: the bitstream may start at any time. We therefore need to sync.
241// Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
15c4dc5a 242//-----------------------------------------------------------------------------
b62a5a84 243static tUart Uart;
15c4dc5a 244
d7aa3739 245// Lookup-Table to decide if 4 raw bits are a modulation.
246// We accept two or three consecutive "0" in any position with the rest "1"
247const bool Mod_Miller_LUT[] = {
248 TRUE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE,
249 TRUE, TRUE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE
250};
251#define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4])
252#define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)])
253
7bc95e2e 254void UartReset()
15c4dc5a 255{
7bc95e2e 256 Uart.state = STATE_UNSYNCD;
257 Uart.bitCount = 0;
258 Uart.len = 0; // number of decoded data bytes
259 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
260 Uart.parityBits = 0; //
261 Uart.twoBits = 0x0000; // buffer for 2 Bits
262 Uart.highCnt = 0;
263 Uart.startTime = 0;
264 Uart.endTime = 0;
265}
15c4dc5a 266
d714d3ef 267
7bc95e2e 268// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
269static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
270{
15c4dc5a 271
7bc95e2e 272 Uart.twoBits = (Uart.twoBits << 8) | bit;
273
274 if (Uart.state == STATE_UNSYNCD) { // not yet synced
275 if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
276 if (Uart.twoBits == 0xffff) {
277 Uart.highCnt++;
278 } else {
279 Uart.highCnt = 0;
15c4dc5a 280 }
7bc95e2e 281 } else {
282 Uart.syncBit = 0xFFFF; // not set
283 // look for 00xx1111 (the start bit)
284 if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
285 else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
286 else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
287 else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
288 else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
289 else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
290 else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
291 else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
292 if (Uart.syncBit != 0xFFFF) {
293 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
294 Uart.startTime -= Uart.syncBit;
d7aa3739 295 Uart.endTime = Uart.startTime;
7bc95e2e 296 Uart.state = STATE_START_OF_COMMUNICATION;
15c4dc5a 297 }
7bc95e2e 298 }
15c4dc5a 299
7bc95e2e 300 } else {
15c4dc5a 301
d7aa3739 302 if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) {
303 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error
304 UartReset();
305 Uart.highCnt = 6;
306 } else { // Modulation in first half = Sequence Z = logic "0"
7bc95e2e 307 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
308 UartReset();
309 Uart.highCnt = 6;
310 } else {
311 Uart.bitCount++;
312 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
313 Uart.state = STATE_MILLER_Z;
314 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
315 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
316 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
317 Uart.parityBits <<= 1; // make room for the parity bit
318 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
319 Uart.bitCount = 0;
320 Uart.shiftReg = 0;
15c4dc5a 321 }
7bc95e2e 322 }
d7aa3739 323 }
324 } else {
325 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
7bc95e2e 326 Uart.bitCount++;
327 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
328 Uart.state = STATE_MILLER_X;
329 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
330 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
331 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
332 Uart.parityBits <<= 1; // make room for the new parity bit
333 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
334 Uart.bitCount = 0;
335 Uart.shiftReg = 0;
336 }
d7aa3739 337 } else { // no modulation in both halves - Sequence Y
7bc95e2e 338 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
15c4dc5a 339 Uart.state = STATE_UNSYNCD;
7bc95e2e 340 if(Uart.len == 0 && Uart.bitCount > 0) { // if we decoded some bits
341 Uart.shiftReg >>= (9 - Uart.bitCount); // add them to the output
342 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
343 Uart.parityBits <<= 1; // no parity bit - add "0"
d7aa3739 344 Uart.bitCount--; // last "0" was part of the EOC sequence
7bc95e2e 345 }
15c4dc5a 346 return TRUE;
347 }
7bc95e2e 348 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
349 UartReset();
350 Uart.highCnt = 6;
351 } else { // a logic "0"
352 Uart.bitCount++;
353 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
354 Uart.state = STATE_MILLER_Y;
355 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
356 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
357 Uart.parityBits <<= 1; // make room for the parity bit
358 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
359 Uart.bitCount = 0;
360 Uart.shiftReg = 0;
15c4dc5a 361 }
362 }
d7aa3739 363 }
15c4dc5a 364 }
7bc95e2e 365
366 }
15c4dc5a 367
7bc95e2e 368 return FALSE; // not finished yet, need more data
15c4dc5a 369}
370
7bc95e2e 371
372
15c4dc5a 373//=============================================================================
e691fc45 374// ISO 14443 Type A - Manchester decoder
15c4dc5a 375//=============================================================================
e691fc45 376// Basics:
7bc95e2e 377// This decoder is used when the PM3 acts as a reader.
e691fc45 378// The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
379// at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
380// ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
381// The Manchester decoder needs to identify the following sequences:
382// 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
383// 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
384// 8 ticks unmodulated: Sequence F = end of communication
385// 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
7bc95e2e 386// Note 1: the bitstream may start at any time. We therefore need to sync.
e691fc45 387// Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
b62a5a84 388static tDemod Demod;
15c4dc5a 389
d7aa3739 390// Lookup-Table to decide if 4 raw bits are a modulation.
d714d3ef 391// We accept three or four "1" in any position
7bc95e2e 392const bool Mod_Manchester_LUT[] = {
d7aa3739 393 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
d714d3ef 394 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
7bc95e2e 395};
396
397#define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
398#define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
15c4dc5a 399
2f2d9fc5 400
7bc95e2e 401void DemodReset()
e691fc45 402{
7bc95e2e 403 Demod.state = DEMOD_UNSYNCD;
404 Demod.len = 0; // number of decoded data bytes
405 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
406 Demod.parityBits = 0; //
407 Demod.collisionPos = 0; // Position of collision bit
408 Demod.twoBits = 0xffff; // buffer for 2 Bits
409 Demod.highCnt = 0;
410 Demod.startTime = 0;
411 Demod.endTime = 0;
e691fc45 412}
15c4dc5a 413
7bc95e2e 414// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
415static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
e691fc45 416{
7bc95e2e 417
418 Demod.twoBits = (Demod.twoBits << 8) | bit;
e691fc45 419
7bc95e2e 420 if (Demod.state == DEMOD_UNSYNCD) {
421
422 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
423 if (Demod.twoBits == 0x0000) {
424 Demod.highCnt++;
425 } else {
426 Demod.highCnt = 0;
427 }
428 } else {
429 Demod.syncBit = 0xFFFF; // not set
430 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
431 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
432 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
433 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
434 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
435 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
436 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
437 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
d7aa3739 438 if (Demod.syncBit != 0xFFFF) {
7bc95e2e 439 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
440 Demod.startTime -= Demod.syncBit;
441 Demod.bitCount = offset; // number of decoded data bits
e691fc45 442 Demod.state = DEMOD_MANCHESTER_DATA;
2f2d9fc5 443 }
7bc95e2e 444 }
15c4dc5a 445
7bc95e2e 446 } else {
15c4dc5a 447
7bc95e2e 448 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
449 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
e691fc45 450 if (!Demod.collisionPos) {
451 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
452 }
453 } // modulation in first half only - Sequence D = 1
7bc95e2e 454 Demod.bitCount++;
455 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
456 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
e691fc45 457 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
7bc95e2e 458 Demod.parityBits <<= 1; // make room for the parity bit
e691fc45 459 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
460 Demod.bitCount = 0;
461 Demod.shiftReg = 0;
15c4dc5a 462 }
7bc95e2e 463 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
464 } else { // no modulation in first half
465 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
e691fc45 466 Demod.bitCount++;
7bc95e2e 467 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
e691fc45 468 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
e691fc45 469 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
7bc95e2e 470 Demod.parityBits <<= 1; // make room for the new parity bit
e691fc45 471 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
472 Demod.bitCount = 0;
473 Demod.shiftReg = 0;
15c4dc5a 474 }
7bc95e2e 475 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
e691fc45 476 } else { // no modulation in both halves - End of communication
d7aa3739 477 if (Demod.len > 0 || Demod.bitCount > 0) { // received something
478 if(Demod.bitCount > 0) { // if we decoded bits
479 Demod.shiftReg >>= (9 - Demod.bitCount); // add the remaining decoded bits to the output
480 Demod.output[Demod.len++] = Demod.shiftReg & 0xff;
481 // No parity bit, so just shift a 0
482 Demod.parityBits <<= 1;
483 }
484 return TRUE; // we are finished with decoding the raw data sequence
485 } else { // nothing received. Start over
486 DemodReset();
e691fc45 487 }
15c4dc5a 488 }
7bc95e2e 489 }
e691fc45 490
491 }
15c4dc5a 492
e691fc45 493 return FALSE; // not finished yet, need more data
15c4dc5a 494}
495
496//=============================================================================
497// Finally, a `sniffer' for ISO 14443 Type A
498// Both sides of communication!
499//=============================================================================
500
501//-----------------------------------------------------------------------------
502// Record the sequence of commands sent by the reader to the tag, with
503// triggering so that we start recording at the point that the tag is moved
504// near the reader.
505//-----------------------------------------------------------------------------
5cd9ec01
M
506void RAMFUNC SnoopIso14443a(uint8_t param) {
507 // param:
508 // bit 0 - trigger from first card answer
509 // bit 1 - trigger from first reader 7-bit request
510
511 LEDsoff();
512 // init trace buffer
5f6d6c90 513 iso14a_clear_trace();
991f13f2 514 iso14a_set_tracing(TRUE);
5cd9ec01
M
515
516 // We won't start recording the frames that we acquire until we trigger;
517 // a good trigger condition to get started is probably when we see a
518 // response from the tag.
519 // triggered == FALSE -- to wait first for card
7bc95e2e 520 bool triggered = !(param & 0x03);
521
5cd9ec01 522 // The command (reader -> tag) that we're receiving.
15c4dc5a 523 // The length of a received command will in most cases be no more than 18 bytes.
524 // So 32 should be enough!
5cd9ec01
M
525 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
526 // The response (tag -> reader) that we're receiving.
527 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
15c4dc5a 528
5cd9ec01
M
529 // As we receive stuff, we copy it from receivedCmd or receivedResponse
530 // into trace, along with its length and other annotations.
531 //uint8_t *trace = (uint8_t *)BigBuf;
532
533 // The DMA buffer, used to stream samples from the FPGA
7bc95e2e 534 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
535 uint8_t *data = dmaBuf;
536 uint8_t previous_data = 0;
5cd9ec01
M
537 int maxDataLen = 0;
538 int dataLen = 0;
7bc95e2e 539 bool TagIsActive = FALSE;
540 bool ReaderIsActive = FALSE;
541
542 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
15c4dc5a 543
5cd9ec01
M
544 // Set up the demodulator for tag -> reader responses.
545 Demod.output = receivedResponse;
15c4dc5a 546
5cd9ec01 547 // Set up the demodulator for the reader -> tag commands
5cd9ec01 548 Uart.output = receivedCmd;
15c4dc5a 549
7bc95e2e 550 // Setup and start DMA.
5cd9ec01 551 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
7bc95e2e 552
5cd9ec01 553 // And now we loop, receiving samples.
7bc95e2e 554 for(uint32_t rsamples = 0; TRUE; ) {
555
5cd9ec01
M
556 if(BUTTON_PRESS()) {
557 DbpString("cancelled by button");
7bc95e2e 558 break;
5cd9ec01 559 }
15c4dc5a 560
5cd9ec01
M
561 LED_A_ON();
562 WDT_HIT();
15c4dc5a 563
5cd9ec01
M
564 int register readBufDataP = data - dmaBuf;
565 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
566 if (readBufDataP <= dmaBufDataP){
567 dataLen = dmaBufDataP - readBufDataP;
568 } else {
7bc95e2e 569 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
5cd9ec01
M
570 }
571 // test for length of buffer
572 if(dataLen > maxDataLen) {
573 maxDataLen = dataLen;
574 if(dataLen > 400) {
7bc95e2e 575 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
576 break;
5cd9ec01
M
577 }
578 }
579 if(dataLen < 1) continue;
580
581 // primary buffer was stopped( <-- we lost data!
582 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
583 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
584 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
7bc95e2e 585 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
5cd9ec01
M
586 }
587 // secondary buffer sets as primary, secondary buffer was stopped
588 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
589 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
590 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
591 }
592
593 LED_A_OFF();
7bc95e2e 594
595 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
3be2a5ae 596
7bc95e2e 597 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
598 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
599 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
600 LED_C_ON();
5cd9ec01 601
7bc95e2e 602 // check - if there is a short 7bit request from reader
603 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
5cd9ec01 604
7bc95e2e 605 if(triggered) {
606 if (!LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, Uart.parityBits, TRUE)) break;
607 if (!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
608 }
609 /* And ready to receive another command. */
610 UartReset();
611 /* And also reset the demod code, which might have been */
612 /* false-triggered by the commands from the reader. */
613 DemodReset();
614 LED_B_OFF();
615 }
616 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
5cd9ec01 617 }
3be2a5ae 618
7bc95e2e 619 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
620 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
621 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
622 LED_B_ON();
5cd9ec01 623
7bc95e2e 624 if (!LogTrace(receivedResponse, Demod.len, Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, Demod.parityBits, FALSE)) break;
625 if (!LogTrace(NULL, 0, Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, 0, FALSE)) break;
5cd9ec01 626
7bc95e2e 627 if ((!triggered) && (param & 0x01)) triggered = TRUE;
5cd9ec01 628
7bc95e2e 629 // And ready to receive another response.
630 DemodReset();
631 LED_C_OFF();
632 }
633 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
634 }
5cd9ec01
M
635 }
636
7bc95e2e 637 previous_data = *data;
638 rsamples++;
5cd9ec01 639 data++;
d714d3ef 640 if(data == dmaBuf + DMA_BUFFER_SIZE) {
5cd9ec01
M
641 data = dmaBuf;
642 }
643 } // main cycle
644
645 DbpString("COMMAND FINISHED");
15c4dc5a 646
7bc95e2e 647 FpgaDisableSscDma();
648 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
649 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]);
5cd9ec01 650 LEDsoff();
15c4dc5a 651}
652
15c4dc5a 653//-----------------------------------------------------------------------------
654// Prepare tag messages
655//-----------------------------------------------------------------------------
8f51ddb0 656static void CodeIso14443aAsTagPar(const uint8_t *cmd, int len, uint32_t dwParity)
15c4dc5a 657{
8f51ddb0 658 int i;
15c4dc5a 659
8f51ddb0 660 ToSendReset();
15c4dc5a 661
662 // Correction bit, might be removed when not needed
663 ToSendStuffBit(0);
664 ToSendStuffBit(0);
665 ToSendStuffBit(0);
666 ToSendStuffBit(0);
667 ToSendStuffBit(1); // 1
668 ToSendStuffBit(0);
669 ToSendStuffBit(0);
670 ToSendStuffBit(0);
8f51ddb0 671
15c4dc5a 672 // Send startbit
72934aa3 673 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 674 LastProxToAirDuration = 8 * ToSendMax - 4;
15c4dc5a 675
8f51ddb0
M
676 for(i = 0; i < len; i++) {
677 int j;
678 uint8_t b = cmd[i];
15c4dc5a 679
680 // Data bits
15c4dc5a 681 for(j = 0; j < 8; j++) {
15c4dc5a 682 if(b & 1) {
72934aa3 683 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 684 } else {
72934aa3 685 ToSend[++ToSendMax] = SEC_E;
8f51ddb0
M
686 }
687 b >>= 1;
688 }
15c4dc5a 689
0014cb46 690 // Get the parity bit
95e63594 691 //if ((dwParity >> i) & 0x01) {
692 if (oddparity(cmd[i]) & 0x01) {
8f51ddb0 693 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 694 LastProxToAirDuration = 8 * ToSendMax - 4;
15c4dc5a 695 } else {
72934aa3 696 ToSend[++ToSendMax] = SEC_E;
7bc95e2e 697 LastProxToAirDuration = 8 * ToSendMax;
15c4dc5a 698 }
8f51ddb0 699 }
15c4dc5a 700
8f51ddb0
M
701 // Send stopbit
702 ToSend[++ToSendMax] = SEC_F;
15c4dc5a 703
8f51ddb0
M
704 // Convert from last byte pos to length
705 ToSendMax++;
8f51ddb0
M
706}
707
708static void CodeIso14443aAsTag(const uint8_t *cmd, int len){
709 CodeIso14443aAsTagPar(cmd, len, GetParity(cmd, len));
15c4dc5a 710}
711
15c4dc5a 712
8f51ddb0
M
713static void Code4bitAnswerAsTag(uint8_t cmd)
714{
715 int i;
716
5f6d6c90 717 ToSendReset();
8f51ddb0
M
718
719 // Correction bit, might be removed when not needed
720 ToSendStuffBit(0);
721 ToSendStuffBit(0);
722 ToSendStuffBit(0);
723 ToSendStuffBit(0);
724 ToSendStuffBit(1); // 1
725 ToSendStuffBit(0);
726 ToSendStuffBit(0);
727 ToSendStuffBit(0);
728
729 // Send startbit
730 ToSend[++ToSendMax] = SEC_D;
731
732 uint8_t b = cmd;
733 for(i = 0; i < 4; i++) {
734 if(b & 1) {
735 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 736 LastProxToAirDuration = 8 * ToSendMax - 4;
8f51ddb0
M
737 } else {
738 ToSend[++ToSendMax] = SEC_E;
7bc95e2e 739 LastProxToAirDuration = 8 * ToSendMax;
8f51ddb0
M
740 }
741 b >>= 1;
742 }
743
744 // Send stopbit
745 ToSend[++ToSendMax] = SEC_F;
746
5f6d6c90 747 // Convert from last byte pos to length
748 ToSendMax++;
15c4dc5a 749}
750
751//-----------------------------------------------------------------------------
752// Wait for commands from reader
753// Stop when button is pressed
754// Or return TRUE when command is captured
755//-----------------------------------------------------------------------------
f7e3ed82 756static int GetIso14443aCommandFromReader(uint8_t *received, int *len, int maxLen)
15c4dc5a 757{
758 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
759 // only, since we are receiving, not transmitting).
760 // Signal field is off with the appropriate LED
761 LED_D_OFF();
762 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
763
764 // Now run a `software UART' on the stream of incoming samples.
7bc95e2e 765 UartReset();
15c4dc5a 766 Uart.output = received;
7bc95e2e 767
768 // clear RXRDY:
769 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 770
771 for(;;) {
772 WDT_HIT();
773
774 if(BUTTON_PRESS()) return FALSE;
7bc95e2e 775
15c4dc5a 776 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
7bc95e2e 777 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
778 if(MillerDecoding(b, 0)) {
779 *len = Uart.len;
15c4dc5a 780 return TRUE;
781 }
7bc95e2e 782 }
15c4dc5a 783 }
784}
28afbd2b 785
7bc95e2e 786static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, bool correctionNeeded);
787int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
28afbd2b 788int EmSend4bit(uint8_t resp);
7bc95e2e 789int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par);
790int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par);
791int EmSendCmdEx(uint8_t *resp, int respLen, bool correctionNeeded);
28afbd2b 792int EmSendCmd(uint8_t *resp, int respLen);
793int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par);
7bc95e2e 794bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint32_t reader_Parity,
795 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint32_t tag_Parity);
15c4dc5a 796
ce02f6f9 797static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
798
799typedef struct {
800 uint8_t* response;
801 size_t response_n;
802 uint8_t* modulation;
803 size_t modulation_n;
7bc95e2e 804 uint32_t ProxToAirDuration;
ce02f6f9 805} tag_response_info_t;
806
807void reset_free_buffer() {
808 free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
809}
810
811bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
7bc95e2e 812 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
ce02f6f9 813 // This will need the following byte array for a modulation sequence
814 // 144 data bits (18 * 8)
815 // 18 parity bits
816 // 2 Start and stop
817 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
818 // 1 just for the case
819 // ----------- +
820 // 166 bytes, since every bit that needs to be send costs us a byte
821 //
822
823 // Prepare the tag modulation bits from the message
824 CodeIso14443aAsTag(response_info->response,response_info->response_n);
825
826 // Make sure we do not exceed the free buffer space
827 if (ToSendMax > max_buffer_size) {
828 Dbprintf("Out of memory, when modulating bits for tag answer:");
829 Dbhexdump(response_info->response_n,response_info->response,false);
830 return false;
831 }
832
833 // Copy the byte array, used for this modulation to the buffer position
834 memcpy(response_info->modulation,ToSend,ToSendMax);
835
7bc95e2e 836 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
ce02f6f9 837 response_info->modulation_n = ToSendMax;
7bc95e2e 838 response_info->ProxToAirDuration = LastProxToAirDuration;
ce02f6f9 839
840 return true;
841}
842
843bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
844 // Retrieve and store the current buffer index
845 response_info->modulation = free_buffer_pointer;
846
847 // Determine the maximum size we can use from our buffer
848 size_t max_buffer_size = (((uint8_t *)BigBuf)+FREE_BUFFER_OFFSET+FREE_BUFFER_SIZE)-free_buffer_pointer;
849
850 // Forward the prepare tag modulation function to the inner function
851 if (prepare_tag_modulation(response_info,max_buffer_size)) {
852 // Update the free buffer offset
853 free_buffer_pointer += ToSendMax;
854 return true;
855 } else {
856 return false;
857 }
858}
859
15c4dc5a 860//-----------------------------------------------------------------------------
861// Main loop of simulated tag: receive commands from reader, decide what
862// response to send, and send it.
863//-----------------------------------------------------------------------------
28afbd2b 864void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data)
15c4dc5a 865{
5f6d6c90 866 // Enable and clear the trace
5f6d6c90 867 iso14a_clear_trace();
7bc95e2e 868 iso14a_set_tracing(TRUE);
81cd0474 869
81cd0474 870 uint8_t sak;
871
872 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
873 uint8_t response1[2];
874
875 switch (tagType) {
876 case 1: { // MIFARE Classic
877 // Says: I am Mifare 1k - original line
878 response1[0] = 0x04;
879 response1[1] = 0x00;
880 sak = 0x08;
881 } break;
882 case 2: { // MIFARE Ultralight
883 // Says: I am a stupid memory tag, no crypto
884 response1[0] = 0x04;
885 response1[1] = 0x00;
886 sak = 0x00;
887 } break;
888 case 3: { // MIFARE DESFire
889 // Says: I am a DESFire tag, ph33r me
890 response1[0] = 0x04;
891 response1[1] = 0x03;
892 sak = 0x20;
893 } break;
894 case 4: { // ISO/IEC 14443-4
895 // Says: I am a javacard (JCOP)
896 response1[0] = 0x04;
897 response1[1] = 0x00;
898 sak = 0x28;
899 } break;
95e63594 900 case 5: { // MIFARE TNP3XXX
901 // Says: I am a toy
902 response1[0] = 0x01;
903 response1[1] = 0x0f;
904 sak = 0x01;
905 } break;
81cd0474 906 default: {
907 Dbprintf("Error: unkown tagtype (%d)",tagType);
908 return;
909 } break;
910 }
911
912 // The second response contains the (mandatory) first 24 bits of the UID
913 uint8_t response2[5];
914
915 // Check if the uid uses the (optional) part
916 uint8_t response2a[5];
917 if (uid_2nd) {
918 response2[0] = 0x88;
919 num_to_bytes(uid_1st,3,response2+1);
920 num_to_bytes(uid_2nd,4,response2a);
921 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
922
923 // Configure the ATQA and SAK accordingly
924 response1[0] |= 0x40;
925 sak |= 0x04;
926 } else {
927 num_to_bytes(uid_1st,4,response2);
928 // Configure the ATQA and SAK accordingly
929 response1[0] &= 0xBF;
930 sak &= 0xFB;
931 }
932
933 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
934 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
935
936 // Prepare the mandatory SAK (for 4 and 7 byte UID)
937 uint8_t response3[3];
938 response3[0] = sak;
939 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
940
941 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
942 uint8_t response3a[3];
943 response3a[0] = sak & 0xFB;
944 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
945
254b70a4 946 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
ce02f6f9 947 uint8_t response6[] = { 0x04, 0x58, 0x00, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS
948 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
949
7bc95e2e 950 #define TAG_RESPONSE_COUNT 7
951 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
952 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
953 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
954 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
955 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
956 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
957 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
958 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
959 };
960
961 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
962 // Such a response is less time critical, so we can prepare them on the fly
963 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
964 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
965 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
966 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
967 tag_response_info_t dynamic_response_info = {
968 .response = dynamic_response_buffer,
969 .response_n = 0,
970 .modulation = dynamic_modulation_buffer,
971 .modulation_n = 0
972 };
ce02f6f9 973
7bc95e2e 974 // Reset the offset pointer of the free buffer
975 reset_free_buffer();
ce02f6f9 976
7bc95e2e 977 // Prepare the responses of the anticollision phase
ce02f6f9 978 // there will be not enough time to do this at the moment the reader sends it REQA
7bc95e2e 979 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
980 prepare_allocated_tag_modulation(&responses[i]);
981 }
15c4dc5a 982
254b70a4 983 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
7bc95e2e 984 int len = 0;
15c4dc5a 985
986 // To control where we are in the protocol
987 int order = 0;
988 int lastorder;
989
990 // Just to allow some checks
991 int happened = 0;
992 int happened2 = 0;
81cd0474 993 int cmdsRecvd = 0;
15c4dc5a 994
254b70a4 995 // We need to listen to the high-frequency, peak-detected path.
7bc95e2e 996 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
15c4dc5a 997
254b70a4 998 cmdsRecvd = 0;
7bc95e2e 999 tag_response_info_t* p_response;
15c4dc5a 1000
254b70a4 1001 LED_A_ON();
1002 for(;;) {
7bc95e2e 1003 // Clean receive command buffer
1004
81cd0474 1005 if(!GetIso14443aCommandFromReader(receivedCmd, &len, RECV_CMD_SIZE)) {
ce02f6f9 1006 DbpString("Button press");
254b70a4 1007 break;
1008 }
7bc95e2e 1009
1010 p_response = NULL;
1011
254b70a4 1012 // doob - added loads of debug strings so we can see what the reader is saying to us during the sim as hi14alist is not populated
1013 // Okay, look at the command now.
1014 lastorder = order;
1015 if(receivedCmd[0] == 0x26) { // Received a REQUEST
ce02f6f9 1016 p_response = &responses[0]; order = 1;
254b70a4 1017 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
ce02f6f9 1018 p_response = &responses[0]; order = 6;
254b70a4 1019 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
ce02f6f9 1020 p_response = &responses[1]; order = 2;
254b70a4 1021 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
ce02f6f9 1022 p_response = &responses[2]; order = 20;
254b70a4 1023 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
ce02f6f9 1024 p_response = &responses[3]; order = 3;
254b70a4 1025 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
ce02f6f9 1026 p_response = &responses[4]; order = 30;
254b70a4 1027 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
5f6d6c90 1028 EmSendCmdEx(data+(4*receivedCmd[0]),16,false);
7bc95e2e 1029 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
5f6d6c90 1030 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
7bc95e2e 1031 p_response = NULL;
254b70a4 1032 } else if(receivedCmd[0] == 0x50) { // Received a HALT
17331e14 1033// DbpString("Reader requested we HALT!:");
7bc95e2e 1034 if (tracing) {
1035 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1036 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1037 }
1038 p_response = NULL;
254b70a4 1039 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
ce02f6f9 1040 p_response = &responses[5]; order = 7;
254b70a4 1041 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
7bc95e2e 1042 if (tagType == 1 || tagType == 2) { // RATS not supported
1043 EmSend4bit(CARD_NACK_NA);
1044 p_response = NULL;
1045 } else {
1046 p_response = &responses[6]; order = 70;
1047 }
1048 } else if (order == 7 && len == 8) { // Received authentication request
1049 if (tracing) {
1050 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1051 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1052 }
1053 uint32_t nr = bytes_to_num(receivedCmd,4);
1054 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1055 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar);
1056 } else {
1057 // Check for ISO 14443A-4 compliant commands, look at left nibble
1058 switch (receivedCmd[0]) {
1059
1060 case 0x0B:
1061 case 0x0A: { // IBlock (command)
1062 dynamic_response_info.response[0] = receivedCmd[0];
1063 dynamic_response_info.response[1] = 0x00;
1064 dynamic_response_info.response[2] = 0x90;
1065 dynamic_response_info.response[3] = 0x00;
1066 dynamic_response_info.response_n = 4;
1067 } break;
1068
1069 case 0x1A:
1070 case 0x1B: { // Chaining command
1071 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1072 dynamic_response_info.response_n = 2;
1073 } break;
1074
1075 case 0xaa:
1076 case 0xbb: {
1077 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1078 dynamic_response_info.response_n = 2;
1079 } break;
1080
1081 case 0xBA: { //
1082 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1083 dynamic_response_info.response_n = 2;
1084 } break;
1085
1086 case 0xCA:
1087 case 0xC2: { // Readers sends deselect command
1088 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1089 dynamic_response_info.response_n = 2;
1090 } break;
1091
1092 default: {
1093 // Never seen this command before
1094 if (tracing) {
1095 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1096 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1097 }
1098 Dbprintf("Received unknown command (len=%d):",len);
1099 Dbhexdump(len,receivedCmd,false);
1100 // Do not respond
1101 dynamic_response_info.response_n = 0;
1102 } break;
1103 }
ce02f6f9 1104
7bc95e2e 1105 if (dynamic_response_info.response_n > 0) {
1106 // Copy the CID from the reader query
1107 dynamic_response_info.response[1] = receivedCmd[1];
ce02f6f9 1108
7bc95e2e 1109 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1110 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1111 dynamic_response_info.response_n += 2;
ce02f6f9 1112
7bc95e2e 1113 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1114 Dbprintf("Error preparing tag response");
1115 if (tracing) {
1116 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1117 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1118 }
1119 break;
1120 }
1121 p_response = &dynamic_response_info;
1122 }
81cd0474 1123 }
15c4dc5a 1124
1125 // Count number of wakeups received after a halt
1126 if(order == 6 && lastorder == 5) { happened++; }
1127
1128 // Count number of other messages after a halt
1129 if(order != 6 && lastorder == 5) { happened2++; }
1130
15c4dc5a 1131 if(cmdsRecvd > 999) {
1132 DbpString("1000 commands later...");
254b70a4 1133 break;
15c4dc5a 1134 }
ce02f6f9 1135 cmdsRecvd++;
1136
1137 if (p_response != NULL) {
7bc95e2e 1138 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1139 // do the tracing for the previous reader request and this tag answer:
1140 EmLogTrace(Uart.output,
1141 Uart.len,
1142 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1143 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1144 Uart.parityBits,
1145 p_response->response,
1146 p_response->response_n,
1147 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1148 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1149 SwapBits(GetParity(p_response->response, p_response->response_n), p_response->response_n));
1150 }
1151
1152 if (!tracing) {
1153 Dbprintf("Trace Full. Simulation stopped.");
1154 break;
1155 }
1156 }
15c4dc5a 1157
1158 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1159 LED_A_OFF();
1160}
1161
9492e0b0 1162
1163// prepare a delayed transfer. This simply shifts ToSend[] by a number
1164// of bits specified in the delay parameter.
1165void PrepareDelayedTransfer(uint16_t delay)
1166{
1167 uint8_t bitmask = 0;
1168 uint8_t bits_to_shift = 0;
1169 uint8_t bits_shifted = 0;
1170
1171 delay &= 0x07;
1172 if (delay) {
1173 for (uint16_t i = 0; i < delay; i++) {
1174 bitmask |= (0x01 << i);
1175 }
7bc95e2e 1176 ToSend[ToSendMax++] = 0x00;
9492e0b0 1177 for (uint16_t i = 0; i < ToSendMax; i++) {
1178 bits_to_shift = ToSend[i] & bitmask;
1179 ToSend[i] = ToSend[i] >> delay;
1180 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1181 bits_shifted = bits_to_shift;
1182 }
1183 }
1184}
1185
7bc95e2e 1186
1187//-------------------------------------------------------------------------------------
15c4dc5a 1188// Transmit the command (to the tag) that was placed in ToSend[].
9492e0b0 1189// Parameter timing:
7bc95e2e 1190// if NULL: transfer at next possible time, taking into account
1191// request guard time and frame delay time
1192// if == 0: transfer immediately and return time of transfer
9492e0b0 1193// if != 0: delay transfer until time specified
7bc95e2e 1194//-------------------------------------------------------------------------------------
9492e0b0 1195static void TransmitFor14443a(const uint8_t *cmd, int len, uint32_t *timing)
15c4dc5a 1196{
7bc95e2e 1197
9492e0b0 1198 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
e30c654b 1199
7bc95e2e 1200 uint32_t ThisTransferTime = 0;
e30c654b 1201
9492e0b0 1202 if (timing) {
1203 if(*timing == 0) { // Measure time
7bc95e2e 1204 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
9492e0b0 1205 } else {
1206 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1207 }
7bc95e2e 1208 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1209 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1210 LastTimeProxToAirStart = *timing;
1211 } else {
1212 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1213 while(GetCountSspClk() < ThisTransferTime);
1214 LastTimeProxToAirStart = ThisTransferTime;
9492e0b0 1215 }
1216
7bc95e2e 1217 // clear TXRDY
1218 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1219
7bc95e2e 1220 uint16_t c = 0;
9492e0b0 1221 for(;;) {
1222 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1223 AT91C_BASE_SSC->SSC_THR = cmd[c];
1224 c++;
1225 if(c >= len) {
1226 break;
1227 }
1228 }
1229 }
7bc95e2e 1230
f6c18637 1231 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
15c4dc5a 1232}
1233
7bc95e2e 1234
15c4dc5a 1235//-----------------------------------------------------------------------------
195af472 1236// Prepare reader command (in bits, support short frames) to send to FPGA
15c4dc5a 1237//-----------------------------------------------------------------------------
195af472 1238void CodeIso14443aBitsAsReaderPar(const uint8_t * cmd, int bits, uint32_t dwParity)
15c4dc5a 1239{
7bc95e2e 1240 int i, j;
1241 int last;
1242 uint8_t b;
e30c654b 1243
7bc95e2e 1244 ToSendReset();
e30c654b 1245
7bc95e2e 1246 // Start of Communication (Seq. Z)
1247 ToSend[++ToSendMax] = SEC_Z;
1248 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1249 last = 0;
1250
1251 size_t bytecount = nbytes(bits);
1252 // Generate send structure for the data bits
1253 for (i = 0; i < bytecount; i++) {
1254 // Get the current byte to send
1255 b = cmd[i];
1256 size_t bitsleft = MIN((bits-(i*8)),8);
1257
1258 for (j = 0; j < bitsleft; j++) {
1259 if (b & 1) {
1260 // Sequence X
1261 ToSend[++ToSendMax] = SEC_X;
1262 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1263 last = 1;
1264 } else {
1265 if (last == 0) {
1266 // Sequence Z
1267 ToSend[++ToSendMax] = SEC_Z;
1268 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1269 } else {
1270 // Sequence Y
1271 ToSend[++ToSendMax] = SEC_Y;
1272 last = 0;
1273 }
1274 }
1275 b >>= 1;
1276 }
1277
1278 // Only transmit (last) parity bit if we transmitted a complete byte
1279 if (j == 8) {
1280 // Get the parity bit
1281 if ((dwParity >> i) & 0x01) {
1282 // Sequence X
1283 ToSend[++ToSendMax] = SEC_X;
1284 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1285 last = 1;
1286 } else {
1287 if (last == 0) {
1288 // Sequence Z
1289 ToSend[++ToSendMax] = SEC_Z;
1290 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1291 } else {
1292 // Sequence Y
1293 ToSend[++ToSendMax] = SEC_Y;
1294 last = 0;
1295 }
1296 }
1297 }
1298 }
e30c654b 1299
7bc95e2e 1300 // End of Communication: Logic 0 followed by Sequence Y
1301 if (last == 0) {
1302 // Sequence Z
1303 ToSend[++ToSendMax] = SEC_Z;
1304 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1305 } else {
1306 // Sequence Y
1307 ToSend[++ToSendMax] = SEC_Y;
1308 last = 0;
1309 }
1310 ToSend[++ToSendMax] = SEC_Y;
e30c654b 1311
7bc95e2e 1312 // Convert to length of command:
1313 ToSendMax++;
15c4dc5a 1314}
1315
195af472 1316//-----------------------------------------------------------------------------
1317// Prepare reader command to send to FPGA
1318//-----------------------------------------------------------------------------
1319void CodeIso14443aAsReaderPar(const uint8_t * cmd, int len, uint32_t dwParity)
1320{
1321 CodeIso14443aBitsAsReaderPar(cmd,len*8,dwParity);
1322}
1323
9ca155ba
M
1324//-----------------------------------------------------------------------------
1325// Wait for commands from reader
1326// Stop when button is pressed (return 1) or field was gone (return 2)
1327// Or return 0 when command is captured
1328//-----------------------------------------------------------------------------
7bc95e2e 1329static int EmGetCmd(uint8_t *received, int *len)
9ca155ba
M
1330{
1331 *len = 0;
1332
1333 uint32_t timer = 0, vtime = 0;
1334 int analogCnt = 0;
1335 int analogAVG = 0;
1336
1337 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1338 // only, since we are receiving, not transmitting).
1339 // Signal field is off with the appropriate LED
1340 LED_D_OFF();
1341 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1342
1343 // Set ADC to read field strength
1344 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1345 AT91C_BASE_ADC->ADC_MR =
1346 ADC_MODE_PRESCALE(32) |
1347 ADC_MODE_STARTUP_TIME(16) |
1348 ADC_MODE_SAMPLE_HOLD_TIME(8);
1349 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1350 // start ADC
1351 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1352
1353 // Now run a 'software UART' on the stream of incoming samples.
7bc95e2e 1354 UartReset();
9ca155ba 1355 Uart.output = received;
7bc95e2e 1356
1357 // Clear RXRDY:
1358 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
9ca155ba
M
1359
1360 for(;;) {
1361 WDT_HIT();
1362
1363 if (BUTTON_PRESS()) return 1;
1364
1365 // test if the field exists
1366 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1367 analogCnt++;
1368 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1369 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1370 if (analogCnt >= 32) {
1371 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1372 vtime = GetTickCount();
1373 if (!timer) timer = vtime;
1374 // 50ms no field --> card to idle state
1375 if (vtime - timer > 50) return 2;
1376 } else
1377 if (timer) timer = 0;
1378 analogCnt = 0;
1379 analogAVG = 0;
1380 }
1381 }
7bc95e2e 1382
9ca155ba 1383 // receive and test the miller decoding
7bc95e2e 1384 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1385 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1386 if(MillerDecoding(b, 0)) {
1387 *len = Uart.len;
9ca155ba
M
1388 return 0;
1389 }
7bc95e2e 1390 }
1391
9ca155ba
M
1392 }
1393}
1394
9ca155ba 1395
7bc95e2e 1396static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, bool correctionNeeded)
1397{
1398 uint8_t b;
1399 uint16_t i = 0;
1400 uint32_t ThisTransferTime;
1401
9ca155ba
M
1402 // Modulate Manchester
1403 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
7bc95e2e 1404
1405 // include correction bit if necessary
1406 if (Uart.parityBits & 0x01) {
1407 correctionNeeded = TRUE;
1408 }
1409 if(correctionNeeded) {
9ca155ba
M
1410 // 1236, so correction bit needed
1411 i = 0;
7bc95e2e 1412 } else {
1413 i = 1;
9ca155ba 1414 }
7bc95e2e 1415
d714d3ef 1416 // clear receiving shift register and holding register
7bc95e2e 1417 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1418 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1419 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1420 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
9ca155ba 1421
7bc95e2e 1422 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1423 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1424 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1425 if (AT91C_BASE_SSC->SSC_RHR) break;
1426 }
1427
1428 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1429
1430 // Clear TXRDY:
1431 AT91C_BASE_SSC->SSC_THR = SEC_F;
1432
9ca155ba 1433 // send cycle
7bc95e2e 1434 for(; i <= respLen; ) {
9ca155ba 1435 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
7bc95e2e 1436 AT91C_BASE_SSC->SSC_THR = resp[i++];
1437 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
9ca155ba 1438 }
7bc95e2e 1439
9ca155ba
M
1440 if(BUTTON_PRESS()) {
1441 break;
1442 }
1443 }
1444
7bc95e2e 1445 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1446 for (i = 0; i < 2 ; ) {
1447 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1448 AT91C_BASE_SSC->SSC_THR = SEC_F;
1449 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1450 i++;
1451 }
1452 }
1453
1454 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1455
9ca155ba
M
1456 return 0;
1457}
1458
7bc95e2e 1459int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1460 Code4bitAnswerAsTag(resp);
0a39986e 1461 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
7bc95e2e 1462 // do the tracing for the previous reader request and this tag answer:
1463 EmLogTrace(Uart.output,
1464 Uart.len,
1465 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1466 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1467 Uart.parityBits,
1468 &resp,
1469 1,
1470 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1471 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1472 SwapBits(GetParity(&resp, 1), 1));
0a39986e 1473 return res;
9ca155ba
M
1474}
1475
8f51ddb0 1476int EmSend4bit(uint8_t resp){
7bc95e2e 1477 return EmSend4bitEx(resp, false);
8f51ddb0
M
1478}
1479
7bc95e2e 1480int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par){
1481 CodeIso14443aAsTagPar(resp, respLen, par);
8f51ddb0 1482 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
7bc95e2e 1483 // do the tracing for the previous reader request and this tag answer:
1484 EmLogTrace(Uart.output,
1485 Uart.len,
1486 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1487 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1488 Uart.parityBits,
1489 resp,
1490 respLen,
1491 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1492 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1493 SwapBits(GetParity(resp, respLen), respLen));
8f51ddb0
M
1494 return res;
1495}
1496
7bc95e2e 1497int EmSendCmdEx(uint8_t *resp, int respLen, bool correctionNeeded){
8f51ddb0
M
1498 return EmSendCmdExPar(resp, respLen, correctionNeeded, GetParity(resp, respLen));
1499}
1500
1501int EmSendCmd(uint8_t *resp, int respLen){
7bc95e2e 1502 return EmSendCmdExPar(resp, respLen, false, GetParity(resp, respLen));
8f51ddb0
M
1503}
1504
1505int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par){
7bc95e2e 1506 return EmSendCmdExPar(resp, respLen, false, par);
1507}
1508
1509bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint32_t reader_Parity,
1510 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint32_t tag_Parity)
1511{
1512 if (tracing) {
1513 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1514 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1515 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1516 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1517 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1518 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1519 reader_EndTime = tag_StartTime - exact_fdt;
1520 reader_StartTime = reader_EndTime - reader_modlen;
1521 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_Parity, TRUE)) {
1522 return FALSE;
1523 } else if (!LogTrace(NULL, 0, reader_EndTime, 0, TRUE)) {
1524 return FALSE;
1525 } else if (!LogTrace(tag_data, tag_len, tag_StartTime, tag_Parity, FALSE)) {
1526 return FALSE;
1527 } else {
1528 return (!LogTrace(NULL, 0, tag_EndTime, 0, FALSE));
1529 }
1530 } else {
1531 return TRUE;
1532 }
9ca155ba
M
1533}
1534
15c4dc5a 1535//-----------------------------------------------------------------------------
1536// Wait a certain time for tag response
1537// If a response is captured return TRUE
e691fc45 1538// If it takes too long return FALSE
15c4dc5a 1539//-----------------------------------------------------------------------------
7bc95e2e 1540static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint16_t offset, int maxLen)
15c4dc5a 1541{
7bc95e2e 1542 uint16_t c;
e691fc45 1543
15c4dc5a 1544 // Set FPGA mode to "reader listen mode", no modulation (listen
534983d7 1545 // only, since we are receiving, not transmitting).
1546 // Signal field is on with the appropriate LED
1547 LED_D_ON();
1548 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1c611bbd 1549
534983d7 1550 // Now get the answer from the card
7bc95e2e 1551 DemodReset();
534983d7 1552 Demod.output = receivedResponse;
15c4dc5a 1553
7bc95e2e 1554 // clear RXRDY:
1555 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1556
15c4dc5a 1557 c = 0;
1558 for(;;) {
534983d7 1559 WDT_HIT();
15c4dc5a 1560
534983d7 1561 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
534983d7 1562 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
7bc95e2e 1563 if(ManchesterDecoding(b, offset, 0)) {
1564 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
15c4dc5a 1565 return TRUE;
7bc95e2e 1566 } else if(c++ > iso14a_timeout) {
1567 return FALSE;
15c4dc5a 1568 }
534983d7 1569 }
1570 }
15c4dc5a 1571}
1572
9492e0b0 1573void ReaderTransmitBitsPar(uint8_t* frame, int bits, uint32_t par, uint32_t *timing)
15c4dc5a 1574{
981bd429 1575
7bc95e2e 1576 CodeIso14443aBitsAsReaderPar(frame,bits,par);
dfc3c505 1577
7bc95e2e 1578 // Send command to tag
1579 TransmitFor14443a(ToSend, ToSendMax, timing);
1580 if(trigger)
1581 LED_A_ON();
dfc3c505 1582
7bc95e2e 1583 // Log reader command in trace buffer
1584 if (tracing) {
1585 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1586 LogTrace(NULL, 0, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, 0, TRUE);
1587 }
15c4dc5a 1588}
1589
9492e0b0 1590void ReaderTransmitPar(uint8_t* frame, int len, uint32_t par, uint32_t *timing)
dfc3c505 1591{
9492e0b0 1592 ReaderTransmitBitsPar(frame,len*8,par, timing);
dfc3c505 1593}
15c4dc5a 1594
e691fc45 1595void ReaderTransmitBits(uint8_t* frame, int len, uint32_t *timing)
1596{
1597 // Generate parity and redirect
1598 ReaderTransmitBitsPar(frame,len,GetParity(frame,len/8), timing);
1599}
1600
9492e0b0 1601void ReaderTransmit(uint8_t* frame, int len, uint32_t *timing)
15c4dc5a 1602{
1603 // Generate parity and redirect
9492e0b0 1604 ReaderTransmitBitsPar(frame,len*8,GetParity(frame,len), timing);
15c4dc5a 1605}
1606
e691fc45 1607int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset)
1608{
7bc95e2e 1609 if (!GetIso14443aAnswerFromTag(receivedAnswer,offset,160)) return FALSE;
1610 if (tracing) {
1611 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.parityBits, FALSE);
1612 LogTrace(NULL, 0, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, 0, FALSE);
1613 }
e691fc45 1614 return Demod.len;
1615}
1616
f7e3ed82 1617int ReaderReceive(uint8_t* receivedAnswer)
15c4dc5a 1618{
e691fc45 1619 return ReaderReceiveOffset(receivedAnswer, 0);
15c4dc5a 1620}
1621
e691fc45 1622int ReaderReceivePar(uint8_t *receivedAnswer, uint32_t *parptr)
f89c7050 1623{
7bc95e2e 1624 if (!GetIso14443aAnswerFromTag(receivedAnswer,0,160)) return FALSE;
1625 if (tracing) {
1626 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.parityBits, FALSE);
1627 LogTrace(NULL, 0, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, 0, FALSE);
1628 }
f89c7050 1629 *parptr = Demod.parityBits;
e691fc45 1630 return Demod.len;
f89c7050
M
1631}
1632
e691fc45 1633/* performs iso14443a anticollision procedure
534983d7 1634 * fills the uid pointer unless NULL
1635 * fills resp_data unless NULL */
79a73ab2 1636int iso14443a_select_card(byte_t* uid_ptr, iso14a_card_select_t* p_hi14a_card, uint32_t* cuid_ptr) {
ed258538 1637 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1638 uint8_t sel_all[] = { 0x93,0x20 };
e691fc45 1639 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
ed258538 1640 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1641 uint8_t* resp = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); // was 3560 - tied to other size changes
79a73ab2 1642 byte_t uid_resp[4];
1643 size_t uid_resp_len;
15c4dc5a 1644
ed258538 1645 uint8_t sak = 0x04; // cascade uid
1646 int cascade_level = 0;
1647 int len;
79a73ab2 1648
ed258538 1649 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
9492e0b0 1650 ReaderTransmitBitsPar(wupa,7,0, NULL);
7bc95e2e 1651
ed258538 1652 // Receive the ATQA
1653 if(!ReaderReceive(resp)) return 0;
e691fc45 1654 // Dbprintf("atqa: %02x %02x",resp[0],resp[1]);
1c611bbd 1655
ed258538 1656 if(p_hi14a_card) {
1657 memcpy(p_hi14a_card->atqa, resp, 2);
79a73ab2 1658 p_hi14a_card->uidlen = 0;
1659 memset(p_hi14a_card->uid,0,10);
1660 }
5f6d6c90 1661
79a73ab2 1662 // clear uid
1663 if (uid_ptr) {
1c611bbd 1664 memset(uid_ptr,0,10);
79a73ab2 1665 }
1666
ed258538 1667 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1668 // which case we need to make a cascade 2 request and select - this is a long UID
1669 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1670 for(; sak & 0x04; cascade_level++) {
1671 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1672 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1673
1674 // SELECT_ALL
9492e0b0 1675 ReaderTransmit(sel_all,sizeof(sel_all), NULL);
ed258538 1676 if (!ReaderReceive(resp)) return 0;
5f6d6c90 1677
e691fc45 1678 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1679 memset(uid_resp, 0, 4);
1680 uint16_t uid_resp_bits = 0;
1681 uint16_t collision_answer_offset = 0;
1682 // anti-collision-loop:
1683 while (Demod.collisionPos) {
1684 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1685 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1686 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1687 uid_resp[uid_resp_bits & 0xf8] |= UIDbit << (uid_resp_bits % 8);
1688 }
1689 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1690 uid_resp_bits++;
1691 // construct anticollosion command:
1692 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1693 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1694 sel_uid[2+i] = uid_resp[i];
1695 }
1696 collision_answer_offset = uid_resp_bits%8;
1697 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1698 if (!ReaderReceiveOffset(resp, collision_answer_offset)) return 0;
1699 }
1700 // finally, add the last bits and BCC of the UID
1701 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1702 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1703 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1704 }
1705
1706 } else { // no collision, use the response to SELECT_ALL as current uid
1707 memcpy(uid_resp,resp,4);
1708 }
1709 uid_resp_len = 4;
95e63594 1710
5f6d6c90 1711
e691fc45 1712 // calculate crypto UID. Always use last 4 Bytes.
5f6d6c90 1713 if(cuid_ptr) {
1714 *cuid_ptr = bytes_to_num(uid_resp, 4);
79a73ab2 1715 }
e30c654b 1716
ed258538 1717 // Construct SELECT UID command
e691fc45 1718 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1719 memcpy(sel_uid+2,uid_resp,4); // the UID
1720 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1721 AppendCrc14443a(sel_uid,7); // calculate and add CRC
9492e0b0 1722 ReaderTransmit(sel_uid,sizeof(sel_uid), NULL);
534983d7 1723
ed258538 1724 // Receive the SAK
1725 if (!ReaderReceive(resp)) return 0;
1726 sak = resp[0];
79a73ab2 1727
95e63594 1728 //Dbprintf("SAK: %02x",resp[0]);
1729
79a73ab2 1730 // Test if more parts of the uid are comming
e691fc45 1731 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
79a73ab2 1732 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1733 // http://www.nxp.com/documents/application_note/AN10927.pdf
a61b4976 1734 // This was earlier:
1735 //memcpy(uid_resp, uid_resp + 1, 3);
1736 // But memcpy should not be used for overlapping arrays,
1737 // and memmove appears to not be available in the arm build.
1738 // So this has been replaced with a for-loop:
1739 for(int xx = 0; xx < 3; xx++)
1740 uid_resp[xx] = uid_resp[xx+1];
79a73ab2 1741 uid_resp_len = 3;
1742 }
5f6d6c90 1743
79a73ab2 1744 if(uid_ptr) {
1745 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1746 }
5f6d6c90 1747
79a73ab2 1748 if(p_hi14a_card) {
1749 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1750 p_hi14a_card->uidlen += uid_resp_len;
1751 }
ed258538 1752 }
79a73ab2 1753
ed258538 1754 if(p_hi14a_card) {
1755 p_hi14a_card->sak = sak;
1756 p_hi14a_card->ats_len = 0;
1757 }
534983d7 1758
ed258538 1759 if( (sak & 0x20) == 0) {
1760 return 2; // non iso14443a compliant tag
79a73ab2 1761 }
534983d7 1762
ed258538 1763 // Request for answer to select
5191b3d1 1764 AppendCrc14443a(rats, 2);
9492e0b0 1765 ReaderTransmit(rats, sizeof(rats), NULL);
1c611bbd 1766
5191b3d1 1767 if (!(len = ReaderReceive(resp))) return 0;
1768
1769 if(p_hi14a_card) {
ed258538 1770 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1771 p_hi14a_card->ats_len = len;
1772 }
5f6d6c90 1773
ed258538 1774 // reset the PCB block number
1775 iso14_pcb_blocknum = 0;
1776 return 1;
7e758047 1777}
15c4dc5a 1778
7bc95e2e 1779void iso14443a_setup(uint8_t fpga_minor_mode) {
7cc204bf 1780 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
9492e0b0 1781 // Set up the synchronous serial port
1782 FpgaSetupSsc();
7bc95e2e 1783 // connect Demodulated Signal to ADC:
7e758047 1784 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
e30c654b 1785
7e758047 1786 // Signal field is on with the appropriate LED
95e63594 1787 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
7bc95e2e 1788 LED_D_ON();
1789 } else {
1790 LED_D_OFF();
1791 }
1792 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
534983d7 1793
7bc95e2e 1794 // Start the timer
1795 StartCountSspClk();
1796
1797 DemodReset();
1798 UartReset();
1799 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
f38a1528 1800 iso14a_set_timeout(1050); // 10ms default 10*105 =
7e758047 1801}
15c4dc5a 1802
534983d7 1803int iso14_apdu(uint8_t * cmd, size_t cmd_len, void * data) {
1804 uint8_t real_cmd[cmd_len+4];
1805 real_cmd[0] = 0x0a; //I-Block
b0127e65 1806 // put block number into the PCB
1807 real_cmd[0] |= iso14_pcb_blocknum;
534983d7 1808 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1809 memcpy(real_cmd+2, cmd, cmd_len);
1810 AppendCrc14443a(real_cmd,cmd_len+2);
1811
9492e0b0 1812 ReaderTransmit(real_cmd, cmd_len+4, NULL);
534983d7 1813 size_t len = ReaderReceive(data);
b0127e65 1814 uint8_t * data_bytes = (uint8_t *) data;
1815 if (!len)
1816 return 0; //DATA LINK ERROR
1817 // if we received an I- or R(ACK)-Block with a block number equal to the
1818 // current block number, toggle the current block number
1819 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1820 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1821 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1822 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1823 {
1824 iso14_pcb_blocknum ^= 1;
1825 }
1826
534983d7 1827 return len;
1828}
1829
7e758047 1830//-----------------------------------------------------------------------------
1831// Read an ISO 14443a tag. Send out commands and store answers.
1832//
1833//-----------------------------------------------------------------------------
7bc95e2e 1834void ReaderIso14443a(UsbCommand *c)
7e758047 1835{
534983d7 1836 iso14a_command_t param = c->arg[0];
7bc95e2e 1837 uint8_t *cmd = c->d.asBytes;
f38a1528 1838 size_t len = c->arg[1] & 0xFFFF;
1839 size_t lenbits = c->arg[1] >> 16;
9492e0b0 1840 uint32_t arg0 = 0;
1841 byte_t buf[USB_CMD_DATA_SIZE];
902cb3c0 1842
5f6d6c90 1843 if(param & ISO14A_CONNECT) {
1844 iso14a_clear_trace();
1845 }
e691fc45 1846
7bc95e2e 1847 iso14a_set_tracing(TRUE);
e30c654b 1848
79a73ab2 1849 if(param & ISO14A_REQUEST_TRIGGER) {
7bc95e2e 1850 iso14a_set_trigger(TRUE);
9492e0b0 1851 }
15c4dc5a 1852
534983d7 1853 if(param & ISO14A_CONNECT) {
7bc95e2e 1854 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
5f6d6c90 1855 if(!(param & ISO14A_NO_SELECT)) {
1856 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
1857 arg0 = iso14443a_select_card(NULL,card,NULL);
1858 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
1859 }
534983d7 1860 }
e30c654b 1861
534983d7 1862 if(param & ISO14A_SET_TIMEOUT) {
313ee67e 1863 iso14a_set_timeout(c->arg[2]);
534983d7 1864 }
e30c654b 1865
534983d7 1866 if(param & ISO14A_APDU) {
902cb3c0 1867 arg0 = iso14_apdu(cmd, len, buf);
79a73ab2 1868 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
534983d7 1869 }
e30c654b 1870
534983d7 1871 if(param & ISO14A_RAW) {
1872 if(param & ISO14A_APPEND_CRC) {
1873 AppendCrc14443a(cmd,len);
1874 len += 2;
95e63594 1875 if(lenbits>0)
1876 lenbits += 16;
15c4dc5a 1877 }
95e63594 1878 if(lenbits>0) {
5f6d6c90 1879 ReaderTransmitBitsPar(cmd,lenbits,GetParity(cmd,lenbits/8), NULL);
1880 } else {
1881 ReaderTransmit(cmd,len, NULL);
1882 }
902cb3c0 1883 arg0 = ReaderReceive(buf);
9492e0b0 1884 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
534983d7 1885 }
15c4dc5a 1886
79a73ab2 1887 if(param & ISO14A_REQUEST_TRIGGER) {
7bc95e2e 1888 iso14a_set_trigger(FALSE);
9492e0b0 1889 }
15c4dc5a 1890
79a73ab2 1891 if(param & ISO14A_NO_DISCONNECT) {
534983d7 1892 return;
9492e0b0 1893 }
15c4dc5a 1894
15c4dc5a 1895 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1896 LEDsoff();
15c4dc5a 1897}
b0127e65 1898
1c611bbd 1899
1c611bbd 1900// Determine the distance between two nonces.
1901// Assume that the difference is small, but we don't know which is first.
1902// Therefore try in alternating directions.
1903int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
1904
1905 uint16_t i;
1906 uint32_t nttmp1, nttmp2;
e772353f 1907
1c611bbd 1908 if (nt1 == nt2) return 0;
1909
1910 nttmp1 = nt1;
1911 nttmp2 = nt2;
1912
1913 for (i = 1; i < 32768; i++) {
1914 nttmp1 = prng_successor(nttmp1, 1);
1915 if (nttmp1 == nt2) return i;
1916 nttmp2 = prng_successor(nttmp2, 1);
1917 if (nttmp2 == nt1) return -i;
1918 }
1919
1920 return(-99999); // either nt1 or nt2 are invalid nonces
e772353f 1921}
1922
e772353f 1923
1c611bbd 1924//-----------------------------------------------------------------------------
1925// Recover several bits of the cypher stream. This implements (first stages of)
1926// the algorithm described in "The Dark Side of Security by Obscurity and
1927// Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
1928// (article by Nicolas T. Courtois, 2009)
1929//-----------------------------------------------------------------------------
1930void ReaderMifare(bool first_try)
1931{
1932 // Mifare AUTH
1933 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
1934 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
1935 static uint8_t mf_nr_ar3;
e772353f 1936
1c611bbd 1937 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
7bc95e2e 1938
d2f487af 1939 iso14a_clear_trace();
7bc95e2e 1940 iso14a_set_tracing(TRUE);
e772353f 1941
1c611bbd 1942 byte_t nt_diff = 0;
1943 byte_t par = 0;
1944 //byte_t par_mask = 0xff;
1945 static byte_t par_low = 0;
1946 bool led_on = TRUE;
1947 uint8_t uid[10];
1948 uint32_t cuid;
e772353f 1949
a61b4976 1950 uint32_t nt = 0;
1951 uint32_t previous_nt = 0;
1c611bbd 1952 static uint32_t nt_attacked = 0;
95e63594 1953 byte_t par_list[8] = {0x00};
1954 byte_t ks_list[8] = {0x00};
e772353f 1955
1c611bbd 1956 static uint32_t sync_time;
1957 static uint32_t sync_cycles;
1958 int catch_up_cycles = 0;
1959 int last_catch_up = 0;
1960 uint16_t consecutive_resyncs = 0;
1961 int isOK = 0;
e772353f 1962
1c611bbd 1963 if (first_try) {
1c611bbd 1964 mf_nr_ar3 = 0;
7bc95e2e 1965 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
1966 sync_time = GetCountSspClk() & 0xfffffff8;
1c611bbd 1967 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
1968 nt_attacked = 0;
1969 nt = 0;
1970 par = 0;
1971 }
1972 else {
1973 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
1974 // nt_attacked = prng_successor(nt_attacked, 1);
1975 mf_nr_ar3++;
1976 mf_nr_ar[3] = mf_nr_ar3;
1977 par = par_low;
1978 }
e30c654b 1979
15c4dc5a 1980 LED_A_ON();
1981 LED_B_OFF();
1982 LED_C_OFF();
1c611bbd 1983
7bc95e2e 1984
95e63594 1985 Dbprintf("Mifare: Before loopen");
1c611bbd 1986 for(uint16_t i = 0; TRUE; i++) {
1987
1988 WDT_HIT();
e30c654b 1989
1c611bbd 1990 // Test if the action was cancelled
1991 if(BUTTON_PRESS()) {
1992 break;
1993 }
1994
1995 LED_C_ON();
e30c654b 1996
1c611bbd 1997 if(!iso14443a_select_card(uid, NULL, &cuid)) {
9492e0b0 1998 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
1c611bbd 1999 continue;
2000 }
2001
9492e0b0 2002 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
1c611bbd 2003 catch_up_cycles = 0;
2004
2005 // if we missed the sync time already, advance to the next nonce repeat
7bc95e2e 2006 while(GetCountSspClk() > sync_time) {
9492e0b0 2007 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
1c611bbd 2008 }
e30c654b 2009
9492e0b0 2010 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2011 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
f89c7050 2012
1c611bbd 2013 // Receive the (4 Byte) "random" nonce
2014 if (!ReaderReceive(receivedAnswer)) {
9492e0b0 2015 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
1c611bbd 2016 continue;
2017 }
2018
1c611bbd 2019 previous_nt = nt;
2020 nt = bytes_to_num(receivedAnswer, 4);
2021
2022 // Transmit reader nonce with fake par
9492e0b0 2023 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
1c611bbd 2024
2025 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2026 int nt_distance = dist_nt(previous_nt, nt);
2027 if (nt_distance == 0) {
2028 nt_attacked = nt;
2029 }
2030 else {
2031 if (nt_distance == -99999) { // invalid nonce received, try again
2032 continue;
2033 }
2034 sync_cycles = (sync_cycles - nt_distance);
9492e0b0 2035 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
1c611bbd 2036 continue;
2037 }
2038 }
2039
2040 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2041 catch_up_cycles = -dist_nt(nt_attacked, nt);
2042 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2043 catch_up_cycles = 0;
2044 continue;
2045 }
2046 if (catch_up_cycles == last_catch_up) {
2047 consecutive_resyncs++;
2048 }
2049 else {
2050 last_catch_up = catch_up_cycles;
2051 consecutive_resyncs = 0;
2052 }
2053 if (consecutive_resyncs < 3) {
9492e0b0 2054 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
1c611bbd 2055 }
2056 else {
2057 sync_cycles = sync_cycles + catch_up_cycles;
9492e0b0 2058 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
1c611bbd 2059 }
2060 continue;
2061 }
2062
2063 consecutive_resyncs = 0;
2064
2065 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2066 if (ReaderReceive(receivedAnswer))
2067 {
9492e0b0 2068 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
1c611bbd 2069
2070 if (nt_diff == 0)
2071 {
2072 par_low = par & 0x07; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2073 }
2074
2075 led_on = !led_on;
2076 if(led_on) LED_B_ON(); else LED_B_OFF();
2077
2078 par_list[nt_diff] = par;
2079 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2080
2081 // Test if the information is complete
2082 if (nt_diff == 0x07) {
2083 isOK = 1;
2084 break;
2085 }
2086
2087 nt_diff = (nt_diff + 1) & 0x07;
2088 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2089 par = par_low;
2090 } else {
2091 if (nt_diff == 0 && first_try)
2092 {
2093 par++;
2094 } else {
2095 par = (((par >> 3) + 1) << 3) | par_low;
2096 }
2097 }
2098 }
2099
1c611bbd 2100
2101 mf_nr_ar[3] &= 0x1F;
2102
2103 byte_t buf[28];
2104 memcpy(buf + 0, uid, 4);
2105 num_to_bytes(nt, 4, buf + 4);
2106 memcpy(buf + 8, par_list, 8);
2107 memcpy(buf + 16, ks_list, 8);
2108 memcpy(buf + 24, mf_nr_ar, 4);
2109
2110 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2111
2112 // Thats it...
2113 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2114 LEDsoff();
7bc95e2e 2115
2116 iso14a_set_tracing(FALSE);
20f9a2a1 2117}
1c611bbd 2118
d2f487af 2119/**
2120 *MIFARE 1K simulate.
2121 *
2122 *@param flags :
2123 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2124 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2125 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2126 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2127 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2128 */
2129void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
20f9a2a1 2130{
50193c1e 2131 int cardSTATE = MFEMUL_NOFIELD;
8556b852 2132 int _7BUID = 0;
9ca155ba 2133 int vHf = 0; // in mV
8f51ddb0 2134 int res;
0a39986e
M
2135 uint32_t selTimer = 0;
2136 uint32_t authTimer = 0;
2137 uint32_t par = 0;
9ca155ba 2138 int len = 0;
8f51ddb0 2139 uint8_t cardWRBL = 0;
9ca155ba
M
2140 uint8_t cardAUTHSC = 0;
2141 uint8_t cardAUTHKEY = 0xff; // no authentication
51969283 2142 uint32_t cardRr = 0;
9ca155ba 2143 uint32_t cuid = 0;
d2f487af 2144 //uint32_t rn_enc = 0;
51969283 2145 uint32_t ans = 0;
0014cb46
M
2146 uint32_t cardINTREG = 0;
2147 uint8_t cardINTBLOCK = 0;
9ca155ba
M
2148 struct Crypto1State mpcs = {0, 0};
2149 struct Crypto1State *pcs;
2150 pcs = &mpcs;
d2f487af 2151 uint32_t numReads = 0;//Counts numer of times reader read a block
8f51ddb0
M
2152 uint8_t* receivedCmd = eml_get_bigbufptr_recbuf();
2153 uint8_t *response = eml_get_bigbufptr_sendbuf();
9ca155ba 2154
d2f487af 2155 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2156 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2157 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2158 uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2159 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
9ca155ba 2160
d2f487af 2161 uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2162 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
7bc95e2e 2163
d2f487af 2164 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2165 // This can be used in a reader-only attack.
2166 // (it can also be retrieved via 'hf 14a list', but hey...
2167 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0};
2168 uint8_t ar_nr_collected = 0;
0014cb46 2169
0a39986e 2170 // clear trace
7bc95e2e 2171 iso14a_clear_trace();
2172 iso14a_set_tracing(TRUE);
51969283 2173
7bc95e2e 2174 // Authenticate response - nonce
51969283 2175 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
7bc95e2e 2176
d2f487af 2177 //-- Determine the UID
2178 // Can be set from emulator memory, incoming data
2179 // and can be 7 or 4 bytes long
7bc95e2e 2180 if (flags & FLAG_4B_UID_IN_DATA)
d2f487af 2181 {
2182 // 4B uid comes from data-portion of packet
2183 memcpy(rUIDBCC1,datain,4);
8556b852 2184 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
8556b852 2185
7bc95e2e 2186 } else if (flags & FLAG_7B_UID_IN_DATA) {
d2f487af 2187 // 7B uid comes from data-portion of packet
2188 memcpy(&rUIDBCC1[1],datain,3);
2189 memcpy(rUIDBCC2, datain+3, 4);
2190 _7BUID = true;
7bc95e2e 2191 } else {
d2f487af 2192 // get UID from emul memory
2193 emlGetMemBt(receivedCmd, 7, 1);
2194 _7BUID = !(receivedCmd[0] == 0x00);
2195 if (!_7BUID) { // ---------- 4BUID
2196 emlGetMemBt(rUIDBCC1, 0, 4);
2197 } else { // ---------- 7BUID
2198 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2199 emlGetMemBt(rUIDBCC2, 3, 4);
2200 }
2201 }
7bc95e2e 2202
d2f487af 2203 /*
2204 * Regardless of what method was used to set the UID, set fifth byte and modify
2205 * the ATQA for 4 or 7-byte UID
2206 */
d2f487af 2207 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
7bc95e2e 2208 if (_7BUID) {
d2f487af 2209 rATQA[0] = 0x44;
8556b852 2210 rUIDBCC1[0] = 0x88;
8556b852
M
2211 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2212 }
2213
9ca155ba 2214 // We need to listen to the high-frequency, peak-detected path.
7bc95e2e 2215 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
9ca155ba 2216
9ca155ba 2217
d2f487af 2218 if (MF_DBGLEVEL >= 1) {
2219 if (!_7BUID) {
f38a1528 2220 Dbprintf("4B UID: %02x%02x%02x%02x",rUIDBCC1[0] , rUIDBCC1[1] , rUIDBCC1[2] , rUIDBCC1[3]);
7bc95e2e 2221 } else {
f38a1528 2222 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",rUIDBCC1[0] , rUIDBCC1[1] , rUIDBCC1[2] , rUIDBCC1[3],rUIDBCC2[0],rUIDBCC2[1] ,rUIDBCC2[2] , rUIDBCC2[3]);
d2f487af 2223 }
2224 }
7bc95e2e 2225
2226 bool finished = FALSE;
d2f487af 2227 while (!BUTTON_PRESS() && !finished) {
9ca155ba 2228 WDT_HIT();
9ca155ba
M
2229
2230 // find reader field
2231 // Vref = 3300mV, and an 10:1 voltage divider on the input
2232 // can measure voltages up to 33000 mV
2233 if (cardSTATE == MFEMUL_NOFIELD) {
2234 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2235 if (vHf > MF_MINFIELDV) {
0014cb46 2236 cardSTATE_TO_IDLE();
9ca155ba
M
2237 LED_A_ON();
2238 }
2239 }
d2f487af 2240 if(cardSTATE == MFEMUL_NOFIELD) continue;
9ca155ba 2241
d2f487af 2242 //Now, get data
2243
7bc95e2e 2244 res = EmGetCmd(receivedCmd, &len);
d2f487af 2245 if (res == 2) { //Field is off!
2246 cardSTATE = MFEMUL_NOFIELD;
2247 LEDsoff();
2248 continue;
7bc95e2e 2249 } else if (res == 1) {
2250 break; //return value 1 means button press
2251 }
2252
d2f487af 2253 // REQ or WUP request in ANY state and WUP in HALTED state
2254 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2255 selTimer = GetTickCount();
2256 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2257 cardSTATE = MFEMUL_SELECT1;
2258
2259 // init crypto block
2260 LED_B_OFF();
2261 LED_C_OFF();
2262 crypto1_destroy(pcs);
2263 cardAUTHKEY = 0xff;
2264 continue;
0a39986e 2265 }
7bc95e2e 2266
50193c1e 2267 switch (cardSTATE) {
d2f487af 2268 case MFEMUL_NOFIELD:
2269 case MFEMUL_HALTED:
50193c1e 2270 case MFEMUL_IDLE:{
7bc95e2e 2271 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2272 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
50193c1e
M
2273 break;
2274 }
2275 case MFEMUL_SELECT1:{
9ca155ba
M
2276 // select all
2277 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
d2f487af 2278 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
9ca155ba 2279 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
0014cb46 2280 break;
9ca155ba
M
2281 }
2282
d2f487af 2283 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2284 {
2285 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2286 }
9ca155ba 2287 // select card
0a39986e
M
2288 if (len == 9 &&
2289 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
bfb6a143 2290 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
9ca155ba 2291 cuid = bytes_to_num(rUIDBCC1, 4);
8556b852
M
2292 if (!_7BUID) {
2293 cardSTATE = MFEMUL_WORK;
0014cb46
M
2294 LED_B_ON();
2295 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2296 break;
8556b852
M
2297 } else {
2298 cardSTATE = MFEMUL_SELECT2;
8556b852 2299 }
9ca155ba 2300 }
50193c1e
M
2301 break;
2302 }
d2f487af 2303 case MFEMUL_AUTH1:{
2304 if( len != 8)
2305 {
2306 cardSTATE_TO_IDLE();
7bc95e2e 2307 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2308 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
d2f487af 2309 break;
2310 }
2311 uint32_t ar = bytes_to_num(receivedCmd, 4);
2312 uint32_t nr= bytes_to_num(&receivedCmd[4], 4);
2313
2314 //Collect AR/NR
2315 if(ar_nr_collected < 2){
273b57a7 2316 if(ar_nr_responses[2] != ar)
2317 {// Avoid duplicates... probably not necessary, ar should vary.
d2f487af 2318 ar_nr_responses[ar_nr_collected*4] = cuid;
2319 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2320 ar_nr_responses[ar_nr_collected*4+2] = ar;
2321 ar_nr_responses[ar_nr_collected*4+3] = nr;
273b57a7 2322 ar_nr_collected++;
d2f487af 2323 }
2324 }
2325
2326 // --- crypto
2327 crypto1_word(pcs, ar , 1);
2328 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2329
2330 // test if auth OK
2331 if (cardRr != prng_successor(nonce, 64)){
f38a1528 2332 if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED. cardRr=%08x, succ=%08x",cardRr, prng_successor(nonce, 64));
7bc95e2e 2333 // Shouldn't we respond anything here?
d2f487af 2334 // Right now, we don't nack or anything, which causes the
2335 // reader to do a WUPA after a while. /Martin
b03c0f2d 2336 // -- which is the correct response. /piwi
d2f487af 2337 cardSTATE_TO_IDLE();
7bc95e2e 2338 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2339 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
d2f487af 2340 break;
2341 }
2342
2343 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2344
2345 num_to_bytes(ans, 4, rAUTH_AT);
2346 // --- crypto
2347 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2348 LED_C_ON();
2349 cardSTATE = MFEMUL_WORK;
b03c0f2d 2350 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2351 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2352 GetTickCount() - authTimer);
d2f487af 2353 break;
2354 }
50193c1e 2355 case MFEMUL_SELECT2:{
7bc95e2e 2356 if (!len) {
2357 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2358 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2359 break;
2360 }
8556b852 2361 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
9ca155ba 2362 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
8556b852
M
2363 break;
2364 }
9ca155ba 2365
8556b852
M
2366 // select 2 card
2367 if (len == 9 &&
2368 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2369 EmSendCmd(rSAK, sizeof(rSAK));
8556b852
M
2370 cuid = bytes_to_num(rUIDBCC2, 4);
2371 cardSTATE = MFEMUL_WORK;
2372 LED_B_ON();
0014cb46 2373 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
8556b852
M
2374 break;
2375 }
0014cb46
M
2376
2377 // i guess there is a command). go into the work state.
7bc95e2e 2378 if (len != 4) {
2379 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2380 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2381 break;
2382 }
0014cb46 2383 cardSTATE = MFEMUL_WORK;
d2f487af 2384 //goto lbWORK;
2385 //intentional fall-through to the next case-stmt
50193c1e 2386 }
51969283 2387
7bc95e2e 2388 case MFEMUL_WORK:{
2389 if (len == 0) {
2390 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2391 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2392 break;
2393 }
2394
d2f487af 2395 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2396
7bc95e2e 2397 if(encrypted_data) {
51969283
M
2398 // decrypt seqence
2399 mf_crypto1_decrypt(pcs, receivedCmd, len);
d2f487af 2400 }
7bc95e2e 2401
d2f487af 2402 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2403 authTimer = GetTickCount();
2404 cardAUTHSC = receivedCmd[1] / 4; // received block num
2405 cardAUTHKEY = receivedCmd[0] - 0x60;
2406 crypto1_destroy(pcs);//Added by martin
2407 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
51969283 2408
d2f487af 2409 if (!encrypted_data) { // first authentication
b03c0f2d 2410 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
51969283 2411
d2f487af 2412 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2413 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
7bc95e2e 2414 } else { // nested authentication
b03c0f2d 2415 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
7bc95e2e 2416 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
d2f487af 2417 num_to_bytes(ans, 4, rAUTH_AT);
2418 }
2419 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2420 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2421 cardSTATE = MFEMUL_AUTH1;
2422 break;
51969283 2423 }
7bc95e2e 2424
8f51ddb0
M
2425 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2426 // BUT... ACK --> NACK
2427 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2428 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2429 break;
2430 }
2431
2432 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2433 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2434 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2435 break;
0a39986e
M
2436 }
2437
7bc95e2e 2438 if(len != 4) {
2439 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2440 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2441 break;
2442 }
d2f487af 2443
2444 if(receivedCmd[0] == 0x30 // read block
2445 || receivedCmd[0] == 0xA0 // write block
b03c0f2d 2446 || receivedCmd[0] == 0xC0 // inc
2447 || receivedCmd[0] == 0xC1 // dec
2448 || receivedCmd[0] == 0xC2 // restore
7bc95e2e 2449 || receivedCmd[0] == 0xB0) { // transfer
2450 if (receivedCmd[1] >= 16 * 4) {
d2f487af 2451 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2452 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2453 break;
2454 }
2455
7bc95e2e 2456 if (receivedCmd[1] / 4 != cardAUTHSC) {
8f51ddb0 2457 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
d2f487af 2458 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
8f51ddb0
M
2459 break;
2460 }
d2f487af 2461 }
2462 // read block
2463 if (receivedCmd[0] == 0x30) {
b03c0f2d 2464 if (MF_DBGLEVEL >= 4) {
d2f487af 2465 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2466 }
8f51ddb0
M
2467 emlGetMem(response, receivedCmd[1], 1);
2468 AppendCrc14443a(response, 16);
2469 mf_crypto1_encrypt(pcs, response, 18, &par);
2470 EmSendCmdPar(response, 18, par);
d2f487af 2471 numReads++;
7bc95e2e 2472 if(exitAfterNReads > 0 && numReads == exitAfterNReads) {
d2f487af 2473 Dbprintf("%d reads done, exiting", numReads);
2474 finished = true;
2475 }
0a39986e
M
2476 break;
2477 }
0a39986e 2478 // write block
d2f487af 2479 if (receivedCmd[0] == 0xA0) {
b03c0f2d 2480 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
8f51ddb0 2481 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
8f51ddb0
M
2482 cardSTATE = MFEMUL_WRITEBL2;
2483 cardWRBL = receivedCmd[1];
0a39986e 2484 break;
7bc95e2e 2485 }
0014cb46 2486 // increment, decrement, restore
d2f487af 2487 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
b03c0f2d 2488 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
d2f487af 2489 if (emlCheckValBl(receivedCmd[1])) {
2490 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
0014cb46
M
2491 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2492 break;
2493 }
2494 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2495 if (receivedCmd[0] == 0xC1)
2496 cardSTATE = MFEMUL_INTREG_INC;
2497 if (receivedCmd[0] == 0xC0)
2498 cardSTATE = MFEMUL_INTREG_DEC;
2499 if (receivedCmd[0] == 0xC2)
2500 cardSTATE = MFEMUL_INTREG_REST;
2501 cardWRBL = receivedCmd[1];
0014cb46
M
2502 break;
2503 }
0014cb46 2504 // transfer
d2f487af 2505 if (receivedCmd[0] == 0xB0) {
b03c0f2d 2506 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
0014cb46
M
2507 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2508 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2509 else
2510 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
0014cb46
M
2511 break;
2512 }
9ca155ba 2513 // halt
d2f487af 2514 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
9ca155ba 2515 LED_B_OFF();
0a39986e 2516 LED_C_OFF();
0014cb46
M
2517 cardSTATE = MFEMUL_HALTED;
2518 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
7bc95e2e 2519 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2520 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
0a39986e 2521 break;
9ca155ba 2522 }
d2f487af 2523 // RATS
2524 if (receivedCmd[0] == 0xe0) {//RATS
8f51ddb0
M
2525 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2526 break;
2527 }
d2f487af 2528 // command not allowed
2529 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2530 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
51969283 2531 break;
8f51ddb0
M
2532 }
2533 case MFEMUL_WRITEBL2:{
2534 if (len == 18){
2535 mf_crypto1_decrypt(pcs, receivedCmd, len);
2536 emlSetMem(receivedCmd, cardWRBL, 1);
2537 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2538 cardSTATE = MFEMUL_WORK;
51969283 2539 } else {
0014cb46 2540 cardSTATE_TO_IDLE();
7bc95e2e 2541 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2542 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
8f51ddb0 2543 }
8f51ddb0 2544 break;
50193c1e 2545 }
0014cb46
M
2546
2547 case MFEMUL_INTREG_INC:{
2548 mf_crypto1_decrypt(pcs, receivedCmd, len);
2549 memcpy(&ans, receivedCmd, 4);
2550 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2551 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2552 cardSTATE_TO_IDLE();
2553 break;
7bc95e2e 2554 }
2555 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2556 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
0014cb46
M
2557 cardINTREG = cardINTREG + ans;
2558 cardSTATE = MFEMUL_WORK;
2559 break;
2560 }
2561 case MFEMUL_INTREG_DEC:{
2562 mf_crypto1_decrypt(pcs, receivedCmd, len);
2563 memcpy(&ans, receivedCmd, 4);
2564 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2565 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2566 cardSTATE_TO_IDLE();
2567 break;
2568 }
7bc95e2e 2569 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2570 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
0014cb46
M
2571 cardINTREG = cardINTREG - ans;
2572 cardSTATE = MFEMUL_WORK;
2573 break;
2574 }
2575 case MFEMUL_INTREG_REST:{
2576 mf_crypto1_decrypt(pcs, receivedCmd, len);
2577 memcpy(&ans, receivedCmd, 4);
2578 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2579 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2580 cardSTATE_TO_IDLE();
2581 break;
2582 }
7bc95e2e 2583 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2584 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
0014cb46
M
2585 cardSTATE = MFEMUL_WORK;
2586 break;
2587 }
50193c1e 2588 }
50193c1e
M
2589 }
2590
9ca155ba
M
2591 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2592 LEDsoff();
2593
d2f487af 2594 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2595 {
2596 //May just aswell send the collected ar_nr in the response aswell
2597 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4);
2598 }
d714d3ef 2599
d2f487af 2600 if(flags & FLAG_NR_AR_ATTACK)
2601 {
7bc95e2e 2602 if(ar_nr_collected > 1) {
d2f487af 2603 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
d714d3ef 2604 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
d2f487af 2605 ar_nr_responses[0], // UID
2606 ar_nr_responses[1], //NT
2607 ar_nr_responses[2], //AR1
2608 ar_nr_responses[3], //NR1
2609 ar_nr_responses[6], //AR2
2610 ar_nr_responses[7] //NR2
2611 );
7bc95e2e 2612 } else {
d2f487af 2613 Dbprintf("Failed to obtain two AR/NR pairs!");
7bc95e2e 2614 if(ar_nr_collected >0) {
d714d3ef 2615 Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x",
d2f487af 2616 ar_nr_responses[0], // UID
2617 ar_nr_responses[1], //NT
2618 ar_nr_responses[2], //AR1
2619 ar_nr_responses[3] //NR1
2620 );
2621 }
2622 }
2623 }
0014cb46 2624 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
15c4dc5a 2625}
b62a5a84 2626
d2f487af 2627
2628
b62a5a84
M
2629//-----------------------------------------------------------------------------
2630// MIFARE sniffer.
2631//
2632//-----------------------------------------------------------------------------
5cd9ec01
M
2633void RAMFUNC SniffMifare(uint8_t param) {
2634 // param:
2635 // bit 0 - trigger from first card answer
2636 // bit 1 - trigger from first reader 7-bit request
39864b0b
M
2637
2638 // C(red) A(yellow) B(green)
b62a5a84
M
2639 LEDsoff();
2640 // init trace buffer
991f13f2 2641 iso14a_clear_trace();
2642 iso14a_set_tracing(TRUE);
b62a5a84 2643
b62a5a84
M
2644 // The command (reader -> tag) that we're receiving.
2645 // The length of a received command will in most cases be no more than 18 bytes.
2646 // So 32 should be enough!
2647 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
2648 // The response (tag -> reader) that we're receiving.
2649 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
2650
2651 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2652 // into trace, along with its length and other annotations.
2653 //uint8_t *trace = (uint8_t *)BigBuf;
2654
2655 // The DMA buffer, used to stream samples from the FPGA
7bc95e2e 2656 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
2657 uint8_t *data = dmaBuf;
2658 uint8_t previous_data = 0;
5cd9ec01
M
2659 int maxDataLen = 0;
2660 int dataLen = 0;
7bc95e2e 2661 bool ReaderIsActive = FALSE;
2662 bool TagIsActive = FALSE;
2663
2664 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
b62a5a84
M
2665
2666 // Set up the demodulator for tag -> reader responses.
2667 Demod.output = receivedResponse;
b62a5a84
M
2668
2669 // Set up the demodulator for the reader -> tag commands
b62a5a84 2670 Uart.output = receivedCmd;
b62a5a84
M
2671
2672 // Setup for the DMA.
7bc95e2e 2673 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
b62a5a84 2674
b62a5a84 2675 LED_D_OFF();
39864b0b
M
2676
2677 // init sniffer
2678 MfSniffInit();
b62a5a84 2679
b62a5a84 2680 // And now we loop, receiving samples.
7bc95e2e 2681 for(uint32_t sniffCounter = 0; TRUE; ) {
2682
5cd9ec01
M
2683 if(BUTTON_PRESS()) {
2684 DbpString("cancelled by button");
7bc95e2e 2685 break;
5cd9ec01
M
2686 }
2687
b62a5a84
M
2688 LED_A_ON();
2689 WDT_HIT();
39864b0b 2690
7bc95e2e 2691 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2692 // check if a transaction is completed (timeout after 2000ms).
2693 // if yes, stop the DMA transfer and send what we have so far to the client
2694 if (MfSniffSend(2000)) {
2695 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2696 sniffCounter = 0;
2697 data = dmaBuf;
2698 maxDataLen = 0;
2699 ReaderIsActive = FALSE;
2700 TagIsActive = FALSE;
2701 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
39864b0b 2702 }
39864b0b 2703 }
7bc95e2e 2704
2705 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2706 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2707 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2708 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2709 } else {
2710 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
5cd9ec01
M
2711 }
2712 // test for length of buffer
7bc95e2e 2713 if(dataLen > maxDataLen) { // we are more behind than ever...
2714 maxDataLen = dataLen;
5cd9ec01
M
2715 if(dataLen > 400) {
2716 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
7bc95e2e 2717 break;
b62a5a84
M
2718 }
2719 }
5cd9ec01 2720 if(dataLen < 1) continue;
b62a5a84 2721
7bc95e2e 2722 // primary buffer was stopped ( <-- we lost data!
5cd9ec01
M
2723 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2724 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2725 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
55acbb2a 2726 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
5cd9ec01
M
2727 }
2728 // secondary buffer sets as primary, secondary buffer was stopped
2729 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2730 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
b62a5a84
M
2731 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2732 }
5cd9ec01
M
2733
2734 LED_A_OFF();
b62a5a84 2735
7bc95e2e 2736 if (sniffCounter & 0x01) {
b62a5a84 2737
7bc95e2e 2738 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
2739 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
2740 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
2741 LED_C_INV();
2742 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parityBits, Uart.bitCount, TRUE)) break;
b62a5a84 2743
7bc95e2e 2744 /* And ready to receive another command. */
2745 UartReset();
2746
2747 /* And also reset the demod code */
2748 DemodReset();
2749 }
2750 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
2751 }
2752
2753 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
2754 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
2755 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
2756 LED_C_INV();
b62a5a84 2757
7bc95e2e 2758 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parityBits, Demod.bitCount, FALSE)) break;
39864b0b 2759
7bc95e2e 2760 // And ready to receive another response.
2761 DemodReset();
2762 }
2763 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
2764 }
b62a5a84
M
2765 }
2766
7bc95e2e 2767 previous_data = *data;
2768 sniffCounter++;
5cd9ec01 2769 data++;
d714d3ef 2770 if(data == dmaBuf + DMA_BUFFER_SIZE) {
5cd9ec01 2771 data = dmaBuf;
b62a5a84 2772 }
7bc95e2e 2773
b62a5a84
M
2774 } // main cycle
2775
2776 DbpString("COMMAND FINISHED");
2777
55acbb2a 2778 FpgaDisableSscDma();
39864b0b
M
2779 MfSniffEnd();
2780
7bc95e2e 2781 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
b62a5a84 2782 LEDsoff();
3803d529 2783}
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