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minor fix when reading blocks
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15c4dc5a 1//-----------------------------------------------------------------------------
b62a5a84 2// Merlok - June 2011, 2012
15c4dc5a 3// Gerhard de Koning Gans - May 2008
534983d7 4// Hagen Fritsch - June 2010
bd20f8f4 5//
6// This code is licensed to you under the terms of the GNU GPL, version 2 or,
7// at your option, any later version. See the LICENSE.txt file for the text of
8// the license.
15c4dc5a 9//-----------------------------------------------------------------------------
bd20f8f4 10// Routines to support ISO 14443 type A.
11//-----------------------------------------------------------------------------
12
e30c654b 13#include "proxmark3.h"
15c4dc5a 14#include "apps.h"
f7e3ed82 15#include "util.h"
9ab7a6c7 16#include "string.h"
902cb3c0 17#include "cmd.h"
9ab7a6c7 18
15c4dc5a 19#include "iso14443crc.h"
534983d7 20#include "iso14443a.h"
20f9a2a1
M
21#include "crapto1.h"
22#include "mifareutil.h"
15c4dc5a 23
534983d7 24static uint32_t iso14a_timeout;
d19929cb 25uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
1e262141 26int traceLen = 0;
27int rsamples = 0;
28int tracing = TRUE;
29uint8_t trigger = 0;
b0127e65 30// the block number for the ISO14443-4 PCB
31static uint8_t iso14_pcb_blocknum = 0;
15c4dc5a 32
8f51ddb0 33// CARD TO READER - manchester
72934aa3 34// Sequence D: 11110000 modulation with subcarrier during first half
35// Sequence E: 00001111 modulation with subcarrier during second half
36// Sequence F: 00000000 no modulation with subcarrier
8f51ddb0 37// READER TO CARD - miller
72934aa3 38// Sequence X: 00001100 drop after half a period
39// Sequence Y: 00000000 no drop
40// Sequence Z: 11000000 drop at start
41#define SEC_D 0xf0
42#define SEC_E 0x0f
43#define SEC_F 0x00
44#define SEC_X 0x0c
45#define SEC_Y 0x00
46#define SEC_Z 0xc0
15c4dc5a 47
1e262141 48const uint8_t OddByteParity[256] = {
15c4dc5a 49 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
50 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
51 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
52 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
53 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
54 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
55 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
56 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
57 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
58 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
59 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
60 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
61 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
62 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
63 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
64 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
65};
66
1e262141 67
902cb3c0 68void iso14a_set_trigger(bool enable) {
534983d7 69 trigger = enable;
70}
71
902cb3c0 72void iso14a_clear_trace() {
73 memset(trace, 0x44, TRACE_SIZE);
8556b852
M
74 traceLen = 0;
75}
d19929cb 76
902cb3c0 77void iso14a_set_tracing(bool enable) {
8556b852
M
78 tracing = enable;
79}
d19929cb 80
b0127e65 81void iso14a_set_timeout(uint32_t timeout) {
82 iso14a_timeout = timeout;
83}
8556b852 84
15c4dc5a 85//-----------------------------------------------------------------------------
86// Generate the parity value for a byte sequence
e30c654b 87//
15c4dc5a 88//-----------------------------------------------------------------------------
20f9a2a1
M
89byte_t oddparity (const byte_t bt)
90{
91 return OddByteParity[bt];
92}
93
f7e3ed82 94uint32_t GetParity(const uint8_t * pbtCmd, int iLen)
15c4dc5a 95{
96 int i;
f7e3ed82 97 uint32_t dwPar = 0;
72934aa3 98
15c4dc5a 99 // Generate the encrypted data
100 for (i = 0; i < iLen; i++) {
101 // Save the encrypted parity bit
102 dwPar |= ((OddByteParity[pbtCmd[i]]) << i);
103 }
104 return dwPar;
105}
106
534983d7 107void AppendCrc14443a(uint8_t* data, int len)
15c4dc5a 108{
109 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
110}
111
1e262141 112// The function LogTrace() is also used by the iClass implementation in iClass.c
5cd9ec01 113int RAMFUNC LogTrace(const uint8_t * btBytes, int iLen, int iSamples, uint32_t dwParity, int bReader)
15c4dc5a 114{
115 // Return when trace is full
81cd0474 116 if (traceLen >= TRACE_SIZE) return FALSE;
e30c654b 117
15c4dc5a 118 // Trace the random, i'm curious
119 rsamples += iSamples;
120 trace[traceLen++] = ((rsamples >> 0) & 0xff);
121 trace[traceLen++] = ((rsamples >> 8) & 0xff);
122 trace[traceLen++] = ((rsamples >> 16) & 0xff);
123 trace[traceLen++] = ((rsamples >> 24) & 0xff);
124 if (!bReader) {
125 trace[traceLen - 1] |= 0x80;
126 }
127 trace[traceLen++] = ((dwParity >> 0) & 0xff);
128 trace[traceLen++] = ((dwParity >> 8) & 0xff);
129 trace[traceLen++] = ((dwParity >> 16) & 0xff);
130 trace[traceLen++] = ((dwParity >> 24) & 0xff);
131 trace[traceLen++] = iLen;
132 memcpy(trace + traceLen, btBytes, iLen);
133 traceLen += iLen;
134 return TRUE;
135}
136
15c4dc5a 137//-----------------------------------------------------------------------------
138// The software UART that receives commands from the reader, and its state
139// variables.
140//-----------------------------------------------------------------------------
b62a5a84 141static tUart Uart;
15c4dc5a 142
6c1e2d95 143static RAMFUNC int MillerDecoding(int bit)
15c4dc5a 144{
9f693930 145 //int error = 0;
15c4dc5a 146 int bitright;
147
148 if(!Uart.bitBuffer) {
149 Uart.bitBuffer = bit ^ 0xFF0;
150 return FALSE;
151 }
152 else {
153 Uart.bitBuffer <<= 4;
154 Uart.bitBuffer ^= bit;
155 }
156
f7e3ed82 157 int EOC = FALSE;
15c4dc5a 158
159 if(Uart.state != STATE_UNSYNCD) {
160 Uart.posCnt++;
161
162 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
163 bit = 0x00;
164 }
165 else {
166 bit = 0x01;
167 }
168 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
169 bitright = 0x00;
170 }
171 else {
172 bitright = 0x01;
173 }
174 if(bit != bitright) { bit = bitright; }
175
176 if(Uart.posCnt == 1) {
177 // measurement first half bitperiod
178 if(!bit) {
179 Uart.drop = DROP_FIRST_HALF;
180 }
181 }
182 else {
183 // measurement second half bitperiod
184 if(!bit & (Uart.drop == DROP_NONE)) {
185 Uart.drop = DROP_SECOND_HALF;
186 }
187 else if(!bit) {
188 // measured a drop in first and second half
189 // which should not be possible
190 Uart.state = STATE_ERROR_WAIT;
9f693930 191 //error = 0x01;
15c4dc5a 192 }
193
194 Uart.posCnt = 0;
195
196 switch(Uart.state) {
197 case STATE_START_OF_COMMUNICATION:
198 Uart.shiftReg = 0;
199 if(Uart.drop == DROP_SECOND_HALF) {
200 // error, should not happen in SOC
201 Uart.state = STATE_ERROR_WAIT;
9f693930 202 //error = 0x02;
15c4dc5a 203 }
204 else {
205 // correct SOC
206 Uart.state = STATE_MILLER_Z;
207 }
208 break;
209
210 case STATE_MILLER_Z:
211 Uart.bitCnt++;
212 Uart.shiftReg >>= 1;
213 if(Uart.drop == DROP_NONE) {
214 // logic '0' followed by sequence Y
215 // end of communication
216 Uart.state = STATE_UNSYNCD;
217 EOC = TRUE;
218 }
219 // if(Uart.drop == DROP_FIRST_HALF) {
220 // Uart.state = STATE_MILLER_Z; stay the same
221 // we see a logic '0' }
222 if(Uart.drop == DROP_SECOND_HALF) {
223 // we see a logic '1'
224 Uart.shiftReg |= 0x100;
225 Uart.state = STATE_MILLER_X;
226 }
227 break;
228
229 case STATE_MILLER_X:
230 Uart.shiftReg >>= 1;
231 if(Uart.drop == DROP_NONE) {
232 // sequence Y, we see a '0'
233 Uart.state = STATE_MILLER_Y;
234 Uart.bitCnt++;
235 }
236 if(Uart.drop == DROP_FIRST_HALF) {
237 // Would be STATE_MILLER_Z
238 // but Z does not follow X, so error
239 Uart.state = STATE_ERROR_WAIT;
9f693930 240 //error = 0x03;
15c4dc5a 241 }
242 if(Uart.drop == DROP_SECOND_HALF) {
243 // We see a '1' and stay in state X
244 Uart.shiftReg |= 0x100;
245 Uart.bitCnt++;
246 }
247 break;
248
249 case STATE_MILLER_Y:
250 Uart.bitCnt++;
251 Uart.shiftReg >>= 1;
252 if(Uart.drop == DROP_NONE) {
253 // logic '0' followed by sequence Y
254 // end of communication
255 Uart.state = STATE_UNSYNCD;
256 EOC = TRUE;
257 }
258 if(Uart.drop == DROP_FIRST_HALF) {
259 // we see a '0'
260 Uart.state = STATE_MILLER_Z;
261 }
262 if(Uart.drop == DROP_SECOND_HALF) {
263 // We see a '1' and go to state X
264 Uart.shiftReg |= 0x100;
265 Uart.state = STATE_MILLER_X;
266 }
267 break;
268
269 case STATE_ERROR_WAIT:
270 // That went wrong. Now wait for at least two bit periods
271 // and try to sync again
272 if(Uart.drop == DROP_NONE) {
273 Uart.highCnt = 6;
274 Uart.state = STATE_UNSYNCD;
275 }
276 break;
277
278 default:
279 Uart.state = STATE_UNSYNCD;
280 Uart.highCnt = 0;
281 break;
282 }
283
284 Uart.drop = DROP_NONE;
285
286 // should have received at least one whole byte...
287 if((Uart.bitCnt == 2) && EOC && (Uart.byteCnt > 0)) {
288 return TRUE;
289 }
290
291 if(Uart.bitCnt == 9) {
292 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
293 Uart.byteCnt++;
294
295 Uart.parityBits <<= 1;
296 Uart.parityBits ^= ((Uart.shiftReg >> 8) & 0x01);
297
298 if(EOC) {
299 // when End of Communication received and
300 // all data bits processed..
301 return TRUE;
302 }
303 Uart.bitCnt = 0;
304 }
305
306 /*if(error) {
307 Uart.output[Uart.byteCnt] = 0xAA;
308 Uart.byteCnt++;
309 Uart.output[Uart.byteCnt] = error & 0xFF;
310 Uart.byteCnt++;
311 Uart.output[Uart.byteCnt] = 0xAA;
312 Uart.byteCnt++;
313 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
314 Uart.byteCnt++;
315 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
316 Uart.byteCnt++;
317 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
318 Uart.byteCnt++;
319 Uart.output[Uart.byteCnt] = 0xAA;
320 Uart.byteCnt++;
321 return TRUE;
322 }*/
323 }
324
325 }
326 else {
327 bit = Uart.bitBuffer & 0xf0;
328 bit >>= 4;
329 bit ^= 0x0F;
330 if(bit) {
331 // should have been high or at least (4 * 128) / fc
332 // according to ISO this should be at least (9 * 128 + 20) / fc
333 if(Uart.highCnt == 8) {
334 // we went low, so this could be start of communication
335 // it turns out to be safer to choose a less significant
336 // syncbit... so we check whether the neighbour also represents the drop
337 Uart.posCnt = 1; // apparently we are busy with our first half bit period
338 Uart.syncBit = bit & 8;
339 Uart.samples = 3;
340 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
341 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
342 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
343 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
344 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
2f2d9fc5 345 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
15c4dc5a 346 Uart.syncBit = 8;
347
348 // the first half bit period is expected in next sample
349 Uart.posCnt = 0;
350 Uart.samples = 3;
351 }
352 }
353 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
354
355 Uart.syncBit <<= 4;
356 Uart.state = STATE_START_OF_COMMUNICATION;
357 Uart.drop = DROP_FIRST_HALF;
358 Uart.bitCnt = 0;
359 Uart.byteCnt = 0;
360 Uart.parityBits = 0;
9f693930 361 //error = 0;
15c4dc5a 362 }
363 else {
364 Uart.highCnt = 0;
365 }
366 }
367 else {
368 if(Uart.highCnt < 8) {
369 Uart.highCnt++;
370 }
371 }
372 }
373
374 return FALSE;
375}
376
377//=============================================================================
378// ISO 14443 Type A - Manchester
379//=============================================================================
b62a5a84 380static tDemod Demod;
15c4dc5a 381
6c1e2d95 382static RAMFUNC int ManchesterDecoding(int v)
15c4dc5a 383{
384 int bit;
385 int modulation;
9f693930 386 //int error = 0;
15c4dc5a 387
388 if(!Demod.buff) {
389 Demod.buff = 1;
390 Demod.buffer = v;
391 return FALSE;
392 }
393 else {
394 bit = Demod.buffer;
395 Demod.buffer = v;
396 }
397
398 if(Demod.state==DEMOD_UNSYNCD) {
399 Demod.output[Demod.len] = 0xfa;
400 Demod.syncBit = 0;
401 //Demod.samples = 0;
402 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
2f2d9fc5 403
404 if(bit & 0x08) {
405 Demod.syncBit = 0x08;
15c4dc5a 406 }
15c4dc5a 407
2f2d9fc5 408 if(bit & 0x04) {
409 if(Demod.syncBit) {
410 bit <<= 4;
411 }
412 Demod.syncBit = 0x04;
413 }
15c4dc5a 414
2f2d9fc5 415 if(bit & 0x02) {
416 if(Demod.syncBit) {
417 bit <<= 2;
15c4dc5a 418 }
2f2d9fc5 419 Demod.syncBit = 0x02;
15c4dc5a 420 }
15c4dc5a 421
593924e7 422 if(bit & 0x01 && Demod.syncBit) {
2f2d9fc5 423 Demod.syncBit = 0x01;
424 }
425
15c4dc5a 426 if(Demod.syncBit) {
427 Demod.len = 0;
428 Demod.state = DEMOD_START_OF_COMMUNICATION;
429 Demod.sub = SUB_FIRST_HALF;
430 Demod.bitCount = 0;
431 Demod.shiftReg = 0;
432 Demod.parityBits = 0;
433 Demod.samples = 0;
434 if(Demod.posCount) {
534983d7 435 if(trigger) LED_A_OFF();
15c4dc5a 436 switch(Demod.syncBit) {
437 case 0x08: Demod.samples = 3; break;
438 case 0x04: Demod.samples = 2; break;
439 case 0x02: Demod.samples = 1; break;
440 case 0x01: Demod.samples = 0; break;
441 }
442 }
9f693930 443 //error = 0;
15c4dc5a 444 }
445 }
446 else {
447 //modulation = bit & Demod.syncBit;
448 modulation = ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
449
450 Demod.samples += 4;
451
452 if(Demod.posCount==0) {
453 Demod.posCount = 1;
454 if(modulation) {
455 Demod.sub = SUB_FIRST_HALF;
456 }
457 else {
458 Demod.sub = SUB_NONE;
459 }
460 }
461 else {
462 Demod.posCount = 0;
463 if(modulation && (Demod.sub == SUB_FIRST_HALF)) {
464 if(Demod.state!=DEMOD_ERROR_WAIT) {
465 Demod.state = DEMOD_ERROR_WAIT;
466 Demod.output[Demod.len] = 0xaa;
9f693930 467 //error = 0x01;
15c4dc5a 468 }
469 }
470 else if(modulation) {
471 Demod.sub = SUB_SECOND_HALF;
472 }
473
474 switch(Demod.state) {
475 case DEMOD_START_OF_COMMUNICATION:
476 if(Demod.sub == SUB_FIRST_HALF) {
477 Demod.state = DEMOD_MANCHESTER_D;
478 }
479 else {
480 Demod.output[Demod.len] = 0xab;
481 Demod.state = DEMOD_ERROR_WAIT;
9f693930 482 //error = 0x02;
15c4dc5a 483 }
484 break;
485
486 case DEMOD_MANCHESTER_D:
487 case DEMOD_MANCHESTER_E:
488 if(Demod.sub == SUB_FIRST_HALF) {
489 Demod.bitCount++;
490 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
491 Demod.state = DEMOD_MANCHESTER_D;
492 }
493 else if(Demod.sub == SUB_SECOND_HALF) {
494 Demod.bitCount++;
495 Demod.shiftReg >>= 1;
496 Demod.state = DEMOD_MANCHESTER_E;
497 }
498 else {
499 Demod.state = DEMOD_MANCHESTER_F;
500 }
501 break;
502
503 case DEMOD_MANCHESTER_F:
504 // Tag response does not need to be a complete byte!
505 if(Demod.len > 0 || Demod.bitCount > 0) {
506 if(Demod.bitCount > 0) {
507 Demod.shiftReg >>= (9 - Demod.bitCount);
508 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
509 Demod.len++;
510 // No parity bit, so just shift a 0
511 Demod.parityBits <<= 1;
512 }
513
514 Demod.state = DEMOD_UNSYNCD;
515 return TRUE;
516 }
517 else {
518 Demod.output[Demod.len] = 0xad;
519 Demod.state = DEMOD_ERROR_WAIT;
9f693930 520 //error = 0x03;
15c4dc5a 521 }
522 break;
523
524 case DEMOD_ERROR_WAIT:
525 Demod.state = DEMOD_UNSYNCD;
526 break;
527
528 default:
529 Demod.output[Demod.len] = 0xdd;
530 Demod.state = DEMOD_UNSYNCD;
531 break;
532 }
533
534 if(Demod.bitCount>=9) {
535 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
536 Demod.len++;
537
538 Demod.parityBits <<= 1;
539 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
540
541 Demod.bitCount = 0;
542 Demod.shiftReg = 0;
543 }
544
545 /*if(error) {
546 Demod.output[Demod.len] = 0xBB;
547 Demod.len++;
548 Demod.output[Demod.len] = error & 0xFF;
549 Demod.len++;
550 Demod.output[Demod.len] = 0xBB;
551 Demod.len++;
552 Demod.output[Demod.len] = bit & 0xFF;
553 Demod.len++;
554 Demod.output[Demod.len] = Demod.buffer & 0xFF;
555 Demod.len++;
556 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
557 Demod.len++;
558 Demod.output[Demod.len] = 0xBB;
559 Demod.len++;
560 return TRUE;
561 }*/
562
563 }
564
565 } // end (state != UNSYNCED)
566
567 return FALSE;
568}
569
570//=============================================================================
571// Finally, a `sniffer' for ISO 14443 Type A
572// Both sides of communication!
573//=============================================================================
574
575//-----------------------------------------------------------------------------
576// Record the sequence of commands sent by the reader to the tag, with
577// triggering so that we start recording at the point that the tag is moved
578// near the reader.
579//-----------------------------------------------------------------------------
5cd9ec01
M
580void RAMFUNC SnoopIso14443a(uint8_t param) {
581 // param:
582 // bit 0 - trigger from first card answer
583 // bit 1 - trigger from first reader 7-bit request
584
585 LEDsoff();
586 // init trace buffer
d19929cb 587 iso14a_clear_trace();
5cd9ec01
M
588
589 // We won't start recording the frames that we acquire until we trigger;
590 // a good trigger condition to get started is probably when we see a
591 // response from the tag.
592 // triggered == FALSE -- to wait first for card
593 int triggered = !(param & 0x03);
594
595 // The command (reader -> tag) that we're receiving.
15c4dc5a 596 // The length of a received command will in most cases be no more than 18 bytes.
597 // So 32 should be enough!
5cd9ec01
M
598 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
599 // The response (tag -> reader) that we're receiving.
600 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
15c4dc5a 601
5cd9ec01
M
602 // As we receive stuff, we copy it from receivedCmd or receivedResponse
603 // into trace, along with its length and other annotations.
604 //uint8_t *trace = (uint8_t *)BigBuf;
605
606 // The DMA buffer, used to stream samples from the FPGA
607 int8_t *dmaBuf = ((int8_t *)BigBuf) + DMA_BUFFER_OFFSET;
608 int8_t *data = dmaBuf;
609 int maxDataLen = 0;
610 int dataLen = 0;
15c4dc5a 611
5cd9ec01
M
612 // Set up the demodulator for tag -> reader responses.
613 Demod.output = receivedResponse;
614 Demod.len = 0;
615 Demod.state = DEMOD_UNSYNCD;
15c4dc5a 616
5cd9ec01
M
617 // Set up the demodulator for the reader -> tag commands
618 memset(&Uart, 0, sizeof(Uart));
619 Uart.output = receivedCmd;
620 Uart.byteCntMax = 32; // was 100 (greg)//////////////////
621 Uart.state = STATE_UNSYNCD;
15c4dc5a 622
5cd9ec01
M
623 // Setup for the DMA.
624 FpgaSetupSsc();
625 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
15c4dc5a 626
5cd9ec01
M
627 // And put the FPGA in the appropriate mode
628 // Signal field is off with the appropriate LED
629 LED_D_OFF();
630 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
631 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
7e758047 632
5cd9ec01
M
633 // Count of samples received so far, so that we can include timing
634 // information in the trace buffer.
635 rsamples = 0;
636 // And now we loop, receiving samples.
637 while(true) {
638 if(BUTTON_PRESS()) {
639 DbpString("cancelled by button");
640 goto done;
641 }
15c4dc5a 642
5cd9ec01
M
643 LED_A_ON();
644 WDT_HIT();
15c4dc5a 645
5cd9ec01
M
646 int register readBufDataP = data - dmaBuf;
647 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
648 if (readBufDataP <= dmaBufDataP){
649 dataLen = dmaBufDataP - readBufDataP;
650 } else {
651 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP + 1;
652 }
653 // test for length of buffer
654 if(dataLen > maxDataLen) {
655 maxDataLen = dataLen;
656 if(dataLen > 400) {
657 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
658 goto done;
659 }
660 }
661 if(dataLen < 1) continue;
662
663 // primary buffer was stopped( <-- we lost data!
664 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
665 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
666 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
5cd9ec01
M
667 }
668 // secondary buffer sets as primary, secondary buffer was stopped
669 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
670 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
671 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
672 }
673
674 LED_A_OFF();
675
676 rsamples += 4;
677 if(MillerDecoding((data[0] & 0xF0) >> 4)) {
678 LED_C_ON();
679
680 // check - if there is a short 7bit request from reader
681 if ((!triggered) && (param & 0x02) && (Uart.byteCnt == 1) && (Uart.bitCnt = 9)) triggered = TRUE;
682
683 if(triggered) {
684 if (!LogTrace(receivedCmd, Uart.byteCnt, 0 - Uart.samples, Uart.parityBits, TRUE)) break;
685 }
686 /* And ready to receive another command. */
687 Uart.state = STATE_UNSYNCD;
688 /* And also reset the demod code, which might have been */
689 /* false-triggered by the commands from the reader. */
690 Demod.state = DEMOD_UNSYNCD;
691 LED_B_OFF();
692 }
693
694 if(ManchesterDecoding(data[0] & 0x0F)) {
695 LED_B_ON();
696
697 if (!LogTrace(receivedResponse, Demod.len, 0 - Demod.samples, Demod.parityBits, FALSE)) break;
698
699 if ((!triggered) && (param & 0x01)) triggered = TRUE;
700
701 // And ready to receive another response.
702 memset(&Demod, 0, sizeof(Demod));
703 Demod.output = receivedResponse;
704 Demod.state = DEMOD_UNSYNCD;
705 LED_C_OFF();
706 }
707
708 data++;
709 if(data > dmaBuf + DMA_BUFFER_SIZE) {
710 data = dmaBuf;
711 }
712 } // main cycle
713
714 DbpString("COMMAND FINISHED");
15c4dc5a 715
15c4dc5a 716done:
5cd9ec01
M
717 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
718 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.byteCnt=%x", maxDataLen, Uart.state, Uart.byteCnt);
719 Dbprintf("Uart.byteCntMax=%x, traceLen=%x, Uart.output[0]=%08x", Uart.byteCntMax, traceLen, (int)Uart.output[0]);
720 LEDsoff();
15c4dc5a 721}
722
15c4dc5a 723//-----------------------------------------------------------------------------
724// Prepare tag messages
725//-----------------------------------------------------------------------------
8f51ddb0 726static void CodeIso14443aAsTagPar(const uint8_t *cmd, int len, uint32_t dwParity)
15c4dc5a 727{
8f51ddb0 728 int i;
15c4dc5a 729
8f51ddb0 730 ToSendReset();
15c4dc5a 731
732 // Correction bit, might be removed when not needed
733 ToSendStuffBit(0);
734 ToSendStuffBit(0);
735 ToSendStuffBit(0);
736 ToSendStuffBit(0);
737 ToSendStuffBit(1); // 1
738 ToSendStuffBit(0);
739 ToSendStuffBit(0);
740 ToSendStuffBit(0);
8f51ddb0 741
15c4dc5a 742 // Send startbit
72934aa3 743 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 744
8f51ddb0
M
745 for(i = 0; i < len; i++) {
746 int j;
747 uint8_t b = cmd[i];
15c4dc5a 748
749 // Data bits
15c4dc5a 750 for(j = 0; j < 8; j++) {
15c4dc5a 751 if(b & 1) {
72934aa3 752 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 753 } else {
72934aa3 754 ToSend[++ToSendMax] = SEC_E;
8f51ddb0
M
755 }
756 b >>= 1;
757 }
15c4dc5a 758
0014cb46 759 // Get the parity bit
8f51ddb0
M
760 if ((dwParity >> i) & 0x01) {
761 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 762 } else {
72934aa3 763 ToSend[++ToSendMax] = SEC_E;
15c4dc5a 764 }
8f51ddb0 765 }
15c4dc5a 766
8f51ddb0
M
767 // Send stopbit
768 ToSend[++ToSendMax] = SEC_F;
15c4dc5a 769
8f51ddb0
M
770 // Convert from last byte pos to length
771 ToSendMax++;
8f51ddb0
M
772}
773
774static void CodeIso14443aAsTag(const uint8_t *cmd, int len){
775 CodeIso14443aAsTagPar(cmd, len, GetParity(cmd, len));
15c4dc5a 776}
777
778//-----------------------------------------------------------------------------
779// This is to send a NACK kind of answer, its only 3 bits, I know it should be 4
780//-----------------------------------------------------------------------------
8f51ddb0 781static void CodeStrangeAnswerAsTag()
15c4dc5a 782{
783 int i;
784
785 ToSendReset();
786
787 // Correction bit, might be removed when not needed
788 ToSendStuffBit(0);
789 ToSendStuffBit(0);
790 ToSendStuffBit(0);
791 ToSendStuffBit(0);
792 ToSendStuffBit(1); // 1
793 ToSendStuffBit(0);
794 ToSendStuffBit(0);
795 ToSendStuffBit(0);
796
797 // Send startbit
72934aa3 798 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 799
800 // 0
72934aa3 801 ToSend[++ToSendMax] = SEC_E;
15c4dc5a 802
803 // 0
72934aa3 804 ToSend[++ToSendMax] = SEC_E;
15c4dc5a 805
806 // 1
72934aa3 807 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 808
809 // Send stopbit
72934aa3 810 ToSend[++ToSendMax] = SEC_F;
15c4dc5a 811
812 // Flush the buffer in FPGA!!
813 for(i = 0; i < 5; i++) {
72934aa3 814 ToSend[++ToSendMax] = SEC_F;
15c4dc5a 815 }
816
817 // Convert from last byte pos to length
818 ToSendMax++;
8f51ddb0 819}
15c4dc5a 820
8f51ddb0
M
821static void Code4bitAnswerAsTag(uint8_t cmd)
822{
823 int i;
824
825 ToSendReset();
826
827 // Correction bit, might be removed when not needed
828 ToSendStuffBit(0);
829 ToSendStuffBit(0);
830 ToSendStuffBit(0);
831 ToSendStuffBit(0);
832 ToSendStuffBit(1); // 1
833 ToSendStuffBit(0);
834 ToSendStuffBit(0);
835 ToSendStuffBit(0);
836
837 // Send startbit
838 ToSend[++ToSendMax] = SEC_D;
839
840 uint8_t b = cmd;
841 for(i = 0; i < 4; i++) {
842 if(b & 1) {
843 ToSend[++ToSendMax] = SEC_D;
844 } else {
845 ToSend[++ToSendMax] = SEC_E;
846 }
847 b >>= 1;
848 }
849
850 // Send stopbit
851 ToSend[++ToSendMax] = SEC_F;
852
853 // Flush the buffer in FPGA!!
854 for(i = 0; i < 5; i++) {
855 ToSend[++ToSendMax] = SEC_F;
856 }
857
858 // Convert from last byte pos to length
859 ToSendMax++;
15c4dc5a 860}
861
862//-----------------------------------------------------------------------------
863// Wait for commands from reader
864// Stop when button is pressed
865// Or return TRUE when command is captured
866//-----------------------------------------------------------------------------
f7e3ed82 867static int GetIso14443aCommandFromReader(uint8_t *received, int *len, int maxLen)
15c4dc5a 868{
869 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
870 // only, since we are receiving, not transmitting).
871 // Signal field is off with the appropriate LED
872 LED_D_OFF();
873 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
874
875 // Now run a `software UART' on the stream of incoming samples.
876 Uart.output = received;
877 Uart.byteCntMax = maxLen;
878 Uart.state = STATE_UNSYNCD;
879
880 for(;;) {
881 WDT_HIT();
882
883 if(BUTTON_PRESS()) return FALSE;
884
885 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
886 AT91C_BASE_SSC->SSC_THR = 0x00;
887 }
888 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 889 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 890 if(MillerDecoding((b & 0xf0) >> 4)) {
891 *len = Uart.byteCnt;
892 return TRUE;
893 }
894 if(MillerDecoding(b & 0x0f)) {
895 *len = Uart.byteCnt;
896 return TRUE;
897 }
898 }
899 }
900}
9ca155ba 901static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, int correctionNeeded);
15c4dc5a 902
903//-----------------------------------------------------------------------------
904// Main loop of simulated tag: receive commands from reader, decide what
905// response to send, and send it.
906//-----------------------------------------------------------------------------
81cd0474 907void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd)
15c4dc5a 908{
81cd0474 909 // Enable and clear the trace
910 tracing = TRUE;
d19929cb 911 iso14a_clear_trace();
81cd0474 912
15c4dc5a 913 // This function contains the tag emulation
81cd0474 914 uint8_t sak;
915
916 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
917 uint8_t response1[2];
918
919 switch (tagType) {
920 case 1: { // MIFARE Classic
921 // Says: I am Mifare 1k - original line
922 response1[0] = 0x04;
923 response1[1] = 0x00;
924 sak = 0x08;
925 } break;
926 case 2: { // MIFARE Ultralight
927 // Says: I am a stupid memory tag, no crypto
928 response1[0] = 0x04;
929 response1[1] = 0x00;
930 sak = 0x00;
931 } break;
932 case 3: { // MIFARE DESFire
933 // Says: I am a DESFire tag, ph33r me
934 response1[0] = 0x04;
935 response1[1] = 0x03;
936 sak = 0x20;
937 } break;
938 case 4: { // ISO/IEC 14443-4
939 // Says: I am a javacard (JCOP)
940 response1[0] = 0x04;
941 response1[1] = 0x00;
942 sak = 0x28;
943 } break;
944 default: {
945 Dbprintf("Error: unkown tagtype (%d)",tagType);
946 return;
947 } break;
948 }
949
950 // The second response contains the (mandatory) first 24 bits of the UID
951 uint8_t response2[5];
952
953 // Check if the uid uses the (optional) part
954 uint8_t response2a[5];
955 if (uid_2nd) {
956 response2[0] = 0x88;
957 num_to_bytes(uid_1st,3,response2+1);
958 num_to_bytes(uid_2nd,4,response2a);
959 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
960
961 // Configure the ATQA and SAK accordingly
962 response1[0] |= 0x40;
963 sak |= 0x04;
964 } else {
965 num_to_bytes(uid_1st,4,response2);
966 // Configure the ATQA and SAK accordingly
967 response1[0] &= 0xBF;
968 sak &= 0xFB;
969 }
970
971 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
972 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
973
974 // Prepare the mandatory SAK (for 4 and 7 byte UID)
975 uint8_t response3[3];
976 response3[0] = sak;
977 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
978
979 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
980 uint8_t response3a[3];
981 response3a[0] = sak & 0xFB;
982 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
983
254b70a4 984 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
985 uint8_t response6[] = { 0x03, 0x3B, 0x00, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS
986 ComputeCrc14443(CRC_14443_A, response6, 3, &response6[3], &response6[4]);
81cd0474 987
254b70a4 988 uint8_t *resp;
989 int respLen;
15c4dc5a 990
81cd0474 991 // Longest possible response will be 16 bytes + 2 CRC = 18 bytes
15c4dc5a 992 // This will need
993 // 144 data bits (18 * 8)
994 // 18 parity bits
995 // 2 Start and stop
996 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
997 // 1 just for the case
998 // ----------- +
999 // 166
1000 //
1001 // 166 bytes, since every bit that needs to be send costs us a byte
1002 //
1003
254b70a4 1004 // Respond with card type
1005 uint8_t *resp1 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
1006 int resp1Len;
15c4dc5a 1007
254b70a4 1008 // Anticollision cascade1 - respond with uid
1009 uint8_t *resp2 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + 166);
1010 int resp2Len;
15c4dc5a 1011
254b70a4 1012 // Anticollision cascade2 - respond with 2nd half of uid if asked
1013 // we're only going to be asked if we set the 1st byte of the UID (during cascade1) to 0x88
1014 uint8_t *resp2a = (((uint8_t *)BigBuf) + 1140);
1015 int resp2aLen;
15c4dc5a 1016
254b70a4 1017 // Acknowledge select - cascade 1
1018 uint8_t *resp3 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*2));
1019 int resp3Len;
15c4dc5a 1020
254b70a4 1021 // Acknowledge select - cascade 2
1022 uint8_t *resp3a = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*3));
1023 int resp3aLen;
15c4dc5a 1024
254b70a4 1025 // Response to a read request - not implemented atm
1026 uint8_t *resp4 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*4));
1027 int resp4Len;
15c4dc5a 1028
254b70a4 1029 // Authenticate response - nonce
1030 uint8_t *resp5 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*5));
1031 int resp5Len;
15c4dc5a 1032
254b70a4 1033 // Authenticate response - nonce
1034 uint8_t *resp6 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*6));
1035 int resp6Len;
15c4dc5a 1036
254b70a4 1037 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
1038 int len;
15c4dc5a 1039
1040 // To control where we are in the protocol
1041 int order = 0;
1042 int lastorder;
1043
1044 // Just to allow some checks
1045 int happened = 0;
1046 int happened2 = 0;
1047
81cd0474 1048 int cmdsRecvd = 0;
1049 uint8_t* respdata = NULL;
1050 int respsize = 0;
1051 uint8_t nack = 0x04;
15c4dc5a 1052
81cd0474 1053 memset(receivedCmd, 0x44, RECV_CMD_SIZE);
15c4dc5a 1054
1055 // Prepare the responses of the anticollision phase
1056 // there will be not enough time to do this at the moment the reader sends it REQA
1057
1058 // Answer to request
1059 CodeIso14443aAsTag(response1, sizeof(response1));
254b70a4 1060 memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax;
15c4dc5a 1061
1062 // Send our UID (cascade 1)
1063 CodeIso14443aAsTag(response2, sizeof(response2));
254b70a4 1064 memcpy(resp2, ToSend, ToSendMax); resp2Len = ToSendMax;
15c4dc5a 1065
1066 // Answer to select (cascade1)
1067 CodeIso14443aAsTag(response3, sizeof(response3));
254b70a4 1068 memcpy(resp3, ToSend, ToSendMax); resp3Len = ToSendMax;
15c4dc5a 1069
1070 // Send the cascade 2 2nd part of the uid
1071 CodeIso14443aAsTag(response2a, sizeof(response2a));
254b70a4 1072 memcpy(resp2a, ToSend, ToSendMax); resp2aLen = ToSendMax;
15c4dc5a 1073
1074 // Answer to select (cascade 2)
1075 CodeIso14443aAsTag(response3a, sizeof(response3a));
254b70a4 1076 memcpy(resp3a, ToSend, ToSendMax); resp3aLen = ToSendMax;
15c4dc5a 1077
1078 // Strange answer is an example of rare message size (3 bits)
8f51ddb0 1079 CodeStrangeAnswerAsTag();
15c4dc5a 1080 memcpy(resp4, ToSend, ToSendMax); resp4Len = ToSendMax;
1081
1082 // Authentication answer (random nonce)
1083 CodeIso14443aAsTag(response5, sizeof(response5));
254b70a4 1084 memcpy(resp5, ToSend, ToSendMax); resp5Len = ToSendMax;
15c4dc5a 1085
254b70a4 1086 // dummy ATS (pseudo-ATR), answer to RATS
1087 CodeIso14443aAsTag(response6, sizeof(response6));
1088 memcpy(resp6, ToSend, ToSendMax); resp6Len = ToSendMax;
15c4dc5a 1089
254b70a4 1090 // We need to listen to the high-frequency, peak-detected path.
1091 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1092 FpgaSetupSsc();
15c4dc5a 1093
254b70a4 1094 cmdsRecvd = 0;
15c4dc5a 1095
254b70a4 1096 LED_A_ON();
1097 for(;;) {
1098
81cd0474 1099 if(!GetIso14443aCommandFromReader(receivedCmd, &len, RECV_CMD_SIZE)) {
254b70a4 1100 DbpString("button press");
1101 break;
1102 }
1103 // doob - added loads of debug strings so we can see what the reader is saying to us during the sim as hi14alist is not populated
1104 // Okay, look at the command now.
1105 lastorder = order;
1106 if(receivedCmd[0] == 0x26) { // Received a REQUEST
15c4dc5a 1107 resp = resp1; respLen = resp1Len; order = 1;
81cd0474 1108 respdata = response1;
1109 respsize = sizeof(response1);
254b70a4 1110 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
15c4dc5a 1111 resp = resp1; respLen = resp1Len; order = 6;
81cd0474 1112 respdata = response1;
1113 respsize = sizeof(response1);
254b70a4 1114 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
15c4dc5a 1115 resp = resp2; respLen = resp2Len; order = 2;
81cd0474 1116 respdata = response2;
1117 respsize = sizeof(response2);
254b70a4 1118 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
15c4dc5a 1119 resp = resp2a; respLen = resp2aLen; order = 20;
81cd0474 1120 respdata = response2a;
1121 respsize = sizeof(response2a);
254b70a4 1122 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
15c4dc5a 1123 resp = resp3; respLen = resp3Len; order = 3;
81cd0474 1124 respdata = response3;
1125 respsize = sizeof(response3);
254b70a4 1126 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
15c4dc5a 1127 resp = resp3a; respLen = resp3aLen; order = 30;
81cd0474 1128 respdata = response3a;
1129 respsize = sizeof(response3a);
254b70a4 1130 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
15c4dc5a 1131 resp = resp4; respLen = resp4Len; order = 4; // Do nothing
254b70a4 1132 Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
81cd0474 1133 respdata = &nack;
1134 respsize = sizeof(nack); // 4-bit answer
254b70a4 1135 } else if(receivedCmd[0] == 0x50) { // Received a HALT
15c4dc5a 1136 DbpString("Reader requested we HALT!:");
254b70a4 1137 // Do not respond
1138 resp = resp1; respLen = 0; order = 0;
81cd0474 1139 respdata = NULL;
1140 respsize = 0;
254b70a4 1141 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
15c4dc5a 1142 resp = resp5; respLen = resp5Len; order = 7;
254b70a4 1143 respdata = response5;
1144 respsize = sizeof(response5);
1145 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1146 resp = resp6; respLen = resp6Len; order = 70;
1147 respdata = response6;
1148 respsize = sizeof(response6);
81cd0474 1149 } else {
1150 // Never seen this command before
7862f4ad 1151 Dbprintf("Received (len=%d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",
20f9a2a1 1152 len,
15c4dc5a 1153 receivedCmd[0], receivedCmd[1], receivedCmd[2],
20f9a2a1
M
1154 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1155 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
15c4dc5a 1156 // Do not respond
1157 resp = resp1; respLen = 0; order = 0;
81cd0474 1158 respdata = NULL;
1159 respsize = 0;
1160 }
15c4dc5a 1161
1162 // Count number of wakeups received after a halt
1163 if(order == 6 && lastorder == 5) { happened++; }
1164
1165 // Count number of other messages after a halt
1166 if(order != 6 && lastorder == 5) { happened2++; }
1167
1168 // Look at last parity bit to determine timing of answer
1169 if((Uart.parityBits & 0x01) || receivedCmd[0] == 0x52) {
1170 // 1236, so correction bit needed
9f693930 1171 //i = 0;
15c4dc5a 1172 }
1173
15c4dc5a 1174 if(cmdsRecvd > 999) {
1175 DbpString("1000 commands later...");
254b70a4 1176 break;
1177 } else {
15c4dc5a 1178 cmdsRecvd++;
1179 }
1180
81cd0474 1181 if(respLen > 0) {
81cd0474 1182 EmSendCmd14443aRaw(resp, respLen, receivedCmd[0] == 0x52);
1183 }
1184
1185 if (tracing) {
1186 LogTrace(receivedCmd,len, 0, Uart.parityBits, TRUE);
1187 if (respdata != NULL) {
1188 LogTrace(respdata,respsize, 0, SwapBits(GetParity(respdata,respsize),respsize), FALSE);
1189 }
4ab4336a 1190 if(traceLen > TRACE_SIZE) {
1191 DbpString("Trace full");
1192 break;
1193 }
81cd0474 1194 }
15c4dc5a 1195
81cd0474 1196 memset(receivedCmd, 0x44, RECV_CMD_SIZE);
254b70a4 1197 }
15c4dc5a 1198
1199 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1200 LED_A_OFF();
1201}
1202
1203//-----------------------------------------------------------------------------
1204// Transmit the command (to the tag) that was placed in ToSend[].
1205//-----------------------------------------------------------------------------
f7e3ed82 1206static void TransmitFor14443a(const uint8_t *cmd, int len, int *samples, int *wait)
15c4dc5a 1207{
1208 int c;
e30c654b 1209
15c4dc5a 1210 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
e30c654b 1211
15c4dc5a 1212 if (wait)
1213 if(*wait < 10)
1214 *wait = 10;
e30c654b 1215
15c4dc5a 1216 for(c = 0; c < *wait;) {
1217 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1218 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1219 c++;
1220 }
1221 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 1222 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 1223 (void)r;
1224 }
1225 WDT_HIT();
1226 }
e30c654b 1227
15c4dc5a 1228 c = 0;
1229 for(;;) {
1230 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1231 AT91C_BASE_SSC->SSC_THR = cmd[c];
1232 c++;
1233 if(c >= len) {
1234 break;
1235 }
1236 }
1237 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 1238 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 1239 (void)r;
1240 }
1241 WDT_HIT();
1242 }
1243 if (samples) *samples = (c + *wait) << 3;
1244}
1245
15c4dc5a 1246//-----------------------------------------------------------------------------
1247// Code a 7-bit command without parity bit
1248// This is especially for 0x26 and 0x52 (REQA and WUPA)
1249//-----------------------------------------------------------------------------
f7e3ed82 1250void ShortFrameFromReader(const uint8_t bt)
15c4dc5a 1251{
1252 int j;
1253 int last;
f7e3ed82 1254 uint8_t b;
15c4dc5a 1255
1256 ToSendReset();
1257
1258 // Start of Communication (Seq. Z)
72934aa3 1259 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1260 last = 0;
1261
1262 b = bt;
1263 for(j = 0; j < 7; j++) {
1264 if(b & 1) {
1265 // Sequence X
72934aa3 1266 ToSend[++ToSendMax] = SEC_X;
15c4dc5a 1267 last = 1;
1268 } else {
1269 if(last == 0) {
1270 // Sequence Z
72934aa3 1271 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1272 }
1273 else {
1274 // Sequence Y
72934aa3 1275 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1276 last = 0;
1277 }
1278 }
1279 b >>= 1;
1280 }
1281
1282 // End of Communication
1283 if(last == 0) {
1284 // Sequence Z
72934aa3 1285 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1286 }
1287 else {
1288 // Sequence Y
72934aa3 1289 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1290 last = 0;
1291 }
1292 // Sequence Y
72934aa3 1293 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1294
1295 // Just to be sure!
72934aa3 1296 ToSend[++ToSendMax] = SEC_Y;
1297 ToSend[++ToSendMax] = SEC_Y;
1298 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1299
1300 // Convert from last character reference to length
1301 ToSendMax++;
1302}
1303
1304//-----------------------------------------------------------------------------
1305// Prepare reader command to send to FPGA
e30c654b 1306//
15c4dc5a 1307//-----------------------------------------------------------------------------
f7e3ed82 1308void CodeIso14443aAsReaderPar(const uint8_t * cmd, int len, uint32_t dwParity)
15c4dc5a 1309{
1310 int i, j;
1311 int last;
f7e3ed82 1312 uint8_t b;
e30c654b 1313
15c4dc5a 1314 ToSendReset();
e30c654b 1315
15c4dc5a 1316 // Start of Communication (Seq. Z)
72934aa3 1317 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1318 last = 0;
e30c654b 1319
15c4dc5a 1320 // Generate send structure for the data bits
1321 for (i = 0; i < len; i++) {
1322 // Get the current byte to send
1323 b = cmd[i];
e30c654b 1324
15c4dc5a 1325 for (j = 0; j < 8; j++) {
1326 if (b & 1) {
1327 // Sequence X
72934aa3 1328 ToSend[++ToSendMax] = SEC_X;
15c4dc5a 1329 last = 1;
1330 } else {
1331 if (last == 0) {
1332 // Sequence Z
72934aa3 1333 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1334 } else {
1335 // Sequence Y
72934aa3 1336 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1337 last = 0;
1338 }
1339 }
1340 b >>= 1;
1341 }
e30c654b 1342
15c4dc5a 1343 // Get the parity bit
1344 if ((dwParity >> i) & 0x01) {
1345 // Sequence X
72934aa3 1346 ToSend[++ToSendMax] = SEC_X;
15c4dc5a 1347 last = 1;
1348 } else {
1349 if (last == 0) {
1350 // Sequence Z
72934aa3 1351 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1352 } else {
1353 // Sequence Y
72934aa3 1354 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1355 last = 0;
1356 }
1357 }
1358 }
e30c654b 1359
15c4dc5a 1360 // End of Communication
1361 if (last == 0) {
1362 // Sequence Z
72934aa3 1363 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1364 } else {
1365 // Sequence Y
72934aa3 1366 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1367 last = 0;
1368 }
1369 // Sequence Y
72934aa3 1370 ToSend[++ToSendMax] = SEC_Y;
e30c654b 1371
15c4dc5a 1372 // Just to be sure!
72934aa3 1373 ToSend[++ToSendMax] = SEC_Y;
1374 ToSend[++ToSendMax] = SEC_Y;
1375 ToSend[++ToSendMax] = SEC_Y;
e30c654b 1376
15c4dc5a 1377 // Convert from last character reference to length
1378 ToSendMax++;
1379}
1380
9ca155ba
M
1381//-----------------------------------------------------------------------------
1382// Wait for commands from reader
1383// Stop when button is pressed (return 1) or field was gone (return 2)
1384// Or return 0 when command is captured
1385//-----------------------------------------------------------------------------
1386static int EmGetCmd(uint8_t *received, int *len, int maxLen)
1387{
1388 *len = 0;
1389
1390 uint32_t timer = 0, vtime = 0;
1391 int analogCnt = 0;
1392 int analogAVG = 0;
1393
1394 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1395 // only, since we are receiving, not transmitting).
1396 // Signal field is off with the appropriate LED
1397 LED_D_OFF();
1398 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1399
1400 // Set ADC to read field strength
1401 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1402 AT91C_BASE_ADC->ADC_MR =
1403 ADC_MODE_PRESCALE(32) |
1404 ADC_MODE_STARTUP_TIME(16) |
1405 ADC_MODE_SAMPLE_HOLD_TIME(8);
1406 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1407 // start ADC
1408 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1409
1410 // Now run a 'software UART' on the stream of incoming samples.
1411 Uart.output = received;
1412 Uart.byteCntMax = maxLen;
1413 Uart.state = STATE_UNSYNCD;
1414
1415 for(;;) {
1416 WDT_HIT();
1417
1418 if (BUTTON_PRESS()) return 1;
1419
1420 // test if the field exists
1421 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1422 analogCnt++;
1423 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1424 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1425 if (analogCnt >= 32) {
1426 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1427 vtime = GetTickCount();
1428 if (!timer) timer = vtime;
1429 // 50ms no field --> card to idle state
1430 if (vtime - timer > 50) return 2;
1431 } else
1432 if (timer) timer = 0;
1433 analogCnt = 0;
1434 analogAVG = 0;
1435 }
1436 }
1437 // transmit none
1438 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1439 AT91C_BASE_SSC->SSC_THR = 0x00;
1440 }
1441 // receive and test the miller decoding
1442 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1443 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1444 if(MillerDecoding((b & 0xf0) >> 4)) {
1445 *len = Uart.byteCnt;
8f51ddb0 1446 if (tracing) LogTrace(received, *len, GetDeltaCountUS(), Uart.parityBits, TRUE);
9ca155ba
M
1447 return 0;
1448 }
1449 if(MillerDecoding(b & 0x0f)) {
1450 *len = Uart.byteCnt;
8f51ddb0 1451 if (tracing) LogTrace(received, *len, GetDeltaCountUS(), Uart.parityBits, TRUE);
9ca155ba
M
1452 return 0;
1453 }
1454 }
1455 }
1456}
1457
1458static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, int correctionNeeded)
1459{
1460 int i, u = 0;
1461 uint8_t b = 0;
1462
1463 // Modulate Manchester
1464 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1465 AT91C_BASE_SSC->SSC_THR = 0x00;
1466 FpgaSetupSsc();
1467
1468 // include correction bit
1469 i = 1;
1470 if((Uart.parityBits & 0x01) || correctionNeeded) {
1471 // 1236, so correction bit needed
1472 i = 0;
1473 }
1474
1475 // send cycle
1476 for(;;) {
1477 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1478 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1479 (void)b;
1480 }
1481 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1482 if(i > respLen) {
8f51ddb0 1483 b = 0xff; // was 0x00
9ca155ba
M
1484 u++;
1485 } else {
1486 b = resp[i];
1487 i++;
1488 }
1489 AT91C_BASE_SSC->SSC_THR = b;
1490
1491 if(u > 4) break;
1492 }
1493 if(BUTTON_PRESS()) {
1494 break;
1495 }
1496 }
1497
1498 return 0;
1499}
1500
8f51ddb0
M
1501int EmSend4bitEx(uint8_t resp, int correctionNeeded){
1502 Code4bitAnswerAsTag(resp);
0a39986e 1503 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
8f51ddb0 1504 if (tracing) LogTrace(&resp, 1, GetDeltaCountUS(), GetParity(&resp, 1), FALSE);
0a39986e 1505 return res;
9ca155ba
M
1506}
1507
8f51ddb0
M
1508int EmSend4bit(uint8_t resp){
1509 return EmSend4bitEx(resp, 0);
1510}
1511
1512int EmSendCmdExPar(uint8_t *resp, int respLen, int correctionNeeded, uint32_t par){
1513 CodeIso14443aAsTagPar(resp, respLen, par);
1514 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1515 if (tracing) LogTrace(resp, respLen, GetDeltaCountUS(), par, FALSE);
1516 return res;
1517}
1518
1519int EmSendCmdEx(uint8_t *resp, int respLen, int correctionNeeded){
1520 return EmSendCmdExPar(resp, respLen, correctionNeeded, GetParity(resp, respLen));
1521}
1522
1523int EmSendCmd(uint8_t *resp, int respLen){
1524 return EmSendCmdExPar(resp, respLen, 0, GetParity(resp, respLen));
1525}
1526
1527int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par){
1528 return EmSendCmdExPar(resp, respLen, 0, par);
9ca155ba
M
1529}
1530
15c4dc5a 1531//-----------------------------------------------------------------------------
1532// Wait a certain time for tag response
1533// If a response is captured return TRUE
1534// If it takes to long return FALSE
1535//-----------------------------------------------------------------------------
f7e3ed82 1536static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
15c4dc5a 1537{
1538 // buffer needs to be 512 bytes
1539 int c;
1540
1541 // Set FPGA mode to "reader listen mode", no modulation (listen
534983d7 1542 // only, since we are receiving, not transmitting).
1543 // Signal field is on with the appropriate LED
1544 LED_D_ON();
1545 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
15c4dc5a 1546
534983d7 1547 // Now get the answer from the card
1548 Demod.output = receivedResponse;
1549 Demod.len = 0;
1550 Demod.state = DEMOD_UNSYNCD;
15c4dc5a 1551
f7e3ed82 1552 uint8_t b;
15c4dc5a 1553 if (elapsed) *elapsed = 0;
1554
1555 c = 0;
1556 for(;;) {
534983d7 1557 WDT_HIT();
15c4dc5a 1558
534983d7 1559 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1560 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
15c4dc5a 1561 if (elapsed) (*elapsed)++;
534983d7 1562 }
1563 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1564 if(c < iso14a_timeout) { c++; } else { return FALSE; }
1565 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
72934aa3 1566 if(ManchesterDecoding((b>>4) & 0xf)) {
15c4dc5a 1567 *samples = ((c - 1) << 3) + 4;
1568 return TRUE;
1569 }
1570 if(ManchesterDecoding(b & 0x0f)) {
1571 *samples = c << 3;
1572 return TRUE;
1573 }
534983d7 1574 }
1575 }
15c4dc5a 1576}
1577
f7e3ed82 1578void ReaderTransmitShort(const uint8_t* bt)
15c4dc5a 1579{
1580 int wait = 0;
1581 int samples = 0;
1582
1583 ShortFrameFromReader(*bt);
e30c654b 1584
15c4dc5a 1585 // Select the card
e30c654b 1586 TransmitFor14443a(ToSend, ToSendMax, &samples, &wait);
1587
15c4dc5a 1588 // Store reader command in buffer
1589 if (tracing) LogTrace(bt,1,0,GetParity(bt,1),TRUE);
1590}
1591
f7e3ed82 1592void ReaderTransmitPar(uint8_t* frame, int len, uint32_t par)
15c4dc5a 1593{
1594 int wait = 0;
1595 int samples = 0;
e30c654b 1596
15c4dc5a 1597 // This is tied to other size changes
f7e3ed82 1598 // uint8_t* frame_addr = ((uint8_t*)BigBuf) + 2024;
15c4dc5a 1599 CodeIso14443aAsReaderPar(frame,len,par);
e30c654b 1600
15c4dc5a 1601 // Select the card
e30c654b 1602 TransmitFor14443a(ToSend, ToSendMax, &samples, &wait);
534983d7 1603 if(trigger)
1604 LED_A_ON();
e30c654b 1605
15c4dc5a 1606 // Store reader command in buffer
1607 if (tracing) LogTrace(frame,len,0,par,TRUE);
1608}
1609
1610
f7e3ed82 1611void ReaderTransmit(uint8_t* frame, int len)
15c4dc5a 1612{
1613 // Generate parity and redirect
1614 ReaderTransmitPar(frame,len,GetParity(frame,len));
1615}
1616
f7e3ed82 1617int ReaderReceive(uint8_t* receivedAnswer)
15c4dc5a 1618{
1619 int samples = 0;
20f9a2a1 1620 if (!GetIso14443aAnswerFromTag(receivedAnswer,160,&samples,0)) return FALSE;
15c4dc5a 1621 if (tracing) LogTrace(receivedAnswer,Demod.len,samples,Demod.parityBits,FALSE);
7e758047 1622 if(samples == 0) return FALSE;
1623 return Demod.len;
15c4dc5a 1624}
1625
f89c7050
M
1626int ReaderReceivePar(uint8_t* receivedAnswer, uint32_t * parptr)
1627{
1628 int samples = 0;
1629 if (!GetIso14443aAnswerFromTag(receivedAnswer,160,&samples,0)) return FALSE;
1630 if (tracing) LogTrace(receivedAnswer,Demod.len,samples,Demod.parityBits,FALSE);
1631 *parptr = Demod.parityBits;
1632 if(samples == 0) return FALSE;
1633 return Demod.len;
1634}
1635
7e758047 1636/* performs iso14443a anticolision procedure
534983d7 1637 * fills the uid pointer unless NULL
1638 * fills resp_data unless NULL */
20f9a2a1
M
1639int iso14443a_select_card(uint8_t * uid_ptr, iso14a_card_select_t * resp_data, uint32_t * cuid_ptr) {
1640 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
f7e3ed82 1641 uint8_t sel_all[] = { 0x93,0x20 };
1642 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
7e758047 1643 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
15c4dc5a 1644
902cb3c0 1645 uint8_t* resp = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); // was 3560 - tied to other size changes
15c4dc5a 1646
534983d7 1647 uint8_t sak = 0x04; // cascade uid
1648 int cascade_level = 0;
1649
7e758047 1650 int len;
20f9a2a1
M
1651
1652 // clear uid
902cb3c0 1653 memset(uid_ptr, 0, 12);
15c4dc5a 1654
7e758047 1655 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1656 ReaderTransmitShort(wupa);
1657 // Receive the ATQA
1658 if(!ReaderReceive(resp)) return 0;
902cb3c0 1659// Dbprintf("atqa: %02x %02x",resp[0],resp[1]);
1660
534983d7 1661 if(resp_data)
1662 memcpy(resp_data->atqa, resp, 2);
1663
534983d7 1664 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
7e758047 1665 // which case we need to make a cascade 2 request and select - this is a long UID
534983d7 1666 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1667 for(; sak & 0x04; cascade_level++)
7e758047 1668 {
534983d7 1669 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1670 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1671
1672 // SELECT_ALL
1673 ReaderTransmit(sel_all,sizeof(sel_all));
1674 if (!ReaderReceive(resp)) return 0;
902cb3c0 1675// Dbprintf("uid: %02x %02x %02x %02x",resp[0],resp[1],resp[2],resp[3]);
1676
534983d7 1677 if(uid_ptr) memcpy(uid_ptr + cascade_level*4, resp, 4);
20f9a2a1
M
1678
1679 // calculate crypto UID
1680 if(cuid_ptr) *cuid_ptr = bytes_to_num(resp, 4);
e30c654b 1681
7e758047 1682 // Construct SELECT UID command
534983d7 1683 memcpy(sel_uid+2,resp,5);
1684 AppendCrc14443a(sel_uid,7);
1685 ReaderTransmit(sel_uid,sizeof(sel_uid));
1686
7e758047 1687 // Receive the SAK
1688 if (!ReaderReceive(resp)) return 0;
534983d7 1689 sak = resp[0];
7e758047 1690 }
534983d7 1691 if(resp_data) {
1692 resp_data->sak = sak;
1693 resp_data->ats_len = 0;
1694 }
20f9a2a1
M
1695 //-- this byte not UID, it CT. http://www.nxp.com/documents/application_note/AN10927.pdf page 3
1696 if (uid_ptr[0] == 0x88) {
1697 memcpy(uid_ptr, uid_ptr + 1, 7);
1698 uid_ptr[7] = 0;
1699 }
534983d7 1700
1701 if( (sak & 0x20) == 0)
7e758047 1702 return 2; // non iso14443a compliant tag
534983d7 1703
7e758047 1704 // Request for answer to select
20f9a2a1
M
1705 if(resp_data) { // JCOP cards - if reader sent RATS then there is no MIFARE session at all!!!
1706 AppendCrc14443a(rats, 2);
1707 ReaderTransmit(rats, sizeof(rats));
1708
1709 if (!(len = ReaderReceive(resp))) return 0;
1710
534983d7 1711 memcpy(resp_data->ats, resp, sizeof(resp_data->ats));
1712 resp_data->ats_len = len;
1713 }
20f9a2a1 1714
b0127e65 1715 // reset the PCB block number
1716 iso14_pcb_blocknum = 0;
1717
7e758047 1718 return 1;
1719}
15c4dc5a 1720
7e758047 1721void iso14443a_setup() {
902cb3c0 1722 // Set up the synchronous serial port
1723 FpgaSetupSsc();
7e758047 1724 // Start from off (no field generated)
1725 // Signal field is off with the appropriate LED
1726 LED_D_OFF();
1727 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
902cb3c0 1728 SpinDelay(50);
15c4dc5a 1729
7e758047 1730 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
e30c654b 1731
7e758047 1732 // Now give it time to spin up.
1733 // Signal field is on with the appropriate LED
1734 LED_D_ON();
1735 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
902cb3c0 1736 SpinDelay(50);
534983d7 1737
1738 iso14a_timeout = 2048; //default
7e758047 1739}
15c4dc5a 1740
534983d7 1741int iso14_apdu(uint8_t * cmd, size_t cmd_len, void * data) {
1742 uint8_t real_cmd[cmd_len+4];
1743 real_cmd[0] = 0x0a; //I-Block
b0127e65 1744 // put block number into the PCB
1745 real_cmd[0] |= iso14_pcb_blocknum;
534983d7 1746 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1747 memcpy(real_cmd+2, cmd, cmd_len);
1748 AppendCrc14443a(real_cmd,cmd_len+2);
1749
1750 ReaderTransmit(real_cmd, cmd_len+4);
1751 size_t len = ReaderReceive(data);
b0127e65 1752 uint8_t * data_bytes = (uint8_t *) data;
1753 if (!len)
1754 return 0; //DATA LINK ERROR
1755 // if we received an I- or R(ACK)-Block with a block number equal to the
1756 // current block number, toggle the current block number
1757 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1758 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1759 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1760 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1761 {
1762 iso14_pcb_blocknum ^= 1;
1763 }
1764
534983d7 1765 return len;
1766}
1767
7e758047 1768//-----------------------------------------------------------------------------
1769// Read an ISO 14443a tag. Send out commands and store answers.
1770//
1771//-----------------------------------------------------------------------------
902cb3c0 1772void ReaderIso14443a(UsbCommand * c)
7e758047 1773{
534983d7 1774 iso14a_command_t param = c->arg[0];
1775 uint8_t * cmd = c->d.asBytes;
1776 size_t len = c->arg[1];
902cb3c0 1777 uint32_t arg0;
1778 byte_t buf[48];
1779
1780 iso14a_clear_trace();
1781 iso14a_set_tracing(true);
e30c654b 1782
534983d7 1783 if(param & ISO14A_REQUEST_TRIGGER) iso14a_set_trigger(1);
15c4dc5a 1784
534983d7 1785 if(param & ISO14A_CONNECT) {
1786 iso14443a_setup();
902cb3c0 1787 arg0 = iso14443a_select_card(buf, (iso14a_card_select_t *)(buf+12), NULL);
1788 cmd_send(CMD_ACK,arg0,0,0,buf,48);
1789// UsbSendPacket((void *)ack, sizeof(UsbCommand));
534983d7 1790 }
e30c654b 1791
534983d7 1792 if(param & ISO14A_SET_TIMEOUT) {
1793 iso14a_timeout = c->arg[2];
1794 }
e30c654b 1795
534983d7 1796 if(param & ISO14A_SET_TIMEOUT) {
1797 iso14a_timeout = c->arg[2];
1798 }
e30c654b 1799
534983d7 1800 if(param & ISO14A_APDU) {
902cb3c0 1801 arg0 = iso14_apdu(cmd, len, buf);
1802 cmd_send(CMD_ACK,arg0,0,0,buf,48);
1803// UsbSendPacket((void *)ack, sizeof(UsbCommand));
534983d7 1804 }
e30c654b 1805
534983d7 1806 if(param & ISO14A_RAW) {
1807 if(param & ISO14A_APPEND_CRC) {
1808 AppendCrc14443a(cmd,len);
1809 len += 2;
15c4dc5a 1810 }
534983d7 1811 ReaderTransmit(cmd,len);
902cb3c0 1812 arg0 = ReaderReceive(buf);
1813// UsbSendPacket((void *)ack, sizeof(UsbCommand));
1814 cmd_send(CMD_ACK,arg0,0,0,buf,48);
534983d7 1815 }
15c4dc5a 1816
534983d7 1817 if(param & ISO14A_REQUEST_TRIGGER) iso14a_set_trigger(0);
15c4dc5a 1818
534983d7 1819 if(param & ISO14A_NO_DISCONNECT)
1820 return;
15c4dc5a 1821
15c4dc5a 1822 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1823 LEDsoff();
15c4dc5a 1824}
b0127e65 1825
15c4dc5a 1826//-----------------------------------------------------------------------------
1827// Read an ISO 14443a tag. Send out commands and store answers.
1828//
1829//-----------------------------------------------------------------------------
f7e3ed82 1830void ReaderMifare(uint32_t parameter)
15c4dc5a 1831{
15c4dc5a 1832 // Mifare AUTH
f7e3ed82 1833 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
f89c7050 1834 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
e30c654b 1835
902cb3c0 1836 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); // was 3560 - tied to other size changes
f89c7050
M
1837 traceLen = 0;
1838 tracing = false;
e30c654b 1839
7e758047 1840 iso14443a_setup();
e30c654b 1841
15c4dc5a 1842 LED_A_ON();
1843 LED_B_OFF();
1844 LED_C_OFF();
e30c654b 1845
f89c7050
M
1846 byte_t nt_diff = 0;
1847 LED_A_OFF();
1848 byte_t par = 0;
9f693930 1849 //byte_t par_mask = 0xff;
f89c7050
M
1850 byte_t par_low = 0;
1851 int led_on = TRUE;
50193c1e 1852 uint8_t uid[8];
f89c7050 1853 uint32_t cuid;
e30c654b 1854
f89c7050
M
1855 tracing = FALSE;
1856 byte_t nt[4] = {0,0,0,0};
f397b5cc 1857 byte_t nt_attacked[4], nt_noattack[4];
f89c7050
M
1858 byte_t par_list[8] = {0,0,0,0,0,0,0,0};
1859 byte_t ks_list[8] = {0,0,0,0,0,0,0,0};
f397b5cc 1860 num_to_bytes(parameter, 4, nt_noattack);
50193c1e 1861 int isOK = 0, isNULL = 0;
f397b5cc 1862
f89c7050
M
1863 while(TRUE)
1864 {
bfaecce6 1865 LED_C_OFF();
f89c7050 1866 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
5a9506ac 1867 SpinDelay(50);
f89c7050 1868 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
bfaecce6
M
1869 LED_C_ON();
1870 SpinDelay(2);
e30c654b 1871
f89c7050
M
1872 // Test if the action was cancelled
1873 if(BUTTON_PRESS()) {
1874 break;
1875 }
e30c654b 1876
f89c7050 1877 if(!iso14443a_select_card(uid, NULL, &cuid)) continue;
e30c654b 1878
f89c7050
M
1879 // Transmit MIFARE_CLASSIC_AUTH
1880 ReaderTransmit(mf_auth, sizeof(mf_auth));
15c4dc5a 1881
f89c7050
M
1882 // Receive the (16 bit) "random" nonce
1883 if (!ReaderReceive(receivedAnswer)) continue;
1884 memcpy(nt, receivedAnswer, 4);
e30c654b 1885
f89c7050
M
1886 // Transmit reader nonce and reader answer
1887 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar),par);
15c4dc5a 1888
f89c7050
M
1889 // Receive 4 bit answer
1890 if (ReaderReceive(receivedAnswer))
1891 {
f397b5cc
M
1892 if ( (parameter != 0) && (memcmp(nt, nt_noattack, 4) == 0) ) continue;
1893
423efacc 1894 isNULL = !(nt_attacked[0] == 0) && (nt_attacked[1] == 0) && (nt_attacked[2] == 0) && (nt_attacked[3] == 0);
50193c1e
M
1895 if ( (isNULL != 0 ) && (memcmp(nt, nt_attacked, 4) != 0) ) continue;
1896
f89c7050
M
1897 if (nt_diff == 0)
1898 {
1899 LED_A_ON();
1900 memcpy(nt_attacked, nt, 4);
9f693930 1901 //par_mask = 0xf8;
f89c7050
M
1902 par_low = par & 0x07;
1903 }
15c4dc5a 1904
f89c7050
M
1905 led_on = !led_on;
1906 if(led_on) LED_B_ON(); else LED_B_OFF();
1907 par_list[nt_diff] = par;
1908 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
e30c654b 1909
f89c7050
M
1910 // Test if the information is complete
1911 if (nt_diff == 0x07) {
1912 isOK = 1;
1913 break;
1914 }
1915
1916 nt_diff = (nt_diff + 1) & 0x07;
1917 mf_nr_ar[3] = nt_diff << 5;
1918 par = par_low;
1919 } else {
1920 if (nt_diff == 0)
1921 {
1922 par++;
1923 } else {
1924 par = (((par >> 3) + 1) << 3) | par_low;
1925 }
1926 }
1927 }
e30c654b 1928
f89c7050
M
1929 LogTrace(nt, 4, 0, GetParity(nt, 4), TRUE);
1930 LogTrace(par_list, 8, 0, GetParity(par_list, 8), TRUE);
1931 LogTrace(ks_list, 8, 0, GetParity(ks_list, 8), TRUE);
e30c654b 1932
902cb3c0 1933 byte_t buf[48];
1934// UsbCommand ack = {CMD_ACK, {isOK, 0, 0}};
1935 memcpy(buf + 0, uid, 4);
1936 memcpy(buf + 4, nt, 4);
1937 memcpy(buf + 8, par_list, 8);
1938 memcpy(buf + 16, ks_list, 8);
f89c7050
M
1939
1940 LED_B_ON();
902cb3c0 1941 cmd_send(CMD_ACK,isOK,0,0,buf,48);
1942// UsbSendPacket((uint8_t *)&ack, sizeof(UsbCommand));
f89c7050
M
1943 LED_B_OFF();
1944
1945 // Thats it...
15c4dc5a 1946 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1947 LEDsoff();
f89c7050
M
1948 tracing = TRUE;
1949
f397b5cc 1950 if (MF_DBGLEVEL >= 1) DbpString("COMMAND mifare FINISHED");
20f9a2a1
M
1951}
1952
20f9a2a1
M
1953
1954//-----------------------------------------------------------------------------
1955// MIFARE 1K simulate.
1956//
1957//-----------------------------------------------------------------------------
1958void Mifare1ksim(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
1959{
50193c1e 1960 int cardSTATE = MFEMUL_NOFIELD;
8556b852 1961 int _7BUID = 0;
9ca155ba 1962 int vHf = 0; // in mV
9f693930 1963 //int nextCycleTimeout = 0;
8f51ddb0 1964 int res;
51969283 1965// uint32_t timer = 0;
0a39986e
M
1966 uint32_t selTimer = 0;
1967 uint32_t authTimer = 0;
1968 uint32_t par = 0;
9ca155ba 1969 int len = 0;
8f51ddb0 1970 uint8_t cardWRBL = 0;
9ca155ba
M
1971 uint8_t cardAUTHSC = 0;
1972 uint8_t cardAUTHKEY = 0xff; // no authentication
9f693930 1973 //uint32_t cardRn = 0;
51969283 1974 uint32_t cardRr = 0;
9ca155ba 1975 uint32_t cuid = 0;
9f693930 1976 //uint32_t rn_enc = 0;
51969283 1977 uint32_t ans = 0;
0014cb46
M
1978 uint32_t cardINTREG = 0;
1979 uint8_t cardINTBLOCK = 0;
9ca155ba
M
1980 struct Crypto1State mpcs = {0, 0};
1981 struct Crypto1State *pcs;
1982 pcs = &mpcs;
1983
8f51ddb0
M
1984 uint8_t* receivedCmd = eml_get_bigbufptr_recbuf();
1985 uint8_t *response = eml_get_bigbufptr_sendbuf();
9ca155ba 1986
8556b852 1987 static uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
9ca155ba 1988
0a39986e
M
1989 static uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
1990 static uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
9ca155ba 1991
0a39986e 1992 static uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
8556b852 1993 static uint8_t rSAK1[] = {0x04, 0xda, 0x17};
9ca155ba 1994
0014cb46
M
1995 static uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
1996// static uint8_t rAUTH_NT[] = {0x1a, 0xac, 0xff, 0x4f};
0a39986e 1997 static uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
0014cb46 1998
0a39986e
M
1999 // clear trace
2000 traceLen = 0;
2001 tracing = true;
51969283
M
2002
2003 // Authenticate response - nonce
2004 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
9ca155ba 2005
8556b852
M
2006 // get UID from emul memory
2007 emlGetMemBt(receivedCmd, 7, 1);
2008 _7BUID = !(receivedCmd[0] == 0x00);
2009 if (!_7BUID) { // ---------- 4BUID
2010 rATQA[0] = 0x04;
2011
2012 emlGetMemBt(rUIDBCC1, 0, 4);
2013 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2014 } else { // ---------- 7BUID
2015 rATQA[0] = 0x44;
2016
2017 rUIDBCC1[0] = 0x88;
2018 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2019 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2020 emlGetMemBt(rUIDBCC2, 3, 4);
2021 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2022 }
2023
9ca155ba 2024// -------------------------------------- test area
50193c1e 2025
9ca155ba 2026// -------------------------------------- END test area
8f51ddb0
M
2027 // start mkseconds counter
2028 StartCountUS();
9ca155ba
M
2029
2030 // We need to listen to the high-frequency, peak-detected path.
2031 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
2032 FpgaSetupSsc();
2033
2034 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2035 SpinDelay(200);
2036
0014cb46 2037 if (MF_DBGLEVEL >= 1) Dbprintf("Started. 7buid=%d", _7BUID);
8f51ddb0
M
2038 // calibrate mkseconds counter
2039 GetDeltaCountUS();
9ca155ba
M
2040 while (true) {
2041 WDT_HIT();
9ca155ba 2042
8f51ddb0
M
2043 if(BUTTON_PRESS()) {
2044 break;
2045 }
2046
9ca155ba
M
2047 // find reader field
2048 // Vref = 3300mV, and an 10:1 voltage divider on the input
2049 // can measure voltages up to 33000 mV
2050 if (cardSTATE == MFEMUL_NOFIELD) {
2051 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2052 if (vHf > MF_MINFIELDV) {
0014cb46 2053 cardSTATE_TO_IDLE();
9ca155ba
M
2054 LED_A_ON();
2055 }
2056 }
2057
2058 if (cardSTATE != MFEMUL_NOFIELD) {
81cd0474 2059 res = EmGetCmd(receivedCmd, &len, RECV_CMD_SIZE); // (+ nextCycleTimeout)
9ca155ba
M
2060 if (res == 2) {
2061 cardSTATE = MFEMUL_NOFIELD;
2062 LEDsoff();
2063 continue;
2064 }
2065 if(res) break;
2066 }
2067
9f693930 2068 //nextCycleTimeout = 0;
8f51ddb0 2069
9ca155ba 2070// if (len) Dbprintf("len:%d cmd: %02x %02x %02x %02x", len, receivedCmd[0], receivedCmd[1], receivedCmd[2], receivedCmd[3]);
0a39986e
M
2071
2072 if (len != 4 && cardSTATE != MFEMUL_NOFIELD) { // len != 4 <---- speed up the code 4 authentication
8f51ddb0 2073 // REQ or WUP request in ANY state and WUP in HALTED state
0a39986e
M
2074 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2075 selTimer = GetTickCount();
2076 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2077 cardSTATE = MFEMUL_SELECT1;
2078
2079 // init crypto block
2080 LED_B_OFF();
2081 LED_C_OFF();
2082 crypto1_destroy(pcs);
2083 cardAUTHKEY = 0xff;
2084 }
2085 }
9ca155ba 2086
50193c1e
M
2087 switch (cardSTATE) {
2088 case MFEMUL_NOFIELD:{
2089 break;
2090 }
9ca155ba 2091 case MFEMUL_HALTED:{
0a39986e 2092 break;
9ca155ba 2093 }
50193c1e
M
2094 case MFEMUL_IDLE:{
2095 break;
2096 }
2097 case MFEMUL_SELECT1:{
9ca155ba
M
2098 // select all
2099 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2100 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
0014cb46 2101 break;
9ca155ba
M
2102 }
2103
2104 // select card
0a39986e
M
2105 if (len == 9 &&
2106 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
8556b852
M
2107 if (!_7BUID)
2108 EmSendCmd(rSAK, sizeof(rSAK));
2109 else
2110 EmSendCmd(rSAK1, sizeof(rSAK1));
9ca155ba
M
2111
2112 cuid = bytes_to_num(rUIDBCC1, 4);
8556b852
M
2113 if (!_7BUID) {
2114 cardSTATE = MFEMUL_WORK;
0014cb46
M
2115 LED_B_ON();
2116 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2117 break;
8556b852
M
2118 } else {
2119 cardSTATE = MFEMUL_SELECT2;
2120 break;
2121 }
9ca155ba
M
2122 }
2123
50193c1e
M
2124 break;
2125 }
2126 case MFEMUL_SELECT2:{
0014cb46
M
2127 if (!len) break;
2128
8556b852 2129 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
9ca155ba 2130 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
8556b852
M
2131 break;
2132 }
9ca155ba 2133
8556b852
M
2134 // select 2 card
2135 if (len == 9 &&
2136 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2137 EmSendCmd(rSAK, sizeof(rSAK));
2138
2139 cuid = bytes_to_num(rUIDBCC2, 4);
2140 cardSTATE = MFEMUL_WORK;
2141 LED_B_ON();
0014cb46 2142 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
8556b852
M
2143 break;
2144 }
0014cb46
M
2145
2146 // i guess there is a command). go into the work state.
2147 if (len != 4) break;
2148 cardSTATE = MFEMUL_WORK;
2149 goto lbWORK;
50193c1e
M
2150 }
2151 case MFEMUL_AUTH1:{
9ca155ba 2152 if (len == 8) {
51969283 2153 // --- crypto
9f693930
GY
2154 //rn_enc = bytes_to_num(receivedCmd, 4);
2155 //cardRn = rn_enc ^ crypto1_word(pcs, rn_enc , 1);
51969283
M
2156 cardRr = bytes_to_num(&receivedCmd[4], 4) ^ crypto1_word(pcs, 0, 0);
2157 // test if auth OK
2158 if (cardRr != prng_successor(nonce, 64)){
0014cb46
M
2159 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED. cardRr=%08x, succ=%08x", cardRr, prng_successor(nonce, 64));
2160 cardSTATE_TO_IDLE();
51969283
M
2161 break;
2162 }
2163 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2164 num_to_bytes(ans, 4, rAUTH_AT);
2165 // --- crypto
2166 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
0a39986e
M
2167 cardSTATE = MFEMUL_AUTH2;
2168 } else {
0014cb46 2169 cardSTATE_TO_IDLE();
9ca155ba 2170 }
0a39986e 2171 if (cardSTATE != MFEMUL_AUTH2) break;
50193c1e
M
2172 }
2173 case MFEMUL_AUTH2:{
9ca155ba 2174 LED_C_ON();
0a39986e 2175 cardSTATE = MFEMUL_WORK;
0014cb46 2176 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED. sec=%d, key=%d time=%d", cardAUTHSC, cardAUTHKEY, GetTickCount() - authTimer);
50193c1e
M
2177 break;
2178 }
9ca155ba 2179 case MFEMUL_WORK:{
0014cb46 2180lbWORK: if (len == 0) break;
0a39986e 2181
51969283
M
2182 if (cardAUTHKEY == 0xff) {
2183 // first authentication
2184 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2185 authTimer = GetTickCount();
2186
2187 cardAUTHSC = receivedCmd[1] / 4; // received block num
2188 cardAUTHKEY = receivedCmd[0] - 0x60;
2189
2190 // --- crypto
2191 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2192 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2193 num_to_bytes(nonce, 4, rAUTH_AT);
2194 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2195 // --- crypto
2196
2197// last working revision
2198// EmSendCmd14443aRaw(resp1, resp1Len, 0);
2199// LogTrace(NULL, 0, GetDeltaCountUS(), 0, true);
2200
2201 cardSTATE = MFEMUL_AUTH1;
9f693930 2202 //nextCycleTimeout = 10;
51969283
M
2203 break;
2204 }
2205 } else {
2206 // decrypt seqence
2207 mf_crypto1_decrypt(pcs, receivedCmd, len);
2208
2209 // nested authentication
2210 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2211 authTimer = GetTickCount();
2212
2213 cardAUTHSC = receivedCmd[1] / 4; // received block num
2214 cardAUTHKEY = receivedCmd[0] - 0x60;
2215
2216 // --- crypto
2217 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2218 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2219 num_to_bytes(ans, 4, rAUTH_AT);
2220 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2221 // --- crypto
2222
2223 cardSTATE = MFEMUL_AUTH1;
9f693930 2224 //nextCycleTimeout = 10;
51969283
M
2225 break;
2226 }
2227 }
0a39986e 2228
8f51ddb0
M
2229 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2230 // BUT... ACK --> NACK
2231 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2232 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2233 break;
2234 }
2235
2236 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2237 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2238 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2239 break;
0a39986e
M
2240 }
2241
2242 // read block
2243 if (len == 4 && receivedCmd[0] == 0x30) {
51969283 2244 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
8f51ddb0
M
2245 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2246 break;
2247 }
2248 emlGetMem(response, receivedCmd[1], 1);
2249 AppendCrc14443a(response, 16);
2250 mf_crypto1_encrypt(pcs, response, 18, &par);
2251 EmSendCmdPar(response, 18, par);
0a39986e
M
2252 break;
2253 }
2254
2255 // write block
2256 if (len == 4 && receivedCmd[0] == 0xA0) {
51969283 2257 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
8f51ddb0
M
2258 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2259 break;
2260 }
2261 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
9f693930 2262 //nextCycleTimeout = 50;
8f51ddb0
M
2263 cardSTATE = MFEMUL_WRITEBL2;
2264 cardWRBL = receivedCmd[1];
0a39986e 2265 break;
9ca155ba 2266 }
8f51ddb0 2267
0014cb46
M
2268 // works with cardINTREG
2269
2270 // increment, decrement, restore
2271 if (len == 4 && (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2)) {
2272 if (receivedCmd[1] >= 16 * 4 ||
2273 receivedCmd[1] / 4 != cardAUTHSC ||
2274 emlCheckValBl(receivedCmd[1])) {
2275 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2276 break;
2277 }
2278 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2279 if (receivedCmd[0] == 0xC1)
2280 cardSTATE = MFEMUL_INTREG_INC;
2281 if (receivedCmd[0] == 0xC0)
2282 cardSTATE = MFEMUL_INTREG_DEC;
2283 if (receivedCmd[0] == 0xC2)
2284 cardSTATE = MFEMUL_INTREG_REST;
2285 cardWRBL = receivedCmd[1];
2286
2287 break;
2288 }
2289
2290
2291 // transfer
2292 if (len == 4 && receivedCmd[0] == 0xB0) {
2293 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
2294 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2295 break;
2296 }
2297
2298 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2299 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2300 else
2301 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2302
2303 break;
2304 }
2305
9ca155ba 2306 // halt
0a39986e 2307 if (len == 4 && (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00)) {
9ca155ba 2308 LED_B_OFF();
0a39986e 2309 LED_C_OFF();
0014cb46
M
2310 cardSTATE = MFEMUL_HALTED;
2311 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
0a39986e 2312 break;
9ca155ba 2313 }
51969283 2314
8f51ddb0
M
2315 // command not allowed
2316 if (len == 4) {
2317 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2318 break;
2319 }
51969283
M
2320
2321 // case break
2322 break;
8f51ddb0
M
2323 }
2324 case MFEMUL_WRITEBL2:{
2325 if (len == 18){
2326 mf_crypto1_decrypt(pcs, receivedCmd, len);
2327 emlSetMem(receivedCmd, cardWRBL, 1);
2328 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2329 cardSTATE = MFEMUL_WORK;
2330 break;
51969283 2331 } else {
0014cb46 2332 cardSTATE_TO_IDLE();
51969283 2333 break;
8f51ddb0 2334 }
8f51ddb0 2335 break;
50193c1e 2336 }
0014cb46
M
2337
2338 case MFEMUL_INTREG_INC:{
2339 mf_crypto1_decrypt(pcs, receivedCmd, len);
2340 memcpy(&ans, receivedCmd, 4);
2341 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2342 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2343 cardSTATE_TO_IDLE();
2344 break;
2345 }
2346 cardINTREG = cardINTREG + ans;
2347 cardSTATE = MFEMUL_WORK;
2348 break;
2349 }
2350 case MFEMUL_INTREG_DEC:{
2351 mf_crypto1_decrypt(pcs, receivedCmd, len);
2352 memcpy(&ans, receivedCmd, 4);
2353 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2354 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2355 cardSTATE_TO_IDLE();
2356 break;
2357 }
2358 cardINTREG = cardINTREG - ans;
2359 cardSTATE = MFEMUL_WORK;
2360 break;
2361 }
2362 case MFEMUL_INTREG_REST:{
2363 mf_crypto1_decrypt(pcs, receivedCmd, len);
2364 memcpy(&ans, receivedCmd, 4);
2365 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2366 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2367 cardSTATE_TO_IDLE();
2368 break;
2369 }
2370 cardSTATE = MFEMUL_WORK;
2371 break;
2372 }
50193c1e 2373 }
50193c1e
M
2374 }
2375
9ca155ba
M
2376 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2377 LEDsoff();
2378
0a39986e 2379 // add trace trailer
8f51ddb0 2380 memset(rAUTH_NT, 0x44, 4);
0a39986e
M
2381 LogTrace(rAUTH_NT, 4, 0, 0, TRUE);
2382
0014cb46 2383 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
15c4dc5a 2384}
b62a5a84
M
2385
2386//-----------------------------------------------------------------------------
2387// MIFARE sniffer.
2388//
2389//-----------------------------------------------------------------------------
5cd9ec01
M
2390void RAMFUNC SniffMifare(uint8_t param) {
2391 // param:
2392 // bit 0 - trigger from first card answer
2393 // bit 1 - trigger from first reader 7-bit request
39864b0b
M
2394
2395 // C(red) A(yellow) B(green)
b62a5a84
M
2396 LEDsoff();
2397 // init trace buffer
d19929cb 2398 iso14a_clear_trace();
b62a5a84 2399
b62a5a84
M
2400 // The command (reader -> tag) that we're receiving.
2401 // The length of a received command will in most cases be no more than 18 bytes.
2402 // So 32 should be enough!
2403 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
2404 // The response (tag -> reader) that we're receiving.
2405 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
2406
2407 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2408 // into trace, along with its length and other annotations.
2409 //uint8_t *trace = (uint8_t *)BigBuf;
2410
2411 // The DMA buffer, used to stream samples from the FPGA
2412 int8_t *dmaBuf = ((int8_t *)BigBuf) + DMA_BUFFER_OFFSET;
5cd9ec01
M
2413 int8_t *data = dmaBuf;
2414 int maxDataLen = 0;
2415 int dataLen = 0;
b62a5a84
M
2416
2417 // Set up the demodulator for tag -> reader responses.
2418 Demod.output = receivedResponse;
2419 Demod.len = 0;
2420 Demod.state = DEMOD_UNSYNCD;
2421
2422 // Set up the demodulator for the reader -> tag commands
2423 memset(&Uart, 0, sizeof(Uart));
2424 Uart.output = receivedCmd;
2425 Uart.byteCntMax = 32; // was 100 (greg)//////////////////
2426 Uart.state = STATE_UNSYNCD;
2427
2428 // Setup for the DMA.
2429 FpgaSetupSsc();
b62a5a84
M
2430 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
2431
2432 // And put the FPGA in the appropriate mode
2433 // Signal field is off with the appropriate LED
2434 LED_D_OFF();
2435 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
2436 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
39864b0b
M
2437
2438 // init sniffer
2439 MfSniffInit();
2440 int sniffCounter = 0;
b62a5a84 2441
b62a5a84
M
2442 // And now we loop, receiving samples.
2443 while(true) {
5cd9ec01
M
2444 if(BUTTON_PRESS()) {
2445 DbpString("cancelled by button");
2446 goto done;
2447 }
2448
b62a5a84
M
2449 LED_A_ON();
2450 WDT_HIT();
39864b0b
M
2451
2452 if (++sniffCounter > 65) {
2453 if (MfSniffSend(2000)) {
55acbb2a 2454 FpgaEnableSscDma();
39864b0b
M
2455 }
2456 sniffCounter = 0;
2457 }
5cd9ec01
M
2458
2459 int register readBufDataP = data - dmaBuf;
2460 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
2461 if (readBufDataP <= dmaBufDataP){
2462 dataLen = dmaBufDataP - readBufDataP;
2463 } else {
2464 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP + 1;
2465 }
2466 // test for length of buffer
2467 if(dataLen > maxDataLen) {
2468 maxDataLen = dataLen;
2469 if(dataLen > 400) {
2470 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
b62a5a84
M
2471 goto done;
2472 }
2473 }
5cd9ec01 2474 if(dataLen < 1) continue;
b62a5a84 2475
5cd9ec01
M
2476 // primary buffer was stopped( <-- we lost data!
2477 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2478 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2479 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
55acbb2a 2480 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
5cd9ec01
M
2481 }
2482 // secondary buffer sets as primary, secondary buffer was stopped
2483 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2484 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
b62a5a84
M
2485 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2486 }
5cd9ec01
M
2487
2488 LED_A_OFF();
b62a5a84 2489
5cd9ec01 2490 if(MillerDecoding((data[0] & 0xF0) >> 4)) {
39864b0b 2491 LED_C_INV();
5cd9ec01 2492 // check - if there is a short 7bit request from reader
71d90e54 2493 if (MfSniffLogic(receivedCmd, Uart.byteCnt, Uart.parityBits, Uart.bitCnt, TRUE)) break;
5cd9ec01 2494
b62a5a84
M
2495 /* And ready to receive another command. */
2496 Uart.state = STATE_UNSYNCD;
39864b0b
M
2497
2498 /* And also reset the demod code */
b62a5a84 2499 Demod.state = DEMOD_UNSYNCD;
b62a5a84
M
2500 }
2501
5cd9ec01 2502 if(ManchesterDecoding(data[0] & 0x0F)) {
39864b0b 2503 LED_C_INV();
b62a5a84 2504
71d90e54 2505 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parityBits, Demod.bitCount, FALSE)) break;
b62a5a84
M
2506
2507 // And ready to receive another response.
2508 memset(&Demod, 0, sizeof(Demod));
2509 Demod.output = receivedResponse;
2510 Demod.state = DEMOD_UNSYNCD;
39864b0b
M
2511
2512 /* And also reset the uart code */
2513 Uart.state = STATE_UNSYNCD;
b62a5a84
M
2514 }
2515
5cd9ec01
M
2516 data++;
2517 if(data > dmaBuf + DMA_BUFFER_SIZE) {
2518 data = dmaBuf;
b62a5a84
M
2519 }
2520 } // main cycle
2521
2522 DbpString("COMMAND FINISHED");
2523
2524done:
55acbb2a 2525 FpgaDisableSscDma();
39864b0b
M
2526 MfSniffEnd();
2527
55acbb2a 2528 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.byteCnt=%x Uart.byteCntMax=%x", maxDataLen, Uart.state, Uart.byteCnt, Uart.byteCntMax);
b62a5a84
M
2529 LEDsoff();
2530}
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