]> git.zerfleddert.de Git - proxmark3-svn/blame - armsrc/iso14443a.c
minor fixes regaring the newly released patches from the pm3 community
[proxmark3-svn] / armsrc / iso14443a.c
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15c4dc5a 1//-----------------------------------------------------------------------------
b62a5a84 2// Merlok - June 2011, 2012
15c4dc5a 3// Gerhard de Koning Gans - May 2008
534983d7 4// Hagen Fritsch - June 2010
bd20f8f4 5//
6// This code is licensed to you under the terms of the GNU GPL, version 2 or,
7// at your option, any later version. See the LICENSE.txt file for the text of
8// the license.
15c4dc5a 9//-----------------------------------------------------------------------------
bd20f8f4 10// Routines to support ISO 14443 type A.
11//-----------------------------------------------------------------------------
12
f38a1528 13#include "../include/proxmark3.h"
15c4dc5a 14#include "apps.h"
f7e3ed82 15#include "util.h"
9ab7a6c7 16#include "string.h"
f38a1528 17#include "../common/cmd.h"
18#include "../common/iso14443crc.h"
534983d7 19#include "iso14443a.h"
20f9a2a1
M
20#include "crapto1.h"
21#include "mifareutil.h"
15c4dc5a 22
534983d7 23static uint32_t iso14a_timeout;
d19929cb 24uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
1e262141 25int rsamples = 0;
7bc95e2e 26int traceLen = 0;
1e262141 27int tracing = TRUE;
28uint8_t trigger = 0;
b0127e65 29// the block number for the ISO14443-4 PCB
30static uint8_t iso14_pcb_blocknum = 0;
15c4dc5a 31
7bc95e2e 32//
33// ISO14443 timing:
34//
35// minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
36#define REQUEST_GUARD_TIME (7000/16 + 1)
37// minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
38#define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
39// bool LastCommandWasRequest = FALSE;
40
41//
42// Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
43//
d714d3ef 44// When the PM acts as reader and is receiving tag data, it takes
45// 3 ticks delay in the AD converter
46// 16 ticks until the modulation detector completes and sets curbit
47// 8 ticks until bit_to_arm is assigned from curbit
48// 8*16 ticks for the transfer from FPGA to ARM
7bc95e2e 49// 4*16 ticks until we measure the time
50// - 8*16 ticks because we measure the time of the previous transfer
d714d3ef 51#define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
7bc95e2e 52
53// When the PM acts as a reader and is sending, it takes
54// 4*16 ticks until we can write data to the sending hold register
55// 8*16 ticks until the SHR is transferred to the Sending Shift Register
56// 8 ticks until the first transfer starts
57// 8 ticks later the FPGA samples the data
58// 1 tick to assign mod_sig_coil
59#define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
60
61// When the PM acts as tag and is receiving it takes
d714d3ef 62// 2 ticks delay in the RF part (for the first falling edge),
7bc95e2e 63// 3 ticks for the A/D conversion,
64// 8 ticks on average until the start of the SSC transfer,
65// 8 ticks until the SSC samples the first data
66// 7*16 ticks to complete the transfer from FPGA to ARM
67// 8 ticks until the next ssp_clk rising edge
d714d3ef 68// 4*16 ticks until we measure the time
7bc95e2e 69// - 8*16 ticks because we measure the time of the previous transfer
d714d3ef 70#define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
7bc95e2e 71
72// The FPGA will report its internal sending delay in
73uint16_t FpgaSendQueueDelay;
74// the 5 first bits are the number of bits buffered in mod_sig_buf
75// the last three bits are the remaining ticks/2 after the mod_sig_buf shift
76#define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
77
78// When the PM acts as tag and is sending, it takes
d714d3ef 79// 4*16 ticks until we can write data to the sending hold register
7bc95e2e 80// 8*16 ticks until the SHR is transferred to the Sending Shift Register
81// 8 ticks until the first transfer starts
82// 8 ticks later the FPGA samples the data
83// + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
84// + 1 tick to assign mod_sig_coil
d714d3ef 85#define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
7bc95e2e 86
87// When the PM acts as sniffer and is receiving tag data, it takes
88// 3 ticks A/D conversion
d714d3ef 89// 14 ticks to complete the modulation detection
90// 8 ticks (on average) until the result is stored in to_arm
7bc95e2e 91// + the delays in transferring data - which is the same for
92// sniffing reader and tag data and therefore not relevant
d714d3ef 93#define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
7bc95e2e 94
d714d3ef 95// When the PM acts as sniffer and is receiving reader data, it takes
96// 2 ticks delay in analogue RF receiver (for the falling edge of the
97// start bit, which marks the start of the communication)
7bc95e2e 98// 3 ticks A/D conversion
d714d3ef 99// 8 ticks on average until the data is stored in to_arm.
7bc95e2e 100// + the delays in transferring data - which is the same for
101// sniffing reader and tag data and therefore not relevant
d714d3ef 102#define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
7bc95e2e 103
104//variables used for timing purposes:
105//these are in ssp_clk cycles:
a501c82b 106static uint32_t NextTransferTime;
107static uint32_t LastTimeProxToAirStart;
108static uint32_t LastProxToAirDuration;
7bc95e2e 109
110
111
8f51ddb0 112// CARD TO READER - manchester
72934aa3 113// Sequence D: 11110000 modulation with subcarrier during first half
114// Sequence E: 00001111 modulation with subcarrier during second half
115// Sequence F: 00000000 no modulation with subcarrier
8f51ddb0 116// READER TO CARD - miller
72934aa3 117// Sequence X: 00001100 drop after half a period
118// Sequence Y: 00000000 no drop
119// Sequence Z: 11000000 drop at start
120#define SEC_D 0xf0
121#define SEC_E 0x0f
122#define SEC_F 0x00
123#define SEC_X 0x0c
124#define SEC_Y 0x00
125#define SEC_Z 0xc0
15c4dc5a 126
1e262141 127const uint8_t OddByteParity[256] = {
15c4dc5a 128 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
129 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
130 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
131 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
132 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
133 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
138 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
139 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
140 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
141 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
142 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
143 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
144};
1e262141 145
902cb3c0 146void iso14a_set_trigger(bool enable) {
534983d7 147 trigger = enable;
148}
149
902cb3c0 150void iso14a_clear_trace() {
7bc95e2e 151 memset(trace, 0x44, TRACE_SIZE);
8556b852
M
152 traceLen = 0;
153}
d19929cb 154
902cb3c0 155void iso14a_set_tracing(bool enable) {
8556b852
M
156 tracing = enable;
157}
d19929cb 158
b0127e65 159void iso14a_set_timeout(uint32_t timeout) {
160 iso14a_timeout = timeout;
161}
8556b852 162
15c4dc5a 163//-----------------------------------------------------------------------------
164// Generate the parity value for a byte sequence
e30c654b 165//
15c4dc5a 166//-----------------------------------------------------------------------------
20f9a2a1
M
167byte_t oddparity (const byte_t bt)
168{
5f6d6c90 169 return OddByteParity[bt];
20f9a2a1
M
170}
171
a501c82b 172void GetParity(const uint8_t * pbtCmd, uint16_t iLen, uint8_t *par)
15c4dc5a 173{
a501c82b 174 uint16_t paritybit_cnt = 0;
175 uint16_t paritybyte_cnt = 0;
176 uint8_t parityBits = 0;
177
178 for (uint16_t i = 0; i < iLen; i++) {
179 // Generate the parity bits
180 parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt));
181 if (paritybit_cnt == 7) {
182 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
183 parityBits = 0; // and advance to next Parity Byte
184 paritybyte_cnt++;
185 paritybit_cnt = 0;
186 } else {
187 paritybit_cnt++;
188 }
5f6d6c90 189 }
a501c82b 190
191 // save remaining parity bits
192 par[paritybyte_cnt] = parityBits;
193
15c4dc5a 194}
195
534983d7 196void AppendCrc14443a(uint8_t* data, int len)
15c4dc5a 197{
5f6d6c90 198 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
15c4dc5a 199}
200
1e262141 201// The function LogTrace() is also used by the iClass implementation in iClass.c
a501c82b 202bool RAMFUNC LogTrace(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag)
15c4dc5a 203{
fdcd43eb 204 if (!tracing) return FALSE;
a501c82b 205
206 uint16_t num_paritybytes = (iLen-1)/8 + 1; // number of valid paritybytes in *parity
207 uint16_t duration = timestamp_end - timestamp_start;
208
7bc95e2e 209 // Return when trace is full
a501c82b 210 if (traceLen + sizeof(iLen) + sizeof(timestamp_start) + sizeof(duration) + num_paritybytes + iLen >= TRACE_SIZE) {
7bc95e2e 211 tracing = FALSE; // don't trace any more
212 return FALSE;
213 }
214
a501c82b 215 // Traceformat:
216 // 32 bits timestamp (little endian)
217 // 16 bits duration (little endian)
218 // 16 bits data length (little endian, Highest Bit used as readerToTag flag)
219 // y Bytes data
220 // x Bytes parity (one byte per 8 bytes data)
221
222 // timestamp (start)
223 trace[traceLen++] = ((timestamp_start >> 0) & 0xff);
224 trace[traceLen++] = ((timestamp_start >> 8) & 0xff);
225 trace[traceLen++] = ((timestamp_start >> 16) & 0xff);
226 trace[traceLen++] = ((timestamp_start >> 24) & 0xff);
227
228 // duration
229 trace[traceLen++] = ((duration >> 0) & 0xff);
230 trace[traceLen++] = ((duration >> 8) & 0xff);
231
232 // data length
233 trace[traceLen++] = ((iLen >> 0) & 0xff);
234 trace[traceLen++] = ((iLen >> 8) & 0xff);
235
236 // readerToTag flag
17cba269 237 if (!readerToTag) {
7bc95e2e 238 trace[traceLen - 1] |= 0x80;
a501c82b 239 }
240
241 // data bytes
7bc95e2e 242 if (btBytes != NULL && iLen != 0) {
243 memcpy(trace + traceLen, btBytes, iLen);
244 }
a501c82b 245 traceLen += iLen;
246
247 // parity bytes
248 if (parity != NULL && iLen != 0) {
249 memcpy(trace + traceLen, parity, num_paritybytes);
250 }
251 traceLen += num_paritybytes;
252
7bc95e2e 253 return TRUE;
15c4dc5a 254}
255
7bc95e2e 256//=============================================================================
257// ISO 14443 Type A - Miller decoder
258//=============================================================================
259// Basics:
260// This decoder is used when the PM3 acts as a tag.
261// The reader will generate "pauses" by temporarily switching of the field.
262// At the PM3 antenna we will therefore measure a modulated antenna voltage.
263// The FPGA does a comparison with a threshold and would deliver e.g.:
264// ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
265// The Miller decoder needs to identify the following sequences:
266// 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
267// 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
268// 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
269// Note 1: the bitstream may start at any time. We therefore need to sync.
270// Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
15c4dc5a 271//-----------------------------------------------------------------------------
b62a5a84 272static tUart Uart;
15c4dc5a 273
d7aa3739 274// Lookup-Table to decide if 4 raw bits are a modulation.
275// We accept two or three consecutive "0" in any position with the rest "1"
276const bool Mod_Miller_LUT[] = {
277 TRUE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE,
278 TRUE, TRUE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE
279};
280#define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4])
281#define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)])
282
7bc95e2e 283void UartReset()
15c4dc5a 284{
7bc95e2e 285 Uart.state = STATE_UNSYNCD;
286 Uart.bitCount = 0;
287 Uart.len = 0; // number of decoded data bytes
a501c82b 288 Uart.parityLen = 0; // number of decoded parity bytes
7bc95e2e 289 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
a501c82b 290 Uart.parityBits = 0; // holds 8 parity bits
7bc95e2e 291 Uart.twoBits = 0x0000; // buffer for 2 Bits
292 Uart.highCnt = 0;
293 Uart.startTime = 0;
294 Uart.endTime = 0;
295}
15c4dc5a 296
a501c82b 297void UartInit(uint8_t *data, uint8_t *parity)
298{
299 Uart.output = data;
300 Uart.parity = parity;
301 UartReset();
302}
d714d3ef 303
7bc95e2e 304// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
305static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
306{
15c4dc5a 307
7bc95e2e 308 Uart.twoBits = (Uart.twoBits << 8) | bit;
309
a501c82b 310 if (Uart.state == STATE_UNSYNCD) { // not yet synced
311
7bc95e2e 312 if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
a501c82b 313 if (Uart.twoBits == 0xffff)
7bc95e2e 314 Uart.highCnt++;
a501c82b 315 else
7bc95e2e 316 Uart.highCnt = 0;
a501c82b 317 } else {
7bc95e2e 318 Uart.syncBit = 0xFFFF; // not set
319 // look for 00xx1111 (the start bit)
320 if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
321 else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
322 else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
323 else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
324 else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
325 else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
326 else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
327 else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
328 if (Uart.syncBit != 0xFFFF) {
329 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
330 Uart.startTime -= Uart.syncBit;
d7aa3739 331 Uart.endTime = Uart.startTime;
7bc95e2e 332 Uart.state = STATE_START_OF_COMMUNICATION;
15c4dc5a 333 }
7bc95e2e 334 }
15c4dc5a 335
7bc95e2e 336 } else {
15c4dc5a 337
d7aa3739 338 if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) {
339 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error
340 UartReset();
341 Uart.highCnt = 6;
342 } else { // Modulation in first half = Sequence Z = logic "0"
7bc95e2e 343 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
344 UartReset();
345 Uart.highCnt = 6;
346 } else {
347 Uart.bitCount++;
348 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
349 Uart.state = STATE_MILLER_Z;
350 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
351 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
352 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
353 Uart.parityBits <<= 1; // make room for the parity bit
354 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
355 Uart.bitCount = 0;
356 Uart.shiftReg = 0;
a501c82b 357 if((Uart.len & 0x0007) == 0) { // every 8 data bytes
358 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
359 Uart.parityBits = 0;
360 }
15c4dc5a 361 }
7bc95e2e 362 }
d7aa3739 363 }
364 } else {
365 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
7bc95e2e 366 Uart.bitCount++;
367 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
368 Uart.state = STATE_MILLER_X;
369 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
370 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
371 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
372 Uart.parityBits <<= 1; // make room for the new parity bit
373 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
374 Uart.bitCount = 0;
375 Uart.shiftReg = 0;
a501c82b 376 if ((Uart.len & 0x0007) == 0) { // every 8 data bytes
377 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
378 Uart.parityBits = 0;
379 }
7bc95e2e 380 }
d7aa3739 381 } else { // no modulation in both halves - Sequence Y
7bc95e2e 382 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
15c4dc5a 383 Uart.state = STATE_UNSYNCD;
a501c82b 384 Uart.bitCount--; // last "0" was part of EOC sequence
385 Uart.shiftReg <<= 1; // drop it
386 if(Uart.bitCount > 0) { // if we decoded some bits
387 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
388 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
389 Uart.parityBits <<= 1; // add a (void) parity bit
390 Uart.parityBits <<= (8 - (Uart.len & 0x0007)); // left align parity bits
391 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
15c4dc5a 392 return TRUE;
a501c82b 393 } else if (Uart.len & 0x0007) { // there are some parity bits to store
394 Uart.parityBits <<= (8 - (Uart.len & 0x0007)); // left align remaining parity bits
395 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
396 return TRUE; // we are finished with decoding the raw data sequence
397 }
15c4dc5a 398 }
7bc95e2e 399 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
400 UartReset();
401 Uart.highCnt = 6;
402 } else { // a logic "0"
403 Uart.bitCount++;
404 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
405 Uart.state = STATE_MILLER_Y;
406 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
407 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
408 Uart.parityBits <<= 1; // make room for the parity bit
409 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
410 Uart.bitCount = 0;
411 Uart.shiftReg = 0;
a501c82b 412 if ((Uart.len & 0x0007) == 0) { // every 8 data bytes
413 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
414 Uart.parityBits = 0;
415 }
15c4dc5a 416 }
417 }
d7aa3739 418 }
15c4dc5a 419 }
7bc95e2e 420
a501c82b 421 }
15c4dc5a 422
7bc95e2e 423 return FALSE; // not finished yet, need more data
15c4dc5a 424}
425
7bc95e2e 426
427
15c4dc5a 428//=============================================================================
e691fc45 429// ISO 14443 Type A - Manchester decoder
15c4dc5a 430//=============================================================================
e691fc45 431// Basics:
7bc95e2e 432// This decoder is used when the PM3 acts as a reader.
e691fc45 433// The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
434// at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
435// ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
436// The Manchester decoder needs to identify the following sequences:
437// 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
438// 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
439// 8 ticks unmodulated: Sequence F = end of communication
440// 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
7bc95e2e 441// Note 1: the bitstream may start at any time. We therefore need to sync.
e691fc45 442// Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
b62a5a84 443static tDemod Demod;
15c4dc5a 444
d7aa3739 445// Lookup-Table to decide if 4 raw bits are a modulation.
d714d3ef 446// We accept three or four "1" in any position
7bc95e2e 447const bool Mod_Manchester_LUT[] = {
d7aa3739 448 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
d714d3ef 449 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
7bc95e2e 450};
451
452#define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
453#define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
15c4dc5a 454
2f2d9fc5 455
7bc95e2e 456void DemodReset()
e691fc45 457{
7bc95e2e 458 Demod.state = DEMOD_UNSYNCD;
459 Demod.len = 0; // number of decoded data bytes
a501c82b 460 Demod.parityLen = 0;
7bc95e2e 461 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
462 Demod.parityBits = 0; //
463 Demod.collisionPos = 0; // Position of collision bit
464 Demod.twoBits = 0xffff; // buffer for 2 Bits
465 Demod.highCnt = 0;
466 Demod.startTime = 0;
467 Demod.endTime = 0;
e691fc45 468}
15c4dc5a 469
a501c82b 470void DemodInit(uint8_t *data, uint8_t *parity)
471{
472 Demod.output = data;
473 Demod.parity = parity;
474 DemodReset();
475}
476
7bc95e2e 477// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
478static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
e691fc45 479{
7bc95e2e 480
481 Demod.twoBits = (Demod.twoBits << 8) | bit;
e691fc45 482
7bc95e2e 483 if (Demod.state == DEMOD_UNSYNCD) {
484
485 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
486 if (Demod.twoBits == 0x0000) {
487 Demod.highCnt++;
488 } else {
489 Demod.highCnt = 0;
490 }
491 } else {
492 Demod.syncBit = 0xFFFF; // not set
493 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
494 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
495 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
496 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
497 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
498 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
499 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
500 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
d7aa3739 501 if (Demod.syncBit != 0xFFFF) {
7bc95e2e 502 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
503 Demod.startTime -= Demod.syncBit;
504 Demod.bitCount = offset; // number of decoded data bits
e691fc45 505 Demod.state = DEMOD_MANCHESTER_DATA;
2f2d9fc5 506 }
7bc95e2e 507 }
15c4dc5a 508
7bc95e2e 509 } else {
15c4dc5a 510
7bc95e2e 511 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
512 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
e691fc45 513 if (!Demod.collisionPos) {
514 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
515 }
516 } // modulation in first half only - Sequence D = 1
7bc95e2e 517 Demod.bitCount++;
518 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
519 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
e691fc45 520 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
7bc95e2e 521 Demod.parityBits <<= 1; // make room for the parity bit
e691fc45 522 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
523 Demod.bitCount = 0;
524 Demod.shiftReg = 0;
a501c82b 525 if((Demod.len & 0x0007) == 0) { // every 8 data bytes
526 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
527 Demod.parityBits = 0;
528 }
15c4dc5a 529 }
7bc95e2e 530 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
531 } else { // no modulation in first half
532 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
e691fc45 533 Demod.bitCount++;
7bc95e2e 534 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
e691fc45 535 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
e691fc45 536 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
7bc95e2e 537 Demod.parityBits <<= 1; // make room for the new parity bit
e691fc45 538 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
539 Demod.bitCount = 0;
540 Demod.shiftReg = 0;
a501c82b 541 if ((Demod.len & 0x0007) == 0) { // every 8 data bytes
542 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
543 Demod.parityBits = 0;
544 }
15c4dc5a 545 }
7bc95e2e 546 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
e691fc45 547 } else { // no modulation in both halves - End of communication
a501c82b 548 if(Demod.bitCount > 0) { // there are some remaining data bits
549 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
550 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
551 Demod.parityBits <<= 1; // add a (void) parity bit
552 Demod.parityBits <<= (8 - (Demod.len & 0x0007)); // left align remaining parity bits
553 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
554 return TRUE;
555 } else if (Demod.len & 0x0007) { // there are some parity bits to store
556 Demod.parityBits <<= (8 - (Demod.len & 0x0007)); // left align remaining parity bits
557 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
558 return TRUE; // we are finished with decoding the raw data sequence
d7aa3739 559 } else { // nothing received. Start over
560 DemodReset();
e691fc45 561 }
15c4dc5a 562 }
7bc95e2e 563 }
e691fc45 564
565 }
15c4dc5a 566
e691fc45 567 return FALSE; // not finished yet, need more data
15c4dc5a 568}
569
570//=============================================================================
571// Finally, a `sniffer' for ISO 14443 Type A
572// Both sides of communication!
573//=============================================================================
574
575//-----------------------------------------------------------------------------
576// Record the sequence of commands sent by the reader to the tag, with
577// triggering so that we start recording at the point that the tag is moved
578// near the reader.
579//-----------------------------------------------------------------------------
5cd9ec01
M
580void RAMFUNC SnoopIso14443a(uint8_t param) {
581 // param:
582 // bit 0 - trigger from first card answer
583 // bit 1 - trigger from first reader 7-bit request
584
585 LEDsoff();
586 // init trace buffer
5f6d6c90 587 iso14a_clear_trace();
991f13f2 588 iso14a_set_tracing(TRUE);
5cd9ec01
M
589
590 // We won't start recording the frames that we acquire until we trigger;
591 // a good trigger condition to get started is probably when we see a
592 // response from the tag.
593 // triggered == FALSE -- to wait first for card
7bc95e2e 594 bool triggered = !(param & 0x03);
595
5cd9ec01 596 // The command (reader -> tag) that we're receiving.
15c4dc5a 597 // The length of a received command will in most cases be no more than 18 bytes.
598 // So 32 should be enough!
a501c82b 599 uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET;
600 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
601
5cd9ec01 602 // The response (tag -> reader) that we're receiving.
a501c82b 603 uint8_t *receivedResponse = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET;
604 uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
605
5cd9ec01
M
606 // As we receive stuff, we copy it from receivedCmd or receivedResponse
607 // into trace, along with its length and other annotations.
608 //uint8_t *trace = (uint8_t *)BigBuf;
609
610 // The DMA buffer, used to stream samples from the FPGA
7bc95e2e 611 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
612 uint8_t *data = dmaBuf;
613 uint8_t previous_data = 0;
5cd9ec01
M
614 int maxDataLen = 0;
615 int dataLen = 0;
7bc95e2e 616 bool TagIsActive = FALSE;
617 bool ReaderIsActive = FALSE;
618
619 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
15c4dc5a 620
5cd9ec01 621 // Set up the demodulator for tag -> reader responses.
a501c82b 622 DemodInit(receivedResponse, receivedResponsePar);
15c4dc5a 623
5cd9ec01 624 // Set up the demodulator for the reader -> tag commands
a501c82b 625 UartInit(receivedCmd, receivedCmdPar);
15c4dc5a 626
7bc95e2e 627 // Setup and start DMA.
5cd9ec01 628 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
7bc95e2e 629
5cd9ec01 630 // And now we loop, receiving samples.
7bc95e2e 631 for(uint32_t rsamples = 0; TRUE; ) {
632
5cd9ec01
M
633 if(BUTTON_PRESS()) {
634 DbpString("cancelled by button");
7bc95e2e 635 break;
5cd9ec01 636 }
15c4dc5a 637
5cd9ec01
M
638 LED_A_ON();
639 WDT_HIT();
15c4dc5a 640
5cd9ec01
M
641 int register readBufDataP = data - dmaBuf;
642 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
643 if (readBufDataP <= dmaBufDataP){
644 dataLen = dmaBufDataP - readBufDataP;
645 } else {
7bc95e2e 646 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
5cd9ec01
M
647 }
648 // test for length of buffer
649 if(dataLen > maxDataLen) {
650 maxDataLen = dataLen;
651 if(dataLen > 400) {
7bc95e2e 652 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
653 break;
5cd9ec01
M
654 }
655 }
656 if(dataLen < 1) continue;
657
658 // primary buffer was stopped( <-- we lost data!
659 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
660 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
661 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
7bc95e2e 662 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
5cd9ec01
M
663 }
664 // secondary buffer sets as primary, secondary buffer was stopped
665 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
666 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
667 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
668 }
669
670 LED_A_OFF();
7bc95e2e 671
672 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
3be2a5ae 673
7bc95e2e 674 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
675 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
676 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
677 LED_C_ON();
5cd9ec01 678
7bc95e2e 679 // check - if there is a short 7bit request from reader
680 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
5cd9ec01 681
7bc95e2e 682 if(triggered) {
a501c82b 683 if (!LogTrace(receivedCmd,
684 Uart.len,
685 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
686 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
687 Uart.parity,
688 TRUE)) break;
7bc95e2e 689 }
690 /* And ready to receive another command. */
691 UartReset();
692 /* And also reset the demod code, which might have been */
693 /* false-triggered by the commands from the reader. */
694 DemodReset();
695 LED_B_OFF();
696 }
697 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
5cd9ec01 698 }
3be2a5ae 699
7bc95e2e 700 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
701 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
702 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
703 LED_B_ON();
5cd9ec01 704
a501c82b 705 if (!LogTrace(receivedResponse,
706 Demod.len,
707 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
708 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
709 Demod.parity,
710 FALSE)) break;
5cd9ec01 711
7bc95e2e 712 if ((!triggered) && (param & 0x01)) triggered = TRUE;
5cd9ec01 713
7bc95e2e 714 // And ready to receive another response.
715 DemodReset();
716 LED_C_OFF();
717 }
718 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
719 }
5cd9ec01
M
720 }
721
7bc95e2e 722 previous_data = *data;
723 rsamples++;
5cd9ec01 724 data++;
d714d3ef 725 if(data == dmaBuf + DMA_BUFFER_SIZE) {
5cd9ec01
M
726 data = dmaBuf;
727 }
728 } // main cycle
729
730 DbpString("COMMAND FINISHED");
15c4dc5a 731
7bc95e2e 732 FpgaDisableSscDma();
733 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
734 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]);
5cd9ec01 735 LEDsoff();
15c4dc5a 736}
737
15c4dc5a 738//-----------------------------------------------------------------------------
739// Prepare tag messages
740//-----------------------------------------------------------------------------
a501c82b 741static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
15c4dc5a 742{
8f51ddb0 743 ToSendReset();
15c4dc5a 744
745 // Correction bit, might be removed when not needed
746 ToSendStuffBit(0);
747 ToSendStuffBit(0);
748 ToSendStuffBit(0);
749 ToSendStuffBit(0);
750 ToSendStuffBit(1); // 1
751 ToSendStuffBit(0);
752 ToSendStuffBit(0);
753 ToSendStuffBit(0);
8f51ddb0 754
15c4dc5a 755 // Send startbit
72934aa3 756 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 757 LastProxToAirDuration = 8 * ToSendMax - 4;
15c4dc5a 758
a501c82b 759 for( uint16_t i = 0; i < len; i++) {
8f51ddb0 760 uint8_t b = cmd[i];
15c4dc5a 761
762 // Data bits
a501c82b 763 for(uint16_t j = 0; j < 8; j++) {
15c4dc5a 764 if(b & 1) {
72934aa3 765 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 766 } else {
72934aa3 767 ToSend[++ToSendMax] = SEC_E;
8f51ddb0
M
768 }
769 b >>= 1;
770 }
15c4dc5a 771
0014cb46 772 // Get the parity bit
a501c82b 773 if (parity[i>>3] & (0x80>>(i&0x0007))) {
8f51ddb0 774 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 775 LastProxToAirDuration = 8 * ToSendMax - 4;
15c4dc5a 776 } else {
72934aa3 777 ToSend[++ToSendMax] = SEC_E;
7bc95e2e 778 LastProxToAirDuration = 8 * ToSendMax;
15c4dc5a 779 }
8f51ddb0 780 }
15c4dc5a 781
8f51ddb0
M
782 // Send stopbit
783 ToSend[++ToSendMax] = SEC_F;
15c4dc5a 784
8f51ddb0
M
785 // Convert from last byte pos to length
786 ToSendMax++;
8f51ddb0
M
787}
788
a501c82b 789static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
790{
791 uint8_t par[MAX_PARITY_SIZE];
792
793 GetParity(cmd, len, par);
794 CodeIso14443aAsTagPar(cmd, len, par);
15c4dc5a 795}
796
15c4dc5a 797
8f51ddb0
M
798static void Code4bitAnswerAsTag(uint8_t cmd)
799{
800 int i;
801
5f6d6c90 802 ToSendReset();
8f51ddb0
M
803
804 // Correction bit, might be removed when not needed
805 ToSendStuffBit(0);
806 ToSendStuffBit(0);
807 ToSendStuffBit(0);
808 ToSendStuffBit(0);
809 ToSendStuffBit(1); // 1
810 ToSendStuffBit(0);
811 ToSendStuffBit(0);
812 ToSendStuffBit(0);
813
814 // Send startbit
815 ToSend[++ToSendMax] = SEC_D;
816
817 uint8_t b = cmd;
818 for(i = 0; i < 4; i++) {
819 if(b & 1) {
820 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 821 LastProxToAirDuration = 8 * ToSendMax - 4;
8f51ddb0
M
822 } else {
823 ToSend[++ToSendMax] = SEC_E;
7bc95e2e 824 LastProxToAirDuration = 8 * ToSendMax;
8f51ddb0
M
825 }
826 b >>= 1;
827 }
828
829 // Send stopbit
830 ToSend[++ToSendMax] = SEC_F;
831
5f6d6c90 832 // Convert from last byte pos to length
833 ToSendMax++;
15c4dc5a 834}
835
836//-----------------------------------------------------------------------------
837// Wait for commands from reader
838// Stop when button is pressed
839// Or return TRUE when command is captured
840//-----------------------------------------------------------------------------
a501c82b 841static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
15c4dc5a 842{
843 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
844 // only, since we are receiving, not transmitting).
845 // Signal field is off with the appropriate LED
846 LED_D_OFF();
847 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
848
849 // Now run a `software UART' on the stream of incoming samples.
a501c82b 850 UartInit(received, parity);
7bc95e2e 851
852 // clear RXRDY:
853 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 854
855 for(;;) {
856 WDT_HIT();
857
858 if(BUTTON_PRESS()) return FALSE;
7bc95e2e 859
15c4dc5a 860 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
7bc95e2e 861 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
862 if(MillerDecoding(b, 0)) {
863 *len = Uart.len;
15c4dc5a 864 return TRUE;
865 }
7bc95e2e 866 }
15c4dc5a 867 }
868}
28afbd2b 869
a501c82b 870static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
7bc95e2e 871int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
28afbd2b 872int EmSend4bit(uint8_t resp);
a501c82b 873int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
874int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
875int EmSendCmd(uint8_t *resp, uint16_t respLen);
876int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
877bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
878 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
15c4dc5a 879
ce02f6f9 880static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
881
882typedef struct {
883 uint8_t* response;
884 size_t response_n;
885 uint8_t* modulation;
886 size_t modulation_n;
7bc95e2e 887 uint32_t ProxToAirDuration;
ce02f6f9 888} tag_response_info_t;
889
890void reset_free_buffer() {
891 free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
892}
893
894bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
7bc95e2e 895 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
ce02f6f9 896 // This will need the following byte array for a modulation sequence
897 // 144 data bits (18 * 8)
898 // 18 parity bits
899 // 2 Start and stop
900 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
901 // 1 just for the case
902 // ----------- +
903 // 166 bytes, since every bit that needs to be send costs us a byte
904 //
905
906 // Prepare the tag modulation bits from the message
907 CodeIso14443aAsTag(response_info->response,response_info->response_n);
908
909 // Make sure we do not exceed the free buffer space
910 if (ToSendMax > max_buffer_size) {
911 Dbprintf("Out of memory, when modulating bits for tag answer:");
912 Dbhexdump(response_info->response_n,response_info->response,false);
913 return false;
914 }
915
916 // Copy the byte array, used for this modulation to the buffer position
917 memcpy(response_info->modulation,ToSend,ToSendMax);
918
7bc95e2e 919 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
ce02f6f9 920 response_info->modulation_n = ToSendMax;
7bc95e2e 921 response_info->ProxToAirDuration = LastProxToAirDuration;
ce02f6f9 922
923 return true;
924}
925
926bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
927 // Retrieve and store the current buffer index
928 response_info->modulation = free_buffer_pointer;
929
930 // Determine the maximum size we can use from our buffer
a501c82b 931 size_t max_buffer_size = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + FREE_BUFFER_SIZE) - free_buffer_pointer;
ce02f6f9 932
933 // Forward the prepare tag modulation function to the inner function
934 if (prepare_tag_modulation(response_info,max_buffer_size)) {
935 // Update the free buffer offset
936 free_buffer_pointer += ToSendMax;
937 return true;
938 } else {
939 return false;
940 }
941}
942
15c4dc5a 943//-----------------------------------------------------------------------------
944// Main loop of simulated tag: receive commands from reader, decide what
945// response to send, and send it.
946//-----------------------------------------------------------------------------
28afbd2b 947void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data)
15c4dc5a 948{
5f6d6c90 949 // Enable and clear the trace
5f6d6c90 950 iso14a_clear_trace();
7bc95e2e 951 iso14a_set_tracing(TRUE);
81cd0474 952
81cd0474 953 uint8_t sak;
954
955 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
956 uint8_t response1[2];
957
958 switch (tagType) {
959 case 1: { // MIFARE Classic
960 // Says: I am Mifare 1k - original line
961 response1[0] = 0x04;
962 response1[1] = 0x00;
963 sak = 0x08;
964 } break;
965 case 2: { // MIFARE Ultralight
966 // Says: I am a stupid memory tag, no crypto
967 response1[0] = 0x04;
968 response1[1] = 0x00;
969 sak = 0x00;
970 } break;
971 case 3: { // MIFARE DESFire
972 // Says: I am a DESFire tag, ph33r me
973 response1[0] = 0x04;
974 response1[1] = 0x03;
975 sak = 0x20;
976 } break;
977 case 4: { // ISO/IEC 14443-4
978 // Says: I am a javacard (JCOP)
979 response1[0] = 0x04;
980 response1[1] = 0x00;
981 sak = 0x28;
982 } break;
95e63594 983 case 5: { // MIFARE TNP3XXX
984 // Says: I am a toy
985 response1[0] = 0x01;
986 response1[1] = 0x0f;
987 sak = 0x01;
988 } break;
81cd0474 989 default: {
990 Dbprintf("Error: unkown tagtype (%d)",tagType);
991 return;
992 } break;
993 }
994
995 // The second response contains the (mandatory) first 24 bits of the UID
996 uint8_t response2[5];
997
998 // Check if the uid uses the (optional) part
999 uint8_t response2a[5];
1000 if (uid_2nd) {
1001 response2[0] = 0x88;
1002 num_to_bytes(uid_1st,3,response2+1);
1003 num_to_bytes(uid_2nd,4,response2a);
1004 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1005
1006 // Configure the ATQA and SAK accordingly
1007 response1[0] |= 0x40;
1008 sak |= 0x04;
1009 } else {
1010 num_to_bytes(uid_1st,4,response2);
1011 // Configure the ATQA and SAK accordingly
1012 response1[0] &= 0xBF;
1013 sak &= 0xFB;
1014 }
1015
1016 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1017 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1018
1019 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1020 uint8_t response3[3];
1021 response3[0] = sak;
1022 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1023
1024 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1025 uint8_t response3a[3];
1026 response3a[0] = sak & 0xFB;
1027 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1028
254b70a4 1029 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
a501c82b 1030 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1031 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1032 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1033 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1034 // TC(1) = 0x02: CID supported, NAD not supported
ce02f6f9 1035 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
1036
7bc95e2e 1037 #define TAG_RESPONSE_COUNT 7
1038 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
1039 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
1040 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
1041 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1042 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
1043 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
1044 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1045 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1046 };
1047
1048 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1049 // Such a response is less time critical, so we can prepare them on the fly
1050 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1051 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1052 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1053 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1054 tag_response_info_t dynamic_response_info = {
1055 .response = dynamic_response_buffer,
1056 .response_n = 0,
1057 .modulation = dynamic_modulation_buffer,
1058 .modulation_n = 0
1059 };
ce02f6f9 1060
7bc95e2e 1061 // Reset the offset pointer of the free buffer
1062 reset_free_buffer();
ce02f6f9 1063
7bc95e2e 1064 // Prepare the responses of the anticollision phase
ce02f6f9 1065 // there will be not enough time to do this at the moment the reader sends it REQA
7bc95e2e 1066 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
1067 prepare_allocated_tag_modulation(&responses[i]);
1068 }
15c4dc5a 1069
7bc95e2e 1070 int len = 0;
15c4dc5a 1071
1072 // To control where we are in the protocol
1073 int order = 0;
1074 int lastorder;
1075
1076 // Just to allow some checks
1077 int happened = 0;
1078 int happened2 = 0;
81cd0474 1079 int cmdsRecvd = 0;
15c4dc5a 1080
254b70a4 1081 // We need to listen to the high-frequency, peak-detected path.
7bc95e2e 1082 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
15c4dc5a 1083
a501c82b 1084 // buffers used on software Uart:
1085 uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET;
1086 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
1087
254b70a4 1088 cmdsRecvd = 0;
7bc95e2e 1089 tag_response_info_t* p_response;
15c4dc5a 1090
254b70a4 1091 LED_A_ON();
1092 for(;;) {
7bc95e2e 1093 // Clean receive command buffer
1094
a501c82b 1095 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
ce02f6f9 1096 DbpString("Button press");
a501c82b 1097 break;
254b70a4 1098 }
7bc95e2e 1099
1100 p_response = NULL;
1101
254b70a4 1102 // Okay, look at the command now.
1103 lastorder = order;
1104 if(receivedCmd[0] == 0x26) { // Received a REQUEST
ce02f6f9 1105 p_response = &responses[0]; order = 1;
254b70a4 1106 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
ce02f6f9 1107 p_response = &responses[0]; order = 6;
254b70a4 1108 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
ce02f6f9 1109 p_response = &responses[1]; order = 2;
a501c82b 1110 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
ce02f6f9 1111 p_response = &responses[2]; order = 20;
254b70a4 1112 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
ce02f6f9 1113 p_response = &responses[3]; order = 3;
254b70a4 1114 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
ce02f6f9 1115 p_response = &responses[4]; order = 30;
254b70a4 1116 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
a501c82b 1117 EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
7bc95e2e 1118 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
5f6d6c90 1119 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
7bc95e2e 1120 p_response = NULL;
254b70a4 1121 } else if(receivedCmd[0] == 0x50) { // Received a HALT
a501c82b 1122
7bc95e2e 1123 if (tracing) {
a501c82b 1124 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 1125 }
1126 p_response = NULL;
254b70a4 1127 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
ce02f6f9 1128 p_response = &responses[5]; order = 7;
254b70a4 1129 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
7bc95e2e 1130 if (tagType == 1 || tagType == 2) { // RATS not supported
1131 EmSend4bit(CARD_NACK_NA);
1132 p_response = NULL;
1133 } else {
1134 p_response = &responses[6]; order = 70;
1135 }
a501c82b 1136 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
7bc95e2e 1137 if (tracing) {
a501c82b 1138 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 1139 }
1140 uint32_t nr = bytes_to_num(receivedCmd,4);
1141 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1142 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar);
1143 } else {
1144 // Check for ISO 14443A-4 compliant commands, look at left nibble
1145 switch (receivedCmd[0]) {
1146
1147 case 0x0B:
1148 case 0x0A: { // IBlock (command)
1149 dynamic_response_info.response[0] = receivedCmd[0];
1150 dynamic_response_info.response[1] = 0x00;
1151 dynamic_response_info.response[2] = 0x90;
1152 dynamic_response_info.response[3] = 0x00;
1153 dynamic_response_info.response_n = 4;
1154 } break;
1155
1156 case 0x1A:
1157 case 0x1B: { // Chaining command
1158 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1159 dynamic_response_info.response_n = 2;
1160 } break;
1161
1162 case 0xaa:
1163 case 0xbb: {
1164 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1165 dynamic_response_info.response_n = 2;
1166 } break;
1167
1168 case 0xBA: { //
1169 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1170 dynamic_response_info.response_n = 2;
1171 } break;
1172
1173 case 0xCA:
1174 case 0xC2: { // Readers sends deselect command
1175 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1176 dynamic_response_info.response_n = 2;
1177 } break;
1178
1179 default: {
1180 // Never seen this command before
1181 if (tracing) {
a501c82b 1182 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 1183 }
1184 Dbprintf("Received unknown command (len=%d):",len);
1185 Dbhexdump(len,receivedCmd,false);
1186 // Do not respond
1187 dynamic_response_info.response_n = 0;
1188 } break;
1189 }
ce02f6f9 1190
7bc95e2e 1191 if (dynamic_response_info.response_n > 0) {
1192 // Copy the CID from the reader query
1193 dynamic_response_info.response[1] = receivedCmd[1];
ce02f6f9 1194
7bc95e2e 1195 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1196 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1197 dynamic_response_info.response_n += 2;
ce02f6f9 1198
7bc95e2e 1199 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1200 Dbprintf("Error preparing tag response");
1201 if (tracing) {
a501c82b 1202 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 1203 }
1204 break;
1205 }
1206 p_response = &dynamic_response_info;
1207 }
81cd0474 1208 }
15c4dc5a 1209
1210 // Count number of wakeups received after a halt
1211 if(order == 6 && lastorder == 5) { happened++; }
1212
1213 // Count number of other messages after a halt
1214 if(order != 6 && lastorder == 5) { happened2++; }
1215
15c4dc5a 1216 if(cmdsRecvd > 999) {
1217 DbpString("1000 commands later...");
254b70a4 1218 break;
15c4dc5a 1219 }
ce02f6f9 1220 cmdsRecvd++;
1221
1222 if (p_response != NULL) {
7bc95e2e 1223 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1224 // do the tracing for the previous reader request and this tag answer:
a501c82b 1225 uint8_t par[MAX_PARITY_SIZE];
1226 GetParity(p_response->response, p_response->response_n, par);
1227
7bc95e2e 1228 EmLogTrace(Uart.output,
1229 Uart.len,
1230 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1231 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
a501c82b 1232 Uart.parity,
7bc95e2e 1233 p_response->response,
1234 p_response->response_n,
1235 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1236 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
a501c82b 1237 par);
7bc95e2e 1238 }
1239
1240 if (!tracing) {
1241 Dbprintf("Trace Full. Simulation stopped.");
1242 break;
1243 }
1244 }
15c4dc5a 1245
1246 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1247 LED_A_OFF();
1248}
1249
9492e0b0 1250
1251// prepare a delayed transfer. This simply shifts ToSend[] by a number
1252// of bits specified in the delay parameter.
1253void PrepareDelayedTransfer(uint16_t delay)
1254{
1255 uint8_t bitmask = 0;
1256 uint8_t bits_to_shift = 0;
1257 uint8_t bits_shifted = 0;
1258
1259 delay &= 0x07;
1260 if (delay) {
1261 for (uint16_t i = 0; i < delay; i++) {
1262 bitmask |= (0x01 << i);
1263 }
7bc95e2e 1264 ToSend[ToSendMax++] = 0x00;
9492e0b0 1265 for (uint16_t i = 0; i < ToSendMax; i++) {
1266 bits_to_shift = ToSend[i] & bitmask;
1267 ToSend[i] = ToSend[i] >> delay;
1268 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1269 bits_shifted = bits_to_shift;
1270 }
1271 }
1272}
1273
7bc95e2e 1274
1275//-------------------------------------------------------------------------------------
15c4dc5a 1276// Transmit the command (to the tag) that was placed in ToSend[].
9492e0b0 1277// Parameter timing:
7bc95e2e 1278// if NULL: transfer at next possible time, taking into account
1279// request guard time and frame delay time
1280// if == 0: transfer immediately and return time of transfer
9492e0b0 1281// if != 0: delay transfer until time specified
7bc95e2e 1282//-------------------------------------------------------------------------------------
a501c82b 1283static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
15c4dc5a 1284{
7bc95e2e 1285
9492e0b0 1286 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
e30c654b 1287
7bc95e2e 1288 uint32_t ThisTransferTime = 0;
e30c654b 1289
9492e0b0 1290 if (timing) {
1291 if(*timing == 0) { // Measure time
7bc95e2e 1292 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
9492e0b0 1293 } else {
1294 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1295 }
7bc95e2e 1296 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1297 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1298 LastTimeProxToAirStart = *timing;
1299 } else {
1300 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1301 while(GetCountSspClk() < ThisTransferTime);
1302 LastTimeProxToAirStart = ThisTransferTime;
9492e0b0 1303 }
1304
7bc95e2e 1305 // clear TXRDY
1306 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1307
7bc95e2e 1308 uint16_t c = 0;
9492e0b0 1309 for(;;) {
1310 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1311 AT91C_BASE_SSC->SSC_THR = cmd[c];
1312 c++;
1313 if(c >= len) {
1314 break;
1315 }
1316 }
1317 }
7bc95e2e 1318
f6c18637 1319 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
15c4dc5a 1320}
1321
7bc95e2e 1322
15c4dc5a 1323//-----------------------------------------------------------------------------
195af472 1324// Prepare reader command (in bits, support short frames) to send to FPGA
15c4dc5a 1325//-----------------------------------------------------------------------------
a501c82b 1326void CodeIso14443aBitsAsReaderPar(const uint8_t * cmd, uint16_t bits, const uint8_t *parity)
15c4dc5a 1327{
7bc95e2e 1328 int i, j;
1329 int last;
1330 uint8_t b;
e30c654b 1331
7bc95e2e 1332 ToSendReset();
e30c654b 1333
7bc95e2e 1334 // Start of Communication (Seq. Z)
1335 ToSend[++ToSendMax] = SEC_Z;
1336 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1337 last = 0;
1338
1339 size_t bytecount = nbytes(bits);
1340 // Generate send structure for the data bits
1341 for (i = 0; i < bytecount; i++) {
1342 // Get the current byte to send
1343 b = cmd[i];
1344 size_t bitsleft = MIN((bits-(i*8)),8);
1345
1346 for (j = 0; j < bitsleft; j++) {
1347 if (b & 1) {
1348 // Sequence X
1349 ToSend[++ToSendMax] = SEC_X;
1350 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1351 last = 1;
1352 } else {
1353 if (last == 0) {
1354 // Sequence Z
1355 ToSend[++ToSendMax] = SEC_Z;
1356 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1357 } else {
1358 // Sequence Y
1359 ToSend[++ToSendMax] = SEC_Y;
1360 last = 0;
1361 }
1362 }
1363 b >>= 1;
1364 }
1365
a501c82b 1366 // Only transmit parity bit if we transmitted a complete byte
7bc95e2e 1367 if (j == 8) {
1368 // Get the parity bit
a501c82b 1369 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
7bc95e2e 1370 // Sequence X
1371 ToSend[++ToSendMax] = SEC_X;
1372 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1373 last = 1;
1374 } else {
1375 if (last == 0) {
1376 // Sequence Z
1377 ToSend[++ToSendMax] = SEC_Z;
1378 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1379 } else {
1380 // Sequence Y
1381 ToSend[++ToSendMax] = SEC_Y;
1382 last = 0;
1383 }
1384 }
1385 }
1386 }
e30c654b 1387
7bc95e2e 1388 // End of Communication: Logic 0 followed by Sequence Y
1389 if (last == 0) {
1390 // Sequence Z
1391 ToSend[++ToSendMax] = SEC_Z;
1392 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1393 } else {
1394 // Sequence Y
1395 ToSend[++ToSendMax] = SEC_Y;
1396 last = 0;
1397 }
1398 ToSend[++ToSendMax] = SEC_Y;
e30c654b 1399
7bc95e2e 1400 // Convert to length of command:
1401 ToSendMax++;
15c4dc5a 1402}
1403
195af472 1404//-----------------------------------------------------------------------------
1405// Prepare reader command to send to FPGA
1406//-----------------------------------------------------------------------------
a501c82b 1407void CodeIso14443aAsReaderPar(const uint8_t * cmd, uint16_t len, const uint8_t *parity)
195af472 1408{
a501c82b 1409 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
195af472 1410}
1411
9ca155ba
M
1412//-----------------------------------------------------------------------------
1413// Wait for commands from reader
1414// Stop when button is pressed (return 1) or field was gone (return 2)
1415// Or return 0 when command is captured
1416//-----------------------------------------------------------------------------
a501c82b 1417static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
9ca155ba
M
1418{
1419 *len = 0;
1420
1421 uint32_t timer = 0, vtime = 0;
1422 int analogCnt = 0;
1423 int analogAVG = 0;
1424
1425 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1426 // only, since we are receiving, not transmitting).
1427 // Signal field is off with the appropriate LED
1428 LED_D_OFF();
1429 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1430
1431 // Set ADC to read field strength
1432 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1433 AT91C_BASE_ADC->ADC_MR =
1434 ADC_MODE_PRESCALE(32) |
1435 ADC_MODE_STARTUP_TIME(16) |
1436 ADC_MODE_SAMPLE_HOLD_TIME(8);
1437 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1438 // start ADC
1439 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1440
1441 // Now run a 'software UART' on the stream of incoming samples.
a501c82b 1442 UartInit(received, parity);
7bc95e2e 1443
1444 // Clear RXRDY:
1445 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
9ca155ba
M
1446
1447 for(;;) {
1448 WDT_HIT();
1449
1450 if (BUTTON_PRESS()) return 1;
1451
1452 // test if the field exists
1453 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1454 analogCnt++;
1455 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1456 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1457 if (analogCnt >= 32) {
1458 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1459 vtime = GetTickCount();
1460 if (!timer) timer = vtime;
1461 // 50ms no field --> card to idle state
1462 if (vtime - timer > 50) return 2;
1463 } else
1464 if (timer) timer = 0;
1465 analogCnt = 0;
1466 analogAVG = 0;
1467 }
1468 }
7bc95e2e 1469
9ca155ba 1470 // receive and test the miller decoding
7bc95e2e 1471 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1472 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1473 if(MillerDecoding(b, 0)) {
1474 *len = Uart.len;
9ca155ba
M
1475 return 0;
1476 }
7bc95e2e 1477 }
1478
9ca155ba
M
1479 }
1480}
1481
9ca155ba 1482
a501c82b 1483static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
7bc95e2e 1484{
1485 uint8_t b;
1486 uint16_t i = 0;
1487 uint32_t ThisTransferTime;
1488
9ca155ba
M
1489 // Modulate Manchester
1490 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
7bc95e2e 1491
1492 // include correction bit if necessary
1493 if (Uart.parityBits & 0x01) {
1494 correctionNeeded = TRUE;
1495 }
1496 if(correctionNeeded) {
9ca155ba
M
1497 // 1236, so correction bit needed
1498 i = 0;
7bc95e2e 1499 } else {
1500 i = 1;
9ca155ba 1501 }
7bc95e2e 1502
d714d3ef 1503 // clear receiving shift register and holding register
7bc95e2e 1504 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1505 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1506 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1507 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
9ca155ba 1508
7bc95e2e 1509 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1510 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1511 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1512 if (AT91C_BASE_SSC->SSC_RHR) break;
1513 }
1514
1515 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1516
1517 // Clear TXRDY:
1518 AT91C_BASE_SSC->SSC_THR = SEC_F;
1519
9ca155ba 1520 // send cycle
7bc95e2e 1521 for(; i <= respLen; ) {
9ca155ba 1522 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
7bc95e2e 1523 AT91C_BASE_SSC->SSC_THR = resp[i++];
1524 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
9ca155ba 1525 }
7bc95e2e 1526
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M
1527 if(BUTTON_PRESS()) {
1528 break;
1529 }
1530 }
1531
7bc95e2e 1532 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1533 for (i = 0; i < 2 ; ) {
1534 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1535 AT91C_BASE_SSC->SSC_THR = SEC_F;
1536 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1537 i++;
1538 }
1539 }
1540
1541 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1542
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M
1543 return 0;
1544}
1545
7bc95e2e 1546int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1547 Code4bitAnswerAsTag(resp);
0a39986e 1548 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
7bc95e2e 1549 // do the tracing for the previous reader request and this tag answer:
a501c82b 1550 uint8_t par[1];
1551 GetParity(&resp, 1, par);
7bc95e2e 1552 EmLogTrace(Uart.output,
1553 Uart.len,
1554 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1555 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
a501c82b 1556 Uart.parity,
7bc95e2e 1557 &resp,
1558 1,
1559 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1560 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
a501c82b 1561 par);
0a39986e 1562 return res;
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M
1563}
1564
8f51ddb0 1565int EmSend4bit(uint8_t resp){
7bc95e2e 1566 return EmSend4bitEx(resp, false);
8f51ddb0
M
1567}
1568
a501c82b 1569int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
7bc95e2e 1570 CodeIso14443aAsTagPar(resp, respLen, par);
8f51ddb0 1571 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
7bc95e2e 1572 // do the tracing for the previous reader request and this tag answer:
1573 EmLogTrace(Uart.output,
1574 Uart.len,
1575 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1576 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
a501c82b 1577 Uart.parity,
7bc95e2e 1578 resp,
1579 respLen,
1580 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1581 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
a501c82b 1582 par);
8f51ddb0
M
1583 return res;
1584}
1585
a501c82b 1586int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1587 uint8_t par[MAX_PARITY_SIZE];
1588 GetParity(resp, respLen, par);
1589 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
8f51ddb0 1590}
a501c82b 1591
1592int EmSendCmd(uint8_t *resp, uint16_t respLen){
1593 uint8_t par[MAX_PARITY_SIZE];
1594 GetParity(resp, respLen, par);
1595 return EmSendCmdExPar(resp, respLen, false, par);
8f51ddb0
M
1596}
1597
a501c82b 1598int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
7bc95e2e 1599 return EmSendCmdExPar(resp, respLen, false, par);
1600}
1601
a501c82b 1602bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1603 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
7bc95e2e 1604{
a501c82b 1605 if (!tracing) return true;
1606
1607 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1608 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1609 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1610 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1611 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1612 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1613 reader_EndTime = tag_StartTime - exact_fdt;
1614 reader_StartTime = reader_EndTime - reader_modlen;
1615 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) {
1616 return FALSE;
1617 } else
1618 return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
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1619}
1620
15c4dc5a 1621//-----------------------------------------------------------------------------
1622// Wait a certain time for tag response
1623// If a response is captured return TRUE
e691fc45 1624// If it takes too long return FALSE
15c4dc5a 1625//-----------------------------------------------------------------------------
a501c82b 1626static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
15c4dc5a 1627{
7bc95e2e 1628 uint16_t c;
e691fc45 1629
15c4dc5a 1630 // Set FPGA mode to "reader listen mode", no modulation (listen
534983d7 1631 // only, since we are receiving, not transmitting).
1632 // Signal field is on with the appropriate LED
1633 LED_D_ON();
1634 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1c611bbd 1635
534983d7 1636 // Now get the answer from the card
a501c82b 1637 DemodInit(receivedResponse, receivedResponsePar);
1638
7bc95e2e 1639 // clear RXRDY:
1640 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1641
15c4dc5a 1642 c = 0;
1643 for(;;) {
534983d7 1644 WDT_HIT();
15c4dc5a 1645
534983d7 1646 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
534983d7 1647 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
7bc95e2e 1648 if(ManchesterDecoding(b, offset, 0)) {
1649 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
15c4dc5a 1650 return TRUE;
a501c82b 1651 } else if (c++ > iso14a_timeout) {
7bc95e2e 1652 return FALSE;
15c4dc5a 1653 }
534983d7 1654 }
1655 }
15c4dc5a 1656}
1657
a501c82b 1658void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
15c4dc5a 1659{
a501c82b 1660 CodeIso14443aBitsAsReaderPar(frame, bits, par);
dfc3c505 1661
7bc95e2e 1662 // Send command to tag
1663 TransmitFor14443a(ToSend, ToSendMax, timing);
1664 if(trigger)
1665 LED_A_ON();
dfc3c505 1666
7bc95e2e 1667 // Log reader command in trace buffer
1668 if (tracing) {
a501c82b 1669 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
7bc95e2e 1670 }
15c4dc5a 1671}
1672
a501c82b 1673void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
dfc3c505 1674{
a501c82b 1675 ReaderTransmitBitsPar(frame, len*8, par, timing);
dfc3c505 1676}
15c4dc5a 1677
a501c82b 1678void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
e691fc45 1679{
a501c82b 1680 // Generate parity and redirect
1681 uint8_t par[MAX_PARITY_SIZE];
1682 GetParity(frame, len/8, par);
1683 ReaderTransmitBitsPar(frame, len, par, timing);
e691fc45 1684}
1685
a501c82b 1686void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
15c4dc5a 1687{
a501c82b 1688 // Generate parity and redirect
1689 uint8_t par[MAX_PARITY_SIZE];
1690 GetParity(frame, len, par);
1691 ReaderTransmitBitsPar(frame, len*8, par, timing);
15c4dc5a 1692}
1693
a501c82b 1694int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
e691fc45 1695{
a501c82b 1696 if (!GetIso14443aAnswerFromTag(receivedAnswer,parity,offset)) return FALSE;
7bc95e2e 1697 if (tracing) {
a501c82b 1698 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
7bc95e2e 1699 }
e691fc45 1700 return Demod.len;
1701}
1702
a501c82b 1703int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
15c4dc5a 1704{
a501c82b 1705 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE;
15c4dc5a 1706
7bc95e2e 1707 if (tracing) {
a501c82b 1708 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
7bc95e2e 1709 }
e691fc45 1710 return Demod.len;
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1711}
1712
e691fc45 1713/* performs iso14443a anticollision procedure
534983d7 1714 * fills the uid pointer unless NULL
1715 * fills resp_data unless NULL */
79a73ab2 1716int iso14443a_select_card(byte_t* uid_ptr, iso14a_card_select_t* p_hi14a_card, uint32_t* cuid_ptr) {
d3499d36 1717 //uint8_t halt[] = { 0x50 }; // HALT
a501c82b 1718 uint8_t wupa[] = { 0x52 }; // WAKE-UP
1719 //uint8_t reqa[] = { 0x26 }; // REQUEST A
1720 uint8_t sel_all[] = { 0x93,0x20 };
1721 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1722 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1723 uint8_t *resp = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET;
1724 uint8_t *resp_par = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
1725
1726 byte_t uid_resp[4];
1727 size_t uid_resp_len;
d3499d36 1728 uint8_t sak = 0x04; // cascade uid
1729 int cascade_level = 0;
1730 int len;
a501c82b 1731
d3499d36 1732 // test for the SKYLANDERS TOY.
1733 //ReaderTransmit(halt,sizeof(halt), NULL);
a501c82b 1734
d3499d36 1735 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1736 ReaderTransmitBitsPar(wupa,7,0, NULL);
7bc95e2e 1737
d3499d36 1738 // Receive the ATQA
1739 if(!ReaderReceive(resp, resp_par)) return 0;
1740
1741 if(p_hi14a_card) {
1742 memcpy(p_hi14a_card->atqa, resp, 2);
1743 p_hi14a_card->uidlen = 0;
1744 memset(p_hi14a_card->uid,0,10);
1745 }
5f6d6c90 1746
d3499d36 1747 // clear uid
1748 if (uid_ptr) {
1749 memset(uid_ptr,0,10);
1750 }
79a73ab2 1751
ed258538 1752 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1753 // which case we need to make a cascade 2 request and select - this is a long UID
1754 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1755 for(; sak & 0x04; cascade_level++) {
1756 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1757 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1758
1759 // SELECT_ALL
9492e0b0 1760 ReaderTransmit(sel_all,sizeof(sel_all), NULL);
a501c82b 1761 if (!ReaderReceive(resp, resp_par)) return 0;
5f6d6c90 1762
e691fc45 1763 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1764 memset(uid_resp, 0, 4);
1765 uint16_t uid_resp_bits = 0;
1766 uint16_t collision_answer_offset = 0;
1767 // anti-collision-loop:
1768 while (Demod.collisionPos) {
1769 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1770 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1771 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1772 uid_resp[uid_resp_bits & 0xf8] |= UIDbit << (uid_resp_bits % 8);
1773 }
1774 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1775 uid_resp_bits++;
1776 // construct anticollosion command:
1777 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1778 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1779 sel_uid[2+i] = uid_resp[i];
1780 }
1781 collision_answer_offset = uid_resp_bits%8;
1782 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
a501c82b 1783 if (!ReaderReceiveOffset(resp, collision_answer_offset,resp_par)) return 0;
e691fc45 1784 }
1785 // finally, add the last bits and BCC of the UID
1786 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1787 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1788 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1789 }
1790
1791 } else { // no collision, use the response to SELECT_ALL as current uid
1792 memcpy(uid_resp,resp,4);
1793 }
1794 uid_resp_len = 4;
95e63594 1795
e691fc45 1796 // calculate crypto UID. Always use last 4 Bytes.
5f6d6c90 1797 if(cuid_ptr) {
1798 *cuid_ptr = bytes_to_num(uid_resp, 4);
79a73ab2 1799 }
e30c654b 1800
ed258538 1801 // Construct SELECT UID command
e691fc45 1802 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1803 memcpy(sel_uid+2,uid_resp,4); // the UID
1804 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1805 AppendCrc14443a(sel_uid,7); // calculate and add CRC
9492e0b0 1806 ReaderTransmit(sel_uid,sizeof(sel_uid), NULL);
534983d7 1807
ed258538 1808 // Receive the SAK
a501c82b 1809 if (!ReaderReceive(resp, resp_par)) return 0;
ed258538 1810 sak = resp[0];
79a73ab2 1811
95e63594 1812
d3499d36 1813 // Test if more parts of the uid are coming
e691fc45 1814 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
a501c82b 1815 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1816 // http://www.nxp.com/documents/application_note/AN10927.pdf
a501c82b 1817 uid_resp[0] = uid_resp[1];
1818 uid_resp[1] = uid_resp[2];
1819 uid_resp[2] = uid_resp[3];
1820
1821 uid_resp_len = 3;
79a73ab2 1822 }
5f6d6c90 1823
79a73ab2 1824 if(uid_ptr) {
1825 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1826 }
5f6d6c90 1827
79a73ab2 1828 if(p_hi14a_card) {
1829 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1830 p_hi14a_card->uidlen += uid_resp_len;
1831 }
ed258538 1832 }
79a73ab2 1833
ed258538 1834 if(p_hi14a_card) {
1835 p_hi14a_card->sak = sak;
1836 p_hi14a_card->ats_len = 0;
1837 }
534983d7 1838
d3499d36 1839 if( (sak & 0x20) == 0) {
1840 return 2; // non iso14443a compliant tag
1841 }
534983d7 1842
d3499d36 1843 // Request for answer to select
1844 AppendCrc14443a(rats, 2);
1845 ReaderTransmit(rats, sizeof(rats), NULL);
1c611bbd 1846
d3499d36 1847 if (!(len = ReaderReceive(resp, resp_par))) return 2;
5191b3d1 1848
d3499d36 1849 if(p_hi14a_card) {
1850 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1851 p_hi14a_card->ats_len = len;
1852 }
5f6d6c90 1853
d3499d36 1854 // reset the PCB block number
1855 iso14_pcb_blocknum = 0;
1856 return 1;
7e758047 1857}
15c4dc5a 1858
7bc95e2e 1859void iso14443a_setup(uint8_t fpga_minor_mode) {
7cc204bf 1860 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
9492e0b0 1861 // Set up the synchronous serial port
1862 FpgaSetupSsc();
7bc95e2e 1863 // connect Demodulated Signal to ADC:
7e758047 1864 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
e30c654b 1865
7e758047 1866 // Signal field is on with the appropriate LED
95e63594 1867 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
7bc95e2e 1868 LED_D_ON();
1869 } else {
1870 LED_D_OFF();
1871 }
1872 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
534983d7 1873
7bc95e2e 1874 // Start the timer
1875 StartCountSspClk();
1876
1877 DemodReset();
1878 UartReset();
1879 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
f38a1528 1880 iso14a_set_timeout(1050); // 10ms default 10*105 =
7e758047 1881}
15c4dc5a 1882
a501c82b 1883int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
1884 uint8_t parity[MAX_PARITY_SIZE];
534983d7 1885 uint8_t real_cmd[cmd_len+4];
1886 real_cmd[0] = 0x0a; //I-Block
b0127e65 1887 // put block number into the PCB
1888 real_cmd[0] |= iso14_pcb_blocknum;
534983d7 1889 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1890 memcpy(real_cmd+2, cmd, cmd_len);
1891 AppendCrc14443a(real_cmd,cmd_len+2);
1892
9492e0b0 1893 ReaderTransmit(real_cmd, cmd_len+4, NULL);
a501c82b 1894 size_t len = ReaderReceive(data, parity);
b0127e65 1895 uint8_t * data_bytes = (uint8_t *) data;
1896 if (!len)
1897 return 0; //DATA LINK ERROR
1898 // if we received an I- or R(ACK)-Block with a block number equal to the
1899 // current block number, toggle the current block number
1900 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1901 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1902 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1903 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1904 {
1905 iso14_pcb_blocknum ^= 1;
1906 }
1907
534983d7 1908 return len;
1909}
1910
7e758047 1911//-----------------------------------------------------------------------------
1912// Read an ISO 14443a tag. Send out commands and store answers.
1913//
1914//-----------------------------------------------------------------------------
7bc95e2e 1915void ReaderIso14443a(UsbCommand *c)
7e758047 1916{
534983d7 1917 iso14a_command_t param = c->arg[0];
7bc95e2e 1918 uint8_t *cmd = c->d.asBytes;
a501c82b 1919 size_t len = c->arg[1];
1920 size_t lenbits = c->arg[2];
9492e0b0 1921 uint32_t arg0 = 0;
1922 byte_t buf[USB_CMD_DATA_SIZE];
a501c82b 1923 uint8_t par[MAX_PARITY_SIZE];
902cb3c0 1924
5f6d6c90 1925 if(param & ISO14A_CONNECT) {
1926 iso14a_clear_trace();
1927 }
e691fc45 1928
7bc95e2e 1929 iso14a_set_tracing(TRUE);
e30c654b 1930
79a73ab2 1931 if(param & ISO14A_REQUEST_TRIGGER) {
7bc95e2e 1932 iso14a_set_trigger(TRUE);
9492e0b0 1933 }
15c4dc5a 1934
534983d7 1935 if(param & ISO14A_CONNECT) {
7bc95e2e 1936 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
5f6d6c90 1937 if(!(param & ISO14A_NO_SELECT)) {
1938 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
1939 arg0 = iso14443a_select_card(NULL,card,NULL);
1940 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
1941 }
534983d7 1942 }
e30c654b 1943
534983d7 1944 if(param & ISO14A_SET_TIMEOUT) {
313ee67e 1945 iso14a_set_timeout(c->arg[2]);
534983d7 1946 }
e30c654b 1947
534983d7 1948 if(param & ISO14A_APDU) {
902cb3c0 1949 arg0 = iso14_apdu(cmd, len, buf);
79a73ab2 1950 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
534983d7 1951 }
e30c654b 1952
534983d7 1953 if(param & ISO14A_RAW) {
1954 if(param & ISO14A_APPEND_CRC) {
1955 AppendCrc14443a(cmd,len);
1956 len += 2;
a501c82b 1957 if (lenbits) lenbits += 16;
15c4dc5a 1958 }
a501c82b 1959 if(lenbits>0) {
1960 GetParity(cmd, lenbits/8, par);
1961 ReaderTransmitBitsPar(cmd, lenbits, par, NULL);
5f6d6c90 1962 } else {
1963 ReaderTransmit(cmd,len, NULL);
1964 }
a501c82b 1965 arg0 = ReaderReceive(buf, par);
9492e0b0 1966 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
534983d7 1967 }
15c4dc5a 1968
79a73ab2 1969 if(param & ISO14A_REQUEST_TRIGGER) {
7bc95e2e 1970 iso14a_set_trigger(FALSE);
9492e0b0 1971 }
15c4dc5a 1972
79a73ab2 1973 if(param & ISO14A_NO_DISCONNECT) {
534983d7 1974 return;
9492e0b0 1975 }
15c4dc5a 1976
15c4dc5a 1977 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1978 LEDsoff();
15c4dc5a 1979}
b0127e65 1980
1c611bbd 1981
1c611bbd 1982// Determine the distance between two nonces.
1983// Assume that the difference is small, but we don't know which is first.
1984// Therefore try in alternating directions.
1985int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
1986
1987 uint16_t i;
1988 uint32_t nttmp1, nttmp2;
e772353f 1989
1c611bbd 1990 if (nt1 == nt2) return 0;
1991
1992 nttmp1 = nt1;
1993 nttmp2 = nt2;
1994
1995 for (i = 1; i < 32768; i++) {
1996 nttmp1 = prng_successor(nttmp1, 1);
1997 if (nttmp1 == nt2) return i;
1998 nttmp2 = prng_successor(nttmp2, 1);
1999 if (nttmp2 == nt1) return -i;
2000 }
2001
2002 return(-99999); // either nt1 or nt2 are invalid nonces
e772353f 2003}
2004
e772353f 2005
1c611bbd 2006//-----------------------------------------------------------------------------
2007// Recover several bits of the cypher stream. This implements (first stages of)
2008// the algorithm described in "The Dark Side of Security by Obscurity and
2009// Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2010// (article by Nicolas T. Courtois, 2009)
2011//-----------------------------------------------------------------------------
2012void ReaderMifare(bool first_try)
2013{
2014 // Mifare AUTH
2015 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2016 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2017 static uint8_t mf_nr_ar3;
e772353f 2018
a501c82b 2019 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET);
2020 uint8_t* receivedAnswerPar = (((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET);
7bc95e2e 2021
d2f487af 2022 iso14a_clear_trace();
7bc95e2e 2023 iso14a_set_tracing(TRUE);
e772353f 2024
1c611bbd 2025 byte_t nt_diff = 0;
a501c82b 2026 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
1c611bbd 2027 static byte_t par_low = 0;
2028 bool led_on = TRUE;
a501c82b 2029 uint8_t uid[10] ={0};
1c611bbd 2030 uint32_t cuid;
e772353f 2031
a61b4976 2032 uint32_t nt = 0;
2033 uint32_t previous_nt = 0;
1c611bbd 2034 static uint32_t nt_attacked = 0;
95e63594 2035 byte_t par_list[8] = {0x00};
2036 byte_t ks_list[8] = {0x00};
e772353f 2037
1c611bbd 2038 static uint32_t sync_time;
2039 static uint32_t sync_cycles;
2040 int catch_up_cycles = 0;
2041 int last_catch_up = 0;
2042 uint16_t consecutive_resyncs = 0;
2043 int isOK = 0;
e772353f 2044
1c611bbd 2045 if (first_try) {
1c611bbd 2046 mf_nr_ar3 = 0;
7bc95e2e 2047 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2048 sync_time = GetCountSspClk() & 0xfffffff8;
1c611bbd 2049 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2050 nt_attacked = 0;
2051 nt = 0;
a501c82b 2052 par[0] = 0;
1c611bbd 2053 }
2054 else {
2055 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
1c611bbd 2056 mf_nr_ar3++;
2057 mf_nr_ar[3] = mf_nr_ar3;
a501c82b 2058 par[0] = par_low;
1c611bbd 2059 }
e30c654b 2060
15c4dc5a 2061 LED_A_ON();
2062 LED_B_OFF();
2063 LED_C_OFF();
1c611bbd 2064
7bc95e2e 2065
1c611bbd 2066 for(uint16_t i = 0; TRUE; i++) {
2067
2068 WDT_HIT();
e30c654b 2069
1c611bbd 2070 // Test if the action was cancelled
2071 if(BUTTON_PRESS()) {
2072 break;
2073 }
2074
2075 LED_C_ON();
e30c654b 2076
1c611bbd 2077 if(!iso14443a_select_card(uid, NULL, &cuid)) {
9492e0b0 2078 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
1c611bbd 2079 continue;
2080 }
2081
9492e0b0 2082 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
1c611bbd 2083 catch_up_cycles = 0;
2084
2085 // if we missed the sync time already, advance to the next nonce repeat
7bc95e2e 2086 while(GetCountSspClk() > sync_time) {
9492e0b0 2087 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
1c611bbd 2088 }
e30c654b 2089
9492e0b0 2090 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2091 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
f89c7050 2092
1c611bbd 2093 // Receive the (4 Byte) "random" nonce
a501c82b 2094 if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) {
9492e0b0 2095 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
1c611bbd 2096 continue;
2097 }
2098
1c611bbd 2099 previous_nt = nt;
2100 nt = bytes_to_num(receivedAnswer, 4);
2101
2102 // Transmit reader nonce with fake par
9492e0b0 2103 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
1c611bbd 2104
2105 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2106 int nt_distance = dist_nt(previous_nt, nt);
2107 if (nt_distance == 0) {
2108 nt_attacked = nt;
2109 }
2110 else {
2111 if (nt_distance == -99999) { // invalid nonce received, try again
2112 continue;
2113 }
2114 sync_cycles = (sync_cycles - nt_distance);
9492e0b0 2115 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
1c611bbd 2116 continue;
2117 }
2118 }
2119
2120 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2121 catch_up_cycles = -dist_nt(nt_attacked, nt);
2122 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2123 catch_up_cycles = 0;
2124 continue;
2125 }
2126 if (catch_up_cycles == last_catch_up) {
2127 consecutive_resyncs++;
2128 }
2129 else {
2130 last_catch_up = catch_up_cycles;
2131 consecutive_resyncs = 0;
2132 }
2133 if (consecutive_resyncs < 3) {
9492e0b0 2134 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
1c611bbd 2135 }
2136 else {
2137 sync_cycles = sync_cycles + catch_up_cycles;
9492e0b0 2138 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
1c611bbd 2139 }
2140 continue;
2141 }
2142
2143 consecutive_resyncs = 0;
2144
2145 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
a501c82b 2146 if (ReaderReceive(receivedAnswer, receivedAnswerPar))
1c611bbd 2147 {
9492e0b0 2148 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
1c611bbd 2149
2150 if (nt_diff == 0)
2151 {
a501c82b 2152 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
1c611bbd 2153 }
2154
2155 led_on = !led_on;
2156 if(led_on) LED_B_ON(); else LED_B_OFF();
2157
a501c82b 2158 par_list[nt_diff] = SwapBits(par[0], 8);
1c611bbd 2159 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2160
2161 // Test if the information is complete
2162 if (nt_diff == 0x07) {
2163 isOK = 1;
2164 break;
2165 }
2166
2167 nt_diff = (nt_diff + 1) & 0x07;
2168 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
a501c82b 2169 par[0] = par_low;
1c611bbd 2170 } else {
2171 if (nt_diff == 0 && first_try)
2172 {
a501c82b 2173 par[0]++;
1c611bbd 2174 } else {
a501c82b 2175 par[0] = ((par[0] & 0x1F) + 1) | par_low;
1c611bbd 2176 }
2177 }
2178 }
2179
1c611bbd 2180
2181 mf_nr_ar[3] &= 0x1F;
2182
2183 byte_t buf[28];
2184 memcpy(buf + 0, uid, 4);
2185 num_to_bytes(nt, 4, buf + 4);
2186 memcpy(buf + 8, par_list, 8);
2187 memcpy(buf + 16, ks_list, 8);
2188 memcpy(buf + 24, mf_nr_ar, 4);
2189
2190 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2191
2192 // Thats it...
2193 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2194 LEDsoff();
7bc95e2e 2195
2196 iso14a_set_tracing(FALSE);
20f9a2a1 2197}
1c611bbd 2198
d2f487af 2199/**
2200 *MIFARE 1K simulate.
2201 *
2202 *@param flags :
2203 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2204 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2205 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2206 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2207 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2208 */
2209void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
20f9a2a1 2210{
50193c1e 2211 int cardSTATE = MFEMUL_NOFIELD;
8556b852 2212 int _7BUID = 0;
9ca155ba 2213 int vHf = 0; // in mV
8f51ddb0 2214 int res;
0a39986e
M
2215 uint32_t selTimer = 0;
2216 uint32_t authTimer = 0;
a501c82b 2217 uint16_t len = 0;
8f51ddb0 2218 uint8_t cardWRBL = 0;
9ca155ba
M
2219 uint8_t cardAUTHSC = 0;
2220 uint8_t cardAUTHKEY = 0xff; // no authentication
51969283 2221 uint32_t cardRr = 0;
9ca155ba 2222 uint32_t cuid = 0;
d2f487af 2223 //uint32_t rn_enc = 0;
51969283 2224 uint32_t ans = 0;
0014cb46
M
2225 uint32_t cardINTREG = 0;
2226 uint8_t cardINTBLOCK = 0;
9ca155ba
M
2227 struct Crypto1State mpcs = {0, 0};
2228 struct Crypto1State *pcs;
2229 pcs = &mpcs;
d2f487af 2230 uint32_t numReads = 0;//Counts numer of times reader read a block
a501c82b 2231 uint8_t* receivedCmd = get_bigbufptr_recvcmdbuf();
2232 uint8_t* receivedCmd_par = receivedCmd + MAX_FRAME_SIZE;
2233 uint8_t* response = get_bigbufptr_recvrespbuf();
2234 uint8_t* response_par = response + MAX_FRAME_SIZE;
9ca155ba 2235
d2f487af 2236 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2237 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2238 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2239 uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2240 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
9ca155ba 2241
d2f487af 2242 uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2243 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
7bc95e2e 2244
d2f487af 2245 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2246 // This can be used in a reader-only attack.
2247 // (it can also be retrieved via 'hf 14a list', but hey...
2248 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0};
2249 uint8_t ar_nr_collected = 0;
0014cb46 2250
0a39986e 2251 // clear trace
7bc95e2e 2252 iso14a_clear_trace();
2253 iso14a_set_tracing(TRUE);
51969283 2254
7bc95e2e 2255 // Authenticate response - nonce
51969283 2256 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
7bc95e2e 2257
d2f487af 2258 //-- Determine the UID
2259 // Can be set from emulator memory, incoming data
2260 // and can be 7 or 4 bytes long
7bc95e2e 2261 if (flags & FLAG_4B_UID_IN_DATA)
d2f487af 2262 {
2263 // 4B uid comes from data-portion of packet
2264 memcpy(rUIDBCC1,datain,4);
8556b852 2265 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
8556b852 2266
7bc95e2e 2267 } else if (flags & FLAG_7B_UID_IN_DATA) {
d2f487af 2268 // 7B uid comes from data-portion of packet
2269 memcpy(&rUIDBCC1[1],datain,3);
2270 memcpy(rUIDBCC2, datain+3, 4);
2271 _7BUID = true;
7bc95e2e 2272 } else {
d2f487af 2273 // get UID from emul memory
2274 emlGetMemBt(receivedCmd, 7, 1);
2275 _7BUID = !(receivedCmd[0] == 0x00);
2276 if (!_7BUID) { // ---------- 4BUID
2277 emlGetMemBt(rUIDBCC1, 0, 4);
2278 } else { // ---------- 7BUID
2279 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2280 emlGetMemBt(rUIDBCC2, 3, 4);
2281 }
2282 }
7bc95e2e 2283
d2f487af 2284 /*
2285 * Regardless of what method was used to set the UID, set fifth byte and modify
2286 * the ATQA for 4 or 7-byte UID
2287 */
d2f487af 2288 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
7bc95e2e 2289 if (_7BUID) {
d2f487af 2290 rATQA[0] = 0x44;
8556b852 2291 rUIDBCC1[0] = 0x88;
8556b852
M
2292 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2293 }
2294
9ca155ba 2295 // We need to listen to the high-frequency, peak-detected path.
7bc95e2e 2296 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
9ca155ba 2297
9ca155ba 2298
d2f487af 2299 if (MF_DBGLEVEL >= 1) {
2300 if (!_7BUID) {
a501c82b 2301 Dbprintf("4B UID: %02x%02x%02x%02x",
2302 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
7bc95e2e 2303 } else {
a501c82b 2304 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2305 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2306 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
d2f487af 2307 }
2308 }
7bc95e2e 2309
2310 bool finished = FALSE;
d2f487af 2311 while (!BUTTON_PRESS() && !finished) {
9ca155ba 2312 WDT_HIT();
9ca155ba
M
2313
2314 // find reader field
2315 // Vref = 3300mV, and an 10:1 voltage divider on the input
2316 // can measure voltages up to 33000 mV
2317 if (cardSTATE == MFEMUL_NOFIELD) {
2318 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2319 if (vHf > MF_MINFIELDV) {
0014cb46 2320 cardSTATE_TO_IDLE();
9ca155ba
M
2321 LED_A_ON();
2322 }
2323 }
d2f487af 2324 if(cardSTATE == MFEMUL_NOFIELD) continue;
9ca155ba 2325
d2f487af 2326 //Now, get data
2327
a501c82b 2328 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
d2f487af 2329 if (res == 2) { //Field is off!
2330 cardSTATE = MFEMUL_NOFIELD;
2331 LEDsoff();
2332 continue;
7bc95e2e 2333 } else if (res == 1) {
2334 break; //return value 1 means button press
2335 }
2336
d2f487af 2337 // REQ or WUP request in ANY state and WUP in HALTED state
2338 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2339 selTimer = GetTickCount();
2340 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2341 cardSTATE = MFEMUL_SELECT1;
2342
2343 // init crypto block
2344 LED_B_OFF();
2345 LED_C_OFF();
2346 crypto1_destroy(pcs);
2347 cardAUTHKEY = 0xff;
2348 continue;
0a39986e 2349 }
7bc95e2e 2350
50193c1e 2351 switch (cardSTATE) {
d2f487af 2352 case MFEMUL_NOFIELD:
2353 case MFEMUL_HALTED:
50193c1e 2354 case MFEMUL_IDLE:{
a501c82b 2355 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
50193c1e
M
2356 break;
2357 }
2358 case MFEMUL_SELECT1:{
9ca155ba
M
2359 // select all
2360 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
d2f487af 2361 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
9ca155ba 2362 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
0014cb46 2363 break;
9ca155ba
M
2364 }
2365
d2f487af 2366 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2367 {
2368 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2369 }
9ca155ba 2370 // select card
0a39986e
M
2371 if (len == 9 &&
2372 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
bfb6a143 2373 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
9ca155ba 2374 cuid = bytes_to_num(rUIDBCC1, 4);
8556b852
M
2375 if (!_7BUID) {
2376 cardSTATE = MFEMUL_WORK;
0014cb46
M
2377 LED_B_ON();
2378 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2379 break;
8556b852
M
2380 } else {
2381 cardSTATE = MFEMUL_SELECT2;
8556b852 2382 }
9ca155ba 2383 }
50193c1e
M
2384 break;
2385 }
d2f487af 2386 case MFEMUL_AUTH1:{
2387 if( len != 8)
2388 {
2389 cardSTATE_TO_IDLE();
a501c82b 2390 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
d2f487af 2391 break;
2392 }
2393 uint32_t ar = bytes_to_num(receivedCmd, 4);
a501c82b 2394 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
d2f487af 2395
2396 //Collect AR/NR
2397 if(ar_nr_collected < 2){
273b57a7 2398 if(ar_nr_responses[2] != ar)
2399 {// Avoid duplicates... probably not necessary, ar should vary.
d2f487af 2400 ar_nr_responses[ar_nr_collected*4] = cuid;
2401 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2402 ar_nr_responses[ar_nr_collected*4+2] = ar;
2403 ar_nr_responses[ar_nr_collected*4+3] = nr;
273b57a7 2404 ar_nr_collected++;
d2f487af 2405 }
2406 }
2407
2408 // --- crypto
2409 crypto1_word(pcs, ar , 1);
2410 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2411
2412 // test if auth OK
2413 if (cardRr != prng_successor(nonce, 64)){
a501c82b 2414 if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2415 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2416 cardRr, prng_successor(nonce, 64));
7bc95e2e 2417 // Shouldn't we respond anything here?
d2f487af 2418 // Right now, we don't nack or anything, which causes the
2419 // reader to do a WUPA after a while. /Martin
b03c0f2d 2420 // -- which is the correct response. /piwi
d2f487af 2421 cardSTATE_TO_IDLE();
a501c82b 2422 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
d2f487af 2423 break;
2424 }
2425
2426 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2427
2428 num_to_bytes(ans, 4, rAUTH_AT);
2429 // --- crypto
2430 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2431 LED_C_ON();
2432 cardSTATE = MFEMUL_WORK;
b03c0f2d 2433 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2434 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2435 GetTickCount() - authTimer);
d2f487af 2436 break;
2437 }
50193c1e 2438 case MFEMUL_SELECT2:{
7bc95e2e 2439 if (!len) {
a501c82b 2440 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 2441 break;
2442 }
8556b852 2443 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
9ca155ba 2444 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
8556b852
M
2445 break;
2446 }
9ca155ba 2447
8556b852
M
2448 // select 2 card
2449 if (len == 9 &&
2450 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2451 EmSendCmd(rSAK, sizeof(rSAK));
8556b852
M
2452 cuid = bytes_to_num(rUIDBCC2, 4);
2453 cardSTATE = MFEMUL_WORK;
2454 LED_B_ON();
0014cb46 2455 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
8556b852
M
2456 break;
2457 }
0014cb46
M
2458
2459 // i guess there is a command). go into the work state.
7bc95e2e 2460 if (len != 4) {
a501c82b 2461 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 2462 break;
2463 }
0014cb46 2464 cardSTATE = MFEMUL_WORK;
d2f487af 2465 //goto lbWORK;
2466 //intentional fall-through to the next case-stmt
50193c1e 2467 }
51969283 2468
7bc95e2e 2469 case MFEMUL_WORK:{
2470 if (len == 0) {
a501c82b 2471 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 2472 break;
2473 }
2474
d2f487af 2475 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2476
7bc95e2e 2477 if(encrypted_data) {
51969283
M
2478 // decrypt seqence
2479 mf_crypto1_decrypt(pcs, receivedCmd, len);
d2f487af 2480 }
7bc95e2e 2481
d2f487af 2482 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2483 authTimer = GetTickCount();
2484 cardAUTHSC = receivedCmd[1] / 4; // received block num
2485 cardAUTHKEY = receivedCmd[0] - 0x60;
2486 crypto1_destroy(pcs);//Added by martin
2487 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
51969283 2488
d2f487af 2489 if (!encrypted_data) { // first authentication
b03c0f2d 2490 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
51969283 2491
d2f487af 2492 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2493 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
7bc95e2e 2494 } else { // nested authentication
b03c0f2d 2495 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
7bc95e2e 2496 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
d2f487af 2497 num_to_bytes(ans, 4, rAUTH_AT);
2498 }
2499 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2500 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2501 cardSTATE = MFEMUL_AUTH1;
2502 break;
51969283 2503 }
7bc95e2e 2504
8f51ddb0
M
2505 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2506 // BUT... ACK --> NACK
2507 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2508 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2509 break;
2510 }
2511
2512 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2513 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2514 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2515 break;
0a39986e
M
2516 }
2517
7bc95e2e 2518 if(len != 4) {
a501c82b 2519 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 2520 break;
2521 }
d2f487af 2522
2523 if(receivedCmd[0] == 0x30 // read block
2524 || receivedCmd[0] == 0xA0 // write block
b03c0f2d 2525 || receivedCmd[0] == 0xC0 // inc
2526 || receivedCmd[0] == 0xC1 // dec
2527 || receivedCmd[0] == 0xC2 // restore
7bc95e2e 2528 || receivedCmd[0] == 0xB0) { // transfer
2529 if (receivedCmd[1] >= 16 * 4) {
d2f487af 2530 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2531 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2532 break;
2533 }
2534
7bc95e2e 2535 if (receivedCmd[1] / 4 != cardAUTHSC) {
8f51ddb0 2536 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
d2f487af 2537 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
8f51ddb0
M
2538 break;
2539 }
d2f487af 2540 }
2541 // read block
2542 if (receivedCmd[0] == 0x30) {
b03c0f2d 2543 if (MF_DBGLEVEL >= 4) {
d2f487af 2544 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2545 }
8f51ddb0
M
2546 emlGetMem(response, receivedCmd[1], 1);
2547 AppendCrc14443a(response, 16);
a501c82b 2548 mf_crypto1_encrypt(pcs, response, 18, response_par);
2549 EmSendCmdPar(response, 18, response_par);
d2f487af 2550 numReads++;
7bc95e2e 2551 if(exitAfterNReads > 0 && numReads == exitAfterNReads) {
d2f487af 2552 Dbprintf("%d reads done, exiting", numReads);
2553 finished = true;
2554 }
0a39986e
M
2555 break;
2556 }
0a39986e 2557 // write block
d2f487af 2558 if (receivedCmd[0] == 0xA0) {
b03c0f2d 2559 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
8f51ddb0 2560 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
8f51ddb0
M
2561 cardSTATE = MFEMUL_WRITEBL2;
2562 cardWRBL = receivedCmd[1];
0a39986e 2563 break;
7bc95e2e 2564 }
0014cb46 2565 // increment, decrement, restore
d2f487af 2566 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
b03c0f2d 2567 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
d2f487af 2568 if (emlCheckValBl(receivedCmd[1])) {
2569 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
0014cb46
M
2570 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2571 break;
2572 }
2573 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2574 if (receivedCmd[0] == 0xC1)
2575 cardSTATE = MFEMUL_INTREG_INC;
2576 if (receivedCmd[0] == 0xC0)
2577 cardSTATE = MFEMUL_INTREG_DEC;
2578 if (receivedCmd[0] == 0xC2)
2579 cardSTATE = MFEMUL_INTREG_REST;
2580 cardWRBL = receivedCmd[1];
0014cb46
M
2581 break;
2582 }
0014cb46 2583 // transfer
d2f487af 2584 if (receivedCmd[0] == 0xB0) {
b03c0f2d 2585 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
0014cb46
M
2586 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2587 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2588 else
2589 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
0014cb46
M
2590 break;
2591 }
9ca155ba 2592 // halt
d2f487af 2593 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
9ca155ba 2594 LED_B_OFF();
0a39986e 2595 LED_C_OFF();
0014cb46
M
2596 cardSTATE = MFEMUL_HALTED;
2597 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
a501c82b 2598 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
0a39986e 2599 break;
9ca155ba 2600 }
d2f487af 2601 // RATS
2602 if (receivedCmd[0] == 0xe0) {//RATS
8f51ddb0
M
2603 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2604 break;
2605 }
d2f487af 2606 // command not allowed
2607 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2608 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
51969283 2609 break;
8f51ddb0
M
2610 }
2611 case MFEMUL_WRITEBL2:{
2612 if (len == 18){
2613 mf_crypto1_decrypt(pcs, receivedCmd, len);
2614 emlSetMem(receivedCmd, cardWRBL, 1);
2615 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2616 cardSTATE = MFEMUL_WORK;
51969283 2617 } else {
0014cb46 2618 cardSTATE_TO_IDLE();
a501c82b 2619 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
8f51ddb0 2620 }
8f51ddb0 2621 break;
50193c1e 2622 }
0014cb46
M
2623
2624 case MFEMUL_INTREG_INC:{
2625 mf_crypto1_decrypt(pcs, receivedCmd, len);
2626 memcpy(&ans, receivedCmd, 4);
2627 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2628 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2629 cardSTATE_TO_IDLE();
2630 break;
7bc95e2e 2631 }
a501c82b 2632 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
0014cb46
M
2633 cardINTREG = cardINTREG + ans;
2634 cardSTATE = MFEMUL_WORK;
2635 break;
2636 }
2637 case MFEMUL_INTREG_DEC:{
2638 mf_crypto1_decrypt(pcs, receivedCmd, len);
2639 memcpy(&ans, receivedCmd, 4);
2640 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2641 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2642 cardSTATE_TO_IDLE();
2643 break;
2644 }
a501c82b 2645 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
0014cb46
M
2646 cardINTREG = cardINTREG - ans;
2647 cardSTATE = MFEMUL_WORK;
2648 break;
2649 }
2650 case MFEMUL_INTREG_REST:{
2651 mf_crypto1_decrypt(pcs, receivedCmd, len);
2652 memcpy(&ans, receivedCmd, 4);
2653 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2654 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2655 cardSTATE_TO_IDLE();
2656 break;
2657 }
a501c82b 2658 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
0014cb46
M
2659 cardSTATE = MFEMUL_WORK;
2660 break;
2661 }
50193c1e 2662 }
50193c1e
M
2663 }
2664
9ca155ba
M
2665 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2666 LEDsoff();
2667
d2f487af 2668 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2669 {
2670 //May just aswell send the collected ar_nr in the response aswell
2671 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4);
2672 }
d714d3ef 2673
d2f487af 2674 if(flags & FLAG_NR_AR_ATTACK)
2675 {
7bc95e2e 2676 if(ar_nr_collected > 1) {
d2f487af 2677 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
d714d3ef 2678 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
d2f487af 2679 ar_nr_responses[0], // UID
2680 ar_nr_responses[1], //NT
2681 ar_nr_responses[2], //AR1
2682 ar_nr_responses[3], //NR1
2683 ar_nr_responses[6], //AR2
2684 ar_nr_responses[7] //NR2
2685 );
7bc95e2e 2686 } else {
d2f487af 2687 Dbprintf("Failed to obtain two AR/NR pairs!");
7bc95e2e 2688 if(ar_nr_collected >0) {
d714d3ef 2689 Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x",
d2f487af 2690 ar_nr_responses[0], // UID
2691 ar_nr_responses[1], //NT
2692 ar_nr_responses[2], //AR1
2693 ar_nr_responses[3] //NR1
2694 );
2695 }
2696 }
2697 }
0014cb46 2698 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
15c4dc5a 2699}
b62a5a84 2700
d2f487af 2701
2702
b62a5a84
M
2703//-----------------------------------------------------------------------------
2704// MIFARE sniffer.
2705//
2706//-----------------------------------------------------------------------------
5cd9ec01
M
2707void RAMFUNC SniffMifare(uint8_t param) {
2708 // param:
2709 // bit 0 - trigger from first card answer
2710 // bit 1 - trigger from first reader 7-bit request
39864b0b
M
2711
2712 // C(red) A(yellow) B(green)
b62a5a84
M
2713 LEDsoff();
2714 // init trace buffer
991f13f2 2715 iso14a_clear_trace();
2716 iso14a_set_tracing(TRUE);
b62a5a84 2717
b62a5a84
M
2718 // The command (reader -> tag) that we're receiving.
2719 // The length of a received command will in most cases be no more than 18 bytes.
2720 // So 32 should be enough!
2721 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
a501c82b 2722 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
b62a5a84 2723 // The response (tag -> reader) that we're receiving.
a501c82b 2724 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET);
2725 uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
2726
b62a5a84
M
2727 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2728 // into trace, along with its length and other annotations.
2729 //uint8_t *trace = (uint8_t *)BigBuf;
2730
2731 // The DMA buffer, used to stream samples from the FPGA
7bc95e2e 2732 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
2733 uint8_t *data = dmaBuf;
2734 uint8_t previous_data = 0;
5cd9ec01
M
2735 int maxDataLen = 0;
2736 int dataLen = 0;
7bc95e2e 2737 bool ReaderIsActive = FALSE;
2738 bool TagIsActive = FALSE;
2739
2740 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
b62a5a84
M
2741
2742 // Set up the demodulator for tag -> reader responses.
a501c82b 2743 DemodInit(receivedResponse, receivedResponsePar);
b62a5a84
M
2744
2745 // Set up the demodulator for the reader -> tag commands
a501c82b 2746 UartInit(receivedCmd, receivedCmdPar);
b62a5a84
M
2747
2748 // Setup for the DMA.
7bc95e2e 2749 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
b62a5a84 2750
b62a5a84 2751 LED_D_OFF();
39864b0b
M
2752
2753 // init sniffer
2754 MfSniffInit();
b62a5a84 2755
b62a5a84 2756 // And now we loop, receiving samples.
7bc95e2e 2757 for(uint32_t sniffCounter = 0; TRUE; ) {
2758
5cd9ec01
M
2759 if(BUTTON_PRESS()) {
2760 DbpString("cancelled by button");
7bc95e2e 2761 break;
5cd9ec01
M
2762 }
2763
b62a5a84
M
2764 LED_A_ON();
2765 WDT_HIT();
39864b0b 2766
7bc95e2e 2767 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2768 // check if a transaction is completed (timeout after 2000ms).
2769 // if yes, stop the DMA transfer and send what we have so far to the client
2770 if (MfSniffSend(2000)) {
2771 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2772 sniffCounter = 0;
2773 data = dmaBuf;
2774 maxDataLen = 0;
2775 ReaderIsActive = FALSE;
2776 TagIsActive = FALSE;
2777 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
39864b0b 2778 }
39864b0b 2779 }
7bc95e2e 2780
2781 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2782 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2783 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2784 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2785 } else {
2786 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
5cd9ec01
M
2787 }
2788 // test for length of buffer
7bc95e2e 2789 if(dataLen > maxDataLen) { // we are more behind than ever...
2790 maxDataLen = dataLen;
5cd9ec01
M
2791 if(dataLen > 400) {
2792 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
7bc95e2e 2793 break;
b62a5a84
M
2794 }
2795 }
5cd9ec01 2796 if(dataLen < 1) continue;
b62a5a84 2797
7bc95e2e 2798 // primary buffer was stopped ( <-- we lost data!
5cd9ec01
M
2799 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2800 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2801 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
55acbb2a 2802 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
5cd9ec01
M
2803 }
2804 // secondary buffer sets as primary, secondary buffer was stopped
2805 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2806 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
b62a5a84
M
2807 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2808 }
5cd9ec01
M
2809
2810 LED_A_OFF();
b62a5a84 2811
7bc95e2e 2812 if (sniffCounter & 0x01) {
b62a5a84 2813
7bc95e2e 2814 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
2815 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
2816 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
2817 LED_C_INV();
a501c82b 2818 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
b62a5a84 2819
7bc95e2e 2820 /* And ready to receive another command. */
2821 UartReset();
2822
2823 /* And also reset the demod code */
2824 DemodReset();
2825 }
2826 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
2827 }
2828
2829 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
2830 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
2831 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
2832 LED_C_INV();
b62a5a84 2833
a501c82b 2834 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
39864b0b 2835
7bc95e2e 2836 // And ready to receive another response.
2837 DemodReset();
2838 }
2839 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
2840 }
b62a5a84
M
2841 }
2842
7bc95e2e 2843 previous_data = *data;
2844 sniffCounter++;
5cd9ec01 2845 data++;
d714d3ef 2846 if(data == dmaBuf + DMA_BUFFER_SIZE) {
5cd9ec01 2847 data = dmaBuf;
b62a5a84 2848 }
7bc95e2e 2849
b62a5a84
M
2850 } // main cycle
2851
2852 DbpString("COMMAND FINISHED");
2853
55acbb2a 2854 FpgaDisableSscDma();
39864b0b
M
2855 MfSniffEnd();
2856
7bc95e2e 2857 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
b62a5a84 2858 LEDsoff();
3803d529 2859}
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