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15c4dc5a | 1 | //----------------------------------------------------------------------------- |
b62a5a84 | 2 | // Merlok - June 2011, 2012 |
15c4dc5a | 3 | // Gerhard de Koning Gans - May 2008 |
534983d7 | 4 | // Hagen Fritsch - June 2010 |
bd20f8f4 | 5 | // |
6 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
7 | // at your option, any later version. See the LICENSE.txt file for the text of | |
8 | // the license. | |
15c4dc5a | 9 | //----------------------------------------------------------------------------- |
bd20f8f4 | 10 | // Routines to support ISO 14443 type A. |
11 | //----------------------------------------------------------------------------- | |
12 | ||
de77d4ac | 13 | #include "iso14443a.h" |
14 | ||
e30c654b | 15 | #include "proxmark3.h" |
15c4dc5a | 16 | #include "apps.h" |
f7e3ed82 | 17 | #include "util.h" |
9ab7a6c7 | 18 | #include "string.h" |
902cb3c0 | 19 | #include "cmd.h" |
15c4dc5a | 20 | #include "iso14443crc.h" |
33443e7c | 21 | #include "crapto1/crapto1.h" |
20f9a2a1 | 22 | #include "mifareutil.h" |
de77d4ac | 23 | #include "mifaresniff.h" |
3000dc4e | 24 | #include "BigBuf.h" |
c872d8c1 | 25 | #include "protocols.h" |
1f065e1d | 26 | #include "parity.h" |
27 | ||
de77d4ac | 28 | typedef struct { |
29 | enum { | |
30 | DEMOD_UNSYNCD, | |
31 | // DEMOD_HALF_SYNCD, | |
32 | // DEMOD_MOD_FIRST_HALF, | |
33 | // DEMOD_NOMOD_FIRST_HALF, | |
34 | DEMOD_MANCHESTER_DATA | |
35 | } state; | |
36 | uint16_t twoBits; | |
37 | uint16_t highCnt; | |
38 | uint16_t bitCount; | |
39 | uint16_t collisionPos; | |
40 | uint16_t syncBit; | |
41 | uint8_t parityBits; | |
42 | uint8_t parityLen; | |
43 | uint16_t shiftReg; | |
44 | uint16_t samples; | |
45 | uint16_t len; | |
46 | uint32_t startTime, endTime; | |
47 | uint8_t *output; | |
48 | uint8_t *parity; | |
49 | } tDemod; | |
50 | ||
51 | typedef enum { | |
52 | MOD_NOMOD = 0, | |
53 | MOD_SECOND_HALF, | |
54 | MOD_FIRST_HALF, | |
55 | MOD_BOTH_HALVES | |
56 | } Modulation_t; | |
57 | ||
58 | typedef struct { | |
59 | enum { | |
60 | STATE_UNSYNCD, | |
61 | STATE_START_OF_COMMUNICATION, | |
62 | STATE_MILLER_X, | |
63 | STATE_MILLER_Y, | |
64 | STATE_MILLER_Z, | |
65 | // DROP_NONE, | |
66 | // DROP_FIRST_HALF, | |
67 | } state; | |
68 | uint16_t shiftReg; | |
69 | int16_t bitCount; | |
70 | uint16_t len; | |
71 | uint16_t byteCntMax; | |
72 | uint16_t posCnt; | |
73 | uint16_t syncBit; | |
74 | uint8_t parityBits; | |
75 | uint8_t parityLen; | |
76 | uint32_t fourBits; | |
77 | uint32_t startTime, endTime; | |
78 | uint8_t *output; | |
79 | uint8_t *parity; | |
80 | } tUart; | |
c872d8c1 | 81 | |
534983d7 | 82 | static uint32_t iso14a_timeout; |
1e262141 | 83 | int rsamples = 0; |
1e262141 | 84 | uint8_t trigger = 0; |
b0127e65 | 85 | // the block number for the ISO14443-4 PCB |
86 | static uint8_t iso14_pcb_blocknum = 0; | |
15c4dc5a | 87 | |
7bc95e2e | 88 | // |
89 | // ISO14443 timing: | |
90 | // | |
91 | // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles | |
92 | #define REQUEST_GUARD_TIME (7000/16 + 1) | |
93 | // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles | |
94 | #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1) | |
de77d4ac | 95 | // bool LastCommandWasRequest = false; |
7bc95e2e | 96 | |
97 | // | |
98 | // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz) | |
99 | // | |
d714d3ef | 100 | // When the PM acts as reader and is receiving tag data, it takes |
101 | // 3 ticks delay in the AD converter | |
102 | // 16 ticks until the modulation detector completes and sets curbit | |
103 | // 8 ticks until bit_to_arm is assigned from curbit | |
104 | // 8*16 ticks for the transfer from FPGA to ARM | |
7bc95e2e | 105 | // 4*16 ticks until we measure the time |
106 | // - 8*16 ticks because we measure the time of the previous transfer | |
d714d3ef | 107 | #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16) |
7bc95e2e | 108 | |
109 | // When the PM acts as a reader and is sending, it takes | |
110 | // 4*16 ticks until we can write data to the sending hold register | |
111 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register | |
112 | // 8 ticks until the first transfer starts | |
113 | // 8 ticks later the FPGA samples the data | |
114 | // 1 tick to assign mod_sig_coil | |
115 | #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1) | |
116 | ||
117 | // When the PM acts as tag and is receiving it takes | |
d714d3ef | 118 | // 2 ticks delay in the RF part (for the first falling edge), |
7bc95e2e | 119 | // 3 ticks for the A/D conversion, |
120 | // 8 ticks on average until the start of the SSC transfer, | |
121 | // 8 ticks until the SSC samples the first data | |
122 | // 7*16 ticks to complete the transfer from FPGA to ARM | |
123 | // 8 ticks until the next ssp_clk rising edge | |
d714d3ef | 124 | // 4*16 ticks until we measure the time |
7bc95e2e | 125 | // - 8*16 ticks because we measure the time of the previous transfer |
d714d3ef | 126 | #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16) |
7bc95e2e | 127 | |
128 | // The FPGA will report its internal sending delay in | |
129 | uint16_t FpgaSendQueueDelay; | |
130 | // the 5 first bits are the number of bits buffered in mod_sig_buf | |
131 | // the last three bits are the remaining ticks/2 after the mod_sig_buf shift | |
132 | #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1) | |
133 | ||
134 | // When the PM acts as tag and is sending, it takes | |
d714d3ef | 135 | // 4*16 ticks until we can write data to the sending hold register |
7bc95e2e | 136 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register |
137 | // 8 ticks until the first transfer starts | |
138 | // 8 ticks later the FPGA samples the data | |
139 | // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf) | |
140 | // + 1 tick to assign mod_sig_coil | |
d714d3ef | 141 | #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1) |
7bc95e2e | 142 | |
143 | // When the PM acts as sniffer and is receiving tag data, it takes | |
144 | // 3 ticks A/D conversion | |
d714d3ef | 145 | // 14 ticks to complete the modulation detection |
146 | // 8 ticks (on average) until the result is stored in to_arm | |
7bc95e2e | 147 | // + the delays in transferring data - which is the same for |
148 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 149 | #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8) |
7bc95e2e | 150 | |
d714d3ef | 151 | // When the PM acts as sniffer and is receiving reader data, it takes |
152 | // 2 ticks delay in analogue RF receiver (for the falling edge of the | |
153 | // start bit, which marks the start of the communication) | |
7bc95e2e | 154 | // 3 ticks A/D conversion |
d714d3ef | 155 | // 8 ticks on average until the data is stored in to_arm. |
7bc95e2e | 156 | // + the delays in transferring data - which is the same for |
157 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 158 | #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8) |
7bc95e2e | 159 | |
160 | //variables used for timing purposes: | |
161 | //these are in ssp_clk cycles: | |
6a1f2d82 | 162 | static uint32_t NextTransferTime; |
163 | static uint32_t LastTimeProxToAirStart; | |
164 | static uint32_t LastProxToAirDuration; | |
7bc95e2e | 165 | |
166 | ||
167 | ||
8f51ddb0 | 168 | // CARD TO READER - manchester |
72934aa3 | 169 | // Sequence D: 11110000 modulation with subcarrier during first half |
170 | // Sequence E: 00001111 modulation with subcarrier during second half | |
171 | // Sequence F: 00000000 no modulation with subcarrier | |
8f51ddb0 | 172 | // READER TO CARD - miller |
72934aa3 | 173 | // Sequence X: 00001100 drop after half a period |
174 | // Sequence Y: 00000000 no drop | |
175 | // Sequence Z: 11000000 drop at start | |
176 | #define SEC_D 0xf0 | |
177 | #define SEC_E 0x0f | |
178 | #define SEC_F 0x00 | |
179 | #define SEC_X 0x0c | |
180 | #define SEC_Y 0x00 | |
181 | #define SEC_Z 0xc0 | |
15c4dc5a | 182 | |
902cb3c0 | 183 | void iso14a_set_trigger(bool enable) { |
534983d7 | 184 | trigger = enable; |
185 | } | |
186 | ||
d19929cb | 187 | |
b0127e65 | 188 | void iso14a_set_timeout(uint32_t timeout) { |
189 | iso14a_timeout = timeout; | |
19a700a8 | 190 | if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106); |
b0127e65 | 191 | } |
8556b852 | 192 | |
19a700a8 | 193 | |
194 | void iso14a_set_ATS_timeout(uint8_t *ats) { | |
195 | ||
196 | uint8_t tb1; | |
197 | uint8_t fwi; | |
198 | uint32_t fwt; | |
199 | ||
200 | if (ats[0] > 1) { // there is a format byte T0 | |
201 | if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1) | |
202 | if ((ats[1] & 0x10) == 0x10) { // there is an interface byte TA(1) preceding TB(1) | |
203 | tb1 = ats[3]; | |
204 | } else { | |
205 | tb1 = ats[2]; | |
206 | } | |
207 | fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI) | |
208 | fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc | |
209 | ||
210 | iso14a_set_timeout(fwt/(8*16)); | |
211 | } | |
212 | } | |
213 | } | |
214 | ||
215 | ||
15c4dc5a | 216 | //----------------------------------------------------------------------------- |
217 | // Generate the parity value for a byte sequence | |
e30c654b | 218 | // |
15c4dc5a | 219 | //----------------------------------------------------------------------------- |
6a1f2d82 | 220 | void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par) |
15c4dc5a | 221 | { |
6a1f2d82 | 222 | uint16_t paritybit_cnt = 0; |
223 | uint16_t paritybyte_cnt = 0; | |
224 | uint8_t parityBits = 0; | |
225 | ||
226 | for (uint16_t i = 0; i < iLen; i++) { | |
227 | // Generate the parity bits | |
1f065e1d | 228 | parityBits |= ((oddparity8(pbtCmd[i])) << (7-paritybit_cnt)); |
6a1f2d82 | 229 | if (paritybit_cnt == 7) { |
230 | par[paritybyte_cnt] = parityBits; // save 8 Bits parity | |
231 | parityBits = 0; // and advance to next Parity Byte | |
232 | paritybyte_cnt++; | |
233 | paritybit_cnt = 0; | |
234 | } else { | |
235 | paritybit_cnt++; | |
236 | } | |
5f6d6c90 | 237 | } |
6a1f2d82 | 238 | |
239 | // save remaining parity bits | |
240 | par[paritybyte_cnt] = parityBits; | |
241 | ||
15c4dc5a | 242 | } |
243 | ||
534983d7 | 244 | void AppendCrc14443a(uint8_t* data, int len) |
15c4dc5a | 245 | { |
5f6d6c90 | 246 | ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1); |
15c4dc5a | 247 | } |
248 | ||
48ece4a7 | 249 | void AppendCrc14443b(uint8_t* data, int len) |
250 | { | |
251 | ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1); | |
252 | } | |
253 | ||
254 | ||
7bc95e2e | 255 | //============================================================================= |
256 | // ISO 14443 Type A - Miller decoder | |
257 | //============================================================================= | |
258 | // Basics: | |
259 | // This decoder is used when the PM3 acts as a tag. | |
260 | // The reader will generate "pauses" by temporarily switching of the field. | |
261 | // At the PM3 antenna we will therefore measure a modulated antenna voltage. | |
262 | // The FPGA does a comparison with a threshold and would deliver e.g.: | |
263 | // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 ....... | |
264 | // The Miller decoder needs to identify the following sequences: | |
265 | // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0") | |
266 | // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information") | |
267 | // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1") | |
268 | // Note 1: the bitstream may start at any time. We therefore need to sync. | |
269 | // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence. | |
15c4dc5a | 270 | //----------------------------------------------------------------------------- |
b62a5a84 | 271 | static tUart Uart; |
15c4dc5a | 272 | |
d7aa3739 | 273 | // Lookup-Table to decide if 4 raw bits are a modulation. |
05ddb52c | 274 | // We accept the following: |
275 | // 0001 - a 3 tick wide pause | |
276 | // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left | |
277 | // 0111 - a 2 tick wide pause shifted left | |
278 | // 1001 - a 2 tick wide pause shifted right | |
d7aa3739 | 279 | const bool Mod_Miller_LUT[] = { |
de77d4ac | 280 | false, true, false, true, false, false, false, true, |
281 | false, true, false, false, false, false, false, false | |
d7aa3739 | 282 | }; |
05ddb52c | 283 | #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4]) |
284 | #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)]) | |
d7aa3739 | 285 | |
7bc95e2e | 286 | void UartReset() |
15c4dc5a | 287 | { |
7bc95e2e | 288 | Uart.state = STATE_UNSYNCD; |
289 | Uart.bitCount = 0; | |
290 | Uart.len = 0; // number of decoded data bytes | |
6a1f2d82 | 291 | Uart.parityLen = 0; // number of decoded parity bytes |
7bc95e2e | 292 | Uart.shiftReg = 0; // shiftreg to hold decoded data bits |
6a1f2d82 | 293 | Uart.parityBits = 0; // holds 8 parity bits |
7bc95e2e | 294 | Uart.startTime = 0; |
295 | Uart.endTime = 0; | |
296 | } | |
15c4dc5a | 297 | |
6a1f2d82 | 298 | void UartInit(uint8_t *data, uint8_t *parity) |
299 | { | |
300 | Uart.output = data; | |
301 | Uart.parity = parity; | |
05ddb52c | 302 | Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits |
6a1f2d82 | 303 | UartReset(); |
304 | } | |
d714d3ef | 305 | |
7bc95e2e | 306 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
307 | static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) | |
308 | { | |
15c4dc5a | 309 | |
ef00343c | 310 | Uart.fourBits = (Uart.fourBits << 8) | bit; |
7bc95e2e | 311 | |
0c8d25eb | 312 | if (Uart.state == STATE_UNSYNCD) { // not yet synced |
3fe4ff4f | 313 | |
ef00343c | 314 | Uart.syncBit = 9999; // not set |
05ddb52c | 315 | // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from |
316 | // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111) | |
317 | // we therefore look for a ...xx11111111111100x11111xxxxxx... pattern | |
318 | // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's) | |
48ece4a7 | 319 | #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00000111 11111111 11101111 10000000 |
320 | #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00000111 11111111 10001111 10000000 | |
05ddb52c | 321 | if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7; |
322 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6; | |
323 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5; | |
324 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4; | |
325 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3; | |
326 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2; | |
327 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1; | |
328 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0; | |
329 | ||
ef00343c | 330 | if (Uart.syncBit != 9999) { // found a sync bit |
331 | Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); | |
332 | Uart.startTime -= Uart.syncBit; | |
333 | Uart.endTime = Uart.startTime; | |
334 | Uart.state = STATE_START_OF_COMMUNICATION; | |
7bc95e2e | 335 | } |
15c4dc5a | 336 | |
7bc95e2e | 337 | } else { |
15c4dc5a | 338 | |
ef00343c | 339 | if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) { |
340 | if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error | |
d7aa3739 | 341 | UartReset(); |
d7aa3739 | 342 | } else { // Modulation in first half = Sequence Z = logic "0" |
7bc95e2e | 343 | if (Uart.state == STATE_MILLER_X) { // error - must not follow after X |
344 | UartReset(); | |
7bc95e2e | 345 | } else { |
346 | Uart.bitCount++; | |
347 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
348 | Uart.state = STATE_MILLER_Z; | |
349 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6; | |
350 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
351 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
352 | Uart.parityBits <<= 1; // make room for the parity bit | |
353 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
354 | Uart.bitCount = 0; | |
355 | Uart.shiftReg = 0; | |
6a1f2d82 | 356 | if((Uart.len&0x0007) == 0) { // every 8 data bytes |
357 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
358 | Uart.parityBits = 0; | |
359 | } | |
15c4dc5a | 360 | } |
7bc95e2e | 361 | } |
d7aa3739 | 362 | } |
363 | } else { | |
ef00343c | 364 | if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1" |
7bc95e2e | 365 | Uart.bitCount++; |
366 | Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg | |
367 | Uart.state = STATE_MILLER_X; | |
368 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2; | |
369 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
370 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
371 | Uart.parityBits <<= 1; // make room for the new parity bit | |
372 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
373 | Uart.bitCount = 0; | |
374 | Uart.shiftReg = 0; | |
6a1f2d82 | 375 | if ((Uart.len&0x0007) == 0) { // every 8 data bytes |
376 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
377 | Uart.parityBits = 0; | |
378 | } | |
7bc95e2e | 379 | } |
d7aa3739 | 380 | } else { // no modulation in both halves - Sequence Y |
7bc95e2e | 381 | if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication |
15c4dc5a | 382 | Uart.state = STATE_UNSYNCD; |
6a1f2d82 | 383 | Uart.bitCount--; // last "0" was part of EOC sequence |
384 | Uart.shiftReg <<= 1; // drop it | |
385 | if(Uart.bitCount > 0) { // if we decoded some bits | |
386 | Uart.shiftReg >>= (9 - Uart.bitCount); // right align them | |
387 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output | |
388 | Uart.parityBits <<= 1; // add a (void) parity bit | |
389 | Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits | |
390 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it | |
de77d4ac | 391 | return true; |
6a1f2d82 | 392 | } else if (Uart.len & 0x0007) { // there are some parity bits to store |
393 | Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits | |
394 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them | |
52bfb955 | 395 | } |
396 | if (Uart.len) { | |
de77d4ac | 397 | return true; // we are finished with decoding the raw data sequence |
52bfb955 | 398 | } else { |
0c8d25eb | 399 | UartReset(); // Nothing received - start over |
7bc95e2e | 400 | } |
15c4dc5a | 401 | } |
7bc95e2e | 402 | if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC |
403 | UartReset(); | |
7bc95e2e | 404 | } else { // a logic "0" |
405 | Uart.bitCount++; | |
406 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
407 | Uart.state = STATE_MILLER_Y; | |
408 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
409 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
410 | Uart.parityBits <<= 1; // make room for the parity bit | |
411 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
412 | Uart.bitCount = 0; | |
413 | Uart.shiftReg = 0; | |
6a1f2d82 | 414 | if ((Uart.len&0x0007) == 0) { // every 8 data bytes |
415 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
416 | Uart.parityBits = 0; | |
417 | } | |
15c4dc5a | 418 | } |
419 | } | |
d7aa3739 | 420 | } |
15c4dc5a | 421 | } |
7bc95e2e | 422 | |
423 | } | |
15c4dc5a | 424 | |
de77d4ac | 425 | return false; // not finished yet, need more data |
15c4dc5a | 426 | } |
427 | ||
7bc95e2e | 428 | |
429 | ||
15c4dc5a | 430 | //============================================================================= |
e691fc45 | 431 | // ISO 14443 Type A - Manchester decoder |
15c4dc5a | 432 | //============================================================================= |
e691fc45 | 433 | // Basics: |
7bc95e2e | 434 | // This decoder is used when the PM3 acts as a reader. |
e691fc45 | 435 | // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage |
436 | // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following: | |
437 | // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ....... | |
438 | // The Manchester decoder needs to identify the following sequences: | |
439 | // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication") | |
440 | // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0 | |
441 | // 8 ticks unmodulated: Sequence F = end of communication | |
442 | // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D | |
7bc95e2e | 443 | // Note 1: the bitstream may start at any time. We therefore need to sync. |
e691fc45 | 444 | // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only) |
b62a5a84 | 445 | static tDemod Demod; |
15c4dc5a | 446 | |
d7aa3739 | 447 | // Lookup-Table to decide if 4 raw bits are a modulation. |
d714d3ef | 448 | // We accept three or four "1" in any position |
7bc95e2e | 449 | const bool Mod_Manchester_LUT[] = { |
de77d4ac | 450 | false, false, false, false, false, false, false, true, |
451 | false, false, false, true, false, true, true, true | |
7bc95e2e | 452 | }; |
453 | ||
454 | #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4]) | |
455 | #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)]) | |
15c4dc5a | 456 | |
2f2d9fc5 | 457 | |
7bc95e2e | 458 | void DemodReset() |
e691fc45 | 459 | { |
7bc95e2e | 460 | Demod.state = DEMOD_UNSYNCD; |
461 | Demod.len = 0; // number of decoded data bytes | |
6a1f2d82 | 462 | Demod.parityLen = 0; |
7bc95e2e | 463 | Demod.shiftReg = 0; // shiftreg to hold decoded data bits |
464 | Demod.parityBits = 0; // | |
465 | Demod.collisionPos = 0; // Position of collision bit | |
466 | Demod.twoBits = 0xffff; // buffer for 2 Bits | |
467 | Demod.highCnt = 0; | |
468 | Demod.startTime = 0; | |
469 | Demod.endTime = 0; | |
e691fc45 | 470 | } |
15c4dc5a | 471 | |
6a1f2d82 | 472 | void DemodInit(uint8_t *data, uint8_t *parity) |
473 | { | |
474 | Demod.output = data; | |
475 | Demod.parity = parity; | |
476 | DemodReset(); | |
477 | } | |
478 | ||
7bc95e2e | 479 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
480 | static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time) | |
e691fc45 | 481 | { |
7bc95e2e | 482 | |
483 | Demod.twoBits = (Demod.twoBits << 8) | bit; | |
e691fc45 | 484 | |
7bc95e2e | 485 | if (Demod.state == DEMOD_UNSYNCD) { |
486 | ||
487 | if (Demod.highCnt < 2) { // wait for a stable unmodulated signal | |
488 | if (Demod.twoBits == 0x0000) { | |
489 | Demod.highCnt++; | |
490 | } else { | |
491 | Demod.highCnt = 0; | |
492 | } | |
493 | } else { | |
494 | Demod.syncBit = 0xFFFF; // not set | |
495 | if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7; | |
496 | else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6; | |
497 | else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5; | |
498 | else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4; | |
499 | else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3; | |
500 | else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2; | |
501 | else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1; | |
502 | else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0; | |
d7aa3739 | 503 | if (Demod.syncBit != 0xFFFF) { |
7bc95e2e | 504 | Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); |
505 | Demod.startTime -= Demod.syncBit; | |
506 | Demod.bitCount = offset; // number of decoded data bits | |
e691fc45 | 507 | Demod.state = DEMOD_MANCHESTER_DATA; |
2f2d9fc5 | 508 | } |
7bc95e2e | 509 | } |
15c4dc5a | 510 | |
7bc95e2e | 511 | } else { |
15c4dc5a | 512 | |
7bc95e2e | 513 | if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half |
514 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision | |
e691fc45 | 515 | if (!Demod.collisionPos) { |
516 | Demod.collisionPos = (Demod.len << 3) + Demod.bitCount; | |
517 | } | |
518 | } // modulation in first half only - Sequence D = 1 | |
7bc95e2e | 519 | Demod.bitCount++; |
520 | Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg | |
521 | if(Demod.bitCount == 9) { // if we decoded a full byte (including parity) | |
e691fc45 | 522 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 523 | Demod.parityBits <<= 1; // make room for the parity bit |
e691fc45 | 524 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
525 | Demod.bitCount = 0; | |
526 | Demod.shiftReg = 0; | |
6a1f2d82 | 527 | if((Demod.len&0x0007) == 0) { // every 8 data bytes |
528 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits | |
529 | Demod.parityBits = 0; | |
530 | } | |
15c4dc5a | 531 | } |
7bc95e2e | 532 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4; |
533 | } else { // no modulation in first half | |
534 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0 | |
e691fc45 | 535 | Demod.bitCount++; |
7bc95e2e | 536 | Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg |
e691fc45 | 537 | if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity) |
e691fc45 | 538 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 539 | Demod.parityBits <<= 1; // make room for the new parity bit |
e691fc45 | 540 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
541 | Demod.bitCount = 0; | |
542 | Demod.shiftReg = 0; | |
6a1f2d82 | 543 | if ((Demod.len&0x0007) == 0) { // every 8 data bytes |
544 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1 | |
545 | Demod.parityBits = 0; | |
546 | } | |
15c4dc5a | 547 | } |
7bc95e2e | 548 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1); |
e691fc45 | 549 | } else { // no modulation in both halves - End of communication |
6a1f2d82 | 550 | if(Demod.bitCount > 0) { // there are some remaining data bits |
551 | Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits | |
552 | Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output | |
553 | Demod.parityBits <<= 1; // add a (void) parity bit | |
554 | Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits | |
555 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
de77d4ac | 556 | return true; |
6a1f2d82 | 557 | } else if (Demod.len & 0x0007) { // there are some parity bits to store |
558 | Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits | |
559 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
52bfb955 | 560 | } |
561 | if (Demod.len) { | |
de77d4ac | 562 | return true; // we are finished with decoding the raw data sequence |
d7aa3739 | 563 | } else { // nothing received. Start over |
564 | DemodReset(); | |
e691fc45 | 565 | } |
15c4dc5a | 566 | } |
7bc95e2e | 567 | } |
e691fc45 | 568 | |
569 | } | |
15c4dc5a | 570 | |
de77d4ac | 571 | return false; // not finished yet, need more data |
15c4dc5a | 572 | } |
573 | ||
574 | //============================================================================= | |
575 | // Finally, a `sniffer' for ISO 14443 Type A | |
576 | // Both sides of communication! | |
577 | //============================================================================= | |
578 | ||
579 | //----------------------------------------------------------------------------- | |
580 | // Record the sequence of commands sent by the reader to the tag, with | |
581 | // triggering so that we start recording at the point that the tag is moved | |
582 | // near the reader. | |
583 | //----------------------------------------------------------------------------- | |
5cd9ec01 M |
584 | void RAMFUNC SnoopIso14443a(uint8_t param) { |
585 | // param: | |
586 | // bit 0 - trigger from first card answer | |
587 | // bit 1 - trigger from first reader 7-bit request | |
588 | ||
589 | LEDsoff(); | |
5cd9ec01 | 590 | |
09ffd16e | 591 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); |
592 | ||
f71f4deb | 593 | // Allocate memory from BigBuf for some buffers |
594 | // free all previous allocations first | |
595 | BigBuf_free(); | |
596 | ||
5cd9ec01 | 597 | // The command (reader -> tag) that we're receiving. |
f71f4deb | 598 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); |
599 | uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE); | |
6a1f2d82 | 600 | |
5cd9ec01 | 601 | // The response (tag -> reader) that we're receiving. |
f71f4deb | 602 | uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE); |
603 | uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE); | |
5cd9ec01 M |
604 | |
605 | // The DMA buffer, used to stream samples from the FPGA | |
f71f4deb | 606 | uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE); |
607 | ||
608 | // init trace buffer | |
3000dc4e | 609 | clear_trace(); |
de77d4ac | 610 | set_tracing(true); |
f71f4deb | 611 | |
7bc95e2e | 612 | uint8_t *data = dmaBuf; |
613 | uint8_t previous_data = 0; | |
5cd9ec01 M |
614 | int maxDataLen = 0; |
615 | int dataLen = 0; | |
de77d4ac | 616 | bool TagIsActive = false; |
617 | bool ReaderIsActive = false; | |
7bc95e2e | 618 | |
5cd9ec01 | 619 | // Set up the demodulator for tag -> reader responses. |
6a1f2d82 | 620 | DemodInit(receivedResponse, receivedResponsePar); |
621 | ||
5cd9ec01 | 622 | // Set up the demodulator for the reader -> tag commands |
6a1f2d82 | 623 | UartInit(receivedCmd, receivedCmdPar); |
624 | ||
7bc95e2e | 625 | // Setup and start DMA. |
5cd9ec01 | 626 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); |
7bc95e2e | 627 | |
09ffd16e | 628 | // We won't start recording the frames that we acquire until we trigger; |
629 | // a good trigger condition to get started is probably when we see a | |
630 | // response from the tag. | |
de77d4ac | 631 | // triggered == false -- to wait first for card |
09ffd16e | 632 | bool triggered = !(param & 0x03); |
633 | ||
5cd9ec01 | 634 | // And now we loop, receiving samples. |
de77d4ac | 635 | for(uint32_t rsamples = 0; true; ) { |
7bc95e2e | 636 | |
5cd9ec01 M |
637 | if(BUTTON_PRESS()) { |
638 | DbpString("cancelled by button"); | |
7bc95e2e | 639 | break; |
5cd9ec01 | 640 | } |
15c4dc5a | 641 | |
5cd9ec01 M |
642 | LED_A_ON(); |
643 | WDT_HIT(); | |
15c4dc5a | 644 | |
5cd9ec01 M |
645 | int register readBufDataP = data - dmaBuf; |
646 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; | |
647 | if (readBufDataP <= dmaBufDataP){ | |
648 | dataLen = dmaBufDataP - readBufDataP; | |
649 | } else { | |
7bc95e2e | 650 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; |
5cd9ec01 M |
651 | } |
652 | // test for length of buffer | |
653 | if(dataLen > maxDataLen) { | |
654 | maxDataLen = dataLen; | |
f71f4deb | 655 | if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) { |
7bc95e2e | 656 | Dbprintf("blew circular buffer! dataLen=%d", dataLen); |
657 | break; | |
5cd9ec01 M |
658 | } |
659 | } | |
660 | if(dataLen < 1) continue; | |
661 | ||
662 | // primary buffer was stopped( <-- we lost data! | |
663 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { | |
664 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
665 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
7bc95e2e | 666 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
667 | } |
668 | // secondary buffer sets as primary, secondary buffer was stopped | |
669 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
670 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
671 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; | |
672 | } | |
673 | ||
674 | LED_A_OFF(); | |
7bc95e2e | 675 | |
676 | if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder | |
3be2a5ae | 677 | |
7bc95e2e | 678 | if(!TagIsActive) { // no need to try decoding reader data if the tag is sending |
679 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); | |
680 | if (MillerDecoding(readerdata, (rsamples-1)*4)) { | |
681 | LED_C_ON(); | |
5cd9ec01 | 682 | |
7bc95e2e | 683 | // check - if there is a short 7bit request from reader |
de77d4ac | 684 | if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = true; |
5cd9ec01 | 685 | |
7bc95e2e | 686 | if(triggered) { |
6a1f2d82 | 687 | if (!LogTrace(receivedCmd, |
688 | Uart.len, | |
689 | Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
690 | Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
691 | Uart.parity, | |
de77d4ac | 692 | true)) break; |
7bc95e2e | 693 | } |
694 | /* And ready to receive another command. */ | |
48ece4a7 | 695 | UartReset(); |
7bc95e2e | 696 | /* And also reset the demod code, which might have been */ |
697 | /* false-triggered by the commands from the reader. */ | |
698 | DemodReset(); | |
699 | LED_B_OFF(); | |
700 | } | |
701 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
5cd9ec01 | 702 | } |
3be2a5ae | 703 | |
7bc95e2e | 704 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time |
705 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); | |
706 | if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) { | |
707 | LED_B_ON(); | |
5cd9ec01 | 708 | |
6a1f2d82 | 709 | if (!LogTrace(receivedResponse, |
710 | Demod.len, | |
711 | Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
712 | Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
713 | Demod.parity, | |
de77d4ac | 714 | false)) break; |
5cd9ec01 | 715 | |
de77d4ac | 716 | if ((!triggered) && (param & 0x01)) triggered = true; |
5cd9ec01 | 717 | |
7bc95e2e | 718 | // And ready to receive another response. |
719 | DemodReset(); | |
48ece4a7 | 720 | // And reset the Miller decoder including itS (now outdated) input buffer |
721 | UartInit(receivedCmd, receivedCmdPar); | |
722 | ||
7bc95e2e | 723 | LED_C_OFF(); |
724 | } | |
725 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
726 | } | |
5cd9ec01 M |
727 | } |
728 | ||
7bc95e2e | 729 | previous_data = *data; |
730 | rsamples++; | |
5cd9ec01 | 731 | data++; |
d714d3ef | 732 | if(data == dmaBuf + DMA_BUFFER_SIZE) { |
5cd9ec01 M |
733 | data = dmaBuf; |
734 | } | |
735 | } // main cycle | |
736 | ||
737 | DbpString("COMMAND FINISHED"); | |
15c4dc5a | 738 | |
7bc95e2e | 739 | FpgaDisableSscDma(); |
740 | Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len); | |
3000dc4e | 741 | Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]); |
5cd9ec01 | 742 | LEDsoff(); |
15c4dc5a | 743 | } |
744 | ||
15c4dc5a | 745 | //----------------------------------------------------------------------------- |
746 | // Prepare tag messages | |
747 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 748 | static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity) |
15c4dc5a | 749 | { |
8f51ddb0 | 750 | ToSendReset(); |
15c4dc5a | 751 | |
752 | // Correction bit, might be removed when not needed | |
753 | ToSendStuffBit(0); | |
754 | ToSendStuffBit(0); | |
755 | ToSendStuffBit(0); | |
756 | ToSendStuffBit(0); | |
757 | ToSendStuffBit(1); // 1 | |
758 | ToSendStuffBit(0); | |
759 | ToSendStuffBit(0); | |
760 | ToSendStuffBit(0); | |
8f51ddb0 | 761 | |
15c4dc5a | 762 | // Send startbit |
72934aa3 | 763 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 764 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 765 | |
6a1f2d82 | 766 | for(uint16_t i = 0; i < len; i++) { |
8f51ddb0 | 767 | uint8_t b = cmd[i]; |
15c4dc5a | 768 | |
769 | // Data bits | |
6a1f2d82 | 770 | for(uint16_t j = 0; j < 8; j++) { |
15c4dc5a | 771 | if(b & 1) { |
72934aa3 | 772 | ToSend[++ToSendMax] = SEC_D; |
15c4dc5a | 773 | } else { |
72934aa3 | 774 | ToSend[++ToSendMax] = SEC_E; |
8f51ddb0 M |
775 | } |
776 | b >>= 1; | |
777 | } | |
15c4dc5a | 778 | |
0014cb46 | 779 | // Get the parity bit |
6a1f2d82 | 780 | if (parity[i>>3] & (0x80>>(i&0x0007))) { |
8f51ddb0 | 781 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 782 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 783 | } else { |
72934aa3 | 784 | ToSend[++ToSendMax] = SEC_E; |
7bc95e2e | 785 | LastProxToAirDuration = 8 * ToSendMax; |
15c4dc5a | 786 | } |
8f51ddb0 | 787 | } |
15c4dc5a | 788 | |
8f51ddb0 M |
789 | // Send stopbit |
790 | ToSend[++ToSendMax] = SEC_F; | |
15c4dc5a | 791 | |
8f51ddb0 M |
792 | // Convert from last byte pos to length |
793 | ToSendMax++; | |
8f51ddb0 M |
794 | } |
795 | ||
6a1f2d82 | 796 | static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len) |
797 | { | |
798 | uint8_t par[MAX_PARITY_SIZE]; | |
799 | ||
800 | GetParity(cmd, len, par); | |
801 | CodeIso14443aAsTagPar(cmd, len, par); | |
15c4dc5a | 802 | } |
803 | ||
15c4dc5a | 804 | |
8f51ddb0 M |
805 | static void Code4bitAnswerAsTag(uint8_t cmd) |
806 | { | |
807 | int i; | |
808 | ||
5f6d6c90 | 809 | ToSendReset(); |
8f51ddb0 M |
810 | |
811 | // Correction bit, might be removed when not needed | |
812 | ToSendStuffBit(0); | |
813 | ToSendStuffBit(0); | |
814 | ToSendStuffBit(0); | |
815 | ToSendStuffBit(0); | |
816 | ToSendStuffBit(1); // 1 | |
817 | ToSendStuffBit(0); | |
818 | ToSendStuffBit(0); | |
819 | ToSendStuffBit(0); | |
820 | ||
821 | // Send startbit | |
822 | ToSend[++ToSendMax] = SEC_D; | |
823 | ||
824 | uint8_t b = cmd; | |
825 | for(i = 0; i < 4; i++) { | |
826 | if(b & 1) { | |
827 | ToSend[++ToSendMax] = SEC_D; | |
7bc95e2e | 828 | LastProxToAirDuration = 8 * ToSendMax - 4; |
8f51ddb0 M |
829 | } else { |
830 | ToSend[++ToSendMax] = SEC_E; | |
7bc95e2e | 831 | LastProxToAirDuration = 8 * ToSendMax; |
8f51ddb0 M |
832 | } |
833 | b >>= 1; | |
834 | } | |
835 | ||
836 | // Send stopbit | |
837 | ToSend[++ToSendMax] = SEC_F; | |
838 | ||
5f6d6c90 | 839 | // Convert from last byte pos to length |
840 | ToSendMax++; | |
15c4dc5a | 841 | } |
842 | ||
843 | //----------------------------------------------------------------------------- | |
844 | // Wait for commands from reader | |
845 | // Stop when button is pressed | |
de77d4ac | 846 | // Or return true when command is captured |
15c4dc5a | 847 | //----------------------------------------------------------------------------- |
6a1f2d82 | 848 | static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len) |
15c4dc5a | 849 | { |
850 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
851 | // only, since we are receiving, not transmitting). | |
852 | // Signal field is off with the appropriate LED | |
853 | LED_D_OFF(); | |
854 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
855 | ||
856 | // Now run a `software UART' on the stream of incoming samples. | |
6a1f2d82 | 857 | UartInit(received, parity); |
7bc95e2e | 858 | |
859 | // clear RXRDY: | |
860 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
15c4dc5a | 861 | |
862 | for(;;) { | |
863 | WDT_HIT(); | |
864 | ||
de77d4ac | 865 | if(BUTTON_PRESS()) return false; |
7bc95e2e | 866 | |
15c4dc5a | 867 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
7bc95e2e | 868 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
869 | if(MillerDecoding(b, 0)) { | |
870 | *len = Uart.len; | |
de77d4ac | 871 | return true; |
15c4dc5a | 872 | } |
7bc95e2e | 873 | } |
15c4dc5a | 874 | } |
875 | } | |
28afbd2b | 876 | |
6a1f2d82 | 877 | static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded); |
7bc95e2e | 878 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded); |
28afbd2b | 879 | int EmSend4bit(uint8_t resp); |
6a1f2d82 | 880 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par); |
881 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded); | |
882 | int EmSendCmd(uint8_t *resp, uint16_t respLen); | |
883 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par); | |
884 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, | |
885 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity); | |
15c4dc5a | 886 | |
117d9ec2 | 887 | static uint8_t* free_buffer_pointer; |
ce02f6f9 | 888 | |
889 | typedef struct { | |
890 | uint8_t* response; | |
891 | size_t response_n; | |
892 | uint8_t* modulation; | |
893 | size_t modulation_n; | |
7bc95e2e | 894 | uint32_t ProxToAirDuration; |
ce02f6f9 | 895 | } tag_response_info_t; |
896 | ||
ce02f6f9 | 897 | bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) { |
7bc95e2e | 898 | // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes |
ce02f6f9 | 899 | // This will need the following byte array for a modulation sequence |
900 | // 144 data bits (18 * 8) | |
901 | // 18 parity bits | |
902 | // 2 Start and stop | |
903 | // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA) | |
904 | // 1 just for the case | |
905 | // ----------- + | |
906 | // 166 bytes, since every bit that needs to be send costs us a byte | |
907 | // | |
f71f4deb | 908 | |
909 | ||
ce02f6f9 | 910 | // Prepare the tag modulation bits from the message |
911 | CodeIso14443aAsTag(response_info->response,response_info->response_n); | |
912 | ||
913 | // Make sure we do not exceed the free buffer space | |
914 | if (ToSendMax > max_buffer_size) { | |
915 | Dbprintf("Out of memory, when modulating bits for tag answer:"); | |
916 | Dbhexdump(response_info->response_n,response_info->response,false); | |
917 | return false; | |
918 | } | |
919 | ||
920 | // Copy the byte array, used for this modulation to the buffer position | |
921 | memcpy(response_info->modulation,ToSend,ToSendMax); | |
922 | ||
7bc95e2e | 923 | // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them |
ce02f6f9 | 924 | response_info->modulation_n = ToSendMax; |
7bc95e2e | 925 | response_info->ProxToAirDuration = LastProxToAirDuration; |
ce02f6f9 | 926 | |
927 | return true; | |
928 | } | |
929 | ||
f71f4deb | 930 | |
931 | // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit. | |
932 | // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction) | |
933 | // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits | |
934 | // -> need 273 bytes buffer | |
935 | #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 273 | |
936 | ||
ce02f6f9 | 937 | bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) { |
938 | // Retrieve and store the current buffer index | |
939 | response_info->modulation = free_buffer_pointer; | |
940 | ||
941 | // Determine the maximum size we can use from our buffer | |
f71f4deb | 942 | size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE; |
ce02f6f9 | 943 | |
944 | // Forward the prepare tag modulation function to the inner function | |
f71f4deb | 945 | if (prepare_tag_modulation(response_info, max_buffer_size)) { |
ce02f6f9 | 946 | // Update the free buffer offset |
947 | free_buffer_pointer += ToSendMax; | |
948 | return true; | |
949 | } else { | |
950 | return false; | |
951 | } | |
952 | } | |
953 | ||
15c4dc5a | 954 | //----------------------------------------------------------------------------- |
955 | // Main loop of simulated tag: receive commands from reader, decide what | |
956 | // response to send, and send it. | |
957 | //----------------------------------------------------------------------------- | |
28afbd2b | 958 | void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data) |
15c4dc5a | 959 | { |
81cd0474 | 960 | uint8_t sak; |
961 | ||
962 | // The first response contains the ATQA (note: bytes are transmitted in reverse order). | |
963 | uint8_t response1[2]; | |
964 | ||
965 | switch (tagType) { | |
966 | case 1: { // MIFARE Classic | |
967 | // Says: I am Mifare 1k - original line | |
968 | response1[0] = 0x04; | |
969 | response1[1] = 0x00; | |
970 | sak = 0x08; | |
971 | } break; | |
972 | case 2: { // MIFARE Ultralight | |
973 | // Says: I am a stupid memory tag, no crypto | |
974 | response1[0] = 0x04; | |
975 | response1[1] = 0x00; | |
976 | sak = 0x00; | |
977 | } break; | |
978 | case 3: { // MIFARE DESFire | |
979 | // Says: I am a DESFire tag, ph33r me | |
980 | response1[0] = 0x04; | |
981 | response1[1] = 0x03; | |
982 | sak = 0x20; | |
983 | } break; | |
984 | case 4: { // ISO/IEC 14443-4 | |
985 | // Says: I am a javacard (JCOP) | |
986 | response1[0] = 0x04; | |
987 | response1[1] = 0x00; | |
988 | sak = 0x28; | |
989 | } break; | |
3fe4ff4f | 990 | case 5: { // MIFARE TNP3XXX |
991 | // Says: I am a toy | |
992 | response1[0] = 0x01; | |
993 | response1[1] = 0x0f; | |
994 | sak = 0x01; | |
995 | } break; | |
81cd0474 | 996 | default: { |
997 | Dbprintf("Error: unkown tagtype (%d)",tagType); | |
998 | return; | |
999 | } break; | |
1000 | } | |
1001 | ||
1002 | // The second response contains the (mandatory) first 24 bits of the UID | |
c8b6da22 | 1003 | uint8_t response2[5] = {0x00}; |
81cd0474 | 1004 | |
1005 | // Check if the uid uses the (optional) part | |
c8b6da22 | 1006 | uint8_t response2a[5] = {0x00}; |
1007 | ||
81cd0474 | 1008 | if (uid_2nd) { |
1009 | response2[0] = 0x88; | |
1010 | num_to_bytes(uid_1st,3,response2+1); | |
1011 | num_to_bytes(uid_2nd,4,response2a); | |
1012 | response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3]; | |
1013 | ||
1014 | // Configure the ATQA and SAK accordingly | |
1015 | response1[0] |= 0x40; | |
1016 | sak |= 0x04; | |
1017 | } else { | |
1018 | num_to_bytes(uid_1st,4,response2); | |
1019 | // Configure the ATQA and SAK accordingly | |
1020 | response1[0] &= 0xBF; | |
1021 | sak &= 0xFB; | |
1022 | } | |
1023 | ||
1024 | // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID. | |
1025 | response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3]; | |
1026 | ||
1027 | // Prepare the mandatory SAK (for 4 and 7 byte UID) | |
c8b6da22 | 1028 | uint8_t response3[3] = {0x00}; |
81cd0474 | 1029 | response3[0] = sak; |
1030 | ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]); | |
1031 | ||
1032 | // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit | |
c8b6da22 | 1033 | uint8_t response3a[3] = {0x00}; |
81cd0474 | 1034 | response3a[0] = sak & 0xFB; |
1035 | ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]); | |
1036 | ||
254b70a4 | 1037 | uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce |
6a1f2d82 | 1038 | uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS: |
1039 | // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present, | |
1040 | // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1 | |
1041 | // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us) | |
1042 | // TC(1) = 0x02: CID supported, NAD not supported | |
ce02f6f9 | 1043 | ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]); |
1044 | ||
7bc95e2e | 1045 | #define TAG_RESPONSE_COUNT 7 |
1046 | tag_response_info_t responses[TAG_RESPONSE_COUNT] = { | |
1047 | { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type | |
1048 | { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid | |
1049 | { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked | |
1050 | { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1 | |
1051 | { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2 | |
1052 | { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce) | |
1053 | { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS | |
1054 | }; | |
1055 | ||
1056 | // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it | |
1057 | // Such a response is less time critical, so we can prepare them on the fly | |
1058 | #define DYNAMIC_RESPONSE_BUFFER_SIZE 64 | |
1059 | #define DYNAMIC_MODULATION_BUFFER_SIZE 512 | |
1060 | uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE]; | |
1061 | uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE]; | |
1062 | tag_response_info_t dynamic_response_info = { | |
1063 | .response = dynamic_response_buffer, | |
1064 | .response_n = 0, | |
1065 | .modulation = dynamic_modulation_buffer, | |
1066 | .modulation_n = 0 | |
1067 | }; | |
ce02f6f9 | 1068 | |
09ffd16e | 1069 | // We need to listen to the high-frequency, peak-detected path. |
1070 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1071 | ||
f71f4deb | 1072 | BigBuf_free_keep_EM(); |
1073 | ||
1074 | // allocate buffers: | |
1075 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); | |
1076 | uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE); | |
1077 | free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE); | |
1078 | ||
1079 | // clear trace | |
3000dc4e | 1080 | clear_trace(); |
de77d4ac | 1081 | set_tracing(true); |
f71f4deb | 1082 | |
7bc95e2e | 1083 | // Prepare the responses of the anticollision phase |
ce02f6f9 | 1084 | // there will be not enough time to do this at the moment the reader sends it REQA |
7bc95e2e | 1085 | for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) { |
1086 | prepare_allocated_tag_modulation(&responses[i]); | |
1087 | } | |
15c4dc5a | 1088 | |
7bc95e2e | 1089 | int len = 0; |
15c4dc5a | 1090 | |
1091 | // To control where we are in the protocol | |
1092 | int order = 0; | |
1093 | int lastorder; | |
1094 | ||
1095 | // Just to allow some checks | |
1096 | int happened = 0; | |
1097 | int happened2 = 0; | |
81cd0474 | 1098 | int cmdsRecvd = 0; |
15c4dc5a | 1099 | |
254b70a4 | 1100 | cmdsRecvd = 0; |
7bc95e2e | 1101 | tag_response_info_t* p_response; |
15c4dc5a | 1102 | |
254b70a4 | 1103 | LED_A_ON(); |
1104 | for(;;) { | |
7bc95e2e | 1105 | // Clean receive command buffer |
6a1f2d82 | 1106 | if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) { |
ce02f6f9 | 1107 | DbpString("Button press"); |
254b70a4 | 1108 | break; |
1109 | } | |
7bc95e2e | 1110 | |
1111 | p_response = NULL; | |
1112 | ||
254b70a4 | 1113 | // Okay, look at the command now. |
1114 | lastorder = order; | |
1115 | if(receivedCmd[0] == 0x26) { // Received a REQUEST | |
ce02f6f9 | 1116 | p_response = &responses[0]; order = 1; |
254b70a4 | 1117 | } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP |
ce02f6f9 | 1118 | p_response = &responses[0]; order = 6; |
254b70a4 | 1119 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1) |
ce02f6f9 | 1120 | p_response = &responses[1]; order = 2; |
6a1f2d82 | 1121 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2) |
ce02f6f9 | 1122 | p_response = &responses[2]; order = 20; |
254b70a4 | 1123 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1) |
ce02f6f9 | 1124 | p_response = &responses[3]; order = 3; |
254b70a4 | 1125 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2) |
ce02f6f9 | 1126 | p_response = &responses[4]; order = 30; |
254b70a4 | 1127 | } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ |
6a1f2d82 | 1128 | EmSendCmdEx(data+(4*receivedCmd[1]),16,false); |
7bc95e2e | 1129 | // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]); |
5f6d6c90 | 1130 | // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below |
7bc95e2e | 1131 | p_response = NULL; |
254b70a4 | 1132 | } else if(receivedCmd[0] == 0x50) { // Received a HALT |
3fe4ff4f | 1133 | |
7bc95e2e | 1134 | if (tracing) { |
de77d4ac | 1135 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
7bc95e2e | 1136 | } |
1137 | p_response = NULL; | |
254b70a4 | 1138 | } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request |
ce02f6f9 | 1139 | p_response = &responses[5]; order = 7; |
254b70a4 | 1140 | } else if(receivedCmd[0] == 0xE0) { // Received a RATS request |
7bc95e2e | 1141 | if (tagType == 1 || tagType == 2) { // RATS not supported |
1142 | EmSend4bit(CARD_NACK_NA); | |
1143 | p_response = NULL; | |
1144 | } else { | |
1145 | p_response = &responses[6]; order = 70; | |
1146 | } | |
6a1f2d82 | 1147 | } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication) |
7bc95e2e | 1148 | if (tracing) { |
de77d4ac | 1149 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
7bc95e2e | 1150 | } |
1151 | uint32_t nr = bytes_to_num(receivedCmd,4); | |
1152 | uint32_t ar = bytes_to_num(receivedCmd+4,4); | |
1153 | Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar); | |
1154 | } else { | |
1155 | // Check for ISO 14443A-4 compliant commands, look at left nibble | |
1156 | switch (receivedCmd[0]) { | |
1157 | ||
1158 | case 0x0B: | |
1159 | case 0x0A: { // IBlock (command) | |
1160 | dynamic_response_info.response[0] = receivedCmd[0]; | |
1161 | dynamic_response_info.response[1] = 0x00; | |
1162 | dynamic_response_info.response[2] = 0x90; | |
1163 | dynamic_response_info.response[3] = 0x00; | |
1164 | dynamic_response_info.response_n = 4; | |
1165 | } break; | |
1166 | ||
1167 | case 0x1A: | |
1168 | case 0x1B: { // Chaining command | |
1169 | dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1); | |
1170 | dynamic_response_info.response_n = 2; | |
1171 | } break; | |
1172 | ||
1173 | case 0xaa: | |
1174 | case 0xbb: { | |
1175 | dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11; | |
1176 | dynamic_response_info.response_n = 2; | |
1177 | } break; | |
1178 | ||
1179 | case 0xBA: { // | |
1180 | memcpy(dynamic_response_info.response,"\xAB\x00",2); | |
1181 | dynamic_response_info.response_n = 2; | |
1182 | } break; | |
1183 | ||
1184 | case 0xCA: | |
1185 | case 0xC2: { // Readers sends deselect command | |
1186 | memcpy(dynamic_response_info.response,"\xCA\x00",2); | |
1187 | dynamic_response_info.response_n = 2; | |
1188 | } break; | |
1189 | ||
1190 | default: { | |
1191 | // Never seen this command before | |
1192 | if (tracing) { | |
de77d4ac | 1193 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
7bc95e2e | 1194 | } |
1195 | Dbprintf("Received unknown command (len=%d):",len); | |
1196 | Dbhexdump(len,receivedCmd,false); | |
1197 | // Do not respond | |
1198 | dynamic_response_info.response_n = 0; | |
1199 | } break; | |
1200 | } | |
ce02f6f9 | 1201 | |
7bc95e2e | 1202 | if (dynamic_response_info.response_n > 0) { |
1203 | // Copy the CID from the reader query | |
1204 | dynamic_response_info.response[1] = receivedCmd[1]; | |
ce02f6f9 | 1205 | |
7bc95e2e | 1206 | // Add CRC bytes, always used in ISO 14443A-4 compliant cards |
1207 | AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n); | |
1208 | dynamic_response_info.response_n += 2; | |
ce02f6f9 | 1209 | |
7bc95e2e | 1210 | if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) { |
1211 | Dbprintf("Error preparing tag response"); | |
1212 | if (tracing) { | |
de77d4ac | 1213 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
7bc95e2e | 1214 | } |
1215 | break; | |
1216 | } | |
1217 | p_response = &dynamic_response_info; | |
1218 | } | |
81cd0474 | 1219 | } |
15c4dc5a | 1220 | |
1221 | // Count number of wakeups received after a halt | |
1222 | if(order == 6 && lastorder == 5) { happened++; } | |
1223 | ||
1224 | // Count number of other messages after a halt | |
1225 | if(order != 6 && lastorder == 5) { happened2++; } | |
1226 | ||
15c4dc5a | 1227 | if(cmdsRecvd > 999) { |
1228 | DbpString("1000 commands later..."); | |
254b70a4 | 1229 | break; |
15c4dc5a | 1230 | } |
ce02f6f9 | 1231 | cmdsRecvd++; |
1232 | ||
1233 | if (p_response != NULL) { | |
7bc95e2e | 1234 | EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52); |
1235 | // do the tracing for the previous reader request and this tag answer: | |
6a1f2d82 | 1236 | uint8_t par[MAX_PARITY_SIZE]; |
1237 | GetParity(p_response->response, p_response->response_n, par); | |
3fe4ff4f | 1238 | |
7bc95e2e | 1239 | EmLogTrace(Uart.output, |
1240 | Uart.len, | |
1241 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1242 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1243 | Uart.parity, |
7bc95e2e | 1244 | p_response->response, |
1245 | p_response->response_n, | |
1246 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1247 | (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1248 | par); |
7bc95e2e | 1249 | } |
1250 | ||
1251 | if (!tracing) { | |
1252 | Dbprintf("Trace Full. Simulation stopped."); | |
1253 | break; | |
1254 | } | |
1255 | } | |
15c4dc5a | 1256 | |
1257 | Dbprintf("%x %x %x", happened, happened2, cmdsRecvd); | |
1258 | LED_A_OFF(); | |
f71f4deb | 1259 | BigBuf_free_keep_EM(); |
15c4dc5a | 1260 | } |
1261 | ||
9492e0b0 | 1262 | |
1263 | // prepare a delayed transfer. This simply shifts ToSend[] by a number | |
1264 | // of bits specified in the delay parameter. | |
1265 | void PrepareDelayedTransfer(uint16_t delay) | |
1266 | { | |
1267 | uint8_t bitmask = 0; | |
1268 | uint8_t bits_to_shift = 0; | |
1269 | uint8_t bits_shifted = 0; | |
1270 | ||
1271 | delay &= 0x07; | |
1272 | if (delay) { | |
1273 | for (uint16_t i = 0; i < delay; i++) { | |
1274 | bitmask |= (0x01 << i); | |
1275 | } | |
7bc95e2e | 1276 | ToSend[ToSendMax++] = 0x00; |
9492e0b0 | 1277 | for (uint16_t i = 0; i < ToSendMax; i++) { |
1278 | bits_to_shift = ToSend[i] & bitmask; | |
1279 | ToSend[i] = ToSend[i] >> delay; | |
1280 | ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay)); | |
1281 | bits_shifted = bits_to_shift; | |
1282 | } | |
1283 | } | |
1284 | } | |
1285 | ||
7bc95e2e | 1286 | |
1287 | //------------------------------------------------------------------------------------- | |
15c4dc5a | 1288 | // Transmit the command (to the tag) that was placed in ToSend[]. |
9492e0b0 | 1289 | // Parameter timing: |
7bc95e2e | 1290 | // if NULL: transfer at next possible time, taking into account |
1291 | // request guard time and frame delay time | |
1292 | // if == 0: transfer immediately and return time of transfer | |
9492e0b0 | 1293 | // if != 0: delay transfer until time specified |
7bc95e2e | 1294 | //------------------------------------------------------------------------------------- |
6a1f2d82 | 1295 | static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing) |
15c4dc5a | 1296 | { |
7bc95e2e | 1297 | |
9492e0b0 | 1298 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD); |
e30c654b | 1299 | |
7bc95e2e | 1300 | uint32_t ThisTransferTime = 0; |
e30c654b | 1301 | |
9492e0b0 | 1302 | if (timing) { |
1303 | if(*timing == 0) { // Measure time | |
7bc95e2e | 1304 | *timing = (GetCountSspClk() + 8) & 0xfffffff8; |
9492e0b0 | 1305 | } else { |
1306 | PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks) | |
1307 | } | |
7bc95e2e | 1308 | if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing"); |
1309 | while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks) | |
1310 | LastTimeProxToAirStart = *timing; | |
1311 | } else { | |
1312 | ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8); | |
1313 | while(GetCountSspClk() < ThisTransferTime); | |
1314 | LastTimeProxToAirStart = ThisTransferTime; | |
9492e0b0 | 1315 | } |
1316 | ||
7bc95e2e | 1317 | // clear TXRDY |
1318 | AT91C_BASE_SSC->SSC_THR = SEC_Y; | |
1319 | ||
7bc95e2e | 1320 | uint16_t c = 0; |
9492e0b0 | 1321 | for(;;) { |
1322 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1323 | AT91C_BASE_SSC->SSC_THR = cmd[c]; | |
1324 | c++; | |
1325 | if(c >= len) { | |
1326 | break; | |
1327 | } | |
1328 | } | |
1329 | } | |
7bc95e2e | 1330 | |
1331 | NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME); | |
15c4dc5a | 1332 | } |
1333 | ||
7bc95e2e | 1334 | |
15c4dc5a | 1335 | //----------------------------------------------------------------------------- |
195af472 | 1336 | // Prepare reader command (in bits, support short frames) to send to FPGA |
15c4dc5a | 1337 | //----------------------------------------------------------------------------- |
6a1f2d82 | 1338 | void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity) |
15c4dc5a | 1339 | { |
7bc95e2e | 1340 | int i, j; |
1341 | int last; | |
1342 | uint8_t b; | |
e30c654b | 1343 | |
7bc95e2e | 1344 | ToSendReset(); |
e30c654b | 1345 | |
7bc95e2e | 1346 | // Start of Communication (Seq. Z) |
1347 | ToSend[++ToSendMax] = SEC_Z; | |
1348 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1349 | last = 0; | |
1350 | ||
1351 | size_t bytecount = nbytes(bits); | |
1352 | // Generate send structure for the data bits | |
1353 | for (i = 0; i < bytecount; i++) { | |
1354 | // Get the current byte to send | |
1355 | b = cmd[i]; | |
1356 | size_t bitsleft = MIN((bits-(i*8)),8); | |
1357 | ||
1358 | for (j = 0; j < bitsleft; j++) { | |
1359 | if (b & 1) { | |
1360 | // Sequence X | |
1361 | ToSend[++ToSendMax] = SEC_X; | |
1362 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1363 | last = 1; | |
1364 | } else { | |
1365 | if (last == 0) { | |
1366 | // Sequence Z | |
1367 | ToSend[++ToSendMax] = SEC_Z; | |
1368 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1369 | } else { | |
1370 | // Sequence Y | |
1371 | ToSend[++ToSendMax] = SEC_Y; | |
1372 | last = 0; | |
1373 | } | |
1374 | } | |
1375 | b >>= 1; | |
1376 | } | |
1377 | ||
6a1f2d82 | 1378 | // Only transmit parity bit if we transmitted a complete byte |
48ece4a7 | 1379 | if (j == 8 && parity != NULL) { |
7bc95e2e | 1380 | // Get the parity bit |
6a1f2d82 | 1381 | if (parity[i>>3] & (0x80 >> (i&0x0007))) { |
7bc95e2e | 1382 | // Sequence X |
1383 | ToSend[++ToSendMax] = SEC_X; | |
1384 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1385 | last = 1; | |
1386 | } else { | |
1387 | if (last == 0) { | |
1388 | // Sequence Z | |
1389 | ToSend[++ToSendMax] = SEC_Z; | |
1390 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1391 | } else { | |
1392 | // Sequence Y | |
1393 | ToSend[++ToSendMax] = SEC_Y; | |
1394 | last = 0; | |
1395 | } | |
1396 | } | |
1397 | } | |
1398 | } | |
e30c654b | 1399 | |
7bc95e2e | 1400 | // End of Communication: Logic 0 followed by Sequence Y |
1401 | if (last == 0) { | |
1402 | // Sequence Z | |
1403 | ToSend[++ToSendMax] = SEC_Z; | |
1404 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1405 | } else { | |
1406 | // Sequence Y | |
1407 | ToSend[++ToSendMax] = SEC_Y; | |
1408 | last = 0; | |
1409 | } | |
1410 | ToSend[++ToSendMax] = SEC_Y; | |
e30c654b | 1411 | |
7bc95e2e | 1412 | // Convert to length of command: |
1413 | ToSendMax++; | |
15c4dc5a | 1414 | } |
1415 | ||
195af472 | 1416 | //----------------------------------------------------------------------------- |
1417 | // Prepare reader command to send to FPGA | |
1418 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 1419 | void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity) |
195af472 | 1420 | { |
6a1f2d82 | 1421 | CodeIso14443aBitsAsReaderPar(cmd, len*8, parity); |
195af472 | 1422 | } |
1423 | ||
0c8d25eb | 1424 | |
9ca155ba M |
1425 | //----------------------------------------------------------------------------- |
1426 | // Wait for commands from reader | |
1427 | // Stop when button is pressed (return 1) or field was gone (return 2) | |
1428 | // Or return 0 when command is captured | |
1429 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 1430 | static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity) |
9ca155ba M |
1431 | { |
1432 | *len = 0; | |
1433 | ||
1434 | uint32_t timer = 0, vtime = 0; | |
1435 | int analogCnt = 0; | |
1436 | int analogAVG = 0; | |
1437 | ||
1438 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
1439 | // only, since we are receiving, not transmitting). | |
1440 | // Signal field is off with the appropriate LED | |
1441 | LED_D_OFF(); | |
1442 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1443 | ||
1444 | // Set ADC to read field strength | |
1445 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST; | |
1446 | AT91C_BASE_ADC->ADC_MR = | |
0c8d25eb | 1447 | ADC_MODE_PRESCALE(63) | |
1448 | ADC_MODE_STARTUP_TIME(1) | | |
1449 | ADC_MODE_SAMPLE_HOLD_TIME(15); | |
9ca155ba M |
1450 | AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF); |
1451 | // start ADC | |
1452 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1453 | ||
1454 | // Now run a 'software UART' on the stream of incoming samples. | |
6a1f2d82 | 1455 | UartInit(received, parity); |
7bc95e2e | 1456 | |
1457 | // Clear RXRDY: | |
1458 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
0c8d25eb | 1459 | |
9ca155ba M |
1460 | for(;;) { |
1461 | WDT_HIT(); | |
1462 | ||
1463 | if (BUTTON_PRESS()) return 1; | |
1464 | ||
1465 | // test if the field exists | |
1466 | if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) { | |
1467 | analogCnt++; | |
1468 | analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF]; | |
1469 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1470 | if (analogCnt >= 32) { | |
0c8d25eb | 1471 | if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) { |
9ca155ba M |
1472 | vtime = GetTickCount(); |
1473 | if (!timer) timer = vtime; | |
1474 | // 50ms no field --> card to idle state | |
1475 | if (vtime - timer > 50) return 2; | |
1476 | } else | |
1477 | if (timer) timer = 0; | |
1478 | analogCnt = 0; | |
1479 | analogAVG = 0; | |
1480 | } | |
1481 | } | |
7bc95e2e | 1482 | |
9ca155ba | 1483 | // receive and test the miller decoding |
7bc95e2e | 1484 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
1485 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1486 | if(MillerDecoding(b, 0)) { | |
1487 | *len = Uart.len; | |
9ca155ba M |
1488 | return 0; |
1489 | } | |
7bc95e2e | 1490 | } |
1491 | ||
9ca155ba M |
1492 | } |
1493 | } | |
1494 | ||
9ca155ba | 1495 | |
6a1f2d82 | 1496 | static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded) |
7bc95e2e | 1497 | { |
1498 | uint8_t b; | |
1499 | uint16_t i = 0; | |
1500 | uint32_t ThisTransferTime; | |
1501 | ||
9ca155ba M |
1502 | // Modulate Manchester |
1503 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD); | |
7bc95e2e | 1504 | |
1505 | // include correction bit if necessary | |
1506 | if (Uart.parityBits & 0x01) { | |
de77d4ac | 1507 | correctionNeeded = true; |
7bc95e2e | 1508 | } |
1509 | if(correctionNeeded) { | |
9ca155ba M |
1510 | // 1236, so correction bit needed |
1511 | i = 0; | |
7bc95e2e | 1512 | } else { |
1513 | i = 1; | |
9ca155ba | 1514 | } |
7bc95e2e | 1515 | |
d714d3ef | 1516 | // clear receiving shift register and holding register |
7bc95e2e | 1517 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); |
1518 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
1519 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1520 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
9ca155ba | 1521 | |
7bc95e2e | 1522 | // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line) |
1523 | for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never | |
1524 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1525 | if (AT91C_BASE_SSC->SSC_RHR) break; | |
1526 | } | |
1527 | ||
1528 | while ((ThisTransferTime = GetCountSspClk()) & 0x00000007); | |
1529 | ||
1530 | // Clear TXRDY: | |
1531 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1532 | ||
9ca155ba | 1533 | // send cycle |
bb42a03e | 1534 | for(; i < respLen; ) { |
9ca155ba | 1535 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
7bc95e2e | 1536 | AT91C_BASE_SSC->SSC_THR = resp[i++]; |
1537 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
9ca155ba | 1538 | } |
7bc95e2e | 1539 | |
9ca155ba M |
1540 | if(BUTTON_PRESS()) { |
1541 | break; | |
1542 | } | |
1543 | } | |
1544 | ||
7bc95e2e | 1545 | // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: |
0c8d25eb | 1546 | uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; |
1547 | for (i = 0; i <= fpga_queued_bits/8 + 1; ) { | |
7bc95e2e | 1548 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
1549 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1550 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1551 | i++; | |
1552 | } | |
1553 | } | |
0c8d25eb | 1554 | |
7bc95e2e | 1555 | LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0); |
1556 | ||
9ca155ba M |
1557 | return 0; |
1558 | } | |
1559 | ||
7bc95e2e | 1560 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded){ |
1561 | Code4bitAnswerAsTag(resp); | |
0a39986e | 1562 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1563 | // do the tracing for the previous reader request and this tag answer: |
6a1f2d82 | 1564 | uint8_t par[1]; |
1565 | GetParity(&resp, 1, par); | |
7bc95e2e | 1566 | EmLogTrace(Uart.output, |
1567 | Uart.len, | |
1568 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1569 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1570 | Uart.parity, |
7bc95e2e | 1571 | &resp, |
1572 | 1, | |
1573 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1574 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1575 | par); |
0a39986e | 1576 | return res; |
9ca155ba M |
1577 | } |
1578 | ||
8f51ddb0 | 1579 | int EmSend4bit(uint8_t resp){ |
7bc95e2e | 1580 | return EmSend4bitEx(resp, false); |
8f51ddb0 M |
1581 | } |
1582 | ||
6a1f2d82 | 1583 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){ |
7bc95e2e | 1584 | CodeIso14443aAsTagPar(resp, respLen, par); |
8f51ddb0 | 1585 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1586 | // do the tracing for the previous reader request and this tag answer: |
1587 | EmLogTrace(Uart.output, | |
1588 | Uart.len, | |
1589 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1590 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1591 | Uart.parity, |
7bc95e2e | 1592 | resp, |
1593 | respLen, | |
1594 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1595 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1596 | par); |
8f51ddb0 M |
1597 | return res; |
1598 | } | |
1599 | ||
6a1f2d82 | 1600 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){ |
1601 | uint8_t par[MAX_PARITY_SIZE]; | |
1602 | GetParity(resp, respLen, par); | |
1603 | return EmSendCmdExPar(resp, respLen, correctionNeeded, par); | |
8f51ddb0 M |
1604 | } |
1605 | ||
6a1f2d82 | 1606 | int EmSendCmd(uint8_t *resp, uint16_t respLen){ |
1607 | uint8_t par[MAX_PARITY_SIZE]; | |
1608 | GetParity(resp, respLen, par); | |
1609 | return EmSendCmdExPar(resp, respLen, false, par); | |
8f51ddb0 M |
1610 | } |
1611 | ||
6a1f2d82 | 1612 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){ |
7bc95e2e | 1613 | return EmSendCmdExPar(resp, respLen, false, par); |
1614 | } | |
1615 | ||
6a1f2d82 | 1616 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, |
1617 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity) | |
7bc95e2e | 1618 | { |
1619 | if (tracing) { | |
1620 | // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from | |
1621 | // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp. | |
1622 | // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated: | |
1623 | uint16_t reader_modlen = reader_EndTime - reader_StartTime; | |
1624 | uint16_t approx_fdt = tag_StartTime - reader_EndTime; | |
1625 | uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20; | |
1626 | reader_EndTime = tag_StartTime - exact_fdt; | |
1627 | reader_StartTime = reader_EndTime - reader_modlen; | |
de77d4ac | 1628 | if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, true)) { |
1629 | return false; | |
1630 | } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, false)); | |
7bc95e2e | 1631 | } else { |
de77d4ac | 1632 | return true; |
7bc95e2e | 1633 | } |
9ca155ba M |
1634 | } |
1635 | ||
15c4dc5a | 1636 | //----------------------------------------------------------------------------- |
1637 | // Wait a certain time for tag response | |
de77d4ac | 1638 | // If a response is captured return true |
1639 | // If it takes too long return false | |
15c4dc5a | 1640 | //----------------------------------------------------------------------------- |
6a1f2d82 | 1641 | static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset) |
15c4dc5a | 1642 | { |
52bfb955 | 1643 | uint32_t c; |
e691fc45 | 1644 | |
15c4dc5a | 1645 | // Set FPGA mode to "reader listen mode", no modulation (listen |
534983d7 | 1646 | // only, since we are receiving, not transmitting). |
1647 | // Signal field is on with the appropriate LED | |
1648 | LED_D_ON(); | |
1649 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN); | |
1c611bbd | 1650 | |
534983d7 | 1651 | // Now get the answer from the card |
6a1f2d82 | 1652 | DemodInit(receivedResponse, receivedResponsePar); |
15c4dc5a | 1653 | |
7bc95e2e | 1654 | // clear RXRDY: |
1655 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
0c8d25eb | 1656 | |
15c4dc5a | 1657 | c = 0; |
1658 | for(;;) { | |
534983d7 | 1659 | WDT_HIT(); |
15c4dc5a | 1660 | |
534983d7 | 1661 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
534983d7 | 1662 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
7bc95e2e | 1663 | if(ManchesterDecoding(b, offset, 0)) { |
1664 | NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD); | |
de77d4ac | 1665 | return true; |
19a700a8 | 1666 | } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) { |
de77d4ac | 1667 | return false; |
15c4dc5a | 1668 | } |
534983d7 | 1669 | } |
1670 | } | |
15c4dc5a | 1671 | } |
1672 | ||
48ece4a7 | 1673 | |
6a1f2d82 | 1674 | void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing) |
15c4dc5a | 1675 | { |
6a1f2d82 | 1676 | CodeIso14443aBitsAsReaderPar(frame, bits, par); |
dfc3c505 | 1677 | |
7bc95e2e | 1678 | // Send command to tag |
1679 | TransmitFor14443a(ToSend, ToSendMax, timing); | |
1680 | if(trigger) | |
1681 | LED_A_ON(); | |
dfc3c505 | 1682 | |
7bc95e2e | 1683 | // Log reader command in trace buffer |
1684 | if (tracing) { | |
de77d4ac | 1685 | LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, true); |
7bc95e2e | 1686 | } |
15c4dc5a | 1687 | } |
1688 | ||
48ece4a7 | 1689 | |
6a1f2d82 | 1690 | void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing) |
dfc3c505 | 1691 | { |
6a1f2d82 | 1692 | ReaderTransmitBitsPar(frame, len*8, par, timing); |
dfc3c505 | 1693 | } |
15c4dc5a | 1694 | |
48ece4a7 | 1695 | |
6a1f2d82 | 1696 | void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing) |
e691fc45 | 1697 | { |
1698 | // Generate parity and redirect | |
6a1f2d82 | 1699 | uint8_t par[MAX_PARITY_SIZE]; |
1700 | GetParity(frame, len/8, par); | |
1701 | ReaderTransmitBitsPar(frame, len, par, timing); | |
e691fc45 | 1702 | } |
1703 | ||
48ece4a7 | 1704 | |
6a1f2d82 | 1705 | void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing) |
15c4dc5a | 1706 | { |
1707 | // Generate parity and redirect | |
6a1f2d82 | 1708 | uint8_t par[MAX_PARITY_SIZE]; |
1709 | GetParity(frame, len, par); | |
1710 | ReaderTransmitBitsPar(frame, len*8, par, timing); | |
15c4dc5a | 1711 | } |
1712 | ||
6a1f2d82 | 1713 | int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity) |
e691fc45 | 1714 | { |
de77d4ac | 1715 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) return false; |
7bc95e2e | 1716 | if (tracing) { |
de77d4ac | 1717 | LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, false); |
7bc95e2e | 1718 | } |
e691fc45 | 1719 | return Demod.len; |
1720 | } | |
1721 | ||
6a1f2d82 | 1722 | int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity) |
15c4dc5a | 1723 | { |
de77d4ac | 1724 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return false; |
7bc95e2e | 1725 | if (tracing) { |
de77d4ac | 1726 | LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, false); |
7bc95e2e | 1727 | } |
e691fc45 | 1728 | return Demod.len; |
f89c7050 M |
1729 | } |
1730 | ||
de77d4ac | 1731 | // performs iso14443a anticollision (optional) and card select procedure |
1732 | // fills the uid and cuid pointer unless NULL | |
1733 | // fills the card info record unless NULL | |
1734 | // if anticollision is false, then the UID must be provided in uid_ptr[] | |
1735 | // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID) | |
1736 | int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades) { | |
6a1f2d82 | 1737 | uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP |
1738 | uint8_t sel_all[] = { 0x93,0x20 }; | |
1739 | uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; | |
1740 | uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0 | |
f71f4deb | 1741 | uint8_t resp[MAX_FRAME_SIZE]; // theoretically. A usual RATS will be much smaller |
1742 | uint8_t resp_par[MAX_PARITY_SIZE]; | |
6a1f2d82 | 1743 | byte_t uid_resp[4]; |
1744 | size_t uid_resp_len; | |
1745 | ||
1746 | uint8_t sak = 0x04; // cascade uid | |
1747 | int cascade_level = 0; | |
1748 | int len; | |
1749 | ||
1750 | // Broadcast for a card, WUPA (0x52) will force response from all cards in the field | |
de77d4ac | 1751 | ReaderTransmitBitsPar(wupa, 7, NULL, NULL); |
7bc95e2e | 1752 | |
6a1f2d82 | 1753 | // Receive the ATQA |
1754 | if(!ReaderReceive(resp, resp_par)) return 0; | |
6a1f2d82 | 1755 | |
1756 | if(p_hi14a_card) { | |
1757 | memcpy(p_hi14a_card->atqa, resp, 2); | |
1758 | p_hi14a_card->uidlen = 0; | |
1759 | memset(p_hi14a_card->uid,0,10); | |
1760 | } | |
5f6d6c90 | 1761 | |
de77d4ac | 1762 | if (anticollision) { |
1763 | // clear uid | |
1764 | if (uid_ptr) { | |
1765 | memset(uid_ptr,0,10); | |
1766 | } | |
6a1f2d82 | 1767 | } |
79a73ab2 | 1768 | |
ee1eadee | 1769 | // check for proprietary anticollision: |
1770 | if ((resp[0] & 0x1F) == 0) { | |
1771 | return 3; | |
1772 | } | |
1773 | ||
6a1f2d82 | 1774 | // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in |
1775 | // which case we need to make a cascade 2 request and select - this is a long UID | |
1776 | // While the UID is not complete, the 3nd bit (from the right) is set in the SAK. | |
1777 | for(; sak & 0x04; cascade_level++) { | |
1778 | // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97) | |
1779 | sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2; | |
1780 | ||
de77d4ac | 1781 | if (anticollision) { |
1782 | // SELECT_ALL | |
1783 | ReaderTransmit(sel_all, sizeof(sel_all), NULL); | |
1784 | if (!ReaderReceive(resp, resp_par)) return 0; | |
1785 | ||
1786 | if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit | |
1787 | memset(uid_resp, 0, 4); | |
1788 | uint16_t uid_resp_bits = 0; | |
1789 | uint16_t collision_answer_offset = 0; | |
1790 | // anti-collision-loop: | |
1791 | while (Demod.collisionPos) { | |
1792 | Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos); | |
1793 | for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point | |
1794 | uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01; | |
1795 | uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8); | |
1796 | } | |
1797 | uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position | |
1798 | uid_resp_bits++; | |
1799 | // construct anticollosion command: | |
1800 | sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits | |
1801 | for (uint16_t i = 0; i <= uid_resp_bits/8; i++) { | |
1802 | sel_uid[2+i] = uid_resp[i]; | |
1803 | } | |
1804 | collision_answer_offset = uid_resp_bits%8; | |
1805 | ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL); | |
1806 | if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0; | |
6a1f2d82 | 1807 | } |
de77d4ac | 1808 | // finally, add the last bits and BCC of the UID |
1809 | for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) { | |
1810 | uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01; | |
1811 | uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8); | |
6a1f2d82 | 1812 | } |
de77d4ac | 1813 | |
1814 | } else { // no collision, use the response to SELECT_ALL as current uid | |
1815 | memcpy(uid_resp, resp, 4); | |
e691fc45 | 1816 | } |
de77d4ac | 1817 | } else { |
1818 | if (cascade_level < num_cascades - 1) { | |
1819 | uid_resp[0] = 0x88; | |
1820 | memcpy(uid_resp+1, uid_ptr+cascade_level*3, 3); | |
1821 | } else { | |
1822 | memcpy(uid_resp, uid_ptr+cascade_level*3, 4); | |
e691fc45 | 1823 | } |
6a1f2d82 | 1824 | } |
1825 | uid_resp_len = 4; | |
5f6d6c90 | 1826 | |
6a1f2d82 | 1827 | // calculate crypto UID. Always use last 4 Bytes. |
1828 | if(cuid_ptr) { | |
1829 | *cuid_ptr = bytes_to_num(uid_resp, 4); | |
1830 | } | |
e30c654b | 1831 | |
6a1f2d82 | 1832 | // Construct SELECT UID command |
1833 | sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC) | |
de77d4ac | 1834 | memcpy(sel_uid+2, uid_resp, 4); // the UID received during anticollision, or the provided UID |
6a1f2d82 | 1835 | sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC |
1836 | AppendCrc14443a(sel_uid, 7); // calculate and add CRC | |
1837 | ReaderTransmit(sel_uid, sizeof(sel_uid), NULL); | |
1838 | ||
1839 | // Receive the SAK | |
1840 | if (!ReaderReceive(resp, resp_par)) return 0; | |
1841 | sak = resp[0]; | |
de77d4ac | 1842 | |
1843 | // Test if more parts of the uid are coming | |
6a1f2d82 | 1844 | if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) { |
1845 | // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of: | |
1846 | // http://www.nxp.com/documents/application_note/AN10927.pdf | |
6a1f2d82 | 1847 | uid_resp[0] = uid_resp[1]; |
1848 | uid_resp[1] = uid_resp[2]; | |
1849 | uid_resp[2] = uid_resp[3]; | |
6a1f2d82 | 1850 | uid_resp_len = 3; |
1851 | } | |
5f6d6c90 | 1852 | |
de77d4ac | 1853 | if(uid_ptr && anticollision) { |
6a1f2d82 | 1854 | memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len); |
1855 | } | |
5f6d6c90 | 1856 | |
6a1f2d82 | 1857 | if(p_hi14a_card) { |
1858 | memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len); | |
1859 | p_hi14a_card->uidlen += uid_resp_len; | |
1860 | } | |
1861 | } | |
79a73ab2 | 1862 | |
6a1f2d82 | 1863 | if(p_hi14a_card) { |
1864 | p_hi14a_card->sak = sak; | |
1865 | p_hi14a_card->ats_len = 0; | |
1866 | } | |
534983d7 | 1867 | |
3fe4ff4f | 1868 | // non iso14443a compliant tag |
1869 | if( (sak & 0x20) == 0) return 2; | |
534983d7 | 1870 | |
6a1f2d82 | 1871 | // Request for answer to select |
1872 | AppendCrc14443a(rats, 2); | |
1873 | ReaderTransmit(rats, sizeof(rats), NULL); | |
1c611bbd | 1874 | |
6a1f2d82 | 1875 | if (!(len = ReaderReceive(resp, resp_par))) return 0; |
5191b3d1 | 1876 | |
3fe4ff4f | 1877 | |
6a1f2d82 | 1878 | if(p_hi14a_card) { |
1879 | memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats)); | |
1880 | p_hi14a_card->ats_len = len; | |
1881 | } | |
5f6d6c90 | 1882 | |
6a1f2d82 | 1883 | // reset the PCB block number |
1884 | iso14_pcb_blocknum = 0; | |
19a700a8 | 1885 | |
1886 | // set default timeout based on ATS | |
1887 | iso14a_set_ATS_timeout(resp); | |
1888 | ||
6a1f2d82 | 1889 | return 1; |
7e758047 | 1890 | } |
15c4dc5a | 1891 | |
7bc95e2e | 1892 | void iso14443a_setup(uint8_t fpga_minor_mode) { |
7cc204bf | 1893 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
9492e0b0 | 1894 | // Set up the synchronous serial port |
1895 | FpgaSetupSsc(); | |
7bc95e2e | 1896 | // connect Demodulated Signal to ADC: |
7e758047 | 1897 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
e30c654b | 1898 | |
7e758047 | 1899 | // Signal field is on with the appropriate LED |
7bc95e2e | 1900 | if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD |
1901 | || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) { | |
1902 | LED_D_ON(); | |
1903 | } else { | |
1904 | LED_D_OFF(); | |
1905 | } | |
1906 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode); | |
534983d7 | 1907 | |
7bc95e2e | 1908 | // Start the timer |
1909 | StartCountSspClk(); | |
1910 | ||
1911 | DemodReset(); | |
1912 | UartReset(); | |
1913 | NextTransferTime = 2*DELAY_ARM2AIR_AS_READER; | |
1914 | iso14a_set_timeout(1050); // 10ms default | |
7e758047 | 1915 | } |
15c4dc5a | 1916 | |
6a1f2d82 | 1917 | int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) { |
1918 | uint8_t parity[MAX_PARITY_SIZE]; | |
534983d7 | 1919 | uint8_t real_cmd[cmd_len+4]; |
1920 | real_cmd[0] = 0x0a; //I-Block | |
b0127e65 | 1921 | // put block number into the PCB |
1922 | real_cmd[0] |= iso14_pcb_blocknum; | |
534983d7 | 1923 | real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards |
1924 | memcpy(real_cmd+2, cmd, cmd_len); | |
1925 | AppendCrc14443a(real_cmd,cmd_len+2); | |
1926 | ||
9492e0b0 | 1927 | ReaderTransmit(real_cmd, cmd_len+4, NULL); |
6a1f2d82 | 1928 | size_t len = ReaderReceive(data, parity); |
1929 | uint8_t *data_bytes = (uint8_t *) data; | |
b0127e65 | 1930 | if (!len) |
1931 | return 0; //DATA LINK ERROR | |
1932 | // if we received an I- or R(ACK)-Block with a block number equal to the | |
1933 | // current block number, toggle the current block number | |
1934 | else if (len >= 4 // PCB+CID+CRC = 4 bytes | |
1935 | && ((data_bytes[0] & 0xC0) == 0 // I-Block | |
1936 | || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0 | |
1937 | && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers | |
1938 | { | |
1939 | iso14_pcb_blocknum ^= 1; | |
1940 | } | |
1941 | ||
534983d7 | 1942 | return len; |
1943 | } | |
1944 | ||
7e758047 | 1945 | //----------------------------------------------------------------------------- |
1946 | // Read an ISO 14443a tag. Send out commands and store answers. | |
1947 | // | |
1948 | //----------------------------------------------------------------------------- | |
7bc95e2e | 1949 | void ReaderIso14443a(UsbCommand *c) |
7e758047 | 1950 | { |
534983d7 | 1951 | iso14a_command_t param = c->arg[0]; |
7bc95e2e | 1952 | uint8_t *cmd = c->d.asBytes; |
04bc1c66 | 1953 | size_t len = c->arg[1] & 0xffff; |
1954 | size_t lenbits = c->arg[1] >> 16; | |
1955 | uint32_t timeout = c->arg[2]; | |
9492e0b0 | 1956 | uint32_t arg0 = 0; |
1957 | byte_t buf[USB_CMD_DATA_SIZE]; | |
6a1f2d82 | 1958 | uint8_t par[MAX_PARITY_SIZE]; |
902cb3c0 | 1959 | |
5f6d6c90 | 1960 | if(param & ISO14A_CONNECT) { |
3000dc4e | 1961 | clear_trace(); |
5f6d6c90 | 1962 | } |
e691fc45 | 1963 | |
de77d4ac | 1964 | set_tracing(true); |
e30c654b | 1965 | |
79a73ab2 | 1966 | if(param & ISO14A_REQUEST_TRIGGER) { |
de77d4ac | 1967 | iso14a_set_trigger(true); |
9492e0b0 | 1968 | } |
15c4dc5a | 1969 | |
534983d7 | 1970 | if(param & ISO14A_CONNECT) { |
7bc95e2e | 1971 | iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN); |
5f6d6c90 | 1972 | if(!(param & ISO14A_NO_SELECT)) { |
1973 | iso14a_card_select_t *card = (iso14a_card_select_t*)buf; | |
de77d4ac | 1974 | arg0 = iso14443a_select_card(NULL, card, NULL, true, 0); |
5f6d6c90 | 1975 | cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t)); |
1976 | } | |
534983d7 | 1977 | } |
e30c654b | 1978 | |
534983d7 | 1979 | if(param & ISO14A_SET_TIMEOUT) { |
04bc1c66 | 1980 | iso14a_set_timeout(timeout); |
534983d7 | 1981 | } |
e30c654b | 1982 | |
534983d7 | 1983 | if(param & ISO14A_APDU) { |
902cb3c0 | 1984 | arg0 = iso14_apdu(cmd, len, buf); |
79a73ab2 | 1985 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 1986 | } |
e30c654b | 1987 | |
534983d7 | 1988 | if(param & ISO14A_RAW) { |
1989 | if(param & ISO14A_APPEND_CRC) { | |
48ece4a7 | 1990 | if(param & ISO14A_TOPAZMODE) { |
1991 | AppendCrc14443b(cmd,len); | |
1992 | } else { | |
1993 | AppendCrc14443a(cmd,len); | |
1994 | } | |
534983d7 | 1995 | len += 2; |
c7324bef | 1996 | if (lenbits) lenbits += 16; |
15c4dc5a | 1997 | } |
48ece4a7 | 1998 | if(lenbits>0) { // want to send a specific number of bits (e.g. short commands) |
1999 | if(param & ISO14A_TOPAZMODE) { | |
2000 | int bits_to_send = lenbits; | |
2001 | uint16_t i = 0; | |
2002 | ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity | |
2003 | bits_to_send -= 7; | |
2004 | while (bits_to_send > 0) { | |
2005 | ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity | |
2006 | bits_to_send -= 8; | |
2007 | } | |
2008 | } else { | |
2009 | GetParity(cmd, lenbits/8, par); | |
2010 | ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity | |
2011 | } | |
2012 | } else { // want to send complete bytes only | |
2013 | if(param & ISO14A_TOPAZMODE) { | |
2014 | uint16_t i = 0; | |
2015 | ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy | |
2016 | while (i < len) { | |
2017 | ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy | |
2018 | } | |
2019 | } else { | |
2020 | ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity | |
2021 | } | |
5f6d6c90 | 2022 | } |
6a1f2d82 | 2023 | arg0 = ReaderReceive(buf, par); |
9492e0b0 | 2024 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 2025 | } |
15c4dc5a | 2026 | |
79a73ab2 | 2027 | if(param & ISO14A_REQUEST_TRIGGER) { |
de77d4ac | 2028 | iso14a_set_trigger(false); |
9492e0b0 | 2029 | } |
15c4dc5a | 2030 | |
79a73ab2 | 2031 | if(param & ISO14A_NO_DISCONNECT) { |
534983d7 | 2032 | return; |
9492e0b0 | 2033 | } |
15c4dc5a | 2034 | |
15c4dc5a | 2035 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
2036 | LEDsoff(); | |
15c4dc5a | 2037 | } |
b0127e65 | 2038 | |
1c611bbd | 2039 | |
1c611bbd | 2040 | // Determine the distance between two nonces. |
2041 | // Assume that the difference is small, but we don't know which is first. | |
2042 | // Therefore try in alternating directions. | |
2043 | int32_t dist_nt(uint32_t nt1, uint32_t nt2) { | |
2044 | ||
2045 | uint16_t i; | |
2046 | uint32_t nttmp1, nttmp2; | |
e772353f | 2047 | |
1c611bbd | 2048 | if (nt1 == nt2) return 0; |
2049 | ||
2050 | nttmp1 = nt1; | |
2051 | nttmp2 = nt2; | |
2052 | ||
2053 | for (i = 1; i < 32768; i++) { | |
2054 | nttmp1 = prng_successor(nttmp1, 1); | |
2055 | if (nttmp1 == nt2) return i; | |
2056 | nttmp2 = prng_successor(nttmp2, 1); | |
dc8ba239 | 2057 | if (nttmp2 == nt1) return -i; |
1c611bbd | 2058 | } |
2059 | ||
2060 | return(-99999); // either nt1 or nt2 are invalid nonces | |
e772353f | 2061 | } |
2062 | ||
e772353f | 2063 | |
1c611bbd | 2064 | //----------------------------------------------------------------------------- |
2065 | // Recover several bits of the cypher stream. This implements (first stages of) | |
2066 | // the algorithm described in "The Dark Side of Security by Obscurity and | |
2067 | // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime" | |
2068 | // (article by Nicolas T. Courtois, 2009) | |
2069 | //----------------------------------------------------------------------------- | |
2070 | void ReaderMifare(bool first_try) | |
2071 | { | |
2072 | // Mifare AUTH | |
2073 | uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b }; | |
2074 | uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; | |
2075 | static uint8_t mf_nr_ar3; | |
e772353f | 2076 | |
f71f4deb | 2077 | uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE]; |
2078 | uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE]; | |
7bc95e2e | 2079 | |
09ffd16e | 2080 | if (first_try) { |
2081 | iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD); | |
2082 | } | |
2083 | ||
f71f4deb | 2084 | // free eventually allocated BigBuf memory. We want all for tracing. |
2085 | BigBuf_free(); | |
2086 | ||
3000dc4e | 2087 | clear_trace(); |
de77d4ac | 2088 | set_tracing(true); |
e772353f | 2089 | |
1c611bbd | 2090 | byte_t nt_diff = 0; |
6a1f2d82 | 2091 | uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough |
1c611bbd | 2092 | static byte_t par_low = 0; |
de77d4ac | 2093 | bool led_on = true; |
ca4714cd | 2094 | uint8_t uid[10] ={0}; |
1c611bbd | 2095 | uint32_t cuid; |
e772353f | 2096 | |
6a1f2d82 | 2097 | uint32_t nt = 0; |
2ed270a8 | 2098 | uint32_t previous_nt = 0; |
1c611bbd | 2099 | static uint32_t nt_attacked = 0; |
3fe4ff4f | 2100 | byte_t par_list[8] = {0x00}; |
2101 | byte_t ks_list[8] = {0x00}; | |
e772353f | 2102 | |
dfb387bf | 2103 | #define PRNG_SEQUENCE_LENGTH (1 << 16); |
1c611bbd | 2104 | static uint32_t sync_time; |
8c6b2298 | 2105 | static int32_t sync_cycles; |
1c611bbd | 2106 | int catch_up_cycles = 0; |
2107 | int last_catch_up = 0; | |
8c6b2298 | 2108 | uint16_t elapsed_prng_sequences; |
1c611bbd | 2109 | uint16_t consecutive_resyncs = 0; |
2110 | int isOK = 0; | |
e772353f | 2111 | |
1c611bbd | 2112 | if (first_try) { |
1c611bbd | 2113 | mf_nr_ar3 = 0; |
7bc95e2e | 2114 | sync_time = GetCountSspClk() & 0xfffffff8; |
dfb387bf | 2115 | sync_cycles = PRNG_SEQUENCE_LENGTH; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the tag nonces). |
1c611bbd | 2116 | nt_attacked = 0; |
6a1f2d82 | 2117 | par[0] = 0; |
1c611bbd | 2118 | } |
2119 | else { | |
2120 | // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same) | |
1c611bbd | 2121 | mf_nr_ar3++; |
2122 | mf_nr_ar[3] = mf_nr_ar3; | |
6a1f2d82 | 2123 | par[0] = par_low; |
1c611bbd | 2124 | } |
e30c654b | 2125 | |
15c4dc5a | 2126 | LED_A_ON(); |
2127 | LED_B_OFF(); | |
2128 | LED_C_OFF(); | |
1c611bbd | 2129 | |
dc8ba239 | 2130 | |
dfb387bf | 2131 | #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up. |
8c6b2298 | 2132 | #define MAX_SYNC_TRIES 32 |
2133 | #define NUM_DEBUG_INFOS 8 // per strategy | |
2134 | #define MAX_STRATEGY 3 | |
dfb387bf | 2135 | uint16_t unexpected_random = 0; |
2136 | uint16_t sync_tries = 0; | |
2137 | int16_t debug_info_nr = -1; | |
8c6b2298 | 2138 | uint16_t strategy = 0; |
2139 | int32_t debug_info[MAX_STRATEGY][NUM_DEBUG_INFOS]; | |
2140 | uint32_t select_time; | |
2141 | uint32_t halt_time; | |
dc8ba239 | 2142 | |
de77d4ac | 2143 | for(uint16_t i = 0; true; i++) { |
1c611bbd | 2144 | |
dc8ba239 | 2145 | LED_C_ON(); |
1c611bbd | 2146 | WDT_HIT(); |
e30c654b | 2147 | |
1c611bbd | 2148 | // Test if the action was cancelled |
2149 | if(BUTTON_PRESS()) { | |
dc8ba239 | 2150 | isOK = -1; |
1c611bbd | 2151 | break; |
2152 | } | |
2153 | ||
8c6b2298 | 2154 | if (strategy == 2) { |
2155 | // test with additional hlt command | |
2156 | halt_time = 0; | |
2157 | int len = mifare_sendcmd_short(NULL, false, 0x50, 0x00, receivedAnswer, receivedAnswerPar, &halt_time); | |
2158 | if (len && MF_DBGLEVEL >= 3) { | |
2159 | Dbprintf("Unexpected response of %d bytes to hlt command (additional debugging).", len); | |
2160 | } | |
2161 | } | |
2162 | ||
2163 | if (strategy == 3) { | |
2164 | // test with FPGA power off/on | |
2165 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
2166 | SpinDelay(200); | |
2167 | iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD); | |
2168 | SpinDelay(100); | |
2169 | } | |
2170 | ||
de77d4ac | 2171 | if(!iso14443a_select_card(uid, NULL, &cuid, true, 0)) { |
9492e0b0 | 2172 | if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card"); |
1c611bbd | 2173 | continue; |
2174 | } | |
8c6b2298 | 2175 | select_time = GetCountSspClk(); |
1c611bbd | 2176 | |
8c6b2298 | 2177 | elapsed_prng_sequences = 1; |
dfb387bf | 2178 | if (debug_info_nr == -1) { |
2179 | sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles; | |
2180 | catch_up_cycles = 0; | |
1c611bbd | 2181 | |
dfb387bf | 2182 | // if we missed the sync time already, advance to the next nonce repeat |
2183 | while(GetCountSspClk() > sync_time) { | |
8c6b2298 | 2184 | elapsed_prng_sequences++; |
dfb387bf | 2185 | sync_time = (sync_time & 0xfffffff8) + sync_cycles; |
2186 | } | |
e30c654b | 2187 | |
dfb387bf | 2188 | // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked) |
2189 | ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time); | |
2190 | } else { | |
8c6b2298 | 2191 | // collect some information on tag nonces for debugging: |
2192 | #define DEBUG_FIXED_SYNC_CYCLES PRNG_SEQUENCE_LENGTH | |
2193 | if (strategy == 0) { | |
2194 | // nonce distances at fixed time after card select: | |
2195 | sync_time = select_time + DEBUG_FIXED_SYNC_CYCLES; | |
2196 | } else if (strategy == 1) { | |
2197 | // nonce distances at fixed time between authentications: | |
2198 | sync_time = sync_time + DEBUG_FIXED_SYNC_CYCLES; | |
2199 | } else if (strategy == 2) { | |
2200 | // nonce distances at fixed time after halt: | |
2201 | sync_time = halt_time + DEBUG_FIXED_SYNC_CYCLES; | |
2202 | } else { | |
2203 | // nonce_distances at fixed time after power on | |
2204 | sync_time = DEBUG_FIXED_SYNC_CYCLES; | |
2205 | } | |
2206 | ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time); | |
dfb387bf | 2207 | } |
f89c7050 | 2208 | |
1c611bbd | 2209 | // Receive the (4 Byte) "random" nonce |
6a1f2d82 | 2210 | if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) { |
9492e0b0 | 2211 | if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce"); |
1c611bbd | 2212 | continue; |
2213 | } | |
2214 | ||
1c611bbd | 2215 | previous_nt = nt; |
2216 | nt = bytes_to_num(receivedAnswer, 4); | |
2217 | ||
2218 | // Transmit reader nonce with fake par | |
9492e0b0 | 2219 | ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL); |
1c611bbd | 2220 | |
2221 | if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet | |
2222 | int nt_distance = dist_nt(previous_nt, nt); | |
2223 | if (nt_distance == 0) { | |
2224 | nt_attacked = nt; | |
dfb387bf | 2225 | } else { |
dc8ba239 | 2226 | if (nt_distance == -99999) { // invalid nonce received |
dfb387bf | 2227 | unexpected_random++; |
8c6b2298 | 2228 | if (unexpected_random > MAX_UNEXPECTED_RANDOM) { |
dc8ba239 | 2229 | isOK = -3; // Card has an unpredictable PRNG. Give up |
2230 | break; | |
2231 | } else { | |
2232 | continue; // continue trying... | |
2233 | } | |
1c611bbd | 2234 | } |
dfb387bf | 2235 | if (++sync_tries > MAX_SYNC_TRIES) { |
8c6b2298 | 2236 | if (strategy > MAX_STRATEGY || MF_DBGLEVEL < 3) { |
dfb387bf | 2237 | isOK = -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly |
2238 | break; | |
2239 | } else { // continue for a while, just to collect some debug info | |
8c6b2298 | 2240 | debug_info[strategy][debug_info_nr] = nt_distance; |
2241 | debug_info_nr++; | |
2242 | if (debug_info_nr == NUM_DEBUG_INFOS) { | |
2243 | strategy++; | |
2244 | debug_info_nr = 0; | |
2245 | } | |
dfb387bf | 2246 | continue; |
2247 | } | |
2248 | } | |
8c6b2298 | 2249 | sync_cycles = (sync_cycles - nt_distance/elapsed_prng_sequences); |
dfb387bf | 2250 | if (sync_cycles <= 0) { |
2251 | sync_cycles += PRNG_SEQUENCE_LENGTH; | |
2252 | } | |
2253 | if (MF_DBGLEVEL >= 3) { | |
8c6b2298 | 2254 | Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i, nt_distance, elapsed_prng_sequences, sync_cycles); |
dfb387bf | 2255 | } |
1c611bbd | 2256 | continue; |
2257 | } | |
2258 | } | |
2259 | ||
2260 | if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again... | |
2261 | catch_up_cycles = -dist_nt(nt_attacked, nt); | |
2262 | if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one. | |
2263 | catch_up_cycles = 0; | |
2264 | continue; | |
2265 | } | |
8c6b2298 | 2266 | catch_up_cycles /= elapsed_prng_sequences; |
1c611bbd | 2267 | if (catch_up_cycles == last_catch_up) { |
2268 | consecutive_resyncs++; | |
2269 | } | |
2270 | else { | |
2271 | last_catch_up = catch_up_cycles; | |
2272 | consecutive_resyncs = 0; | |
2273 | } | |
2274 | if (consecutive_resyncs < 3) { | |
9492e0b0 | 2275 | if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs); |
1c611bbd | 2276 | } |
2277 | else { | |
2278 | sync_cycles = sync_cycles + catch_up_cycles; | |
9492e0b0 | 2279 | if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles); |
8c6b2298 | 2280 | last_catch_up = 0; |
2281 | catch_up_cycles = 0; | |
2282 | consecutive_resyncs = 0; | |
1c611bbd | 2283 | } |
2284 | continue; | |
2285 | } | |
2286 | ||
2287 | consecutive_resyncs = 0; | |
2288 | ||
2289 | // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding | |
8c6b2298 | 2290 | if (ReaderReceive(receivedAnswer, receivedAnswerPar)) { |
9492e0b0 | 2291 | catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer |
1c611bbd | 2292 | |
8c6b2298 | 2293 | if (nt_diff == 0) { |
6a1f2d82 | 2294 | par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change |
1c611bbd | 2295 | } |
2296 | ||
2297 | led_on = !led_on; | |
2298 | if(led_on) LED_B_ON(); else LED_B_OFF(); | |
2299 | ||
6a1f2d82 | 2300 | par_list[nt_diff] = SwapBits(par[0], 8); |
1c611bbd | 2301 | ks_list[nt_diff] = receivedAnswer[0] ^ 0x05; |
2302 | ||
2303 | // Test if the information is complete | |
2304 | if (nt_diff == 0x07) { | |
2305 | isOK = 1; | |
2306 | break; | |
2307 | } | |
2308 | ||
2309 | nt_diff = (nt_diff + 1) & 0x07; | |
2310 | mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5); | |
6a1f2d82 | 2311 | par[0] = par_low; |
1c611bbd | 2312 | } else { |
2313 | if (nt_diff == 0 && first_try) | |
2314 | { | |
6a1f2d82 | 2315 | par[0]++; |
dc8ba239 | 2316 | if (par[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK. |
2317 | isOK = -2; | |
2318 | break; | |
2319 | } | |
1c611bbd | 2320 | } else { |
6a1f2d82 | 2321 | par[0] = ((par[0] & 0x1F) + 1) | par_low; |
1c611bbd | 2322 | } |
2323 | } | |
2324 | } | |
2325 | ||
1c611bbd | 2326 | |
2327 | mf_nr_ar[3] &= 0x1F; | |
dfb387bf | 2328 | |
2329 | if (isOK == -4) { | |
2330 | if (MF_DBGLEVEL >= 3) { | |
8c6b2298 | 2331 | for (uint16_t i = 0; i <= MAX_STRATEGY; i++) { |
2332 | for(uint16_t j = 0; j < NUM_DEBUG_INFOS; j++) { | |
2333 | Dbprintf("collected debug info[%d][%d] = %d", i, j, debug_info[i][j]); | |
2334 | } | |
dfb387bf | 2335 | } |
2336 | } | |
2337 | } | |
1c611bbd | 2338 | |
2339 | byte_t buf[28]; | |
2340 | memcpy(buf + 0, uid, 4); | |
2341 | num_to_bytes(nt, 4, buf + 4); | |
2342 | memcpy(buf + 8, par_list, 8); | |
2343 | memcpy(buf + 16, ks_list, 8); | |
2344 | memcpy(buf + 24, mf_nr_ar, 4); | |
2345 | ||
dc8ba239 | 2346 | cmd_send(CMD_ACK, isOK, 0, 0, buf, 28); |
1c611bbd | 2347 | |
2348 | // Thats it... | |
2349 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
2350 | LEDsoff(); | |
7bc95e2e | 2351 | |
de77d4ac | 2352 | set_tracing(false); |
20f9a2a1 | 2353 | } |
1c611bbd | 2354 | |
79dcb9e0 | 2355 | typedef struct { |
2356 | uint32_t cuid; | |
2357 | uint8_t sector; | |
2358 | uint8_t keytype; | |
2359 | uint32_t nonce; | |
2360 | uint32_t ar; | |
2361 | uint32_t nr; | |
2362 | uint32_t nonce2; | |
2363 | uint32_t ar2; | |
2364 | uint32_t nr2; | |
2365 | } nonces_t; | |
2366 | ||
d2f487af | 2367 | /** |
2368 | *MIFARE 1K simulate. | |
2369 | * | |
2370 | *@param flags : | |
2371 | * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK | |
c872d8c1 | 2372 | * FLAG_4B_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that |
2373 | * FLAG_7B_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that | |
2374 | * FLAG_10B_UID_IN_DATA - use 10-byte UID in the data-section not finished | |
d2f487af | 2375 | * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later |
5b5489ba | 2376 | * FLAG_RANDOM_NONCE - means we should generate some pseudo-random nonce data (only allows moebius attack) |
c872d8c1 | 2377 | *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is infinite ... |
2378 | * (unless reader attack mode enabled then it runs util it gets enough nonces to recover all keys attmpted) | |
d2f487af | 2379 | */ |
2380 | void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain) | |
20f9a2a1 | 2381 | { |
50193c1e | 2382 | int cardSTATE = MFEMUL_NOFIELD; |
c872d8c1 | 2383 | int _UID_LEN = 0; // 4, 7, 10 |
9ca155ba | 2384 | int vHf = 0; // in mV |
8f51ddb0 | 2385 | int res; |
0a39986e M |
2386 | uint32_t selTimer = 0; |
2387 | uint32_t authTimer = 0; | |
6a1f2d82 | 2388 | uint16_t len = 0; |
8f51ddb0 | 2389 | uint8_t cardWRBL = 0; |
9ca155ba M |
2390 | uint8_t cardAUTHSC = 0; |
2391 | uint8_t cardAUTHKEY = 0xff; // no authentication | |
51969283 | 2392 | uint32_t cardRr = 0; |
9ca155ba | 2393 | uint32_t cuid = 0; |
d2f487af | 2394 | //uint32_t rn_enc = 0; |
51969283 | 2395 | uint32_t ans = 0; |
0014cb46 M |
2396 | uint32_t cardINTREG = 0; |
2397 | uint8_t cardINTBLOCK = 0; | |
9ca155ba M |
2398 | struct Crypto1State mpcs = {0, 0}; |
2399 | struct Crypto1State *pcs; | |
2400 | pcs = &mpcs; | |
d2f487af | 2401 | uint32_t numReads = 0;//Counts numer of times reader read a block |
f71f4deb | 2402 | uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE]; |
2403 | uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE]; | |
2404 | uint8_t response[MAX_MIFARE_FRAME_SIZE]; | |
2405 | uint8_t response_par[MAX_MIFARE_PARITY_SIZE]; | |
9ca155ba | 2406 | |
76ef5273 | 2407 | uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID |
d2f487af | 2408 | uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; |
2409 | uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!! | |
c872d8c1 | 2410 | uint8_t rUIDBCC3[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; |
2411 | ||
76ef5273 | 2412 | uint8_t rSAKfinal[]= {0x08, 0xb6, 0xdd}; // mifare 1k indicated |
2413 | uint8_t rSAK1[] = {0x04, 0xda, 0x17}; // indicate UID not finished | |
9ca155ba | 2414 | |
d2f487af | 2415 | uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04}; |
2416 | uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00}; | |
7bc95e2e | 2417 | |
79dcb9e0 | 2418 | //Here, we collect UID,sector,keytype,NT,AR,NR,NT2,AR2,NR2 |
c872d8c1 | 2419 | // This will be used in the reader-only attack. |
2420 | ||
76ef5273 | 2421 | //allow collecting up to 8 sets of nonces to allow recovery of up to 8 keys |
2422 | #define ATTACK_KEY_COUNT 8 // keep same as define in cmdhfmf.c -> readerAttack() | |
91f4d531 | 2423 | nonces_t ar_nr_resp[ATTACK_KEY_COUNT*2]; //*2 for 2 separate attack types (nml, moebius) |
79dcb9e0 | 2424 | memset(ar_nr_resp, 0x00, sizeof(ar_nr_resp)); |
2425 | ||
91f4d531 | 2426 | uint8_t ar_nr_collected[ATTACK_KEY_COUNT*2]; //*2 for 2nd attack type (moebius) |
79dcb9e0 | 2427 | memset(ar_nr_collected, 0x00, sizeof(ar_nr_collected)); |
c872d8c1 | 2428 | uint8_t nonce1_count = 0; |
2429 | uint8_t nonce2_count = 0; | |
2430 | uint8_t moebius_n_count = 0; | |
91f4d531 | 2431 | bool gettingMoebius = false; |
c872d8c1 | 2432 | uint8_t mM = 0; //moebius_modifier for collection storage |
2433 | ||
7bc95e2e | 2434 | // Authenticate response - nonce |
f9c1dcd9 MF |
2435 | uint32_t nonce; |
2436 | if (flags & FLAG_RANDOM_NONCE) { | |
2437 | nonce = prand(); | |
2438 | } else { | |
2439 | nonce = bytes_to_num(rAUTH_NT, 4); | |
2440 | } | |
7bc95e2e | 2441 | |
d2f487af | 2442 | //-- Determine the UID |
2443 | // Can be set from emulator memory, incoming data | |
2444 | // and can be 7 or 4 bytes long | |
7bc95e2e | 2445 | if (flags & FLAG_4B_UID_IN_DATA) |
d2f487af | 2446 | { |
2447 | // 4B uid comes from data-portion of packet | |
2448 | memcpy(rUIDBCC1,datain,4); | |
8556b852 | 2449 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; |
c872d8c1 | 2450 | _UID_LEN = 4; |
7bc95e2e | 2451 | } else if (flags & FLAG_7B_UID_IN_DATA) { |
d2f487af | 2452 | // 7B uid comes from data-portion of packet |
2453 | memcpy(&rUIDBCC1[1],datain,3); | |
2454 | memcpy(rUIDBCC2, datain+3, 4); | |
c872d8c1 | 2455 | _UID_LEN = 7; |
2456 | } else if (flags & FLAG_10B_UID_IN_DATA) { | |
2457 | memcpy(&rUIDBCC1[1], datain, 3); | |
2458 | memcpy(&rUIDBCC2[1], datain+3, 3); | |
2459 | memcpy( rUIDBCC3, datain+6, 4); | |
2460 | _UID_LEN = 10; | |
7bc95e2e | 2461 | } else { |
c872d8c1 | 2462 | // get UID from emul memory - guess at length |
d2f487af | 2463 | emlGetMemBt(receivedCmd, 7, 1); |
76ef5273 | 2464 | if (receivedCmd[0] == 0x00) { // ---------- 4BUID |
d2f487af | 2465 | emlGetMemBt(rUIDBCC1, 0, 4); |
c872d8c1 | 2466 | _UID_LEN = 4; |
d2f487af | 2467 | } else { // ---------- 7BUID |
2468 | emlGetMemBt(&rUIDBCC1[1], 0, 3); | |
2469 | emlGetMemBt(rUIDBCC2, 3, 4); | |
c872d8c1 | 2470 | _UID_LEN = 7; |
d2f487af | 2471 | } |
2472 | } | |
7bc95e2e | 2473 | |
c872d8c1 | 2474 | switch (_UID_LEN) { |
2475 | case 4: | |
2476 | // save CUID | |
2477 | cuid = bytes_to_num(rUIDBCC1, 4); | |
2478 | // BCC | |
2479 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; | |
2480 | if (MF_DBGLEVEL >= 2) { | |
2481 | Dbprintf("4B UID: %02x%02x%02x%02x", | |
2482 | rUIDBCC1[0], | |
2483 | rUIDBCC1[1], | |
2484 | rUIDBCC1[2], | |
2485 | rUIDBCC1[3] | |
2486 | ); | |
2487 | } | |
2488 | break; | |
2489 | case 7: | |
2490 | rATQA[0] |= 0x40; | |
2491 | // save CUID | |
2492 | cuid = bytes_to_num(rUIDBCC2, 4); | |
2493 | // CascadeTag, CT | |
2494 | rUIDBCC1[0] = 0x88; | |
2495 | // BCC | |
2496 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; | |
2497 | rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3]; | |
2498 | if (MF_DBGLEVEL >= 2) { | |
2499 | Dbprintf("7B UID: %02x %02x %02x %02x %02x %02x %02x", | |
2500 | rUIDBCC1[1], | |
2501 | rUIDBCC1[2], | |
2502 | rUIDBCC1[3], | |
2503 | rUIDBCC2[0], | |
2504 | rUIDBCC2[1], | |
2505 | rUIDBCC2[2], | |
2506 | rUIDBCC2[3] | |
2507 | ); | |
2508 | } | |
2509 | break; | |
2510 | case 10: | |
2511 | rATQA[0] |= 0x80; | |
2512 | //sak_10[0] &= 0xFB; | |
2513 | // save CUID | |
2514 | cuid = bytes_to_num(rUIDBCC3, 4); | |
2515 | // CascadeTag, CT | |
2516 | rUIDBCC1[0] = 0x88; | |
2517 | rUIDBCC2[0] = 0x88; | |
2518 | // BCC | |
2519 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; | |
2520 | rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3]; | |
2521 | rUIDBCC3[4] = rUIDBCC3[0] ^ rUIDBCC3[1] ^ rUIDBCC3[2] ^ rUIDBCC3[3]; | |
2522 | ||
2523 | if (MF_DBGLEVEL >= 2) { | |
2524 | Dbprintf("10B UID: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x", | |
2525 | rUIDBCC1[1], | |
2526 | rUIDBCC1[2], | |
2527 | rUIDBCC1[3], | |
2528 | rUIDBCC2[1], | |
2529 | rUIDBCC2[2], | |
2530 | rUIDBCC2[3], | |
2531 | rUIDBCC3[0], | |
2532 | rUIDBCC3[1], | |
2533 | rUIDBCC3[2], | |
2534 | rUIDBCC3[3] | |
2535 | ); | |
2536 | } | |
2537 | break; | |
2538 | default: | |
2539 | break; | |
d2f487af | 2540 | } |
7bc95e2e | 2541 | |
09ffd16e | 2542 | // We need to listen to the high-frequency, peak-detected path. |
2543 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
2544 | ||
2545 | // free eventually allocated BigBuf memory but keep Emulator Memory | |
2546 | BigBuf_free_keep_EM(); | |
2547 | ||
2548 | // clear trace | |
2549 | clear_trace(); | |
de77d4ac | 2550 | set_tracing(true); |
09ffd16e | 2551 | |
de77d4ac | 2552 | bool finished = false; |
73ab92d1 | 2553 | bool button_pushed = BUTTON_PRESS(); |
2554 | while (!button_pushed && !finished && !usb_poll_validate_length()) { | |
9ca155ba | 2555 | WDT_HIT(); |
9ca155ba M |
2556 | |
2557 | // find reader field | |
9ca155ba | 2558 | if (cardSTATE == MFEMUL_NOFIELD) { |
0c8d25eb | 2559 | vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10; |
9ca155ba | 2560 | if (vHf > MF_MINFIELDV) { |
0014cb46 | 2561 | cardSTATE_TO_IDLE(); |
9ca155ba M |
2562 | LED_A_ON(); |
2563 | } | |
91f4d531 | 2564 | } |
c872d8c1 | 2565 | if (cardSTATE == MFEMUL_NOFIELD) continue; |
9ca155ba | 2566 | |
d2f487af | 2567 | //Now, get data |
6a1f2d82 | 2568 | res = EmGetCmd(receivedCmd, &len, receivedCmd_par); |
d2f487af | 2569 | if (res == 2) { //Field is off! |
2570 | cardSTATE = MFEMUL_NOFIELD; | |
2571 | LEDsoff(); | |
2572 | continue; | |
7bc95e2e | 2573 | } else if (res == 1) { |
2574 | break; //return value 1 means button press | |
2575 | } | |
91f4d531 | 2576 | |
d2f487af | 2577 | // REQ or WUP request in ANY state and WUP in HALTED state |
c872d8c1 | 2578 | if (len == 1 && ((receivedCmd[0] == ISO14443A_CMD_REQA && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == ISO14443A_CMD_WUPA)) { |
d2f487af | 2579 | selTimer = GetTickCount(); |
c872d8c1 | 2580 | EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == ISO14443A_CMD_WUPA)); |
d2f487af | 2581 | cardSTATE = MFEMUL_SELECT1; |
2582 | ||
2583 | // init crypto block | |
2584 | LED_B_OFF(); | |
2585 | LED_C_OFF(); | |
2586 | crypto1_destroy(pcs); | |
2587 | cardAUTHKEY = 0xff; | |
f9c1dcd9 MF |
2588 | if (flags & FLAG_RANDOM_NONCE) { |
2589 | nonce = prand(); | |
f9c1dcd9 | 2590 | } |
d2f487af | 2591 | continue; |
0a39986e | 2592 | } |
7bc95e2e | 2593 | |
50193c1e | 2594 | switch (cardSTATE) { |
d2f487af | 2595 | case MFEMUL_NOFIELD: |
2596 | case MFEMUL_HALTED: | |
50193c1e | 2597 | case MFEMUL_IDLE:{ |
de77d4ac | 2598 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
50193c1e M |
2599 | break; |
2600 | } | |
2601 | case MFEMUL_SELECT1:{ | |
76ef5273 | 2602 | // select all - 0x93 0x20 |
2603 | if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT && receivedCmd[1] == 0x20)) { | |
d2f487af | 2604 | if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received"); |
9ca155ba | 2605 | EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1)); |
0014cb46 | 2606 | break; |
9ca155ba M |
2607 | } |
2608 | ||
76ef5273 | 2609 | // select card - 0x93 0x70 ... |
2610 | if (len == 9 && | |
2611 | (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) { | |
2612 | if (MF_DBGLEVEL >= 4) | |
2613 | Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]); | |
2614 | ||
c872d8c1 | 2615 | switch(_UID_LEN) { |
2616 | case 4: | |
2617 | cardSTATE = MFEMUL_WORK; | |
2618 | LED_B_ON(); | |
2619 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer); | |
76ef5273 | 2620 | EmSendCmd(rSAKfinal, sizeof(rSAKfinal)); |
c872d8c1 | 2621 | break; |
2622 | case 7: | |
2623 | cardSTATE = MFEMUL_SELECT2; | |
2624 | EmSendCmd(rSAK1, sizeof(rSAK1)); | |
2625 | break; | |
2626 | case 10: | |
2627 | cardSTATE = MFEMUL_SELECT2; | |
76ef5273 | 2628 | EmSendCmd(rSAK1, sizeof(rSAK1)); |
c872d8c1 | 2629 | break; |
2630 | default:break; | |
8556b852 | 2631 | } |
c872d8c1 | 2632 | } else { |
2633 | cardSTATE_TO_IDLE(); | |
9ca155ba | 2634 | } |
50193c1e M |
2635 | break; |
2636 | } | |
c872d8c1 | 2637 | case MFEMUL_SELECT3:{ |
2638 | if (!len) { | |
de77d4ac | 2639 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
c872d8c1 | 2640 | break; |
2641 | } | |
76ef5273 | 2642 | // select all cl3 - 0x97 0x20 |
c872d8c1 | 2643 | if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3 && receivedCmd[1] == 0x20)) { |
2644 | EmSendCmd(rUIDBCC3, sizeof(rUIDBCC3)); | |
2645 | break; | |
2646 | } | |
76ef5273 | 2647 | // select card cl3 - 0x97 0x70 |
c872d8c1 | 2648 | if (len == 9 && |
2649 | (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3 && | |
2650 | receivedCmd[1] == 0x70 && | |
2651 | memcmp(&receivedCmd[2], rUIDBCC3, 4) == 0) ) { | |
2652 | ||
76ef5273 | 2653 | EmSendCmd(rSAKfinal, sizeof(rSAKfinal)); |
c872d8c1 | 2654 | cardSTATE = MFEMUL_WORK; |
2655 | LED_B_ON(); | |
2656 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol3 time: %d", GetTickCount() - selTimer); | |
2657 | break; | |
2658 | } | |
2659 | cardSTATE_TO_IDLE(); | |
2660 | break; | |
2661 | } | |
d2f487af | 2662 | case MFEMUL_AUTH1:{ |
76ef5273 | 2663 | if( len != 8) { |
d2f487af | 2664 | cardSTATE_TO_IDLE(); |
de77d4ac | 2665 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
d2f487af | 2666 | break; |
2667 | } | |
0c8d25eb | 2668 | |
c872d8c1 | 2669 | uint32_t nr = bytes_to_num(receivedCmd, 4); |
2670 | uint32_t ar = bytes_to_num(&receivedCmd[4], 4); | |
79dcb9e0 | 2671 | |
76ef5273 | 2672 | // Collect AR/NR per keytype & sector |
79dcb9e0 | 2673 | if(flags & FLAG_NR_AR_ATTACK) { |
2674 | for (uint8_t i = 0; i < ATTACK_KEY_COUNT; i++) { | |
6eae192c | 2675 | if ( ar_nr_collected[i+mM]==0 || ((cardAUTHSC == ar_nr_resp[i+mM].sector) && (cardAUTHKEY == ar_nr_resp[i+mM].keytype) && (ar_nr_collected[i+mM] > 0)) ) { |
c872d8c1 | 2676 | // if first auth for sector, or matches sector and keytype of previous auth |
2677 | if (ar_nr_collected[i+mM] < 2) { | |
2678 | // if we haven't already collected 2 nonces for this sector | |
2679 | if (ar_nr_resp[ar_nr_collected[i+mM]].ar != ar) { | |
2680 | // Avoid duplicates... probably not necessary, ar should vary. | |
2681 | if (ar_nr_collected[i+mM]==0) { | |
2682 | // first nonce collect | |
2683 | ar_nr_resp[i+mM].cuid = cuid; | |
2684 | ar_nr_resp[i+mM].sector = cardAUTHSC; | |
2685 | ar_nr_resp[i+mM].keytype = cardAUTHKEY; | |
2686 | ar_nr_resp[i+mM].nonce = nonce; | |
2687 | ar_nr_resp[i+mM].nr = nr; | |
2688 | ar_nr_resp[i+mM].ar = ar; | |
2689 | nonce1_count++; | |
76ef5273 | 2690 | // add this nonce to first moebius nonce |
c872d8c1 | 2691 | ar_nr_resp[i+ATTACK_KEY_COUNT].cuid = cuid; |
2692 | ar_nr_resp[i+ATTACK_KEY_COUNT].sector = cardAUTHSC; | |
2693 | ar_nr_resp[i+ATTACK_KEY_COUNT].keytype = cardAUTHKEY; | |
2694 | ar_nr_resp[i+ATTACK_KEY_COUNT].nonce = nonce; | |
2695 | ar_nr_resp[i+ATTACK_KEY_COUNT].nr = nr; | |
2696 | ar_nr_resp[i+ATTACK_KEY_COUNT].ar = ar; | |
2697 | ar_nr_collected[i+ATTACK_KEY_COUNT]++; | |
76ef5273 | 2698 | } else { // second nonce collect (std and moebius) |
c872d8c1 | 2699 | ar_nr_resp[i+mM].nonce2 = nonce; |
2700 | ar_nr_resp[i+mM].nr2 = nr; | |
2701 | ar_nr_resp[i+mM].ar2 = ar; | |
6eae192c | 2702 | if (!gettingMoebius) { |
c872d8c1 | 2703 | nonce2_count++; |
76ef5273 | 2704 | // check if this was the last second nonce we need for std attack |
c872d8c1 | 2705 | if ( nonce2_count == nonce1_count ) { |
76ef5273 | 2706 | // done collecting std test switch to moebius |
2707 | // first finish incrementing last sample | |
6eae192c | 2708 | ar_nr_collected[i+mM]++; |
76ef5273 | 2709 | // switch to moebius collection |
6eae192c | 2710 | gettingMoebius = true; |
c872d8c1 | 2711 | mM = ATTACK_KEY_COUNT; |
f9c1dcd9 MF |
2712 | if (flags & FLAG_RANDOM_NONCE) { |
2713 | nonce = prand(); | |
2714 | } else { | |
2715 | nonce = nonce*7; | |
2716 | } | |
6eae192c | 2717 | break; |
c872d8c1 | 2718 | } |
2719 | } else { | |
2720 | moebius_n_count++; | |
76ef5273 | 2721 | // if we've collected all the nonces we need - finish. |
c872d8c1 | 2722 | if (nonce1_count == moebius_n_count) finished = true; |
2723 | } | |
79dcb9e0 | 2724 | } |
c872d8c1 | 2725 | ar_nr_collected[i+mM]++; |
79dcb9e0 | 2726 | } |
2727 | } | |
6eae192c | 2728 | // we found right spot for this nonce stop looking |
2729 | break; | |
79dcb9e0 | 2730 | } |
d2f487af | 2731 | } |
2732 | } | |
6eae192c | 2733 | |
d2f487af | 2734 | // --- crypto |
c872d8c1 | 2735 | crypto1_word(pcs, nr , 1); |
2736 | cardRr = ar ^ crypto1_word(pcs, 0, 0); | |
d2f487af | 2737 | |
2738 | // test if auth OK | |
2739 | if (cardRr != prng_successor(nonce, 64)){ | |
b03c0f2d | 2740 | if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x", |
2741 | cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', | |
2742 | cardRr, prng_successor(nonce, 64)); | |
7bc95e2e | 2743 | // Shouldn't we respond anything here? |
d2f487af | 2744 | // Right now, we don't nack or anything, which causes the |
2745 | // reader to do a WUPA after a while. /Martin | |
b03c0f2d | 2746 | // -- which is the correct response. /piwi |
d2f487af | 2747 | cardSTATE_TO_IDLE(); |
de77d4ac | 2748 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
d2f487af | 2749 | break; |
2750 | } | |
2751 | ||
79dcb9e0 | 2752 | //auth successful |
d2f487af | 2753 | ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0); |
2754 | ||
2755 | num_to_bytes(ans, 4, rAUTH_AT); | |
2756 | // --- crypto | |
2757 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); | |
2758 | LED_C_ON(); | |
2759 | cardSTATE = MFEMUL_WORK; | |
b03c0f2d | 2760 | if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d", |
2761 | cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', | |
2762 | GetTickCount() - authTimer); | |
d2f487af | 2763 | break; |
2764 | } | |
50193c1e | 2765 | case MFEMUL_SELECT2:{ |
7bc95e2e | 2766 | if (!len) { |
de77d4ac | 2767 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
7bc95e2e | 2768 | break; |
76ef5273 | 2769 | } |
2770 | // select all cl2 - 0x95 0x20 | |
2771 | if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2 && receivedCmd[1] == 0x20)) { | |
9ca155ba | 2772 | EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2)); |
8556b852 M |
2773 | break; |
2774 | } | |
9ca155ba | 2775 | |
76ef5273 | 2776 | // select cl2 card - 0x95 0x70 xxxxxxxxxxxx |
8556b852 | 2777 | if (len == 9 && |
76ef5273 | 2778 | (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) { |
c872d8c1 | 2779 | switch(_UID_LEN) { |
2780 | case 7: | |
76ef5273 | 2781 | EmSendCmd(rSAKfinal, sizeof(rSAKfinal)); |
c872d8c1 | 2782 | cardSTATE = MFEMUL_WORK; |
2783 | LED_B_ON(); | |
2784 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer); | |
2785 | break; | |
2786 | case 10: | |
76ef5273 | 2787 | EmSendCmd(rSAK1, sizeof(rSAK1)); |
c872d8c1 | 2788 | cardSTATE = MFEMUL_SELECT3; |
2789 | break; | |
2790 | default:break; | |
2791 | } | |
8556b852 M |
2792 | break; |
2793 | } | |
0014cb46 M |
2794 | |
2795 | // i guess there is a command). go into the work state. | |
7bc95e2e | 2796 | if (len != 4) { |
de77d4ac | 2797 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
7bc95e2e | 2798 | break; |
2799 | } | |
0014cb46 | 2800 | cardSTATE = MFEMUL_WORK; |
d2f487af | 2801 | //goto lbWORK; |
2802 | //intentional fall-through to the next case-stmt | |
50193c1e | 2803 | } |
51969283 | 2804 | |
7bc95e2e | 2805 | case MFEMUL_WORK:{ |
2806 | if (len == 0) { | |
de77d4ac | 2807 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
7bc95e2e | 2808 | break; |
2809 | } | |
2810 | ||
d2f487af | 2811 | bool encrypted_data = (cardAUTHKEY != 0xFF) ; |
2812 | ||
7bc95e2e | 2813 | if(encrypted_data) { |
51969283 M |
2814 | // decrypt seqence |
2815 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
d2f487af | 2816 | } |
7bc95e2e | 2817 | |
d2f487af | 2818 | if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) { |
6eae192c | 2819 | |
2820 | // if authenticating to a block that shouldn't exist - as long as we are not doing the reader attack | |
2821 | if (receivedCmd[1] >= 16 * 4 && !(flags & FLAG_NR_AR_ATTACK)) { | |
c872d8c1 | 2822 | //is this the correct response to an auth on a out of range block? marshmellow |
2823 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2824 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02x) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]); | |
2825 | break; | |
2826 | } | |
2827 | ||
d2f487af | 2828 | authTimer = GetTickCount(); |
2829 | cardAUTHSC = receivedCmd[1] / 4; // received block num | |
2830 | cardAUTHKEY = receivedCmd[0] - 0x60; | |
2831 | crypto1_destroy(pcs);//Added by martin | |
2832 | crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY)); | |
c872d8c1 | 2833 | //uint64_t key=emlGetKey(cardAUTHSC, cardAUTHKEY); |
2834 | //Dbprintf("key: %04x%08x",(uint32_t)(key>>32)&0xFFFF,(uint32_t)(key&0xFFFFFFFF)); | |
51969283 | 2835 | |
d2f487af | 2836 | if (!encrypted_data) { // first authentication |
b03c0f2d | 2837 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); |
51969283 | 2838 | |
d2f487af | 2839 | crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state |
2840 | num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce | |
7bc95e2e | 2841 | } else { // nested authentication |
b03c0f2d | 2842 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); |
7bc95e2e | 2843 | ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0); |
d2f487af | 2844 | num_to_bytes(ans, 4, rAUTH_AT); |
2845 | } | |
0c8d25eb | 2846 | |
d2f487af | 2847 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); |
2848 | //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]); | |
2849 | cardSTATE = MFEMUL_AUTH1; | |
2850 | break; | |
51969283 | 2851 | } |
7bc95e2e | 2852 | |
8f51ddb0 M |
2853 | // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued |
2854 | // BUT... ACK --> NACK | |
2855 | if (len == 1 && receivedCmd[0] == CARD_ACK) { | |
2856 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2857 | break; | |
2858 | } | |
2859 | ||
2860 | // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK) | |
2861 | if (len == 1 && receivedCmd[0] == CARD_NACK_NA) { | |
2862 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2863 | break; | |
0a39986e M |
2864 | } |
2865 | ||
7bc95e2e | 2866 | if(len != 4) { |
de77d4ac | 2867 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
7bc95e2e | 2868 | break; |
2869 | } | |
d2f487af | 2870 | |
2871 | if(receivedCmd[0] == 0x30 // read block | |
2872 | || receivedCmd[0] == 0xA0 // write block | |
b03c0f2d | 2873 | || receivedCmd[0] == 0xC0 // inc |
2874 | || receivedCmd[0] == 0xC1 // dec | |
2875 | || receivedCmd[0] == 0xC2 // restore | |
7bc95e2e | 2876 | || receivedCmd[0] == 0xB0) { // transfer |
2877 | if (receivedCmd[1] >= 16 * 4) { | |
d2f487af | 2878 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
e35031d2 | 2879 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02x) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
d2f487af | 2880 | break; |
2881 | } | |
2882 | ||
7bc95e2e | 2883 | if (receivedCmd[1] / 4 != cardAUTHSC) { |
8f51ddb0 | 2884 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
e35031d2 | 2885 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02x) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC); |
8f51ddb0 M |
2886 | break; |
2887 | } | |
d2f487af | 2888 | } |
2889 | // read block | |
2890 | if (receivedCmd[0] == 0x30) { | |
b03c0f2d | 2891 | if (MF_DBGLEVEL >= 4) { |
d2f487af | 2892 | Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]); |
2893 | } | |
8f51ddb0 M |
2894 | emlGetMem(response, receivedCmd[1], 1); |
2895 | AppendCrc14443a(response, 16); | |
6a1f2d82 | 2896 | mf_crypto1_encrypt(pcs, response, 18, response_par); |
2897 | EmSendCmdPar(response, 18, response_par); | |
d2f487af | 2898 | numReads++; |
7bc95e2e | 2899 | if(exitAfterNReads > 0 && numReads == exitAfterNReads) { |
d2f487af | 2900 | Dbprintf("%d reads done, exiting", numReads); |
2901 | finished = true; | |
2902 | } | |
0a39986e M |
2903 | break; |
2904 | } | |
0a39986e | 2905 | // write block |
d2f487af | 2906 | if (receivedCmd[0] == 0xA0) { |
b03c0f2d | 2907 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]); |
8f51ddb0 | 2908 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); |
8f51ddb0 M |
2909 | cardSTATE = MFEMUL_WRITEBL2; |
2910 | cardWRBL = receivedCmd[1]; | |
0a39986e | 2911 | break; |
7bc95e2e | 2912 | } |
0014cb46 | 2913 | // increment, decrement, restore |
d2f487af | 2914 | if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) { |
b03c0f2d | 2915 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
d2f487af | 2916 | if (emlCheckValBl(receivedCmd[1])) { |
2917 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking"); | |
0014cb46 M |
2918 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2919 | break; | |
2920 | } | |
2921 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2922 | if (receivedCmd[0] == 0xC1) | |
2923 | cardSTATE = MFEMUL_INTREG_INC; | |
2924 | if (receivedCmd[0] == 0xC0) | |
2925 | cardSTATE = MFEMUL_INTREG_DEC; | |
2926 | if (receivedCmd[0] == 0xC2) | |
2927 | cardSTATE = MFEMUL_INTREG_REST; | |
2928 | cardWRBL = receivedCmd[1]; | |
0014cb46 M |
2929 | break; |
2930 | } | |
0014cb46 | 2931 | // transfer |
d2f487af | 2932 | if (receivedCmd[0] == 0xB0) { |
b03c0f2d | 2933 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
0014cb46 M |
2934 | if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1])) |
2935 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2936 | else | |
2937 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
0014cb46 M |
2938 | break; |
2939 | } | |
9ca155ba | 2940 | // halt |
d2f487af | 2941 | if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) { |
9ca155ba | 2942 | LED_B_OFF(); |
0a39986e | 2943 | LED_C_OFF(); |
0014cb46 M |
2944 | cardSTATE = MFEMUL_HALTED; |
2945 | if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer); | |
de77d4ac | 2946 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
0a39986e | 2947 | break; |
9ca155ba | 2948 | } |
d2f487af | 2949 | // RATS |
2950 | if (receivedCmd[0] == 0xe0) {//RATS | |
8f51ddb0 M |
2951 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2952 | break; | |
2953 | } | |
d2f487af | 2954 | // command not allowed |
2955 | if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking"); | |
2956 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
51969283 | 2957 | break; |
8f51ddb0 M |
2958 | } |
2959 | case MFEMUL_WRITEBL2:{ | |
2960 | if (len == 18){ | |
2961 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2962 | emlSetMem(receivedCmd, cardWRBL, 1); | |
2963 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2964 | cardSTATE = MFEMUL_WORK; | |
51969283 | 2965 | } else { |
0014cb46 | 2966 | cardSTATE_TO_IDLE(); |
de77d4ac | 2967 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
8f51ddb0 | 2968 | } |
8f51ddb0 | 2969 | break; |
50193c1e | 2970 | } |
0014cb46 M |
2971 | |
2972 | case MFEMUL_INTREG_INC:{ | |
2973 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2974 | memcpy(&ans, receivedCmd, 4); | |
2975 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2976 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2977 | cardSTATE_TO_IDLE(); | |
2978 | break; | |
7bc95e2e | 2979 | } |
de77d4ac | 2980 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
0014cb46 M |
2981 | cardINTREG = cardINTREG + ans; |
2982 | cardSTATE = MFEMUL_WORK; | |
2983 | break; | |
2984 | } | |
2985 | case MFEMUL_INTREG_DEC:{ | |
2986 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2987 | memcpy(&ans, receivedCmd, 4); | |
2988 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2989 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2990 | cardSTATE_TO_IDLE(); | |
2991 | break; | |
2992 | } | |
de77d4ac | 2993 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
0014cb46 M |
2994 | cardINTREG = cardINTREG - ans; |
2995 | cardSTATE = MFEMUL_WORK; | |
2996 | break; | |
2997 | } | |
2998 | case MFEMUL_INTREG_REST:{ | |
2999 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
3000 | memcpy(&ans, receivedCmd, 4); | |
3001 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
3002 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
3003 | cardSTATE_TO_IDLE(); | |
3004 | break; | |
3005 | } | |
de77d4ac | 3006 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, true); |
0014cb46 M |
3007 | cardSTATE = MFEMUL_WORK; |
3008 | break; | |
3009 | } | |
50193c1e | 3010 | } |
73ab92d1 | 3011 | button_pushed = BUTTON_PRESS(); |
50193c1e M |
3012 | } |
3013 | ||
9ca155ba M |
3014 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
3015 | LEDsoff(); | |
3016 | ||
76ef5273 | 3017 | if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1) { |
79dcb9e0 | 3018 | for ( uint8_t i = 0; i < ATTACK_KEY_COUNT; i++) { |
3019 | if (ar_nr_collected[i] == 2) { | |
3020 | Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i<ATTACK_KEY_COUNT/2) ? "keyA" : "keyB", ar_nr_resp[i].sector); | |
3021 | Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x", | |
3022 | ar_nr_resp[i].cuid, //UID | |
3023 | ar_nr_resp[i].nonce, //NT | |
79dcb9e0 | 3024 | ar_nr_resp[i].nr, //NR1 |
c872d8c1 | 3025 | ar_nr_resp[i].ar, //AR1 |
3026 | ar_nr_resp[i].nr2, //NR2 | |
3027 | ar_nr_resp[i].ar2 //AR2 | |
d2f487af | 3028 | ); |
3029 | } | |
79dcb9e0 | 3030 | } |
c872d8c1 | 3031 | for ( uint8_t i = ATTACK_KEY_COUNT; i < ATTACK_KEY_COUNT*2; i++) { |
3032 | if (ar_nr_collected[i] == 2) { | |
3033 | Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i<ATTACK_KEY_COUNT/2) ? "keyA" : "keyB", ar_nr_resp[i].sector); | |
3034 | Dbprintf("../tools/mfkey/mfkey32v2 %08x %08x %08x %08x %08x %08x %08x", | |
3035 | ar_nr_resp[i].cuid, //UID | |
3036 | ar_nr_resp[i].nonce, //NT | |
3037 | ar_nr_resp[i].nr, //NR1 | |
3038 | ar_nr_resp[i].ar, //AR1 | |
3039 | ar_nr_resp[i].nonce2,//NT2 | |
3040 | ar_nr_resp[i].nr2, //NR2 | |
3041 | ar_nr_resp[i].ar2 //AR2 | |
3042 | ); | |
3043 | } | |
3044 | } | |
d2f487af | 3045 | } |
3000dc4e | 3046 | if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen()); |
79dcb9e0 | 3047 | |
76ef5273 | 3048 | if(flags & FLAG_INTERACTIVE) { // Interactive mode flag, means we need to send ACK |
c872d8c1 | 3049 | //Send the collected ar_nr in the response |
73ab92d1 | 3050 | cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,button_pushed,0,&ar_nr_resp,sizeof(ar_nr_resp)); |
79dcb9e0 | 3051 | } |
15c4dc5a | 3052 | } |
b62a5a84 | 3053 | |
d2f487af | 3054 | |
b62a5a84 M |
3055 | //----------------------------------------------------------------------------- |
3056 | // MIFARE sniffer. | |
3057 | // | |
3058 | //----------------------------------------------------------------------------- | |
5cd9ec01 M |
3059 | void RAMFUNC SniffMifare(uint8_t param) { |
3060 | // param: | |
3061 | // bit 0 - trigger from first card answer | |
3062 | // bit 1 - trigger from first reader 7-bit request | |
39864b0b M |
3063 | |
3064 | // C(red) A(yellow) B(green) | |
b62a5a84 M |
3065 | LEDsoff(); |
3066 | // init trace buffer | |
3000dc4e | 3067 | clear_trace(); |
de77d4ac | 3068 | set_tracing(true); |
b62a5a84 | 3069 | |
b62a5a84 M |
3070 | // The command (reader -> tag) that we're receiving. |
3071 | // The length of a received command will in most cases be no more than 18 bytes. | |
3072 | // So 32 should be enough! | |
f71f4deb | 3073 | uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE]; |
3074 | uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE]; | |
b62a5a84 | 3075 | // The response (tag -> reader) that we're receiving. |
f71f4deb | 3076 | uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE]; |
3077 | uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE]; | |
b62a5a84 | 3078 | |
09ffd16e | 3079 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); |
3080 | ||
f71f4deb | 3081 | // free eventually allocated BigBuf memory |
3082 | BigBuf_free(); | |
3083 | // allocate the DMA buffer, used to stream samples from the FPGA | |
3084 | uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE); | |
7bc95e2e | 3085 | uint8_t *data = dmaBuf; |
3086 | uint8_t previous_data = 0; | |
5cd9ec01 M |
3087 | int maxDataLen = 0; |
3088 | int dataLen = 0; | |
de77d4ac | 3089 | bool ReaderIsActive = false; |
3090 | bool TagIsActive = false; | |
7bc95e2e | 3091 | |
b62a5a84 | 3092 | // Set up the demodulator for tag -> reader responses. |
6a1f2d82 | 3093 | DemodInit(receivedResponse, receivedResponsePar); |
b62a5a84 M |
3094 | |
3095 | // Set up the demodulator for the reader -> tag commands | |
6a1f2d82 | 3096 | UartInit(receivedCmd, receivedCmdPar); |
b62a5a84 M |
3097 | |
3098 | // Setup for the DMA. | |
7bc95e2e | 3099 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer. |
b62a5a84 | 3100 | |
b62a5a84 | 3101 | LED_D_OFF(); |
39864b0b M |
3102 | |
3103 | // init sniffer | |
3104 | MfSniffInit(); | |
b62a5a84 | 3105 | |
b62a5a84 | 3106 | // And now we loop, receiving samples. |
de77d4ac | 3107 | for(uint32_t sniffCounter = 0; true; ) { |
7bc95e2e | 3108 | |
5cd9ec01 M |
3109 | if(BUTTON_PRESS()) { |
3110 | DbpString("cancelled by button"); | |
7bc95e2e | 3111 | break; |
5cd9ec01 M |
3112 | } |
3113 | ||
b62a5a84 M |
3114 | LED_A_ON(); |
3115 | WDT_HIT(); | |
39864b0b | 3116 | |
7bc95e2e | 3117 | if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time |
3118 | // check if a transaction is completed (timeout after 2000ms). | |
3119 | // if yes, stop the DMA transfer and send what we have so far to the client | |
3120 | if (MfSniffSend(2000)) { | |
3121 | // Reset everything - we missed some sniffed data anyway while the DMA was stopped | |
3122 | sniffCounter = 0; | |
3123 | data = dmaBuf; | |
3124 | maxDataLen = 0; | |
de77d4ac | 3125 | ReaderIsActive = false; |
3126 | TagIsActive = false; | |
7bc95e2e | 3127 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer. |
39864b0b | 3128 | } |
39864b0b | 3129 | } |
7bc95e2e | 3130 | |
3131 | int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far | |
3132 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred | |
3133 | if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred | |
3134 | dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed | |
3135 | } else { | |
3136 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed | |
5cd9ec01 M |
3137 | } |
3138 | // test for length of buffer | |
7bc95e2e | 3139 | if(dataLen > maxDataLen) { // we are more behind than ever... |
3140 | maxDataLen = dataLen; | |
f71f4deb | 3141 | if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) { |
5cd9ec01 | 3142 | Dbprintf("blew circular buffer! dataLen=0x%x", dataLen); |
7bc95e2e | 3143 | break; |
b62a5a84 M |
3144 | } |
3145 | } | |
5cd9ec01 | 3146 | if(dataLen < 1) continue; |
b62a5a84 | 3147 | |
7bc95e2e | 3148 | // primary buffer was stopped ( <-- we lost data! |
5cd9ec01 M |
3149 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { |
3150 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
3151 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
55acbb2a | 3152 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
3153 | } |
3154 | // secondary buffer sets as primary, secondary buffer was stopped | |
3155 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
3156 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
b62a5a84 M |
3157 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; |
3158 | } | |
5cd9ec01 M |
3159 | |
3160 | LED_A_OFF(); | |
b62a5a84 | 3161 | |
7bc95e2e | 3162 | if (sniffCounter & 0x01) { |
b62a5a84 | 3163 | |
7bc95e2e | 3164 | if(!TagIsActive) { // no need to try decoding tag data if the reader is sending |
3165 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); | |
3166 | if(MillerDecoding(readerdata, (sniffCounter-1)*4)) { | |
3167 | LED_C_INV(); | |
de77d4ac | 3168 | if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, true)) break; |
b62a5a84 | 3169 | |
7bc95e2e | 3170 | /* And ready to receive another command. */ |
05ddb52c | 3171 | UartInit(receivedCmd, receivedCmdPar); |
7bc95e2e | 3172 | |
3173 | /* And also reset the demod code */ | |
3174 | DemodReset(); | |
3175 | } | |
3176 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
3177 | } | |
3178 | ||
3179 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending | |
3180 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); | |
3181 | if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) { | |
3182 | LED_C_INV(); | |
b62a5a84 | 3183 | |
de77d4ac | 3184 | if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, false)) break; |
39864b0b | 3185 | |
7bc95e2e | 3186 | // And ready to receive another response. |
3187 | DemodReset(); | |
48ece4a7 | 3188 | // And reset the Miller decoder including its (now outdated) input buffer |
3189 | UartInit(receivedCmd, receivedCmdPar); | |
7bc95e2e | 3190 | } |
3191 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
3192 | } | |
b62a5a84 M |
3193 | } |
3194 | ||
7bc95e2e | 3195 | previous_data = *data; |
3196 | sniffCounter++; | |
5cd9ec01 | 3197 | data++; |
d714d3ef | 3198 | if(data == dmaBuf + DMA_BUFFER_SIZE) { |
5cd9ec01 | 3199 | data = dmaBuf; |
b62a5a84 | 3200 | } |
7bc95e2e | 3201 | |
b62a5a84 M |
3202 | } // main cycle |
3203 | ||
3204 | DbpString("COMMAND FINISHED"); | |
3205 | ||
55acbb2a | 3206 | FpgaDisableSscDma(); |
39864b0b M |
3207 | MfSniffEnd(); |
3208 | ||
7bc95e2e | 3209 | Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len); |
b62a5a84 | 3210 | LEDsoff(); |
3803d529 | 3211 | } |